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authorRobert Richter <robert.richter@amd.com>2007-09-03 10:17:39 +0200
committerIngo Molnar <mingo@elte.hu>2008-06-02 11:51:19 +0200
commit831d991821daedd4839073dbca55514432ef1768 (patch)
treef3b9772709fd948c5df7b3e0535d9f62737e7702 /arch/x86/kernel/cpu/amd.c
parent1c47cd638e8302bc38be1f6d81067950e038ebd3 (diff)
x86: add PCI extended config space access for AMD Barcelona
This patch implements PCI extended configuration space access for AMD's Barcelona CPUs. It extends the method using CF8/CFC IO addresses. An x86 capability bit has been introduced that is set for CPUs supporting PCI extended config space accesses. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu/amd.c')
-rw-r--r--arch/x86/kernel/cpu/amd.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 245866828294..99221f9834e4 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -6,6 +6,7 @@
#include <asm/apic.h>
#include <mach_apic.h>
+#include "../setup.h"
#include "cpu.h"
/*
@@ -308,6 +309,9 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
if (cpu_has_xmm2)
set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC);
+
+ if (c->x86 == 0x10)
+ amd_enable_pci_ext_cfg(c);
}
static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 *c, unsigned int size)