From 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Sat, 16 Apr 2005 15:20:36 -0700 Subject: Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip! --- include/asm-sparc/atomic.h | 158 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 158 insertions(+) create mode 100644 include/asm-sparc/atomic.h (limited to 'include/asm-sparc/atomic.h') diff --git a/include/asm-sparc/atomic.h b/include/asm-sparc/atomic.h new file mode 100644 index 000000000000..37f6ab601c3d --- /dev/null +++ b/include/asm-sparc/atomic.h @@ -0,0 +1,158 @@ +/* atomic.h: These still suck, but the I-cache hit rate is higher. + * + * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au) + * + * Additions by Keith M Wesolowski (wesolows@foobazco.org) based + * on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf . + */ + +#ifndef __ARCH_SPARC_ATOMIC__ +#define __ARCH_SPARC_ATOMIC__ + +#include + +typedef struct { volatile int counter; } atomic_t; + +#ifdef __KERNEL__ + +#define ATOMIC_INIT(i) { (i) } + +extern int __atomic_add_return(int, atomic_t *); +extern void atomic_set(atomic_t *, int); + +#define atomic_read(v) ((v)->counter) + +#define atomic_add(i, v) ((void)__atomic_add_return( (int)(i), (v))) +#define atomic_sub(i, v) ((void)__atomic_add_return(-(int)(i), (v))) +#define atomic_inc(v) ((void)__atomic_add_return( 1, (v))) +#define atomic_dec(v) ((void)__atomic_add_return( -1, (v))) + +#define atomic_add_return(i, v) (__atomic_add_return( (int)(i), (v))) +#define atomic_sub_return(i, v) (__atomic_add_return(-(int)(i), (v))) +#define atomic_inc_return(v) (__atomic_add_return( 1, (v))) +#define atomic_dec_return(v) (__atomic_add_return( -1, (v))) + +#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) + +/* + * atomic_inc_and_test - increment and test + * @v: pointer of type atomic_t + * + * Atomically increments @v by 1 + * and returns true if the result is zero, or false for all + * other cases. + */ +#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) + +#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) +#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) + +/* This is the old 24-bit implementation. It's still used internally + * by some sparc-specific code, notably the semaphore implementation. + */ +typedef struct { volatile int counter; } atomic24_t; + +#ifndef CONFIG_SMP + +#define ATOMIC24_INIT(i) { (i) } +#define atomic24_read(v) ((v)->counter) +#define atomic24_set(v, i) (((v)->counter) = i) + +#else +/* We do the bulk of the actual work out of line in two common + * routines in assembler, see arch/sparc/lib/atomic.S for the + * "fun" details. + * + * For SMP the trick is you embed the spin lock byte within + * the word, use the low byte so signedness is easily retained + * via a quick arithmetic shift. It looks like this: + * + * ---------------------------------------- + * | signed 24-bit counter value | lock | atomic_t + * ---------------------------------------- + * 31 8 7 0 + */ + +#define ATOMIC24_INIT(i) { ((i) << 8) } + +static inline int atomic24_read(const atomic24_t *v) +{ + int ret = v->counter; + + while(ret & 0xff) + ret = v->counter; + + return ret >> 8; +} + +#define atomic24_set(v, i) (((v)->counter) = ((i) << 8)) +#endif + +static inline int __atomic24_add(int i, atomic24_t *v) +{ + register volatile int *ptr asm("g1"); + register int increment asm("g2"); + register int tmp1 asm("g3"); + register int tmp2 asm("g4"); + register int tmp3 asm("g7"); + + ptr = &v->counter; + increment = i; + + __asm__ __volatile__( + "mov %%o7, %%g4\n\t" + "call ___atomic24_add\n\t" + " add %%o7, 8, %%o7\n" + : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3) + : "0" (increment), "r" (ptr) + : "memory", "cc"); + + return increment; +} + +static inline int __atomic24_sub(int i, atomic24_t *v) +{ + register volatile int *ptr asm("g1"); + register int increment asm("g2"); + register int tmp1 asm("g3"); + register int tmp2 asm("g4"); + register int tmp3 asm("g7"); + + ptr = &v->counter; + increment = i; + + __asm__ __volatile__( + "mov %%o7, %%g4\n\t" + "call ___atomic24_sub\n\t" + " add %%o7, 8, %%o7\n" + : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3) + : "0" (increment), "r" (ptr) + : "memory", "cc"); + + return increment; +} + +#define atomic24_add(i, v) ((void)__atomic24_add((i), (v))) +#define atomic24_sub(i, v) ((void)__atomic24_sub((i), (v))) + +#define atomic24_dec_return(v) __atomic24_sub(1, (v)) +#define atomic24_inc_return(v) __atomic24_add(1, (v)) + +#define atomic24_sub_and_test(i, v) (__atomic24_sub((i), (v)) == 0) +#define atomic24_dec_and_test(v) (__atomic24_sub(1, (v)) == 0) + +#define atomic24_inc(v) ((void)__atomic24_add(1, (v))) +#define atomic24_dec(v) ((void)__atomic24_sub(1, (v))) + +#define atomic24_add_negative(i, v) (__atomic24_add((i), (v)) < 0) + +/* Atomic operations are already serializing */ +#define smp_mb__before_atomic_dec() barrier() +#define smp_mb__after_atomic_dec() barrier() +#define smp_mb__before_atomic_inc() barrier() +#define smp_mb__after_atomic_inc() barrier() + +#endif /* !(__KERNEL__) */ + +#endif /* !(__ARCH_SPARC_ATOMIC__) */ -- cgit v1.2.3