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authorRalf Baechle <ralf@linux-mips.org>2000-02-14 17:07:36 +0000
committerRalf Baechle <ralf@linux-mips.org>2000-02-14 17:07:36 +0000
commit45b27b0a0652331d104c953a5b192d843fff88f8 (patch)
treeb60e9c126f5fe42dac9a6c06bba9b7abf304154e
parentb5766e7e617734ae2426cc836a2819ed81cace0c (diff)
DDB5074 updates.
-rw-r--r--arch/mips/ddb5074/pci.c64
-rw-r--r--arch/mips/ddb5074/prom.c26
-rw-r--r--arch/mips/ddb5074/setup.c7
3 files changed, 83 insertions, 14 deletions
diff --git a/arch/mips/ddb5074/pci.c b/arch/mips/ddb5074/pci.c
index 2fcd3fbf7..63a7271dc 100644
--- a/arch/mips/ddb5074/pci.c
+++ b/arch/mips/ddb5074/pci.c
@@ -5,7 +5,7 @@
* Albert Dorofeev <albert@sonycom.com>
* Sony Suprastructure Center Europe (SUPC-E), Brussels
*
- * $Id$
+ * $Id: pci.c,v 1.1 2000/01/26 00:07:44 ralf Exp $
*/
#include <linux/init.h>
@@ -171,13 +171,17 @@ struct pci_ops nile4_pci_ops = {
};
-static void __init pcibios_claim_resources(struct pci_bus *bus)
+static void __init pcibios_claim_resources(struct list_head *bus_list)
{
+ struct list_head *ln, *dn;
+ struct pci_bus *bus;
struct pci_dev *dev;
int idx;
- while (bus) {
- for (dev=bus->devices; dev; dev=dev->sibling) {
+ for (ln = bus_list->next; ln != bus_list; ln = ln->next) {
+ bus = pci_bus_b(ln);
+ for (dn = bus->devices.next; dn != &bus->devices; dn = dn->next) {
+ dev = pci_dev_b(dn);
for (idx = 0; idx < PCI_NUM_RESOURCES; idx++) {
struct resource *r = &dev->resource[idx];
struct resource *pr;
@@ -190,9 +194,7 @@ static void __init pcibios_claim_resources(struct pci_bus *bus)
}
}
}
- if (bus->children)
- pcibios_claim_resources(bus->children);
- bus = bus->next;
+ pcibios_claim_resources(&bus->children);
}
}
@@ -202,7 +204,7 @@ void pcibios_init(void)
printk("PCI: Probing PCI hardware\n");
ioport_resource.end = 0x1ffffff;
pci_scan_bus(0, &nile4_pci_ops, NULL);
- pcibios_claim_resources(pci_root);
+ pcibios_claim_resources(&pci_root_buses);
#if 0
{
@@ -224,16 +226,19 @@ void pcibios_init(void)
void pcibios_fixup_bus(struct pci_bus *bus)
{
+ struct list_head *dn;
struct pci_dev *dev;
extern struct pci_dev *pci_pmu; /* for LEDs D2 and D3 */
+ int slot_num, func_num;
u8 t8;
/*
* FIXME: PMON doesn't autoconfigure the PCI devices
* For now we just hardcode them for our configuration
*/
- for (dev = bus->devices; dev; dev = dev->sibling) {
- int slot_num, func_num;
+ printk("PCI: Configuring PCI devices (hardcoded)\n");
+ for (dn = bus->devices.next; dn != &bus->devices; dn = dn->next) {
+ dev = pci_dev_b(dn);
slot_num = PCI_SLOT(dev->devfn);
func_num = PCI_FUNC(dev->devfn);
@@ -277,7 +282,7 @@ void pcibios_fixup_bus(struct pci_bus *bus)
break;
case 4:
printk("[slot 3] Promise Technology IDE UltraDMA/33");
- printk(" Or 3Com 3c905 :-)\n");
+ printk(" or 3Com 3c905 :-)\n");
dev->irq = nile4_to_irq(NILE4_INT_INTC);
dev->resource[0].start = 0x1800000;
dev->resource[0].end = dev->resource[0].start+0x7fffff;
@@ -316,5 +321,42 @@ char *pcibios_setup (char *str)
return str;
}
+void __init pcibios_update_resource(struct pci_dev *dev, struct resource *root,
+ struct resource *res, int resource)
+{
+ unsigned long where, size;
+ u32 reg;
+
+ where = PCI_BASE_ADDRESS_0 + (resource * 4);
+ size = res->end - res->start;
+ pci_read_config_dword(dev, where, &reg);
+ reg = (reg & size) | (((u32)(res->start - root->start)) & ~size);
+ pci_write_config_dword(dev, where, reg);
+}
+
+void __init pcibios_update_irq(struct pci_dev *dev, int irq)
+{
+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
+}
+
+void __init pcibios_fixup_pbus_ranges(struct pci_bus *bus,
+ struct pbus_set_ranges_data *ranges)
+{
+ ranges->io_start -= bus->resource[0]->start;
+ ranges->io_end -= bus->resource[0]->start;
+ ranges->mem_start -= bus->resource[1]->start;
+ ranges->mem_end -= bus->resource[1]->start;
+}
+
+void __init pcibios_align_resource(void *data, struct resource *res,
+ unsigned long size)
+{}
+
+int pci_assign_resource(struct pci_dev *dev, int i)
+{
+ panic("pci_assign_resource: not yet implemented\n");
+}
+
+
struct pci_fixup pcibios_fixups[] = {};
diff --git a/arch/mips/ddb5074/prom.c b/arch/mips/ddb5074/prom.c
index 277d37630..812b92295 100644
--- a/arch/mips/ddb5074/prom.c
+++ b/arch/mips/ddb5074/prom.c
@@ -4,19 +4,29 @@
* Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
* Sony Suprastructure Center Europe (SUPC-E), Brussels
*
- * $Id$
+ * $Id: prom.c,v 1.1 2000/01/26 00:07:44 ralf Exp $
*/
#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
char arcs_cmdline[CL_SIZE];
+extern char _end;
+
+#define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT)
+#define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
+
+
void __init prom_init(const char *s)
{
int i = 0;
+ unsigned long mem_size, free_start, free_end, start_pfn, bootmap_size;
// _serinit();
@@ -28,7 +38,19 @@ void __init prom_init(const char *s)
mips_machgroup = MACH_GROUP_NEC_DDB;
mips_machtype = MACH_NEC_DDB5074;
/* 64 MB non-upgradable */
- mips_memory_upper = KSEG0+64*1024*1024;
+ mem_size = 64 << 20;
+
+ free_start = PHYSADDR(PFN_ALIGN(&_end));
+ free_end = mem_size;
+ start_pfn = PFN_UP((unsigned long)&_end);
+
+ /* Register all the contiguous memory with the bootmem allocator
+ and free it. Be careful about the bootmem freemap. */
+ bootmap_size = init_bootmem(start_pfn, mem_size >> PAGE_SHIFT);
+
+ /* Free the entire available memory after the _end symbol. */
+ free_start += bootmap_size;
+ free_bootmem(free_start, free_end-free_start);
}
void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
diff --git a/arch/mips/ddb5074/setup.c b/arch/mips/ddb5074/setup.c
index 69a455e30..00bfd4c1f 100644
--- a/arch/mips/ddb5074/setup.c
+++ b/arch/mips/ddb5074/setup.c
@@ -4,7 +4,7 @@
* Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
* Sony Suprastructure Center Europe (SUPC-E), Brussels
*
- * $Id$
+ * $Id: setup.c,v 1.1 2000/01/26 00:07:44 ralf Exp $
*/
#include <linux/config.h>
@@ -108,6 +108,11 @@ void __init ddb_setup(void)
rtc_ops = &ddb_rtc_ops;
}
+int __init page_is_ram(unsigned long pagenr)
+{
+ return 1;
+}
+
#define USE_NILE4_SERIAL 0