Mips32 fixes from Carsten.

9 files changed, 90 insertions, 30 deletions

diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index fb73d3db0..1fd8c2590 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -432,12 +432,31 @@ handle_vcei:
 	 * unconditional jump to this vector.
 	 */	
 	NESTED(except_vec_ejtag_debug, 0, sp)
-	PRINT("SDBBP EJTAG debug exception - not handled yet, hang!\n");
-1:	j	1b
+	j	ejtag_debug_handler
 	 nop
 	END(except_vec_ejtag_debug)
 
-	
+	/*
+	 * EJTAG debug exception handler.
+	 */
+	NESTED(ejtag_debug_handler, PT_SIZE, sp)
+	.set	noat
+	.set	noreorder
+	SAVE_ALL
+	PRINT("SDBBP EJTAG debug exception - not handled yet, just ignored!\n");
+	mfc0	k0, $23         # Get EJTAG Debug register.
+	mfc0    k1, $24         # Get DEPC register.
+	bgez	k0, 1f
+	 addiu	k1, k1, 4	# SBDDP inst. in delay slot.
+	addiu	k1, k1, 4
+1:	mtc0	k1, $24
+	RESTORE_ALL
+	.word	0x4200001f      # deret, return EJTAG debug exception.
+	 nop
+	.set	at
+	END(ejtag_debug_handler)
+
+		
 /*
  * Kernel entry point
  */
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 82d44e33e..ac15aae33 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -305,6 +305,13 @@ static inline void cpu_probe(void)
 		switch (mips_cpu.processor_id & 0xff00) {
 		case PRID_IMP_4KC:
 			mips_cpu.cputype = CPU_4KC;
+			goto cpu_4kc;
+		case PRID_IMP_4KEC:
+			mips_cpu.cputype = CPU_4KEC;
+			goto cpu_4kc;
+		case PRID_IMP_4KSC:
+			mips_cpu.cputype = CPU_4KSC;
+cpu_4kc:
 			/* Why do we set all these options by default, THEN query them?? */
 			mips_cpu.cputype = MIPS_CPU_ISA_M32;
 			mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_4KEX | 
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
index 8ff004b55..c5035ad0b 100644
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ b/arch/mips/mips-boards/atlas/atlas_int.c
@@ -51,6 +51,11 @@ irq_desc_t irq_desc[NR_IRQS];
 #define DEBUG_INT(x...)
 #endif
 
+void inline disable_irq_nosync(unsigned int irq_nr)
+{
+	disable_atlas_irq(irq_nr);
+}
+
 void disable_atlas_irq(unsigned int irq_nr)
 {
 	atlas_hw0_icregs->intrsten = (1 << irq_nr);
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c
index 915f0a3e4..e2ba1531d 100644
--- a/arch/mips/mips-boards/generic/memory.c
+++ b/arch/mips/mips-boards/generic/memory.c
@@ -50,6 +50,11 @@ static char *mtypes[3] = {
 };
 #endif
 
+/* References to section boundaries */
+extern char _end;
+
+#define PFN_ALIGN(x)    (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
+
 
 struct prom_pmemblock * __init prom_getmdesc(void)
 {
@@ -94,9 +99,13 @@ struct prom_pmemblock * __init prom_getmdesc(void)
 	mdesc[2].size = 0x00010000;
 #endif
 
-	mdesc[3].type = yamon_free;
+	mdesc[3].type = yamon_dontuse;
 	mdesc[3].base = 0x00100000;
-	mdesc[3].size = memsize - mdesc[3].base;
+	mdesc[3].size = PHYSADDR(PFN_ALIGN(&_end)) - mdesc[3].base;
+
+	mdesc[4].type = yamon_free;
+	mdesc[4].base = PHYSADDR(PFN_ALIGN(&_end));
+	mdesc[4].size = memsize - mdesc[4].base;
 
 	return &mdesc[0];
 }
@@ -118,11 +127,10 @@ void __init prom_meminit(void)
 	struct prom_pmemblock *p;
 
 #ifdef DEBUG
-	int i = 0;
-
 	prom_printf("YAMON MEMORY DESCRIPTOR dump:\n");
 	p = prom_getmdesc();
 	while (p->size) {
+		int i = 0;
 		prom_printf("[%d,%p]: base<%08lx> size<%08lx> type<%s>\n",
 			    i, p, p->base, p->size, mtypes[p->type]);
 		p++;
@@ -130,24 +138,24 @@ void __init prom_meminit(void)
 	}
 #endif
 	p = prom_getmdesc();
+
 	while (p->size) {
-		unsigned long base, size;
 		long type;
+		unsigned long base, size;
 
 		type = prom_memtype_classify (p->type);
 		base = p->base;
 		size = p->size;
 
 		add_memory_region(base, size, type);
-
-		p++;
+                p++; 
 	}
 }
 
-void prom_free_prom_memory (void)
+void __init
+prom_free_prom_memory (void)
 {
 	int i;
-	struct prom_pmemblock *p;
 	unsigned long freed = 0;
 	unsigned long addr;
 
@@ -158,9 +166,9 @@ void prom_free_prom_memory (void)
 		addr = boot_mem_map.map[i].addr;
 		while (addr < boot_mem_map.map[i].addr
 			      + boot_mem_map.map[i].size) {
-		        ClearPageReserved(virt_to_page(phys_to_virt(addr)));
-			set_page_count(virt_to_page(phys_to_virt(addr)), 1);
-			free_page(phys_to_virt(addr));
+			ClearPageReserved(virt_to_page(__va(addr)));
+			set_page_count(virt_to_page(__va(addr)), 1);
+			free_page(__va(addr));
 			addr += PAGE_SIZE;
 			freed += PAGE_SIZE;
 		}
diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c
index 085fefcdb..fdfe32c75 100644
--- a/arch/mips/mips-boards/malta/malta_int.c
+++ b/arch/mips/mips-boards/malta/malta_int.c
@@ -69,6 +69,10 @@ static struct irqaction *irq_action[8] = {
  */
 static unsigned int cached_int_mask = 0xffff;
 
+void inline disable_irq_nosync(unsigned int irq_nr)
+{
+	disable_irq(irq_nr);
+}
 
 void disable_irq(unsigned int irq_nr)
 {
diff --git a/drivers/scsi/sym53c8xx_defs.h b/drivers/scsi/sym53c8xx_defs.h
index 2ad3afd3c..3d38346f9 100644
--- a/drivers/scsi/sym53c8xx_defs.h
+++ b/drivers/scsi/sym53c8xx_defs.h
@@ -408,11 +408,6 @@
 #define	readl_l2b(a)	le32_to_cpu(readl(a))
 #define	writew_b2l(v,a)	writew(cpu_to_le16(v),a)
 #define	writel_b2l(v,a)	writel(cpu_to_le32(v),a)
-#else	/* Other bid-endian */
-#define	readw_l2b	readw
-#define	readl_l2b	readl
-#define	writew_b2l	writew
-#define	writel_b2l	writel
 #elif defined(__mips__)
 #define readw_l2b	readw
 #define readl_l2b	readl
@@ -422,6 +417,11 @@
 #define inl_l2b 	inl
 #define outw_b2l	outw
 #define outl_b2l	outl
+#else	/* Other big-endian */
+#define	readw_l2b	readw
+#define	readl_l2b	readl
+#define	writew_b2l	writew
+#define	writel_b2l	writel
 #endif
 
 #else	/* little endian */
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index 2bb64bfc5..7c2bb1777 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -233,15 +233,18 @@
 #define CPU_TX3912		34
 #define CPU_TX3922		35
 #define CPU_TX3927		36
-#define CPU_AU1000              37
-#define CPU_LAST		37
+#define CPU_AU1000		37
+#define CPU_4KEC		37
+#define CPU_4KSC		38
+#define CPU_LAST		39
 
 #define CPU_NAMES { "unknown", "R2000", "R3000", "R3000A", "R3041", "R3051", \
         "R3052", "R3081", "R3081E", "R4000PC", "R4000SC", "R4000MC",         \
         "R4200", "R4400PC", "R4400SC", "R4400MC", "R4600", "R6000",          \
         "R6000A", "R8000", "R10000", "R4300", "R4650", "R4700", "R5000",     \
         "R5000A", "R4640", "Nevada", "RM7000", "R5432", "MIPS 4Kc",          \
-        "MIPS 5Kc", "R4310", "SiByte SB1", "TX3912", "TX3922", "TX3927", "Au1000" }
+        "MIPS 5Kc", "R4310", "SiByte SB1", "TX3912", "TX3922", "TX3927",     \
+	"Au1000", "MIPS 4KEc", "MIPS 4KSc" }
 
 #define COMMAND_LINE_SIZE	256
 
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 439928ad4..73c4a711d 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -59,6 +59,8 @@
 #define PRID_IMP_NEVADA		0x2800		/* RM5260 ??? */
 #define PRID_IMP_4KC		0x8000
 #define PRID_IMP_5KC		0x8100
+#define PRID_IMP_4KEC		0x8400
+#define PRID_IMP_4KSC		0x8600
 
 
 #define PRID_IMP_UNKNOWN	0xff00
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index 2da7fbd45..d46cecef9 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -1,12 +1,13 @@
 /*
- *  include/asm-mips/stackframe.h
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
  *
- *  Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Paul M. Antoine.
- *
- * $Id: stackframe.h,v 1.10 1999/08/13 17:07:27 harald Exp $
+ *  Copyright (C) 1994, 1995, 1996, 2001 Ralf Baechle
+ *  Copyright (C) 1994, 1995, 1996 Paul M. Antoine.
  */
-#ifndef __ASM_MIPS_STACKFRAME_H
-#define __ASM_MIPS_STACKFRAME_H
+#ifndef __ASM_STACKFRAME_H
+#define __ASM_STACKFRAME_H
 
 #include <asm/addrspace.h>
 #include <asm/mipsregs.h>
@@ -235,6 +236,16 @@ __asm__ (                                                               \
 
 #endif
 
+#define RESTORE_SP                                       \
+		lw	sp,  PT_R29(sp);                 \
+
+#define RESTORE_ALL                                      \
+		RESTORE_SOME;                            \
+		RESTORE_AT;                              \
+		RESTORE_TEMP;                            \
+		RESTORE_STATIC;                          \
+		RESTORE_SP
+
 #define RESTORE_ALL_AND_RET                              \
 		RESTORE_SOME;                            \
 		RESTORE_AT;                              \
@@ -242,6 +253,7 @@ __asm__ (                                                               \
 		RESTORE_STATIC;                          \
 		RESTORE_SP_AND_RET
 
+
 /*
  * Move to kernel mode and disable interrupts.
  * Set cp0 enable bit as sign that we're running on the kernel stack
@@ -275,4 +287,4 @@ __asm__ (                                                               \
 		xori	t0,0x1e;                        \
 		mtc0	t0,CP0_STATUS
 
-#endif /* __ASM_MIPS_STACKFRAME_H */
+#endif /* __ASM_STACKFRAME_H */