Remove leftovers from the "cyclecounter_available"

and replace by mips_cpu.options & MIPS_CPU_COUNTER

3 files changed, 2 insertions, 17 deletions

diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 671a6da84..2255f2008 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -73,7 +73,7 @@ int get_cpuinfo(char *buffer)
 	len += sprintf(buffer + len, "wait instruction\t: %s\n",
 	               cpu_wait ? "yes" : "no");
 	len += sprintf(buffer + len, "microsecond timers\t: %s\n",
-	               cyclecounter_available ? "yes" : "no");
+	               (mips_cpu.options & MIPS_CPU_COUNTER) ? "yes" : "no");
 	len += sprintf(buffer + len, "extra interrupt vector\t: %s\n",
 	               dedicated_iv_available ? "yes" : "no");
 	len += sprintf(buffer + len, "hardware watchpoint\t: %s\n",
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 52bf04548..d9af83707 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -59,11 +59,6 @@ struct mips_cpuinfo boot_cpu_data = { 0, NULL, NULL, 0 };
 void (*cpu_wait)(void) = NULL;
 
 /*
- * Do we have a cyclecounter available?
- */
-char cyclecounter_available;
-
-/*
  * There are several bus types available for MIPS machines.  "RISC PC"
  * type machines have ISA, EISA, VLB or PCI available, DECstations
  * have Turbochannel or Q-Bus, SGI has GIO, there are lots of VME
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index b6e1f7a6c..d42ff610e 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -453,14 +453,6 @@ void indy_r4k_timer_interrupt (struct pt_regs *regs)
 	r4k_timer_interrupt (INDY_R4K_TIMER_IRQ, NULL, regs);
 }
 
-char cyclecounter_available;
-
-static inline void init_cycle_counter(void)
-{
-	if(mips_cpu.options & MIPS_CPU_COUNTER) cyclecounter_available = 1;
-	else cyclecounter_available = 0;
-}
-
 struct irqaction irq0  = { timer_interrupt, SA_INTERRUPT, 0,
                                   "timer", NULL, NULL};
 
@@ -517,9 +509,7 @@ void __init time_init(void)
 	xtime.tv_usec = 0;
 	write_unlock_irq (&xtime_lock);
 
-	init_cycle_counter();
-
-	if (cyclecounter_available) {
+	if (mips_cpu.options & MIPS_CPU_COUNTER) {
 		write_32bit_cp0_register(CP0_COUNT, 0);
 		do_gettimeoffset = do_fast_gettimeoffset;
 		irq0.handler = r4k_timer_interrupt;