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authorRalf Baechle <ralf@linux-mips.org>2001-04-05 04:55:58 +0000
committerRalf Baechle <ralf@linux-mips.org>2001-04-05 04:55:58 +0000
commit74a9f2e1b4d3ab45a9f72cb5b556c9f521524ab3 (patch)
tree7c4cdb103ab1b388c9852a88bd6fb1e73eba0b5c /Documentation/cachetlb.txt
parentee6374c8b0d333c08061c6a97bc77090d7461225 (diff)
Merge with Linux 2.4.3.
Note that mingetty does no longer work with serial console, you have to switch to another getty like getty_ps. This commit also includes a fix for a setitimer bug which did prevent getty_ps from working on older kernels.
Diffstat (limited to 'Documentation/cachetlb.txt')
-rw-r--r--Documentation/cachetlb.txt14
1 files changed, 7 insertions, 7 deletions
diff --git a/Documentation/cachetlb.txt b/Documentation/cachetlb.txt
index c47cd632d..dd8a5e4ab 100644
--- a/Documentation/cachetlb.txt
+++ b/Documentation/cachetlb.txt
@@ -229,9 +229,9 @@ other cases. Please keep in mind that fact that, for a given page
mapped into some user address space, there is always at least one more
mapping, that of the kernel in it's linear mapping starting at
PAGE_OFFSET. So immediately, once the first user maps a given
-physical page into it's address space, by implication the D-cache
+physical page into its address space, by implication the D-cache
aliasing problem has the potential to exist since the kernel already
-maps this page at it's virtual address.
+maps this page at its virtual address.
First, I describe the old method to deal with this problem. I am
describing it for documentation purposes, but it is deprecated and the
@@ -252,11 +252,11 @@ existing ports should move over to the new mechanism as well.
Admittedly, the author did not think very much when designing this
interface. It does not give the architecture enough information about
-what exactly is going on, and there is not context with which to base
-any judgment about whether an alias is possible at all. The new
-interfaces to deal with D-cache aliasing are meant to address this by
-telling the architecture specific code exactly which is going on at
-the proper points in time.
+what exactly is going on, and there is no context to base a judgment
+on about whether an alias is possible at all. The new interfaces to
+deal with D-cache aliasing are meant to address this by telling the
+architecture specific code exactly which is going on at the proper points
+in time.
Here is the new interface: