diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2000-07-21 22:00:56 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2000-07-21 22:00:56 +0000 |
| commit | 168660f24dfc46c2702acbe4701a446f42a59578 (patch) | |
| tree | f431368afbf6b1b71809cf3fd904d800ea126f4d /arch/alpha/kernel/sys_noritake.c | |
| parent | 6420f767924fa73b0ea267864d96820815f4ba5a (diff) | |
Merge with Linux 2.4.0-test5-pre3.
Diffstat (limited to 'arch/alpha/kernel/sys_noritake.c')
| -rw-r--r-- | arch/alpha/kernel/sys_noritake.c | 37 |
1 files changed, 34 insertions, 3 deletions
diff --git a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c index 8ef79db13..6e777c3ab 100644 --- a/arch/alpha/kernel/sys_noritake.c +++ b/arch/alpha/kernel/sys_noritake.c @@ -40,8 +40,10 @@ static inline void noritake_update_irq_hw(int irq, int mask) { int port = 0x54a; - if (irq >= 16) mask >>= 16; - if (irq >= 16) port = 0x54c; + if (irq >= 32) { + mask >>= 16; + port = 0x54c; + } outw(mask, port); } @@ -260,6 +262,35 @@ noritake_swizzle(struct pci_dev *dev, u8 *pinp) return slot; } +#if defined(CONFIG_ALPHA_GENERIC) || !defined(CONFIG_ALPHA_PRIMO) +static void +noritake_apecs_machine_check(unsigned long vector, unsigned long la_ptr, + struct pt_regs * regs) +{ +#define MCHK_NO_DEVSEL 0x205U +#define MCHK_NO_TABT 0x204U + + struct el_common *mchk_header; + unsigned int code; + + mchk_header = (struct el_common *)la_ptr; + + /* Clear the error before any reporting. */ + mb(); + mb(); /* magic */ + draina(); + apecs_pci_clr_err(); + wrmces(0x7); + mb(); + + code = mchk_header->code; + process_mcheck_info(vector, la_ptr, regs, "NORITAKE APECS", + (mcheck_expected(0) + && (code == MCHK_NO_DEVSEL + || code == MCHK_NO_TABT))); +} +#endif + /* * The System Vectors @@ -272,7 +303,7 @@ struct alpha_machine_vector noritake_mv __initmv = { DO_DEFAULT_RTC, DO_APECS_IO, DO_APECS_BUS, - machine_check: apecs_machine_check, + machine_check: noritake_apecs_machine_check, max_dma_address: ALPHA_MAX_DMA_ADDRESS, min_io_address: EISA_DEFAULT_IO_BASE, min_mem_address: APECS_AND_LCA_DEFAULT_MEM_BASE, |