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authorRalf Baechle <ralf@linux-mips.org>1998-08-25 09:12:35 +0000
committerRalf Baechle <ralf@linux-mips.org>1998-08-25 09:12:35 +0000
commitc7fc24dc4420057f103afe8fc64524ebc25c5d37 (patch)
tree3682407a599b8f9f03fc096298134cafba1c9b2f /arch/arm/mm/proc-arm6,7.S
parent1d793fade8b063fde3cf275bf1a5c2d381292cd9 (diff)
o Merge with Linux 2.1.116.
o New Newport console code. o New G364 console code.
Diffstat (limited to 'arch/arm/mm/proc-arm6,7.S')
-rw-r--r--arch/arm/mm/proc-arm6,7.S12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mm/proc-arm6,7.S b/arch/arm/mm/proc-arm6,7.S
index a853671fc..f4f4dfee9 100644
--- a/arch/arm/mm/proc-arm6,7.S
+++ b/arch/arm/mm/proc-arm6,7.S
@@ -347,12 +347,11 @@ _arm6_7_proc_fin:
*
* Purpose : Set a PMD and flush it out of any WB cache
*/
-_arm6_set_pmd: and r2, r1, #3
- teq r2, #2
- andeq r2, r1, #8
- orreq r1, r1, r2, lsl #1 @ Updatable = Cachable
+_arm6_set_pmd: and r2, r1, #11
teq r2, #1
- orreq r1, r1, #16 @ Updatable = 1 if Page table
+ teqne r2, #9
+ teqne r2, #10
+ orreq r1, r1, #16 @ Updatable = 1 if Page table/Cacheable section
str r1, [r0]
mov pc, lr
@@ -364,7 +363,8 @@ _arm6_set_pmd: and r2, r1, #3
*
* Purpose : Set a PMD and flush it out of any WB cache
*/
-_arm7_set_pmd: orr r1, r1, #16 @ Updatable bit is always set on ARM7
+_arm7_set_pmd: tst r1, #3
+ orrne r1, r1, #16 @ Updatable bit is always set on ARM7
str r1, [r0]
mov pc, lr