diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2001-06-05 23:24:07 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2001-06-05 23:24:07 +0000 |
| commit | 1385617929e09545f9858785ea3dc1068fedfde1 (patch) | |
| tree | 728aa64786357d033a263299df97c98b28f31f0c /arch/mips/gt64120/common/pci.c | |
| parent | e4598d1f9097360d265a55f468db81d751e29a1d (diff) | |
Support 512mb RAM configuration for Momenco Ocelot. Patch from
David Woodhouse (dwmw2@infradead.org).
Diffstat (limited to 'arch/mips/gt64120/common/pci.c')
| -rw-r--r-- | arch/mips/gt64120/common/pci.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/gt64120/common/pci.c b/arch/mips/gt64120/common/pci.c index e74b86bd6..dc50b1b3c 100644 --- a/arch/mips/gt64120/common/pci.c +++ b/arch/mips/gt64120/common/pci.c @@ -1113,15 +1113,15 @@ void __init pcibios_init(void) pci0WriteConfigReg(PCI_COMMAND, &controller, tmp); /* This scans the PCI bus and sets up initial values. */ - // scan_and_initialize_pci(); + scan_and_initialize_pci(); /* * Reset PCI I/O and PCI MEM values to ones supported by EVM. */ - ioport_resource.start = 0x10000000; - ioport_resource.end = 0x11ffffff; /* 32 MB */ - iomem_resource.start = 0x12000000; - iomem_resource.end = 0x13ffffff; /* 32 MB */ + ioport_resource.start = GT_PCI_IO_BASE; + ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1; + iomem_resource.start = GT_PCI_MEM_BASE; + iomem_resource.end = GT_PCI_MEM_BASE + GT_PCI_MEM_BASE - 1; pci_scan_bus(0, &galileo_pci_ops, NULL); } |