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authorRalf Baechle <ralf@linux-mips.org>2001-02-21 13:30:36 +0000
committerRalf Baechle <ralf@linux-mips.org>2001-02-21 13:30:36 +0000
commit49a3beac398bd3e89dc4c8a5caff106cbd1e0cff (patch)
tree4f9a8bfdbe571a81ca63b73ae45c0b466661fb35 /arch/mips/ite-boards/qed-4n-s01b
parentb8d3cc7ceb61a07b865b420139477b91a4be202f (diff)
ITE 8172 patches from Pete Popov slightly hacked by me.
Diffstat (limited to 'arch/mips/ite-boards/qed-4n-s01b')
-rw-r--r--arch/mips/ite-boards/qed-4n-s01b/.cvsignore2
-rw-r--r--arch/mips/ite-boards/qed-4n-s01b/Makefile37
-rw-r--r--arch/mips/ite-boards/qed-4n-s01b/README2
-rw-r--r--arch/mips/ite-boards/qed-4n-s01b/init.c89
-rw-r--r--arch/mips/ite-boards/qed-4n-s01b/pci_fixup.c197
5 files changed, 327 insertions, 0 deletions
diff --git a/arch/mips/ite-boards/qed-4n-s01b/.cvsignore b/arch/mips/ite-boards/qed-4n-s01b/.cvsignore
new file mode 100644
index 000000000..857dd22e9
--- /dev/null
+++ b/arch/mips/ite-boards/qed-4n-s01b/.cvsignore
@@ -0,0 +1,2 @@
+.depend
+.*.flags
diff --git a/arch/mips/ite-boards/qed-4n-s01b/Makefile b/arch/mips/ite-boards/qed-4n-s01b/Makefile
new file mode 100644
index 000000000..3929a0c34
--- /dev/null
+++ b/arch/mips/ite-boards/qed-4n-s01b/Makefile
@@ -0,0 +1,37 @@
+#
+# Copyright 2000 MontaVista Software Inc.
+# Author: MontaVista Software, Inc.
+# ppopov@mvista.com or support@mvista.com
+#
+# Makefile for the ITE 8172 (qed-4n-s01b) board, board
+# specific files.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+.S.s:
+ $(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+ $(CC) $(CFLAGS) -c $< -o $*.o
+
+all: ite.o
+
+O_TARGET := ite.o
+
+obj-y := init.o
+
+ifdef CONFIG_PCI
+obj-y += pci_fixup.o
+endif
+
+ifdef CONFIG_BLK_DEV_INITRD
+obj-y += le_ramdisk.o
+endif
+
+
+dep:
+ $(CPP) -M *.c > .depend
+
+include $(TOPDIR)/Rules.make
diff --git a/arch/mips/ite-boards/qed-4n-s01b/README b/arch/mips/ite-boards/qed-4n-s01b/README
new file mode 100644
index 000000000..fb4b5197e
--- /dev/null
+++ b/arch/mips/ite-boards/qed-4n-s01b/README
@@ -0,0 +1,2 @@
+This is an ITE (www.iteusa.com) eval board for the ITE 8172G
+system controller, with a QED 5231 CPU.
diff --git a/arch/mips/ite-boards/qed-4n-s01b/init.c b/arch/mips/ite-boards/qed-4n-s01b/init.c
new file mode 100644
index 000000000..5599b31dc
--- /dev/null
+++ b/arch/mips/ite-boards/qed-4n-s01b/init.c
@@ -0,0 +1,89 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * IT8172/QED5231 board setup.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or support@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <linux/config.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <asm/it8172/it8172.h>
+#include <asm/it8172/it8172_dbg.h>
+
+int prom_argc;
+char **prom_argv, **prom_envp;
+
+extern char _end;
+extern void __init prom_init_cmdline(void);
+extern unsigned long __init prom_get_memsize(void);
+extern void __init it8172_init_ram_resource(unsigned long memsize);
+
+#define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT)
+#define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
+
+
+int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+{
+ unsigned long mem_size, free_start, free_end, bootmap_size;
+ unsigned long pcicr;
+
+ prom_argc = argc;
+ prom_argv = argv;
+ prom_envp = envp;
+
+ puts("ITE board running...");
+
+ mips_machgroup = MACH_GROUP_ITE;
+ mips_machtype = MACH_QED_4N_S01B; /* ITE board name/number */
+
+ prom_init_cmdline();
+ mem_size = prom_get_memsize();
+
+ printk("Memory size: %dMB\n", (unsigned)mem_size);
+
+ mem_size <<= 20; /* MB */
+
+ /*
+ * make the entire physical memory visible to pci bus masters
+ */
+ IT_READ(IT_MC_PCICR, pcicr);
+ pcicr &= ~0x1f;
+ pcicr |= (mem_size - 1) >> 22;
+ IT_WRITE(IT_MC_PCICR, pcicr);
+
+ it8172_init_ram_resource(mem_size);
+ add_memory_region(0, 20 << 20, BOOT_MEM_RAM);
+
+ return 0;
+}
diff --git a/arch/mips/ite-boards/qed-4n-s01b/pci_fixup.c b/arch/mips/ite-boards/qed-4n-s01b/pci_fixup.c
new file mode 100644
index 000000000..befceffa3
--- /dev/null
+++ b/arch/mips/ite-boards/qed-4n-s01b/pci_fixup.c
@@ -0,0 +1,197 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * Board specific pci fixups.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or support@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+
+#ifdef CONFIG_PCI
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/it8172/it8172.h>
+#include <asm/it8172/it8172_pci.h>
+#include <asm/it8172/it8172_int.h>
+
+void __init board_int_line_fixup(struct pci_dev *dev)
+{
+ unsigned int slot, func;
+ unsigned char pin;
+ const int internal_func_irqs[7] = {
+ IT8172_AC97_IRQ,
+ IT8172_DMA_IRQ,
+ IT8172_CDMA_IRQ,
+ IT8172_USB_IRQ,
+ IT8172_BRIDGE_MASTER_IRQ,
+ IT8172_IDE_IRQ,
+ IT8172_MC68K_IRQ
+ };
+
+#ifdef DEBUG
+ printk("board_int_line_fixup bus %d\n", dev->bus->number);
+#endif
+ if (dev->bus->number != 0)
+ return;
+
+ pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
+
+#ifdef DEBUG
+ pci_read_config_dword(dev, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
+#endif
+
+ slot = PCI_SLOT(dev->devfn);
+ func = PCI_FUNC(dev->devfn);
+
+ switch (slot) {
+ case 0x01:
+ /*
+ * Internal device 1 is actually 7 different internal
+ * devices on the IT8172G (a multi-function device).
+ */
+ if (func < 7)
+ dev->irq = internal_func_irqs[func];
+ break;
+ case 0x10:
+ switch (pin) {
+ case 1: /* pin A */
+ dev->irq = IT8172_PCI_INTA_IRQ;
+ break;
+ case 2: /* pin B */
+ dev->irq = IT8172_PCI_INTB_IRQ;
+ break;
+ case 3: /* pin C */
+ dev->irq = IT8172_PCI_INTC_IRQ;
+ break;
+ case 4: /* pin D */
+ dev->irq = IT8172_PCI_INTD_IRQ;
+ break;
+ default:
+ dev->irq = 0xff;
+ break;
+
+ }
+ break;
+ case 0x11:
+ switch (pin) {
+ case 1: /* pin A */
+ dev->irq = IT8172_PCI_INTA_IRQ;
+ break;
+ case 2: /* pin B */
+ dev->irq = IT8172_PCI_INTB_IRQ;
+ break;
+ case 3: /* pin C */
+ dev->irq = IT8172_PCI_INTC_IRQ;
+ break;
+ case 4: /* pin D */
+ dev->irq = IT8172_PCI_INTD_IRQ;
+ break;
+ default:
+ dev->irq = 0xff;
+ break;
+
+ }
+ break;
+ case 0x12:
+ switch (pin) {
+ case 1: /* pin A */
+ dev->irq = IT8172_PCI_INTB_IRQ;
+ break;
+ case 2: /* pin B */
+ dev->irq = IT8172_PCI_INTC_IRQ;
+ break;
+ case 3: /* pin C */
+ dev->irq = IT8172_PCI_INTD_IRQ;
+ break;
+ case 4: /* pin D */
+ dev->irq = IT8172_PCI_INTA_IRQ;
+ break;
+ default:
+ dev->irq = 0xff;
+ break;
+
+ }
+ break;
+ case 0x13:
+ switch (pin) {
+ case 1: /* pin A */
+ dev->irq = IT8172_PCI_INTC_IRQ;
+ break;
+ case 2: /* pin B */
+ dev->irq = IT8172_PCI_INTD_IRQ;
+ break;
+ case 3: /* pin C */
+ dev->irq = IT8172_PCI_INTA_IRQ;
+ break;
+ case 4: /* pin D */
+ dev->irq = IT8172_PCI_INTB_IRQ;
+ break;
+ default:
+ dev->irq = 0xff;
+ break;
+
+ }
+ break;
+ case 0x14:
+ switch (pin) {
+ case 1: /* pin A */
+ dev->irq = IT8172_PCI_INTD_IRQ;
+ break;
+ case 2: /* pin B */
+ dev->irq = IT8172_PCI_INTA_IRQ;
+ break;
+ case 3: /* pin C */
+ dev->irq = IT8172_PCI_INTB_IRQ;
+ break;
+ case 4: /* pin D */
+ dev->irq = IT8172_PCI_INTC_IRQ;
+ break;
+ default:
+ dev->irq = 0xff;
+ break;
+
+ }
+ break;
+ default:
+ return;
+ }
+
+#ifdef DEBUG
+ printk("irq fixup: slot %d, vendor %x, int line %d, int number %d\n",
+ slot, vendor, pin, dev->irq);
+#endif
+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
+
+}
+
+struct pci_fixup pcibios_fixups[] = {
+ { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, board_int_line_fixup },
+ { 0 }
+};
+#endif