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authorRalf Baechle <ralf@linux-mips.org>2001-03-28 01:35:12 +0000
committerRalf Baechle <ralf@linux-mips.org>2001-03-28 01:35:12 +0000
commit0b9049739779f6052eb8069f3dde7c3a7f14a591 (patch)
tree9630c1ea481dd1c429a2692067316237957d6e07 /arch/mips/kernel/r4k_switch.S
parent12e00f34ea0db712ce70bc3eed334c81b3d6a344 (diff)
SMP for 32-bit kernel, support for Sibyte SB1. Patch from Justin
with minor changes by me.
Diffstat (limited to 'arch/mips/kernel/r4k_switch.S')
-rw-r--r--arch/mips/kernel/r4k_switch.S12
1 files changed, 10 insertions, 2 deletions
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index e1d10f92d..10328f4ad 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -1,5 +1,4 @@
-/* $Id: r4k_switch.S,v 1.9 1999/08/18 23:37:44 ralf Exp $
- *
+/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
@@ -50,7 +49,16 @@
move $28, a1
CPU_RESTORE_NONSCRATCH($28)
addiu t0, $28, KERNEL_STACK_SIZE-32
+#ifdef CONFIG_SMP
+ mfc0 a3, CP0_CONTEXT
+ la t1, kernelsp
+ srl a3, 23
+ sll a3, 2
+ addu t1, a3, t1
+ sw t0, (t1)
+#else
sw t0, kernelsp
+#endif
mfc0 t1, CP0_STATUS /* Do we really need this? */
li a3, 0xff00
and t1, a3