diff options
author | Ralf Baechle <ralf@linux-mips.org> | 1998-07-16 19:10:01 +0000 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 1998-07-16 19:10:01 +0000 |
commit | 1ace72167d23543960d517e3d444762cb92bd211 (patch) | |
tree | c5d5aaf9501edcc48dc8dfdca9ed694d0d26763f /arch/mips/kernel/r4k_switch.S | |
parent | cb9368e29107fdf541cb68499a04f67949c131c5 (diff) |
- Reformat ptrace.c for readability.
- Handle lazy fpu context switches correctly for ptrace(2).
- Don't read $fcr31 on context switch, it's pure bloat.
- New processes get $fcr31 initialized to no exceptions.
- First beginnings of floating point support kernel code. For now we
only can handle cvt.w.s and cvt.w.d instructions where the source
register is a NaN, infinity or denorm. This is good enough to get
Mozilla up.
- Don't send SIGFPE on every floating point instruction we don't know
how to handle, rather just complain.
- Cleanup headerfile inclusions in the HPC3 code.
- Fix the definition of PAGE_NONE.
Diffstat (limited to 'arch/mips/kernel/r4k_switch.S')
-rw-r--r-- | arch/mips/kernel/r4k_switch.S | 22 |
1 files changed, 9 insertions, 13 deletions
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S index 765de0d85..e8bc524a4 100644 --- a/arch/mips/kernel/r4k_switch.S +++ b/arch/mips/kernel/r4k_switch.S @@ -1,12 +1,12 @@ -/* - * r4k_switch.S: R4xx0 specific task switching code. +/* $Id: r4k_switch.S,v 1.3 1998/04/05 11:23:52 ralf Exp $ * - * Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Andreas Busse + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. * - * Multi-cpu abstraction and macros for easier reading: + * Copyright (C) 1994, 1995, 1996, 1998 by Ralf Baechle * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) - * - * $Id: r4k_switch.S,v 1.3 1998/04/04 13:59:38 ralf Exp $ + * Copyright (C) 1994, 1995, 1996, by Andreas Busse */ #include <asm/asm.h> #include <asm/bootinfo.h> @@ -28,12 +28,8 @@ .set mips3 .align 5 LEAF(r4xx0_resume) - mfc0 t1, CP0_STATUS # fp exception boundary - sll t0, t1, 2 - bgez t0, 1f - nop - cfc1 zero, fcr31 -1: sw t1, THREAD_STATUS($28) + mfc0 t1, CP0_STATUS + sw t1, THREAD_STATUS($28) CPU_SAVE_NONSCRATCH($28) sw ra, THREAD_REG31($28) @@ -114,7 +110,7 @@ LEAF(r4xx0_save_fp) * We initialize fcr31 to rounding to nearest, no exceptions. */ -#define FPU_DEFAULT 0x00000600 +#define FPU_DEFAULT 0x00000000 LEAF(r4xx0_init_fpu) mfc0 t0, CP0_STATUS |