diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2001-03-24 03:10:57 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2001-03-24 03:10:57 +0000 |
| commit | 93f107ba6cceee2c35d207349976936da48393bc (patch) | |
| tree | c33ea3d9e7e92245d6593b694cb514c8db5ff05d /arch/mips/mm/init.c | |
| parent | f79c44e04169d10b07b53d4a524c8c41ea5504d5 (diff) | |
Add code to support the SB1 core, including mmu routines, processor
detection. This also tweaks cpu_probe() to use bits 15:8 of PRId as
a company ID, as per the mips32/mips64 specs, and use bits 7:0 as the
processor ID within the company. Patch from Justin with mods and some
additional bits by me.
Diffstat (limited to 'arch/mips/mm/init.c')
| -rw-r--r-- | arch/mips/mm/init.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index bcb25559c..7fa5c9582 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -130,9 +130,10 @@ static inline unsigned long setup_zero_pages(void) { unsigned long order, size; struct page *page; - - if(mips_cpu.options & MIPS_CPU_VCE) order = 3; - else order = 0; + if(mips_cpu.options & MIPS_CPU_VCE) + order = 3; + else + order = 0; empty_zero_page = __get_free_pages(GFP_KERNEL, order); if (!empty_zero_page) |