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authorRalf Baechle <ralf@linux-mips.org>1998-06-30 00:21:34 +0000
committerRalf Baechle <ralf@linux-mips.org>1998-06-30 00:21:34 +0000
commit3917ac5846dd0f9ad1238166f90caab9912052e6 (patch)
tree1c298935def4f29edb39192365a65d73de999155 /arch/mips/mm/r4xx0.c
parentaf2f803c8b2d469fe38e4a7ce952658dfcb6681a (diff)
o Merge with Linux 2.1.100.
o Cleanup the machine dependencies of floppy and rtc. The driver for the Dallas thingy in the Indy is still missing. o Handle allocation of zero'd pages correct for R4000SC / R4400SC. o Page colouring shit to match the virtual and physical colour of all mapped pages. This tends to produce extreme fragmentation problems, so it's deactivated for now. Users of R4000SC / R4400SC may re-enable the code in arch/mips/mm/init.c by removing the definition of CONF_GIVE_A_SHIT_ABOUT_COLOURS. Should get them somewhat further - but don't shake to hard ... o Fixed ptrace(2)-ing of syscalls, strace is now working again. o Fix the interrupt forwarding from the keyboard driver to the psaux driver, PS/2 mice are now working on the Indy. The fix is somewhat broken as it prevents generic kernels for Indy and machines which handle things different. o Things I can't remember.
Diffstat (limited to 'arch/mips/mm/r4xx0.c')
-rw-r--r--arch/mips/mm/r4xx0.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/mips/mm/r4xx0.c b/arch/mips/mm/r4xx0.c
index 7d6d1b073..2da7eb9b1 100644
--- a/arch/mips/mm/r4xx0.c
+++ b/arch/mips/mm/r4xx0.c
@@ -1,9 +1,9 @@
-/*
+/* $Id: r4xx0.c,v 1.17 1998/05/04 09:12:55 ralf Exp $
+ *
* r4xx0.c: R4000 processor variant specific MMU/Cache routines.
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- *
- * $Id: r4xx0.c,v 1.23 1998/04/04 14:02:54 ralf Exp $
+ * Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
*
* To do:
*
@@ -2465,8 +2465,8 @@ static void r4k_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
/* Detect and size the various r4k caches. */
__initfunc(static void probe_icache(unsigned long config))
{
- icache_size = 1 << (12 + ((config >> 6) & 7));
- ic_lsize = 16 << ((config >> 4) & 1);
+ icache_size = 1 << (12 + ((config >> 9) & 7));
+ ic_lsize = 16 << ((config >> 5) & 1);
printk("Primary instruction cache %dkb, linesize %d bytes)\n",
icache_size >> 10, ic_lsize);
@@ -2712,7 +2712,6 @@ static int r4k_user_mode(struct pt_regs *regs)
return (regs->cp0_status & ST0_KSU) == KSU_USER;
}
-
__initfunc(void ld_mmu_r4xx0(void))
{
unsigned long config = read_32bit_cp0_register(CP0_CONFIG);