diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2001-02-21 20:09:19 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2001-02-21 20:09:19 +0000 |
| commit | 30673b43c4a41ff47f0715bb09ad31067304f64f (patch) | |
| tree | 5a7769b891a93819eee645d62c95248d82c6b4c9 /arch/mips/mm | |
| parent | 0745ae02074998ac6cbaac67454e220b5fb8c3c7 (diff) | |
Don't try to detect a second level cache on CPUs which might not ever
have one. Patch from Carsten.
Diffstat (limited to 'arch/mips/mm')
| -rw-r--r-- | arch/mips/mm/mips32.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/mm/mips32.c b/arch/mips/mm/mips32.c index 332418560..164fae782 100644 --- a/arch/mips/mm/mips32.c +++ b/arch/mips/mm/mips32.c @@ -879,6 +879,9 @@ static int __init probe_scache(unsigned long config) unsigned long flags, addr, begin, end, pow2; int tmp; + if (mips_cpu.scache.flags == MIPS_CACHE_NOT_PRESENT) + return 0; + tmp = ((config >> 17) & 1); if(tmp) return 0; |