diff options
| author | Gleb O. Raiko <raiko@niisi.msk.ru> | 2000-03-13 10:33:02 +0000 |
|---|---|---|
| committer | Gleb O. Raiko <raiko@niisi.msk.ru> | 2000-03-13 10:33:02 +0000 |
| commit | 9332bf5462630e1f20ba65152ed64231bcc52e9c (patch) | |
| tree | 53b846368b2b52cf3d10017779db1c35c8090168 /arch/mips/mm | |
| parent | ae38fd1e4c98588314a42097c5a5e77dcef23561 (diff) | |
Add R3081 support
Diffstat (limited to 'arch/mips/mm')
| -rw-r--r-- | arch/mips/mm/loadmmu.c | 3 | ||||
| -rw-r--r-- | arch/mips/mm/r2300.c | 8 |
2 files changed, 6 insertions, 5 deletions
diff --git a/arch/mips/mm/loadmmu.c b/arch/mips/mm/loadmmu.c index cb5e1e66d..01fadac31 100644 --- a/arch/mips/mm/loadmmu.c +++ b/arch/mips/mm/loadmmu.c @@ -3,7 +3,7 @@ * * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) * - * $Id: loadmmu.c,v 1.15 2000/02/24 00:12:40 ralf Exp $ + * $Id: loadmmu.c,v 1.16 2000/03/07 15:45:28 ralf Exp $ */ #include <linux/config.h> #include <linux/init.h> @@ -59,6 +59,7 @@ void __init loadmmu(void) case CPU_R2000: case CPU_R3000: case CPU_R3000A: + case CPU_R3081E: printk("Loading R[23]00 MMU routines.\n"); ld_mmu_r2300(); break; diff --git a/arch/mips/mm/r2300.c b/arch/mips/mm/r2300.c index 63d9b1f7b..cf871fb63 100644 --- a/arch/mips/mm/r2300.c +++ b/arch/mips/mm/r2300.c @@ -7,7 +7,7 @@ * Copyright (C) 1998, 2000 Harald Koerfgen * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov * - * $Id: r2300.c,v 1.14 2000/02/13 20:52:05 harald Exp $ + * $Id: r2300.c,v 1.15 2000/02/24 00:12:40 ralf Exp $ */ #include <linux/init.h> #include <linux/kernel.h> @@ -116,7 +116,7 @@ static void r3k_copy_page(void * to, void * from) "I" (PAGE_SIZE)); } -static unsigned long __init size_cache(unsigned long ca_flags) +unsigned long __init r3k_cache_size(unsigned long ca_flags) { unsigned long flags, status, dummy, size; volatile unsigned long *p; @@ -152,14 +152,14 @@ static unsigned long __init size_cache(unsigned long ca_flags) static void __init probe_dcache(void) { - dcache_size = size_cache(ST0_DE); + dcache_size = r3k_cache_size(ST0_DE); printk("Primary data cache %dkb, linesize 4 bytes\n", dcache_size >> 10); } static void __init probe_icache(void) { - icache_size = size_cache(ST0_DE|ST0_CE); + icache_size = r3k_cache_size(ST0_DE|ST0_CE); printk("Primary instruction cache %dkb, linesize 8 bytes\n", icache_size >> 10); } |