Import of Linux/MIPS 2.1.14.2

5 files changed, 25 insertions, 291 deletions

diff --git a/arch/mips/sni/Makefile b/arch/mips/sni/Makefile
index bfa8e2cad..3821d7b62 100644
--- a/arch/mips/sni/Makefile
+++ b/arch/mips/sni/Makefile
@@ -11,16 +11,10 @@
 .S.o:
 	$(CC) $(CFLAGS) -c $< -o $*.o
 
-include ../../../.config
-
 all: sni.o
 O_TARGET := sni.o
 O_OBJS	 := hw-access.o int-handler.o reset.o setup.o
 
-ifdef CONFIG_PCI
-O_OBJS += bios32.o
-endif
-
 int-handler.o: int-handler.S
 
 clean:
diff --git a/arch/mips/sni/bios32.c b/arch/mips/sni/bios32.c
deleted file mode 100644
index 366347902..000000000
--- a/arch/mips/sni/bios32.c
+++ /dev/null
@@ -1,264 +0,0 @@
-/*
- * bios32.c - Fake PCI BIOS functions for RM200 C systems.  Chainsawed
- *            from the Alpha version.
- *
- * Written by Ralf Baechle (ralf@gnu.ai.mit.edu)
- *
- * For more information, please consult
- *
- * PCI BIOS Specification Revision
- * PCI Local Bus Specification
- * PCI System Design Guide
- *
- * PCI Special Interest Group
- * M/S HF3-15A
- * 5200 N.E. Elam Young Parkway
- * Hillsboro, Oregon 97124-6497
- * +1 (503) 696-2000
- * +1 (800) 433-5177
- *
- * Manuals are $25 each or $50 for all three, plus $7 shipping
- * within the United States, $35 abroad.
- */
-#include <linux/config.h>
-
-#include <linux/kernel.h>
-#include <linux/bios32.h>
-#include <linux/pci.h>
-#include <linux/types.h>
-#include <linux/malloc.h>
-#include <linux/mm.h>
-
-#include <asm/ptrace.h>
-#include <asm/system.h>
-#include <asm/io.h>
-
-/*
- * This is a table of the onboard PCI devices of the RM200 C
- * onboard devices.
- */
-static struct board {
-	unsigned short vendor;
-	unsigned short device_id;
-	unsigned int memory;
-	unsigned int io;
-	unsigned char irq;
-	unsigned char revision;
-	} boards[] = {
-	{
-		PCI_VENDOR_ID_NCR,
-		PCI_DEVICE_ID_NCR_53C810,
-		0x1b000000,
-		0x00000000,
-		5,
-		0x11
-	},
-	{
-		PCI_VENDOR_ID_AMD,
-		PCI_DEVICE_ID_AMD_LANCE,
-		0x1b000100,
-		0x17beffe0,
-		6,
-		0x16
-	},
-	{
-		PCI_VENDOR_ID_CIRRUS,
-		PCI_DEVICE_ID_CIRRUS_5434_8,
-		0x18000000,
-		0x00000000,
-		4,
-		0x8e
-	},
-	{ 0xffff, }
-};
-
-/*
- * Given the vendor and device ids, find the n'th instance of that device
- * in the system.  
- */
-int pcibios_find_device (unsigned short vendor, unsigned short device_id,
-			 unsigned short index, unsigned char *bus,
-			 unsigned char *devfn)
-{
-	unsigned int curr = 0;
-	struct board *p;
-
-	for (p = pci_devices; p->vendor != 0xffff; p++) {
-		if (p->vendor == vendor && p->device == device_id) {
-			if (curr == index) {
-				*devfn = p->devfn;
-				*bus = 0;
-				return PCIBIOS_SUCCESSFUL;
-			}
-			++curr;
-		}
-	}
-
-	return PCIBIOS_DEVICE_NOT_FOUND;
-}
-
-/*
- * Given the class, find the n'th instance of that device
- * in the system.
- */
-int pcibios_find_class (unsigned int class_code, unsigned short index,
-			unsigned char *bus, unsigned char *devfn)
-{
-        unsigned int curr = 0;
-	struct pci_dev *dev;
-
-	for (dev = pci_devices; dev; dev = dev->next) {
-		if (dev->class == class_code) {
-			if (curr == index) {
-				*devfn = dev->devfn;
-				*bus = dev->bus->number;
-				return PCIBIOS_SUCCESSFUL;
-			}
-			++curr;
-		}
-	}
-	return PCIBIOS_DEVICE_NOT_FOUND;
-}
-
-int pcibios_present(void)
-{
-        return 1;
-}
-
-unsigned long pcibios_init(unsigned long mem_start,
-			   unsigned long mem_end)
-{
-	printk("SNI RM200 C BIOS32 fake implementation\n");
-
-	return mem_start;
-}
-
-const char *pcibios_strerror (int error)
-{
-        static char buf[80];
-
-        switch (error) {
-                case PCIBIOS_SUCCESSFUL:
-                        return "SUCCESSFUL";
-
-                case PCIBIOS_FUNC_NOT_SUPPORTED:
-                        return "FUNC_NOT_SUPPORTED";
-
-                case PCIBIOS_BAD_VENDOR_ID:
-                        return "SUCCESSFUL";
-
-                case PCIBIOS_DEVICE_NOT_FOUND:
-                        return "DEVICE_NOT_FOUND";
-
-                case PCIBIOS_BAD_REGISTER_NUMBER:
-                        return "BAD_REGISTER_NUMBER";
-
-                default:
-                        sprintf (buf, "UNKNOWN RETURN 0x%x", error);
-                        return buf;
-        }
-}
-
-/*
- * BIOS32-style PCI interface:
- */
-
-int pcibios_read_config_byte (unsigned char bus, unsigned char device_fn,
-			      unsigned char where, unsigned char *value)
-{
-	unsigned long addr = LCA_CONF;
-	unsigned long pci_addr;
-
-	*value = 0xff;
-
-	if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0) {
-		return PCIBIOS_SUCCESSFUL;
-	}
-	addr |= (pci_addr << 5) + 0x00;
-	*value = conf_read(addr) >> ((where & 3) * 8);
-	return PCIBIOS_SUCCESSFUL;
-}
-
-
-int pcibios_read_config_word (unsigned char bus, unsigned char device_fn,
-			      unsigned char where, unsigned short *value)
-{
-	unsigned long addr = LCA_CONF;
-	unsigned long pci_addr;
-
-	*value = 0xffff;
-
-	if (where & 0x1) {
-		return PCIBIOS_BAD_REGISTER_NUMBER;
-	}
-	if (mk_conf_addr(bus, device_fn, where, &pci_addr)) {
-		return PCIBIOS_SUCCESSFUL;
-	}
-	addr |= (pci_addr << 5) + 0x08;
-	*value = conf_read(addr) >> ((where & 3) * 8);
-	return PCIBIOS_SUCCESSFUL;
-}
-
-
-int pcibios_read_config_dword (unsigned char bus, unsigned char device_fn,
-			       unsigned char where, unsigned int *value)
-{
-	unsigned long addr = LCA_CONF;
-	unsigned long pci_addr;
-
-	*value = 0xffffffff;
-	if (where & 0x3) {
-		return PCIBIOS_BAD_REGISTER_NUMBER;
-	}
-	if (mk_conf_addr(bus, device_fn, where, &pci_addr)) {
-		return PCIBIOS_SUCCESSFUL;
-	}
-	addr |= (pci_addr << 5) + 0x18;
-	*value = conf_read(addr);
-	return PCIBIOS_SUCCESSFUL;
-}
-
-
-int pcibios_write_config_byte (unsigned char bus, unsigned char device_fn,
-			       unsigned char where, unsigned char value)
-{
-	unsigned long addr = LCA_CONF;
-	unsigned long pci_addr;
-
-	if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0) {
-		return PCIBIOS_SUCCESSFUL;
-	}
-	addr |= (pci_addr << 5) + 0x00;
-	conf_write(addr, value << ((where & 3) * 8));
-	return PCIBIOS_SUCCESSFUL;
-}
-
-
-int pcibios_write_config_word (unsigned char bus, unsigned char device_fn,
-			       unsigned char where, unsigned short value)
-{
-	unsigned long addr = LCA_CONF;
-	unsigned long pci_addr;
-
-	if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0) {
-		return PCIBIOS_SUCCESSFUL;
-	}
-	addr |= (pci_addr << 5) + 0x08;
-	conf_write(addr, value << ((where & 3) * 8));
-	return PCIBIOS_SUCCESSFUL;
-}
-
-
-int pcibios_write_config_dword (unsigned char bus, unsigned char device_fn,
-				unsigned char where, unsigned int value)
-{
-	unsigned long addr = LCA_CONF;
-	unsigned long pci_addr;
-
-	if (mk_conf_addr(bus, device_fn, where, &pci_addr) < 0) {
-		return PCIBIOS_SUCCESSFUL;
-	}
-	addr |= (pci_addr << 5) + 0x18;
-	conf_write(addr, value << ((where & 3) * 8));
-	return PCIBIOS_SUCCESSFUL;
-}
diff --git a/arch/mips/sni/hw-access.c b/arch/mips/sni/hw-access.c
index 42c69590a..39cbec410 100644
--- a/arch/mips/sni/hw-access.c
+++ b/arch/mips/sni/hw-access.c
@@ -11,12 +11,14 @@
 #include <linux/kernel.h>
 #include <linux/linkage.h>
 #include <linux/types.h>
+#include <linux/mm.h>
 #include <asm/bootinfo.h>
-#include <asm/cache.h>
+#include <asm/cachectl.h>
 #include <asm/dma.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/mc146818rtc.h>
+#include <asm/pgtable.h>
 #include <asm/vector.h>
 
 extern int FLOPPY_IRQ;
@@ -109,7 +111,7 @@ fd_disable_irq(void)
 void
 sni_fd_cacheflush(const void *addr, size_t size)
 {
-	cacheflush((unsigned long)addr, (unsigned long)size, CF_DCACHE|CF_ALL);
+	flush_cache_all();
 }
 
 /*
diff --git a/arch/mips/sni/int-handler.S b/arch/mips/sni/int-handler.S
index 367c07d84..c01c34c9d 100644
--- a/arch/mips/sni/int-handler.S
+++ b/arch/mips/sni/int-handler.S
@@ -12,21 +12,22 @@
 #include <asm/mipsconfig.h>
 #include <asm/mipsregs.h>
 #include <asm/regdef.h>
+#include <asm/sni.h>
 #include <asm/stackframe.h>
 
 		.text
 		.set	noreorder
 		.set	noat
 		.align	5
-		NESTED(sni_rm200_pci_handle_int, FR_SIZE, sp)
+		NESTED(sni_rm200_pci_handle_int, PT_SIZE, sp)
 		SAVE_ALL
-		REG_S	sp,FR_ORIG_REG2(sp)
+		REG_S	sp,PT_OR2(sp)
 		CLI
 		.set	at
-		lui	s0,%hi(PORT_BASE_SNI)
+		lui	s0,%hi(SNI_PORT_BASE)
 		li	a0,0x0f
-		sb	a0,%lo(PORT_BASE_SNI+0x20)(s0)	# poll command
-		lb	a0,%lo(PORT_BASE_SNI+0x20)(s0)	# read result
+		sb	a0,%lo(SNI_PORT_BASE+0x20)(s0)	# poll command
+		lb	a0,%lo(SNI_PORT_BASE+0x20)(s0)	# read result
 		bgtz	a0,poll_second
 		andi	a0,7
 		beq	a0,2,poll_second		# cascade?
@@ -34,17 +35,17 @@
 		/*
 		 * Acknowledge first pic
 		 */
-		lb	t2,%lo(PORT_BASE_SNI+0x21)(s0)
+		lb	t2,%lo(SNI_PORT_BASE+0x21)(s0)
 		lui	s4,%hi(cache_21)
 		lb	t0,%lo(cache_21)(s4)
 		sllv	s1,s1,a0
 		or	t0,s1
 		sb	t0,%lo(cache_21)(s4)
-		sb	t0,%lo(PORT_BASE_SNI+0x21)(s0)
+		sb	t0,%lo(SNI_PORT_BASE+0x21)(s0)
 		lui	s3,%hi(intr_count)
 		lw	s7,%lo(intr_count)(s3)
 		li	t2,0x20
-		sb	t2,%lo(PORT_BASE_SNI+0x20)(s0)
+		sb	t2,%lo(SNI_PORT_BASE+0x20)(s0)
 		/*
 		 * Now call the real handler
 		 */
@@ -59,38 +60,38 @@
 		/*
 		 * Unblock first pic
 		 */
-		lbu	t1,%lo(PORT_BASE_SNI+0x21)(s0)
+		lbu	t1,%lo(SNI_PORT_BASE+0x21)(s0)
 		lb	t1,%lo(cache_21)(s4)
 		nor	s1,zero,s1
 		and	t1,s1
 		sb	t1,%lo(cache_21)(s4)
 		jr	v0
-		sb	t1,%lo(PORT_BASE_SNI+0x21)(s0)	# delay slot
+		sb	t1,%lo(SNI_PORT_BASE+0x21)(s0)	# delay slot
 
 		/*
 		 * Cascade interrupt from second PIC
 		 */
 		.align	5
 poll_second:	li	a0,0x0f
-		sb	a0,%lo(PORT_BASE_SNI+0xa0)(s0)	# poll command
-		lb	a0,%lo(PORT_BASE_SNI+0xa0)(s0)	# read result
+		sb	a0,%lo(SNI_PORT_BASE+0xa0)(s0)	# poll command
+		lb	a0,%lo(SNI_PORT_BASE+0xa0)(s0)	# read result
 		bgtz	a0,3f
 		andi	a0,7
 		/*
 		 * Acknowledge second pic
 		 */
-		lbu	t2,%lo(PORT_BASE_SNI+0xa1)(s0)
+		lbu	t2,%lo(SNI_PORT_BASE+0xa1)(s0)
 		lui	s4,%hi(cache_A1)
 		lb	t3,%lo(cache_A1)(s4)
 		sllv	s1,s1,a0
 		or	t3,s1
 		sb	t3,%lo(cache_A1)(s4)
-		sb	t3,%lo(PORT_BASE_SNI+0xa1)(s0)
+		sb	t3,%lo(SNI_PORT_BASE+0xa1)(s0)
 		li	t3,0x20
-		sb	t3,%lo(PORT_BASE_SNI+0xa0)(s0)
+		sb	t3,%lo(SNI_PORT_BASE+0xa0)(s0)
 		lui	s3,%hi(intr_count)
 		lw	s7,%lo(intr_count)(s3)
-		sb	t3,%lo(PORT_BASE_SNI+0x20)(s0)
+		sb	t3,%lo(SNI_PORT_BASE+0x20)(s0)
 		/*
 		 * Now call the real handler
 		 */
@@ -106,14 +107,14 @@ poll_second:	li	a0,0x0f
 		/*
 		 * Unblock second pic
 		 */
-		lb	t1,%lo(PORT_BASE_SNI+0xa1)(s0)
+		lb	t1,%lo(SNI_PORT_BASE+0xa1)(s0)
 		lb	t1,%lo(cache_A1)(s4)
 		subu	t0,1
 		nor	s1,zero,s1
 		and	t1,t1,s1
 		sb	t1,%lo(cache_A1)(s4)
 		jr	v0
-		sb	t1,%lo(PORT_BASE_SNI+0xa1)(s0)	# delay slot
+		sb	t1,%lo(SNI_PORT_BASE+0xa1)(s0)	# delay slot
 
 /*
  * FIXME:  This is definatly wrong but I'll have to do it this way
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index a4cc4a57f..ca958ca2a 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -16,6 +16,7 @@
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/processor.h>
+#include <asm/sni.h>
 #include <asm/vector.h>
 
 /*
@@ -93,7 +94,7 @@ sni_rm200_pci_setup(void)
 	irq_setup = sni_irq_setup;
 	fd_cacheflush = sni_fd_cacheflush;	// Will go away
 	feature = &sni_rm200_pci_feature;
-	port_base = PORT_BASE_SNI;
+	port_base = SNI_PORT_BASE;
 	isa_slot_offset = 0xb0000000;
 	request_region(0x00,0x20,"dma1");
 	request_region(0x40,0x20,"timer");