diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2001-05-25 20:07:50 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2001-05-25 20:07:50 +0000 |
| commit | bc34b382a28aa9946ce78a84fedd1efa8719cf03 (patch) | |
| tree | e8cfc10106b847f8562a14f9f614dfa97fd507d9 /arch/mips64/kernel/r4k_fpu.S | |
| parent | f2b12b1b9002db84ce47df6af70a75fd47b078c3 (diff) | |
Code reformatting and spelling fixes.
Diffstat (limited to 'arch/mips64/kernel/r4k_fpu.S')
| -rw-r--r-- | arch/mips64/kernel/r4k_fpu.S | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/arch/mips64/kernel/r4k_fpu.S b/arch/mips64/kernel/r4k_fpu.S index f974bb84e..374178383 100644 --- a/arch/mips64/kernel/r4k_fpu.S +++ b/arch/mips64/kernel/r4k_fpu.S @@ -32,11 +32,11 @@ .set noreorder /* Save floating point context */ LEAF(save_fp_context) - mfc0 t1,CP0_STATUS - sll t2,t1,5 + mfc0 t1, CP0_STATUS + sll t2, t1,5 - bgez t2,1f - cfc1 t1,fcr31 + bgez t2, 1f + cfc1 t1, fcr31 /* Store the 16 odd double precision registers */ EX sdc1 $f1, SC_FPREGS+8(a0) EX sdc1 $f3, SC_FPREGS+24(a0) @@ -74,8 +74,8 @@ LEAF(save_fp_context) EX sdc1 $f28, SC_FPREGS+224(a0) EX sdc1 $f30, SC_FPREGS+240(a0) EX sw t1, SC_FPC_CSR(a0) - cfc1 t0,$0 # implementation/version - EX sw t0,SC_FPC_EIR(a0) + cfc1 t0, $0 # implementation/version + EX sw t0, SC_FPC_EIR(a0) jr ra li v0, 0 # success @@ -92,8 +92,8 @@ LEAF(save_fp_context) */ LEAF(restore_fp_context) mfc0 t1, CP0_STATUS - sll t0,t1,5 - bgez t0,1f + sll t0, t1,5 + bgez t0, 1f EX lw t0, SC_FPC_CSR(a0) /* Restore the 16 odd double precision registers only @@ -136,14 +136,13 @@ LEAF(restore_fp_context) EX ldc1 $f26, SC_FPREGS+208(a0) EX ldc1 $f28, SC_FPREGS+224(a0) EX ldc1 $f30, SC_FPREGS+240(a0) - ctc1 t0,fcr31 + ctc1 t0, fcr31 jr ra li v0, 0 # success END(restore_fp_context) - .set reorder .type fault@function .ent fault -fault: li v0, -EFAULT - jr ra +fault: jr ra + li v0, -EFAULT # failure .end fault |