Merge with Linux 2.3.23. The new bootmem stuff has broken various

platforms.  At this time I've only verified that IP22 support compiles
and IP27 actually works.

14 files changed, 268 insertions, 258 deletions

diff --git a/arch/mips64/defconfig-ip22 b/arch/mips64/defconfig-ip22
index 273653d5d..1a987ef90 100644
--- a/arch/mips64/defconfig-ip22
+++ b/arch/mips64/defconfig-ip22
@@ -142,11 +142,9 @@ CONFIG_NETDEVICES=y
 # CONFIG_WAN is not set
 
 #
-# PCMCIA network devices
+# PCMCIA network device support
 #
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_RAYCS is not set
+# CONFIG_NET_PCMCIA is not set
 CONFIG_SGISEEQ=y
 
 #
diff --git a/arch/mips64/kernel/setup.c b/arch/mips64/kernel/setup.c
index 2f6c9f001..35e5cb1dd 100644
--- a/arch/mips64/kernel/setup.c
+++ b/arch/mips64/kernel/setup.c
@@ -142,10 +142,8 @@ static inline void cpu_probe(void)
 	}
 }
 
-void __init setup_arch(char **cmdline_p, unsigned long * memory_start_p,
-                       unsigned long * memory_end_p)
+void __init setup_arch(char **cmdline_p)
 {
-	unsigned long memory_end;
 #ifdef CONFIG_BLK_DEV_INITRD
 	unsigned long tmp;
 	unsigned long *initrd_header;
@@ -161,32 +159,14 @@ void __init setup_arch(char **cmdline_p, unsigned long * memory_start_p,
 	ip27_setup();
 #endif
 
-	memory_end = mips_memory_upper;
-
-	/*
-	 * Due to prefetching and similar mechanism the CPU sometimes
-	 * generates addresses beyond the end of memory.  We leave the size
-	 * of one cache line at the end of memory unused to make shure we
-	 * don't catch this type of bus errors.
-	 */
-	memory_end -= 128;
-	memory_end &= PAGE_MASK;
-
 	strncpy (command_line, arcs_cmdline, CL_SIZE);
 	memcpy(saved_command_line, command_line, CL_SIZE);
 	saved_command_line[CL_SIZE-1] = '\0';
 
 	*cmdline_p = command_line;
-	*memory_start_p = (unsigned long) &_end;
-#ifdef CONFIG_BOOT_ELF64
-	/* memory_end is a XKPHYS address but memory_start is in CKSEG.
-	   All memory handling is done using XKPHYS addresses, so convert.  */
-	*memory_start_p = (*memory_start_p & 0x1ffffffUL)
-	                  | 0xa800000000000000UL;
-#endif
-	*memory_end_p = memory_end;
 
 #ifdef CONFIG_BLK_DEV_INITRD
+#error "Initrd is broken, please fit it."
 	tmp = (((unsigned long)&_end + PAGE_SIZE-1) & PAGE_MASK) - 8;
 	if (tmp < (unsigned long)&_end)
 		tmp += PAGE_SIZE;
diff --git a/arch/mips64/ld.script.elf32 b/arch/mips64/ld.script.elf32
index 2ae26c104..a89d049bd 100644
--- a/arch/mips64/ld.script.elf32
+++ b/arch/mips64/ld.script.elf32
@@ -4,26 +4,6 @@ SECTIONS
 {
   /* Read-only sections, merged into text segment: */
   . = 0x80000000;
-  .rel.text      : { *(.rel.text)	}
-  .rela.text     : { *(.rela.text) 	}
-  .rel.data      : { *(.rel.data)	}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
-  .rel.got       : { *(.rel.got)	}
-  .rela.got      : { *(.rela.got)	}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.init      : { *(.rel.init)	}
-  .rela.init     : { *(.rela.init)	}
-  .rel.fini      : { *(.rel.fini)	}
-  .rela.fini     : { *(.rela.fini)	}
-  .rel.bss       : { *(.rel.bss)	}
-  .rela.bss      : { *(.rela.bss)	}
-  .rel.plt       : { *(.rel.plt)	}
-  .rela.plt      : { *(.rela.plt)	}
   .init          : { *(.init)		} =0
   .text      :
   {
diff --git a/arch/mips64/lib/memcpy.S b/arch/mips64/lib/memcpy.S
index d78327f11..d62c30082 100644
--- a/arch/mips64/lib/memcpy.S
+++ b/arch/mips64/lib/memcpy.S
@@ -691,8 +691,8 @@ ru_end_bytes:
 
 	jr	ra
 	 move	a2, zero
-	END(__rmemcpy)
 #endif /* Horror fix */
+	END(__rmemcpy)
 
 l_fixup:					# clear the rest of the buffer
 	ld	ta0, THREAD_BUADDR($28)
diff --git a/arch/mips64/mm/andes.c b/arch/mips64/mm/andes.c
index 0c80e0377..895e5db4a 100644
--- a/arch/mips64/mm/andes.c
+++ b/arch/mips64/mm/andes.c
@@ -1,4 +1,4 @@
-/* $Id: andes.c,v 1.3 1999/12/04 03:59:00 ralf Exp $
+/* $Id: andes.c,v 1.4 2000/01/17 23:32:46 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -24,7 +24,7 @@
 				     ".set reorder\n\t")
 
 /* R10000 has no Create_Dirty type cacheops.  */
-static void andes_clear_page(unsigned long page)
+static void andes_clear_page(void * page)
 {
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
@@ -47,7 +47,7 @@ static void andes_clear_page(unsigned long page)
 		:"$1", "memory");
 }
 
-static void andes_copy_page(unsigned long to, unsigned long from)
+static void andes_copy_page(void * to, void * from)
 {
 	unsigned long dummy1, dummy2, reg1, reg2;
 
@@ -176,16 +176,17 @@ out:
 /* Hoo hum...  will this ever be called for an address that is not in CKSEG0
    and not cacheable?  */
 static void
-andes_flush_page_to_ram(unsigned long page)
+andes_flush_page_to_ram(struct page * page)
 {
-	page &= PAGE_MASK;
-	if ((page >= K0BASE_NONCOH && page < (0xb0UL << 56))
-	    || (page >= KSEG0 && page < KSEG1)
-	    || (page >= KSEG2)) {
+	unsigned long addr = page_address(page) & PAGE_MASK;
+
+	if ((addr >= K0BASE_NONCOH && addr < (0xb0UL << 56))
+	    || (addr >= KSEG0 && addr < KSEG1)
+	    || (addr >= KSEG2)) {
 #ifdef DEBUG_CACHE
-		printk("cram[%08lx]", page);
+		printk("cram[%08lx]", addr);
 #endif
-		blast_dcache32_page(page);
+		blast_dcache32_page(addr);
 	}
 }
 
@@ -467,9 +468,8 @@ void __init ld_mmu_andes(void)
 	 */
 	write_32bit_cp0_register(CP0_PAGEMASK, PM_4K);
 
-        /* We can't flush the TLB at this time since the IP27 ARC firmware
-           depends on it.  ARC go home.  */
-	/* flush_tlb_all(); */
+        /* From this point on the ARC firmware is dead.  */
+	flush_tlb_all();
 
         /* Did I tell you that ARC SUCKS?  */
 }
diff --git a/arch/mips64/mm/init.c b/arch/mips64/mm/init.c
index 7d1fce965..682db726c 100644
--- a/arch/mips64/mm/init.c
+++ b/arch/mips64/mm/init.c
@@ -1,11 +1,11 @@
-/* $Id: init.c,v 1.5 1999/12/04 03:59:00 ralf Exp $
+/* $Id: init.c,v 1.6 2000/01/17 03:46:25 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1994 - 1999 by Ralf Baechle
- * Copyright (C) 1999 by Silicon Graphics
+ * Copyright (C) 1994 - 2000 by Ralf Baechle
+ * Copyright (C) 1999, 2000 by Silicon Graphics
  */
 #include <linux/config.h>
 #include <linux/init.h>
@@ -19,6 +19,7 @@
 #include <linux/ptrace.h>
 #include <linux/mman.h>
 #include <linux/mm.h>
+#include <linux/bootmem.h>
 #include <linux/swap.h>
 #include <linux/swapctl.h>
 #ifdef CONFIG_BLK_DEV_INITRD
@@ -35,6 +36,8 @@
 #endif
 #include <asm/mmu_context.h>
 
+static unsigned long totalram_pages = 0;
+
 extern void show_net_buffers(void);
 
 void __bad_pte_kernel(pmd_t *pmd)
@@ -137,7 +140,7 @@ pte_t *get_pte_kernel_slow(pmd_t *pmd, unsigned long offset)
 	page = (pte_t *) __get_free_pages(GFP_USER, 1);
 	if (pmd_none(*pmd)) {
 		if (page) {
-			clear_page((unsigned long)page);
+			clear_page(page);
 			pmd_set(pmd, page);
 			return page + offset;
 		}
@@ -159,7 +162,7 @@ pte_t *get_pte_slow(pmd_t *pmd, unsigned long offset)
 	page = (pte_t *) __get_free_pages(GFP_KERNEL, 1);
 	if (pmd_none(*pmd)) {
 		if (page) {
-			clear_page((unsigned long)page);
+			clear_page(page);
 			pmd_val(*pmd) = (unsigned long)page;
 			return page + offset;
 		}
@@ -228,7 +231,7 @@ static inline unsigned long setup_zero_pages(void)
 		panic("Oh boy, that early out of memory?");
 
 	pg = MAP_NR(empty_zero_page);
-	while(pg < MAP_NR(empty_zero_page) + (1 << order)) {
+	while (pg < MAP_NR(empty_zero_page) + (1 << order)) {
 		set_bit(PG_reserved, &mem_map[pg].flags);
 		set_page_count(mem_map + pg, 0);
 		pg++;
@@ -238,7 +241,7 @@ static inline unsigned long setup_zero_pages(void)
 	zero_page_mask = (size - 1) & PAGE_MASK;
 	memset((void *)empty_zero_page, 0, size);
 
-	return size;
+	return 1UL << order;
 }
 
 extern inline void pte_init(unsigned long page)
@@ -294,10 +297,10 @@ pte_t * __bad_pagetable(void)
 pte_t __bad_page(void)
 {
 	extern char empty_bad_page[PAGE_SIZE];
-	unsigned long page = (unsigned long)empty_bad_page;
+	unsigned long page = (unsigned long) empty_bad_page;
 
-	clear_page(page);
-	return pte_mkdirty(mk_pte(page, PAGE_SHARED));
+	clear_page((void *)page);
+	return pte_mkdirty(mk_pte_phys(__pa(page), PAGE_SHARED));
 }
 
 void show_mem(void)
@@ -326,90 +329,59 @@ void show_mem(void)
 	printk("%d pages swap cached\n",cached);
 	printk("%ld pages in page table cache\n", pgtable_cache_size);
 	printk("%d free pages\n", free);
+	show_buffers();
 #ifdef CONFIG_NET
 	show_net_buffers();
 #endif
 }
 
-extern unsigned long free_area_init(unsigned long, unsigned long);
+/* References to section boundaries */
+
+extern char _ftext, _etext, _fdata, _edata;
+extern char __init_begin, __init_end;
 
-unsigned long __init
-paging_init(unsigned long start_mem, unsigned long end_mem)
+void __init paging_init(void)
 {
 	/* Initialize the entire pgd.  */
 	pgd_init((unsigned long)swapper_pg_dir);
 	pgd_init((unsigned long)swapper_pg_dir + PAGE_SIZE / 2);
 	pmd_init((unsigned long)invalid_pmd_table);
-	return free_area_init(start_mem, end_mem);
+	return free_area_init(max_low_pfn);
 }
 
-void __init
-mem_init(unsigned long start_mem, unsigned long end_mem)
-{
-	int codepages = 0;
-	int datapages = 0;
-	unsigned long tmp, etext, ftext;
-	extern int _etext, _ftext;
-
-#ifdef CONFIG_MIPS_JAZZ
-	if (mips_machgroup == MACH_GROUP_JAZZ)
-		start_mem = vdma_init(start_mem, end_mem);
-#endif
+extern int page_is_ram(unsigned long pagenr);
 
-	end_mem &= PAGE_MASK;
-	max_mapnr = MAP_NR(end_mem);
-	high_memory = (void *)end_mem;
-	num_physpages = 0;
-
-	etext = (unsigned long) &_etext;
-	ftext = (unsigned long) &_ftext;
-#ifdef CONFIG_BOOT_ELF64
-	/* Use etext/ftext value in XPHYS  */
-	etext = PAGE_OFFSET | CPHYSADDR(etext);
-	ftext = PAGE_OFFSET | CPHYSADDR(ftext);
-#endif
-
-	/* mark usable pages in the mem_map[] */
-	start_mem = PAGE_ALIGN(start_mem);
+void __init mem_init(void)
+{
+	unsigned long codesize, reservedpages, datasize, initsize;
+	unsigned long tmp;
 
-	for(tmp = MAP_NR(start_mem);tmp < max_mapnr;tmp++)
-		clear_bit(PG_reserved, &mem_map[tmp].flags);
+	max_mapnr = num_physpages = max_low_pfn;
+	high_memory = (void *) __va(max_mapnr << PAGE_SHIFT);
 
-	prom_fixup_mem_map(start_mem, (unsigned long)high_memory);
+	totalram_pages += free_all_bootmem();
+	totalram_pages -= setup_zero_pages();	/* Setup zeroed pages.  */
 
-	for (tmp = PAGE_OFFSET; tmp < end_mem; tmp += PAGE_SIZE) {
+	reservedpages = 0;
+	for (tmp = 0; tmp < max_low_pfn; tmp++)
 		/*
-		 * This is only for PC-style DMA.  The onboard DMA
-		 * of Jazz and Tyne machines is completely different and
-		 * not handled via a flag in mem_map_t.
+		 * Only count reserved RAM pages
 		 */
-		if (tmp >= MAX_DMA_ADDRESS)
-			clear_bit(PG_DMA, &mem_map[MAP_NR(tmp)].flags);
-		if (PageReserved(mem_map+MAP_NR(tmp))) {
-			if ((tmp < etext) && (tmp >= ftext))
-				codepages++;
-			else if ((tmp < start_mem) && (tmp > etext))
-				datapages++;
-			continue;
-		}
-		num_physpages++;
-		set_page_count(mem_map + MAP_NR(tmp), 1);
-#ifdef CONFIG_BLK_DEV_INITRD
-		if (!initrd_start || (tmp < initrd_start || tmp >=
-		    initrd_end))
-#endif
-			free_page(tmp);
-	}
-	tmp = nr_free_pages << PAGE_SHIFT;
-
-	/* Setup zeroed pages.  */
-	tmp -= setup_zero_pages();
-
-	printk("Memory: %luk/%luk available (%dk kernel code, %dk data)\n",
-		tmp >> 10,
-		max_mapnr << (PAGE_SHIFT-10),
-		codepages << (PAGE_SHIFT-10),
-		datapages << (PAGE_SHIFT-10));
+		if (page_is_ram(tmp) && PageReserved(mem_map+tmp))
+			reservedpages++;
+
+	codesize =  (unsigned long) &_etext - (unsigned long) &_ftext;
+	datasize =  (unsigned long) &_edata - (unsigned long) &_fdata;
+	initsize =  (unsigned long) &__init_end - (unsigned long) &__init_begin;
+
+	printk("Memory: %luk/%luk available (%ldk kernel code, %ldk reserved, "
+	       "%ldk data, %ldk init)\n",
+	       (unsigned long) nr_free_pages << (PAGE_SHIFT-10),
+	       max_mapnr << (PAGE_SHIFT-10),
+	       codesize >> 10,
+	       reservedpages << (PAGE_SHIFT-10),
+	       datasize >> 10,
+	       initsize >> 10);
 }
 
 extern char __init_begin, __init_end;
@@ -425,9 +397,10 @@ free_initmem(void)
 	addr = (unsigned long)(&__init_begin);
 	while (addr < (unsigned long)&__init_end) {
 		page = PAGE_OFFSET | CPHYSADDR(addr);
-		mem_map[MAP_NR(page)].flags &= ~(1 << PG_reserved);
+		ClearPageReserved(mem_map + MAP_NR(page));
 		set_page_count(mem_map + MAP_NR(page), 1);
 		free_page(page);
+		totalram_pages++;
 		addr += PAGE_SIZE;
 	}
 	printk("Freeing unused kernel memory: %ldk freed\n",
@@ -437,22 +410,13 @@ free_initmem(void)
 void
 si_meminfo(struct sysinfo *val)
 {
-	long i;
-
-	i = MAP_NR(high_memory);
-	val->totalram = 0;
+	val->totalram = totalram_pages;
 	val->sharedram = 0;
-	val->freeram = nr_free_pages << PAGE_SHIFT;
-	val->bufferram = atomic_read(&buffermem);
-	while (i-- > 0)  {
-		if (PageReserved(mem_map+i))
-			continue;
-		val->totalram++;
-		if (!page_count(mem_map + i))
-			continue;
-		val->sharedram += page_count(mem_map + i) - 1;
-	}
-	val->totalram <<= PAGE_SHIFT;
-	val->sharedram <<= PAGE_SHIFT;
+	val->freeram = nr_free_pages;
+	val->bufferram = atomic_read(&buffermem_pages);
+	val->totalhigh = 0;
+	val->freehigh = 0;
+	val->mem_unit = PAGE_SIZE;
+
 	return;
 }
diff --git a/arch/mips64/mm/loadmmu.c b/arch/mips64/mm/loadmmu.c
index 0359f92a1..b2dd9e11e 100644
--- a/arch/mips64/mm/loadmmu.c
+++ b/arch/mips64/mm/loadmmu.c
@@ -1,4 +1,4 @@
-/* $Id: loadmmu.c,v 1.3 1999/12/04 03:59:00 ralf Exp $
+/* $Id: loadmmu.c,v 1.4 2000/01/17 23:32:46 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -21,8 +21,8 @@
 #include <asm/sgialib.h>
 
 /* memory functions */
-void (*clear_page)(unsigned long page);
-void (*copy_page)(unsigned long to, unsigned long from);
+void (*clear_page)(void * page);
+void (*copy_page)(void * to, void * from);
 
 /* Cache operations. */
 void (*flush_cache_all)(void);
@@ -31,7 +31,7 @@ void (*flush_cache_range)(struct mm_struct *mm, unsigned long start,
 			  unsigned long end);
 void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page);
 void (*flush_cache_sigtramp)(unsigned long addr);
-void (*flush_page_to_ram)(unsigned long page);
+void (*flush_page_to_ram)(struct page * page);
 
 /* DMA cache operations. */
 void (*dma_cache_wback_inv)(unsigned long start, unsigned long size);
diff --git a/arch/mips64/mm/r4xx0.c b/arch/mips64/mm/r4xx0.c
index ff239b38e..4c85d6ba1 100644
--- a/arch/mips64/mm/r4xx0.c
+++ b/arch/mips64/mm/r4xx0.c
@@ -1,4 +1,4 @@
-/* $Id: r4xx0.c,v 1.5 1999/12/04 03:59:00 ralf Exp $
+/* $Id: r4xx0.c,v 1.6 2000/01/17 23:32:46 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -74,7 +74,7 @@ struct bcache_ops *bcops = &no_sc_ops;
  *   versions of R4000 and R4400.
  */
 
-static void r4k_clear_page_d16(unsigned long page)
+static void r4k_clear_page_d16(void * page)
 {
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
@@ -101,7 +101,7 @@ static void r4k_clear_page_d16(unsigned long page)
 		:"$1", "memory");
 }
 
-static void r4k_clear_page_d32(unsigned long page)
+static void r4k_clear_page_d32(void * page)
 {
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
@@ -154,7 +154,7 @@ static void r4k_clear_page_d32(unsigned long page)
  *                              nop
  *                              cache       Hit_Writeback_Invalidate_D
  */
-static void r4k_clear_page_r4600_v1(unsigned long page)
+static void r4k_clear_page_r4600_v1(void * page)
 {
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
@@ -191,7 +191,7 @@ static void r4k_clear_page_r4600_v1(unsigned long page)
 /*
  * And this one is for the R4600 V2.0
  */
-static void r4k_clear_page_r4600_v2(unsigned long page)
+static void r4k_clear_page_r4600_v2(void * page)
 {
 	unsigned int flags;
 
@@ -230,7 +230,7 @@ static void r4k_clear_page_r4600_v2(unsigned long page)
  * this the kernel crashed shortly after mounting the root filesystem.  CPU
  * bug?  Weirdo cache instruction semantics?
  */
-static void r4k_clear_page_s16(unsigned long page)
+static void r4k_clear_page_s16(void * page)
 {
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
@@ -257,7 +257,7 @@ static void r4k_clear_page_s16(unsigned long page)
 		:"$1","memory");
 }
 
-static void r4k_clear_page_s32(unsigned long page)
+static void r4k_clear_page_s32(void * page)
 {
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
@@ -282,7 +282,7 @@ static void r4k_clear_page_s32(unsigned long page)
 		:"$1","memory");
 }
 
-static void r4k_clear_page_s64(unsigned long page)
+static void r4k_clear_page_s64(void * page)
 {
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
@@ -308,7 +308,7 @@ static void r4k_clear_page_s64(unsigned long page)
 		:"$1","memory");
 }
 
-static void r4k_clear_page_s128(unsigned long page)
+static void r4k_clear_page_s128(void * page)
 {
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
@@ -348,7 +348,7 @@ static void r4k_clear_page_s128(unsigned long page)
  * virtual address where the copy will be accessed.
  */
 
-static void r4k_copy_page_d16(unsigned long to, unsigned long from)
+static void r4k_copy_page_d16(void * to, void * from)
 {
 	unsigned long dummy1, dummy2, reg1, reg2;
 
@@ -386,7 +386,7 @@ static void r4k_copy_page_d16(unsigned long to, unsigned long from)
 		 "i" (Create_Dirty_Excl_D));
 }
 
-static void r4k_copy_page_d32(unsigned long to, unsigned long from)
+static void r4k_copy_page_d32(void * to, void * from)
 {
 	unsigned long dummy1, dummy2, reg1, reg2;
 
@@ -425,7 +425,7 @@ static void r4k_copy_page_d32(unsigned long to, unsigned long from)
 /*
  * Again a special version for the R4600 V1.x
  */
-static void r4k_copy_page_r4600_v1(unsigned long to, unsigned long from)
+static void r4k_copy_page_r4600_v1(void * to, void * from)
 {
 	unsigned long dummy1, dummy2, reg1, reg2;
 
@@ -469,7 +469,7 @@ static void r4k_copy_page_r4600_v1(unsigned long to, unsigned long from)
 		 "i" (Create_Dirty_Excl_D));
 }
 
-static void r4k_copy_page_r4600_v2(unsigned long to, unsigned long from)
+static void r4k_copy_page_r4600_v2(void * to, void * from)
 {
 	unsigned long dummy1, dummy2, reg1, reg2;
 	unsigned int flags;
@@ -519,7 +519,7 @@ static void r4k_copy_page_r4600_v2(unsigned long to, unsigned long from)
 /*
  * These are for R4000SC / R4400MC
  */
-static void r4k_copy_page_s16(unsigned long to, unsigned long from)
+static void r4k_copy_page_s16(void * to, void * from)
 {
 	unsigned long dummy1, dummy2, reg1, reg2;
 
@@ -557,7 +557,7 @@ static void r4k_copy_page_s16(unsigned long to, unsigned long from)
 		 "i" (Create_Dirty_Excl_SD));
 }
 
-static void r4k_copy_page_s32(unsigned long to, unsigned long from)
+static void r4k_copy_page_s32(void * to, void * from)
 {
 	unsigned long dummy1, dummy2, reg1, reg2;
 
@@ -593,7 +593,7 @@ static void r4k_copy_page_s32(unsigned long to, unsigned long from)
 		 "i" (Create_Dirty_Excl_SD));
 }
 
-static void r4k_copy_page_s64(unsigned long to, unsigned long from)
+static void r4k_copy_page_s64(void * to, void * from)
 {
 	unsigned long dummy1, dummy2, reg1, reg2;
 
@@ -628,7 +628,7 @@ static void r4k_copy_page_s64(unsigned long to, unsigned long from)
 		 "i" (Create_Dirty_Excl_SD));
 }
 
-static void r4k_copy_page_s128(unsigned long to, unsigned long from)
+static void r4k_copy_page_s128(void * to, void * from)
 {
 	unsigned long dummy1, dummy2;
 	unsigned long reg1, reg2, reg3, reg4;
@@ -1727,118 +1727,125 @@ out:
 	restore_flags(flags);
 }
 
-/* If the addresses passed to these routines are valid, they are
- * either:
+/* If the addresses passed to these routines are valid, they are either:
  *
  * 1) In KSEG0, so we can do a direct flush of the page.
- * 2) In KSEG2, and since every process can translate those
- *    addresses all the time in kernel mode we can do a direct
- *    flush.
+ * 2) In KSEG2, and since every process can translate those addresses all
+ *    the time in kernel mode we can do a direct flush.
  * 3) In KSEG1, no flush necessary.
  */
-static void r4k_flush_page_to_ram_s16d16i16(unsigned long page)
+static void r4k_flush_page_to_ram_s16d16i16(struct page * page)
 {
-	page &= PAGE_MASK;
-	if((page >= KSEG0 && page < KSEG1) || (page >= KSEG2)) {
+	unsigned long addr = page_address(page) & PAGE_MASK;
+
+	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 #ifdef DEBUG_CACHE
-		printk("cram[%08lx]", page);
+		printk("cram[%08lx]", addr);
 #endif
-		blast_scache16_page(page);
+		blast_scache16_page(addr);
 	}
 }
 
-static void r4k_flush_page_to_ram_s32d16i16(unsigned long page)
+static void r4k_flush_page_to_ram_s32d16i16(struct page * page)
 {
-	page &= PAGE_MASK;
-	if((page >= KSEG0 && page < KSEG1) || (page >= KSEG2)) {
+	unsigned long addr = page_address(page) & PAGE_MASK;
+
+	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 #ifdef DEBUG_CACHE
-		printk("cram[%08lx]", page);
+		printk("cram[%08lx]", addr);
 #endif
-		blast_scache32_page(page);
+		blast_scache32_page(addr);
 	}
 }
 
-static void r4k_flush_page_to_ram_s64d16i16(unsigned long page)
+static void r4k_flush_page_to_ram_s64d16i16(struct page * page)
 {
-	page &= PAGE_MASK;
-	if((page >= KSEG0 && page < KSEG1) || (page >= KSEG2)) {
+	unsigned long addr = page_address(page) & PAGE_MASK;
+
+	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 #ifdef DEBUG_CACHE
-		printk("cram[%08lx]", page);
+		printk("cram[%08lx]", addr);
 #endif
-		blast_scache64_page(page);
+		blast_scache64_page(addr);
 	}
 }
 
-static void r4k_flush_page_to_ram_s128d16i16(unsigned long page)
+static void r4k_flush_page_to_ram_s128d16i16(struct page * page)
 {
-	page &= PAGE_MASK;
-	if((page >= KSEG0 && page < KSEG1) || (page >= KSEG2)) {
+	unsigned long addr = page_address(page) & PAGE_MASK;
+
+	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 #ifdef DEBUG_CACHE
-		printk("cram[%08lx]", page);
+		printk("cram[%08lx]", addr);
 #endif
-		blast_scache128_page(page);
+		blast_scache128_page(addr);
 	}
 }
 
-static void r4k_flush_page_to_ram_s32d32i32(unsigned long page)
+static void r4k_flush_page_to_ram_s32d32i32(struct page * page)
 {
-	page &= PAGE_MASK;
-	if((page >= KSEG0 && page < KSEG1) || (page >= KSEG2)) {
+	unsigned long addr = page_address(page) & PAGE_MASK;
+
+	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 #ifdef DEBUG_CACHE
-		printk("cram[%08lx]", page);
+		printk("cram[%08lx]", addr);
 #endif
-		blast_scache32_page(page);
+		blast_scache32_page(addr);
 	}
 }
 
-static void r4k_flush_page_to_ram_s64d32i32(unsigned long page)
+static void r4k_flush_page_to_ram_s64d32i32(struct page * page)
 {
-	page &= PAGE_MASK;
-	if((page >= KSEG0 && page < KSEG1) || (page >= KSEG2)) {
+	unsigned long addr = page_address(page) & PAGE_MASK;
+
+	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 #ifdef DEBUG_CACHE
-		printk("cram[%08lx]", page);
+		printk("cram[%08lx]", addr);
 #endif
-		blast_scache64_page(page);
+		blast_scache64_page(addr);
 	}
 }
 
-static void r4k_flush_page_to_ram_s128d32i32(unsigned long page)
+static void r4k_flush_page_to_ram_s128d32i32(struct page * page)
 {
-	page &= PAGE_MASK;
-	if((page >= KSEG0 && page < KSEG1) || (page >= KSEG2)) {
+	unsigned long addr = page_address(page) & PAGE_MASK;
+
+	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 #ifdef DEBUG_CACHE
-		printk("cram[%08lx]", page);
+		printk("cram[%08lx]", addr);
 #endif
-		blast_scache128_page(page);
+		blast_scache128_page(addr);
 	}
 }
 
-static void r4k_flush_page_to_ram_d16i16(unsigned long page)
+static void r4k_flush_page_to_ram_d16i16(struct page * page)
 {
-	page &= PAGE_MASK;
-	if((page >= KSEG0 && page < KSEG1) || (page >= KSEG2)) {
+	unsigned long addr = page_address(page) & PAGE_MASK;
+
+	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 		unsigned long flags;
 
 #ifdef DEBUG_CACHE
-		printk("cram[%08lx]", page);
+		printk("cram[%08lx]", addr);
 #endif
 		__save_and_cli(flags);
-		blast_dcache16_page(page);
+		blast_dcache16_page(addr);
 		__restore_flags(flags);
 	}
 }
 
-static void r4k_flush_page_to_ram_d32i32(unsigned long page)
+static void r4k_flush_page_to_ram_d32i32(struct page * page)
 {
-	page &= PAGE_MASK;
-	if((page >= KSEG0 && page < KSEG1) || (page >= KSEG2)) {
+	unsigned long addr = page_address(page) & PAGE_MASK;
+
+	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 		unsigned long flags;
 
 #ifdef DEBUG_CACHE
-		printk("cram[%08lx]", page);
+		printk("cram[%08lx]", addr);
 #endif
 		__save_and_cli(flags);
-		blast_dcache32_page(page);
+		blast_dcache32_page(addr);
 		__restore_flags(flags);
 	}
 }
diff --git a/arch/mips64/mm/tfp.c b/arch/mips64/mm/tfp.c
index aca942a66..ac38d97c8 100644
--- a/arch/mips64/mm/tfp.c
+++ b/arch/mips64/mm/tfp.c
@@ -1,4 +1,4 @@
-/* $Id: tfp.c,v 1.4 1999/12/04 03:59:01 ralf Exp $
+/* $Id: tfp.c,v 1.5 2000/01/17 23:32:46 ralf Exp $
  *
  * tfp.c: MMU and cache routines specific to the r8000 (TFP).
  *
@@ -16,7 +16,61 @@
 #include <asm/sgialib.h>
 #include <asm/mmu_context.h>
 
-extern unsigned long mips_tlb_entries;
+static void tfp_clear_page(void * page)
+{
+	__asm__ __volatile__(
+		".set\tnoreorder\n\t"
+		".set\tnoat\n\t"
+		"daddiu\t$1,%0,%2\n"
+		"1:\tsd\t$0,(%0)\n\t"
+		"sd\t$0,8(%0)\n\t"
+		"sd\t$0,16(%0)\n\t"
+		"sd\t$0,24(%0)\n\t"
+		"daddiu\t%0,64\n\t"
+		"sd\t$0,-32(%0)\n\t"
+		"sd\t$0,-24(%0)\n\t"
+		"sd\t$0,-16(%0)\n\t"
+		"bne\t$1,%0,1b\n\t"
+		"sd\t$0,-8(%0)\n\t"
+		".set\tat\n\t"
+		".set\treorder"
+		:"=r" (page)
+		:"0" (page), "I" (PAGE_SIZE)
+		:"$1", "memory");
+}
+
+static void tfp_copy_page(void * to, void * from)
+{
+	unsigned long dummy1, dummy2, reg1, reg2;
+
+	__asm__ __volatile__(
+		".set\tnoreorder\n\t"
+		".set\tnoat\n\t"
+		"daddiu\t$1,%0,%6\n"
+		"1:\tld\t%2,(%1)\n\t"
+		"ld\t%3,8(%1)\n\t"
+		"sd\t%2,(%0)\n\t"
+		"sd\t%3,8(%0)\n\t"
+		"ld\t%2,16(%1)\n\t"
+		"ld\t%3,24(%1)\n\t"
+		"sd\t%2,16(%0)\n\t"
+		"sd\t%3,24(%0)\n\t"
+		"daddiu\t%0,64\n\t"
+		"daddiu\t%1,64\n\t"
+		"ld\t%2,-32(%1)\n\t"
+		"ld\t%3,-24(%1)\n\t"
+		"sd\t%2,-32(%0)\n\t"
+		"sd\t%3,-24(%0)\n\t"
+		"ld\t%2,-16(%1)\n\t"
+		"ld\t%3,-8(%1)\n\t"
+		"sd\t%2,-16(%0)\n\t"
+		"bne\t$1,%0,1b\n\t"
+		" sd\t%3,-8(%0)\n\t"
+		".set\tat\n\t"
+		".set\treorder"
+		:"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
+		:"0" (to), "1" (from), "I" (PAGE_SIZE));
+}
 
 /* Cache operations. XXX Write these dave... */
 static inline void tfp_flush_cache_all(void)
@@ -42,7 +96,7 @@ static void tfp_flush_cache_page(struct vm_area_struct *vma,
 	/* XXX */
 }
 
-static void tfp_flush_page_to_ram(unsigned long page)
+static void tfp_flush_page_to_ram(struct page * page)
 {
 	/* XXX */
 }
@@ -81,6 +135,9 @@ static int tfp_user_mode(struct pt_regs *regs)
 
 void __init ld_mmu_tfp(void)
 {
+	clear_page = tfp_clear_page;
+	copy_page = tfp_copy_page;
+
 	flush_cache_all = tfp_flush_cache_all;
 	flush_cache_mm = tfp_flush_cache_mm;
 	flush_cache_range = tfp_flush_cache_range;
diff --git a/arch/mips64/mm/umap.c b/arch/mips64/mm/umap.c
index 847cc8cb3..dc80a2eff 100644
--- a/arch/mips64/mm/umap.c
+++ b/arch/mips64/mm/umap.c
@@ -1,4 +1,4 @@
-/* $Id: umap.c,v 1.1 1999/08/18 21:46:52 ralf Exp $
+/* $Id: umap.c,v 1.2 1999/12/04 03:59:01 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -109,16 +109,16 @@ void *vmalloc_uncached (unsigned long size)
 static inline void free_pte(pte_t page)
 {
 	if (pte_present(page)) {
-		unsigned long addr = pte_page(page);
-		if (MAP_NR(addr) >= max_mapnr || PageReserved(mem_map+MAP_NR(addr)))
+		unsigned long nr = pte_pagenr(page);
+		if (nr >= max_mapnr || PageReserved(mem_map+nr))
 			return;
-		free_page(addr);
+		__free_page(pte_page(page));
 		if (current->mm->rss <= 0)
 			return;
 		current->mm->rss--;
 		return;
 	}
-	swap_free(pte_val(page));
+	swap_free(page);
 }
 
 static inline void forget_pte(pte_t page)
@@ -147,15 +147,15 @@ vmap_pte_range (pte_t *pte, unsigned long address, unsigned long size, unsigned
 		end = PMD_SIZE;
 	do {
 		pte_t oldpage = *pte;
-		unsigned long page;
+		struct page * page;
 		pte_clear(pte);
 
 		vdir = pgd_offset_k (vaddr);
 		vpmd = pmd_offset (vdir, vaddr);
 		vpte = pte_offset (vpmd, vaddr);
 		page = pte_page (*vpte);
-		
-		set_pte(pte, mk_pte_phys(page, PAGE_USERIO));
+
+		set_pte(pte, mk_pte(page, PAGE_USERIO));
 		forget_pte(oldpage);
 		address += PAGE_SIZE;
 		vaddr += PAGE_SIZE;
diff --git a/arch/mips64/sgi-ip22/ip22-setup.c b/arch/mips64/sgi-ip22/ip22-setup.c
index a1ae065d8..7505e0c03 100644
--- a/arch/mips64/sgi-ip22/ip22-setup.c
+++ b/arch/mips64/sgi-ip22/ip22-setup.c
@@ -111,6 +111,15 @@ struct kbd_ops sgi_kbd_ops = {
 	ip22_read_status
 };
 
+int __init page_is_ram(unsigned long pagenr)
+{
+	if (pagenr < MAP_NR(PAGE_OFFSET + 0x2000UL))
+		return 1;
+	if (pagenr > MAP_NR(PAGE_OFFSET + 0x08002000))
+		return 1;
+	return 0;
+}
+
 void __init ip22_setup(void)
 {
 #ifdef CONFIG_SERIAL_CONSOLE
diff --git a/arch/mips64/sgi-ip27/ip27-memory.c b/arch/mips64/sgi-ip27/ip27-memory.c
index a3110cc31..ca1b1e6cc 100644
--- a/arch/mips64/sgi-ip27/ip27-memory.c
+++ b/arch/mips64/sgi-ip27/ip27-memory.c
@@ -13,15 +13,24 @@
 #include <linux/init.h>
 #include <linux/config.h>
 #include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
 
 #include <asm/page.h>
 #include <asm/bootinfo.h>
 #include <asm/sn/klconfig.h>
 
+extern char _end;
+
+#define PFN_UP(x)	(((x) + PAGE_SIZE-1) >> PAGE_SHIFT)
+#define PFN_DOWN(x)	((x) >> PAGE_SHIFT)
+#define PFN_PHYS(x)	((x) << PAGE_SHIFT)
+#define PFN_ALIGN(x)	(((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
+
 void __init
 prom_meminit(void)
 {
-	unsigned long mb;
+	unsigned long free_start, free_end, start_pfn, mb, bootmap_size;
 	int bank, size;
 	lboard_t *board;
 	klmembnk_t *mem;
@@ -43,19 +52,27 @@ prom_meminit(void)
 		}
 	}
 
+	free_start = PFN_ALIGN(&_end) - (CKSEG0 - K0BASE);
+	free_end = K0BASE + (mb << 20);
+	start_pfn = PFN_UP((unsigned long)&_end - CKSEG0);
+
 	if (bank != MD_MEM_BANKS && size != 0)
 		printk("Warning: noncontiguous memory configuration, "
 		       "not using entire available memory.");
 
+	/* Register all the contiguous memory with the bootmem allocator
+	   and free it.  Be careful about the bootmem freemap.  */
+	bootmap_size = init_bootmem(start_pfn, mb << (20 - PAGE_SHIFT));
+	free_bootmem(__pa(free_start), (mb << 20) - __pa(free_start));
+	reserve_bootmem(__pa(free_start), bootmap_size);
+	free_bootmem(0x19000, 0x1c000 - 0x19000);
+
 	printk("Found %ldmb of memory.\n", mb);
-	mips_memory_upper = PAGE_OFFSET + (mb << 20);
 }
 
-/* Called from mem_init() to fixup the mem_map page settings. */
-void __init
-prom_fixup_mem_map(unsigned long start, unsigned long end)
+int __init page_is_ram(unsigned long pagenr)
 {
-	/* mem_map is already completly setup.  */
+        return 1;
 }
 
 void __init
diff --git a/arch/mips64/sgi-ip27/ip27-pci.c b/arch/mips64/sgi-ip27/ip27-pci.c
index 5d1eab729..4413946a7 100644
--- a/arch/mips64/sgi-ip27/ip27-pci.c
+++ b/arch/mips64/sgi-ip27/ip27-pci.c
@@ -114,8 +114,6 @@ void __init pcibios_init(void)
 	nasid_t nid = get_nasid();
 
 	ioport_resource.end = ~0UL;
-	/* Nothing to do for now.  */
-	printk("%s called.\n", __FUNCTION__);
 
 	printk("PCI: Probing PCI hardware on host bus 0, node %d.\n", nid);
 	pci_scan_bus(0, ops, NULL);
@@ -185,8 +183,6 @@ pcibios_fixup_bus(struct pci_bus *b)
 	unsigned short command;
 	struct pci_dev *dev;
 
-	/* Nothing to do for now.  */
-	printk("%s called.\n", __FUNCTION__);
 	pci_fixup_irqs(pci_swizzle, pci_map_irq);
 
 	/*
diff --git a/arch/mips64/sgi-ip27/ip27-timer.c b/arch/mips64/sgi-ip27/ip27-timer.c
index e5fd6c377..9950eb72d 100644
--- a/arch/mips64/sgi-ip27/ip27-timer.c
+++ b/arch/mips64/sgi-ip27/ip27-timer.c
@@ -14,6 +14,7 @@
 
 #include <asm/pgtable.h>
 #include <asm/sgialib.h>
+#include <asm/sn/klconfig.h>
 #include <asm/sn/arch.h>
 #include <asm/sn/addrs.h>
 #include <asm/sn/sn0/ip27.h>
@@ -88,20 +89,21 @@ extern void ioc3_eth_init(void);
 
 void __init time_init(void)
 {
-	unsigned int cpufreq;
-	char *cpufreqstr;
-
-	/* Is this timesource good enough?  Ok to assume that all CPUs have
-	   this clockrate?  Are they 100% synchronously clocked?  */
-	cpufreqstr = ArcGetEnvironmentVariable("cpufreq");
-	if (cpufreqstr == NULL)
-		panic("Cannot detect CPU clock rate");
-	cpufreq = simple_strtoul(cpufreqstr, NULL, 10);
-	printk("PROM says CPU clock is %dMHz\n", cpufreq);
-
-	/* We didn't flush the TLB earlier since the ARC firmware depends on
-	   it.  So do it now.  */
-	flush_tlb_all();
+	lboard_t *board;
+	klcpu_t *cpu;
+	int cpuid;
+
+	/* Don't use ARCS.  ARCS is fragile.  Klconfig is simple and sane.  */
+	board = find_lboard(KLTYPE_IP27);
+	if (!board)
+		panic("Can't find board info for myself.");
+
+	cpuid = LOCAL_HUB_L(PI_CPU_NUM) ? IP27_CPU0_INDEX : IP27_CPU1_INDEX;
+	cpu = (klcpu_t *) KLCF_COMP(board, cpuid);
+	if (!cpu)
+		panic("No information about myself?");
+
+	printk("CPU clock is %dMHz.\n", cpu->cpu_speed);
 
 	/* Don't worry about second CPU, it's disabled.  */
 	LOCAL_HUB_S(PI_RT_EN_A, 1);