The tlb mod/load/store exception handlers _have_ to go to do_page_fault,

and can not do with pte bit twiddling without grabbing page_table_lock.
Reinstate most of the old code, after disposing of an extra jump.

3 files changed, 15 insertions, 159 deletions

diff --git a/arch/mips64/kernel/r4k_tlb.S b/arch/mips64/kernel/r4k_tlb.S
index a8ea18523..2baa35ca1 100644
--- a/arch/mips64/kernel/r4k_tlb.S
+++ b/arch/mips64/kernel/r4k_tlb.S
@@ -1,4 +1,4 @@
-/* $Id$
+/* $Id: r4k_tlb.S,v 1.1 2000/05/25 19:33:16 ulfc Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -21,31 +21,6 @@
 	 * After this macro runs we have a pointer to the pte of the address
 	 * that caused the fault in in PTR.
 	 */
-	.macro	LOAD_PTE, ptr, tmp
-#ifdef CONFIG_SMP
-	mfc0	\tmp, CP0_CONTEXT
-	dla	\ptr, pgd_current
-	dsrl	\tmp, 23
-	daddu	\ptr, \tmp
-#else
-	dla	\ptr, pgd_current
-#endif
-	dmfc0	\tmp, CP0_BADVADDR
-	ld	\ptr, (\ptr)
-	dsrl	\tmp, 28			# get pgd offset
-	andi	\tmp, 0x1ff8
-	daddu	\ptr, \tmp			# add in pgd offset
-	dmfc0	\tmp, CP0_BADVADDR
-	ld	\ptr, (\ptr)			# get pmd pointer
-	dsrl	\tmp, 18			# get pmd offset
-	andi	\tmp, 0x1ff8
-	daddu	\ptr, \tmp			# add in pmd offset
-	dmfc0	\tmp, CP0_BADVADDR
-	ld	\ptr, (\ptr)			# get pte pointer
-	dsrl	\tmp, 9
-	andi	\tmp, 0xff8			# get pte offset
-	daddu	\ptr, \tmp
-	.endm
 
 	.macro	LOAD_PTE2, ptr, tmp
 #ifdef CONFIG_SMP
@@ -83,50 +58,6 @@
 	dmtc0	\pte1, CP0_ENTRYLO1		# load it
 	.endm
 
-	.macro	DO_FAULT, write
-	SAVE_ALL
-	dmfc0	a2, CP0_BADVADDR
-	STI
-	.set	at
-	move	a0, sp
-	jal	do_page_fault
-	 li	a1, \write
-	j	ret_from_sys_call
-	 nop
-	.set	noat
-	.endm
-
-	/* Check if PTE is present, if not jump to LABEL.  */
-	.macro	PTE_PRESENT, pte, ptr, label
-	andi	\pte, (_PAGE_PRESENT | _PAGE_READ)
-	xori	\pte, (_PAGE_PRESENT | _PAGE_READ)
-	bnez	\pte, \label
-	 nop
-	ld	\pte, (\ptr)
-	.endm
-
-	/* Mark PTE as valid, and save in PTR.  */
-	.macro	PTE_MAKEVALID, pte, ptr
-	ori	\pte, (_PAGE_VALID | _PAGE_ACCESSED)
-	sd	\pte, (\ptr)
-	.endm
-
-	/* Check if PTE is writable, if not jump to LABEL.  */
-	.macro	PTE_WRITEABLE, pte, ptr, label
-	andi	\pte, (_PAGE_PRESENT | _PAGE_WRITE)
-	xori	\pte, (_PAGE_PRESENT | _PAGE_WRITE)
-	bnez	\pte, \label
-	 nop
-	ld	\pte, (\ptr)
-	.endm
-
-	/* Mark PTE as writable, and save in PTR.  */
-	.macro	PTE_MAKEWRITE, pte, ptr
-	ori	\pte, (_PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID | \
-		       _PAGE_DIRTY)
-	sd	\pte, (\ptr)
-	.endm
-	
 	.text
 	.set	noreorder
 	.set	mips3
@@ -151,67 +82,3 @@ FEXPORT(except_vec1_r10k)
 	nop
 	tlbwr
 	eret
-
-	.align	5
-FEXPORT(handle_tlbl)
-	.set	noat
-	LOAD_PTE k1 k0
-	nop
-	tlbp
-	ld	k0, 0(k1)
-	PTE_PRESENT k0 k1 nopage_tlbl
-	PTE_MAKEVALID k0 k1
-	ori	k1, 0xf
-	xori	k1, 0xf
-	ld	k0, 0(k1)
-	ld	k1, 8(k1)
-	PTE_RELOAD k0 k1
-	nop
-	tlbwi
-	nop
-	eret
-
-nopage_tlbl:
-	DO_FAULT 0
-
-	.align	5
-FEXPORT(handle_tlbs)
-	.set	noat
-	LOAD_PTE k1 k0
-	nop
-	tlbp
-	ld	k0, 0(k1)
-	PTE_WRITEABLE k0 k1 nopage_tlbs
-	PTE_MAKEWRITE k0 k1
-	ori	k1, 0xf
-	xori	k1, 0xf
-	ld	k0, 0(k1)
-	ld	k1, 8(k1)
-	PTE_RELOAD k0 k1
-	nop
-	tlbwi
-	eret
-
-nopage_tlbs:
-	DO_FAULT 1
-
-	.align	5
-FEXPORT(handle_mod)
-	.set	noat
-	LOAD_PTE k1 k0
-	nop
-	tlbp
-	ld	k0, 0(k1)
-	PTE_WRITEABLE k0 k1 nowrite_mod
-	PTE_MAKEWRITE k0 k1
-	ori	k1, 0xf
-	xori	k1, 0xf
-	ld	k0, 0(k1)
-	ld	k1, 8(k1)
-	PTE_RELOAD k0 k1
-	nop
-	tlbwi
-	eret
-
-nowrite_mod:
-	DO_FAULT 1
diff --git a/arch/mips64/kernel/r4k_tlb_glue.S b/arch/mips64/kernel/r4k_tlb_glue.S
index 857a92126..8713172df 100644
--- a/arch/mips64/kernel/r4k_tlb_glue.S
+++ b/arch/mips64/kernel/r4k_tlb_glue.S
@@ -13,16 +13,6 @@
 #include <asm/regdef.h>
 #include <asm/stackframe.h>
 
-	__INIT
-NESTED(__xtlb_refill_debug_tramp, PT_SIZE, sp)
-	j	__xtlb_refill_debug
-	END(__xtlb_refill_debug_tramp)
-
-NESTED(__tlb_refill_debug_tramp, PT_SIZE, sp)
-	j	__tlb_refill_debug
-	END(__tlb_refill_debug_tramp)
-	__FINIT
-
 	.macro	__BUILD_cli
 	CLI
 	.endm
@@ -31,7 +21,7 @@ NESTED(__tlb_refill_debug_tramp, PT_SIZE, sp)
 	STI
 	.endm
 
-	.macro	tlb_handler name interruptible
+	.macro	tlb_handler name interruptible writebit
 	NESTED(__\name, PT_SIZE, sp)
 	SAVE_ALL
 #if DEBUG_MIPS64
@@ -43,16 +33,15 @@ ld $7, PT_R7(sp)
 ld $2, PT_R2(sp)
 #endif
 	__BUILD_\interruptible
-	dmfc0	t0, CP0_BADVADDR
-	sd	t0, PT_BVADDR(sp)
+	dmfc0	a2, CP0_BADVADDR
+	li	a1, \writebit
+	sd	a2, PT_BVADDR(sp)
 	move	a0, sp
-	jal	\name
+	jal	do_page_fault
 	j	ret_from_sys_call
 	END(__\name)
 	.endm
 
-	tlb_handler	tlb_refill_debug cli
-	tlb_handler	xtlb_refill_debug cli
-	tlb_handler	xtlb_mod_debug sti
-	tlb_handler	xtlb_tlbl_debug sti
-	tlb_handler	xtlb_tlbs_debug sti
+	tlb_handler	xtlb_mod sti 1
+	tlb_handler	xtlb_tlbl sti 0
+	tlb_handler	xtlb_tlbs sti 1
diff --git a/arch/mips64/kernel/traps.c b/arch/mips64/kernel/traps.c
index d9213757f..ca29900fa 100644
--- a/arch/mips64/kernel/traps.c
+++ b/arch/mips64/kernel/traps.c
@@ -41,9 +41,9 @@ static inline void console_verbose(void)
 		console_loglevel = 15;
 }
 
-extern asmlinkage void handle_mod(void);
-extern asmlinkage void handle_tlbl(void);
-extern asmlinkage void handle_tlbs(void);
+extern asmlinkage void __xtlb_mod(void);
+extern asmlinkage void __xtlb_tlbl(void);
+extern asmlinkage void __xtlb_tlbs(void);
 extern asmlinkage void handle_adel(void);
 extern asmlinkage void handle_ades(void);
 extern asmlinkage void handle_ibe(void);
@@ -542,9 +542,9 @@ r4k:
 			       0x100);
 		}
 
-		set_except_vector(1, handle_mod);
-		set_except_vector(2, handle_tlbl);
-		set_except_vector(3, handle_tlbs);
+		set_except_vector(1, __xtlb_mod);
+		set_except_vector(2, __xtlb_tlbl);
+		set_except_vector(3, __xtlb_tlbs);
 		set_except_vector(4, handle_adel);
 		set_except_vector(5, handle_ades);