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authorRalf Baechle <ralf@linux-mips.org>2000-08-28 22:00:09 +0000
committerRalf Baechle <ralf@linux-mips.org>2000-08-28 22:00:09 +0000
commit1a1d77dd589de5a567fa95e36aa6999c704ceca4 (patch)
tree141e31f89f18b9fe0831f31852e0435ceaccafc5 /arch/sparc64/lib/dec_and_lock.S
parentfb9c690a18b3d66925a65b17441c37fa14d4370b (diff)
Merge with 2.4.0-test7.
Diffstat (limited to 'arch/sparc64/lib/dec_and_lock.S')
-rw-r--r--arch/sparc64/lib/dec_and_lock.S20
1 files changed, 11 insertions, 9 deletions
diff --git a/arch/sparc64/lib/dec_and_lock.S b/arch/sparc64/lib/dec_and_lock.S
index 75dfdbfcf..2a59b2788 100644
--- a/arch/sparc64/lib/dec_and_lock.S
+++ b/arch/sparc64/lib/dec_and_lock.S
@@ -1,4 +1,4 @@
-/* $Id: dec_and_lock.S,v 1.1 2000/07/10 20:57:34 davem Exp $
+/* $Id: dec_and_lock.S,v 1.2 2000/08/13 18:24:12 davem Exp $
* dec_and_lock.S: Sparc64 version of "atomic_dec_and_lock()"
* using cas and ldstub instructions.
*
@@ -17,12 +17,10 @@
* TMP = *(MEM);
* *(MEM) = REG2;
* REG2 = TMP;
- * }
+ * } else
+ * REG2 = *(MEM);
* END_ATOMIC();
* }
- *
- * All non-contention cases are handled in 2 I-cache
- * lines which is 1 L2 cache line.
*/
.globl atomic_dec_and_lock
@@ -42,20 +40,24 @@ to_zero:ldstub [%o1], %g3
brnz,pn %g3, spin_on_lock
membar #StoreLoad | #StoreStore
loop2: cas [%o0], %g5, %g7 /* ASSERT(g7 == 0) */
- brnz,pt %g7, out
- mov 1, %g1
+ nop
+ cmp %g5, %g7
+ be,pt %icc, out
+ mov 1, %g1
lduw [%o0], %g5
subcc %g5, 1, %g7
be,pn %icc, loop2
nop
membar #StoreStore | #LoadStore
stb %g0, [%o1]
+
b,pt %xcc, nzero
nop
-
spin_on_lock:
ldub [%o1], %g3
brnz,pt %g3, spin_on_lock
membar #LoadLoad
- b,a,pt %xcc, to_zero
+ ba,pt %xcc, to_zero
+ nop
+ nop