diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2000-04-19 04:00:00 +0000 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2000-04-19 04:00:00 +0000 |
commit | 46e045034336a2cc90c1798cd7cc07af744ddfd6 (patch) | |
tree | 3b9b51fc482e729f663d25333e77fbed9aaa939a /arch/sparc64/mm/ultra.S | |
parent | 31dc59d503a02e84c4de98826452acaeb56dc15a (diff) |
Merge with Linux 2.3.99-pre4.
Diffstat (limited to 'arch/sparc64/mm/ultra.S')
-rw-r--r-- | arch/sparc64/mm/ultra.S | 85 |
1 files changed, 69 insertions, 16 deletions
diff --git a/arch/sparc64/mm/ultra.S b/arch/sparc64/mm/ultra.S index 210db79e6..1c3714e5b 100644 --- a/arch/sparc64/mm/ultra.S +++ b/arch/sparc64/mm/ultra.S @@ -1,11 +1,12 @@ -/* $Id: ultra.S,v 1.38 2000/03/03 23:48:44 davem Exp $ +/* $Id: ultra.S,v 1.41 2000/03/27 10:38:51 davem Exp $ * ultra.S: Don't expand these all over the place... * - * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1997, 2000 David S. Miller (davem@redhat.com) */ #include <asm/asi.h> #include <asm/pgtable.h> +#include <asm/page.h> #include <asm/spitfire.h> /* This file is meant to be read efficiently by the CPU, not humans. @@ -160,35 +161,87 @@ __flush_icache_page: /* %o0 = phys_page */ srlx %o0, 5, %o0 clr %o1 ! IC_addr sllx %g1, 36, %g1 + ldda [%o1] ASI_IC_TAG, %o4 sub %g1, 1, %g2 or %o0, %g1, %o0 ! VALID+phys-addr comparitor - sllx %g2, 1, %g2 + sllx %g2, 1, %g2 andn %g2, 0xfe, %g2 ! IC_tag mask -1: ldda [%o1] ASI_IC_TAG, %o4 - and %o5, %g2, %o5 - cmp %o5, %o0 + nop + nop + nop + nop + nop + nop + +1: addx %g0, %g0, %g0 + ldda [%o1 + %o2] ASI_IC_TAG, %g4 + addx %g0, %g0, %g0 + and %o5, %g2, %g3 + cmp %g3, %o0 + add %o1, 0x20, %o1 + ldda [%o1] ASI_IC_TAG, %o4 be,pn %xcc, iflush1 - add %o1, 0x20, %g3 -2: ldda [%o1 + %o2] ASI_IC_TAG, %o4 - and %o5, %g2, %o5 - cmp %o5, %o0 +2: nop + and %g5, %g2, %g5 + cmp %g5, %o0 be,pn %xcc, iflush2 - nop -3: cmp %g3, %o2 +3: cmp %o1, %o2 bne,pt %xcc, 1b - mov %g3, %o1 + addx %g0, %g0, %g0 + nop + + sethi %uhi(PAGE_OFFSET), %g4 retl - nop + sllx %g4, 32, %g4 -iflush1:stxa %g0, [%o1] ASI_IC_TAG +iflush1:sub %o1, 0x20, %g3 + stxa %g0, [%g3] ASI_IC_TAG flush %g6 ba,a,pt %xcc, 2b -iflush2:stxa %g0, [%o1 + %o2] ASI_IC_TAG +iflush2:sub %o1, 0x20, %g3 + stxa %g0, [%o1 + %o2] ASI_IC_TAG flush %g6 ba,a,pt %xcc, 3b + .align 32 +__prefill_dtlb: + rdpr %pstate, %g7 + wrpr %g7, PSTATE_IE, %pstate + mov TLB_TAG_ACCESS, %g1 + stxa %o0, [%g1] ASI_DMMU + stxa %o1, [%g0] ASI_DTLB_DATA_IN + flush %g6 + retl + wrpr %g7, %pstate +__prefill_itlb: + rdpr %pstate, %g7 + wrpr %g7, PSTATE_IE, %pstate + mov TLB_TAG_ACCESS, %g1 + stxa %o0, [%g1] ASI_IMMU + stxa %o1, [%g0] ASI_ITLB_DATA_IN + flush %g6 + retl + wrpr %g7, %pstate + + .globl update_mmu_cache +update_mmu_cache: /* %o0=vma, %o1=address, %o2=pte */ + ldub [%g6 + AOFF_task_thread + AOFF_thread_fault_code], %o3 + srlx %o1, 13, %o1 + ldx [%o0 + 0x0], %o4 /* XXX vma->vm_mm */ + brz,pn %o3, 1f + sllx %o1, 13, %o0 + ldx [%o4 + AOFF_mm_context], %o5 + andcc %o3, FAULT_CODE_DTLB, %g0 + mov %o2, %o1 + and %o5, 0x3ff, %o5 + bne,pt %xcc, __prefill_dtlb + or %o0, %o5, %o0 + ba,a,pt %xcc, __prefill_itlb +1: retl + nop + #ifdef __SMP__ /* These are all called by the slaves of a cross call, at * trap level 1, with interrupts fully disabled. |