Kill dead function load_pgd().

5 files changed, 10 insertions, 49 deletions

diff --git a/arch/mips/mm/andes.c b/arch/mips/mm/andes.c
index 281545d5f..1405c4cfd 100644
--- a/arch/mips/mm/andes.c
+++ b/arch/mips/mm/andes.c
@@ -157,10 +157,6 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 	/* XXX */
 }
 
-void load_pgd(unsigned long pg_dir)
-{
-}
-
 void pgd_init(unsigned long page)
 {
 }
diff --git a/arch/mips/mm/mips32.c b/arch/mips/mm/mips32.c
index 407793fdc..6f44efea9 100644
--- a/arch/mips/mm/mips32.c
+++ b/arch/mips/mm/mips32.c
@@ -4,28 +4,20 @@
  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
  *
- * ########################################################################
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
  *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * for more details.
  *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  *
  * MIPS32 CPU variant specific MMU/Cache routines.
- *
- * This file is the original r4xx0.c file with modification that makes the
- * cache and tlb handling more generic.
- *
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
@@ -672,11 +664,6 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 	}
 }
 
-/* Load a new root pointer into the TLB. */
-void load_pgd(unsigned long pg_dir)
-{
-}
-
 void pgd_init(unsigned long page)
 {
 	unsigned long *p = (unsigned long *) page;
diff --git a/arch/mips/mm/r4xx0.c b/arch/mips/mm/r4xx0.c
index 3b709055a..64b21bb27 100644
--- a/arch/mips/mm/r4xx0.c
+++ b/arch/mips/mm/r4xx0.c
@@ -2262,11 +2262,6 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 	}
 }
 
-/* Load a new root pointer into the TLB. */
-void load_pgd(unsigned long pg_dir)
-{
-}
-
 void pgd_init(unsigned long page)
 {
 	unsigned long *p = (unsigned long *) page;
diff --git a/arch/mips/mm/r5432.c b/arch/mips/mm/r5432.c
index ac3358b2a..0229d0a44 100644
--- a/arch/mips/mm/r5432.c
+++ b/arch/mips/mm/r5432.c
@@ -675,11 +675,6 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 	}
 }
 
-/* Load a new root pointer into the TLB. */
-void load_pgd(unsigned long pg_dir)
-{
-}
-
 void pgd_init(unsigned long page)
 {
 	unsigned long *p = (unsigned long *) page;
diff --git a/arch/mips/mm/rm7k.c b/arch/mips/mm/rm7k.c
index 7e9337c81..c7a80ff54 100644
--- a/arch/mips/mm/rm7k.c
+++ b/arch/mips/mm/rm7k.c
@@ -384,11 +384,6 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 	}
 }
 
-/* Load a new root pointer into the TLB. */
-void load_pgd(unsigned long pg_dir)
-{
-}
-
 void pgd_init(unsigned long page)
 {
 	unsigned long *p = (unsigned long *) page;
@@ -567,13 +562,6 @@ void __init ld_mmu_rm7k(void)
 	__flush_cache_all_d32i32();
 	write_32bit_cp0_register(CP0_WIRED, 0);
 
-	/*
-	 * You should never change this register:
-	 *   - On R4600 1.7 the tlbp never hits for pages smaller than
-	 *     the value in the c0_pagemask register.
-	 *   - The entire mm handling assumes the c0_pagemask register to
-	 *     be set for 4kb pages.
-	 */
 	write_32bit_cp0_register(CP0_PAGEMASK, PM_4K);
 	flush_tlb_all();
 }