Partial support for Galileo EV96100 evaluation board. Patches from

Pete Popov of Monta Vista.

22 files changed, 2545 insertions, 14 deletions

diff --git a/arch/mips/defconfig-ev96100 b/arch/mips/defconfig-ev96100
new file mode 100644
index 000000000..31587ceea
--- /dev/null
+++ b/arch/mips/defconfig-ev96100
@@ -0,0 +1,419 @@
+#
+# Automatically generated make config: don't edit
+#
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# Machine selection
+#
+# CONFIG_ACER_PICA_61 is not set
+# CONFIG_ALGOR_P4032 is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_COBALT_MICRO_SERVER is not set
+# CONFIG_DECSTATION is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_ORION is not set
+CONFIG_MIPS_EV96100=y
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_OLIVETTI_M700 is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_SBUS is not set
+CONFIG_PCI=y
+# CONFIG_ISA is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_KMOD is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+CONFIG_CPU_RM7000=y
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+CONFIG_CPU_ADVANCED=y
+CONFIG_CPU_HAS_LLSC=y
+# CONFIG_CPU_HAS_WB is not set
+
+#
+# General setup
+#
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_KCORE_ELF=y
+CONFIG_ELF_KERNEL=y
+# CONFIG_BINFMT_IRIX is not set
+# CONFIG_FORWARD_KEYBOARD is not set
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_NET=y
+# CONFIG_PCI_NAMES is not set
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_SYSCTL is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+# CONFIG_PCMCIA is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_BLK_DEV_LVM is not set
+# CONFIG_LVM_PROC_FS is not set
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+# CONFIG_NETLINK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+# CONFIG_UNIX is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_IPV6 is not set
+# CONFIG_KHTTPD is not set
+# CONFIG_ATM is not set
+
+#
+#  
+#
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+# CONFIG_PHONE_IXJ is not set
+
+#
+# ATA/IDE/MFM/RLL support
+#
+# CONFIG_IDE is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI support
+#
+# CONFIG_SCSI is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+# CONFIG_I2O_PCI is not set
+# CONFIG_I2O_BLOCK is not set
+# CONFIG_I2O_LAN is not set
+# CONFIG_I2O_SCSI is not set
+# CONFIG_I2O_PROC is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_NET_SB1000 is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_AT1700 is not set
+# CONFIG_DEPCA is not set
+# CONFIG_NET_ISA is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_AC3200 is not set
+# CONFIG_APRICOT is not set
+# CONFIG_CS89x0 is not set
+# CONFIG_DE4X5 is not set
+CONFIG_TULIP=y
+# CONFIG_DGRS is not set
+# CONFIG_DM9102 is not set
+# CONFIG_EEPRO100 is not set
+# CONFIG_LNE390 is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_NE3210 is not set
+# CONFIG_ES3210 is not set
+# CONFIG_RTL8129 is not set
+# CONFIG_8139TOO is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_WINBOND_840 is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_SERIAL=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_UNIX98_PTYS is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_JOYSTICK is not set
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_UMSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_CRAMFS is not set
+CONFIG_RAMFS=y
+# CONFIG_ISO9660_FS is not set
+# CONFIG_JOLIET is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
+# CONFIG_DEVPTS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX4FS_RW is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_EXT2_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_SYSV_FS_WRITE is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+# CONFIG_NFSD_V3 is not set
+CONFIG_SUNRPC=y
+CONFIG_LOCKD=y
+# CONFIG_SMB_FS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_MOUNT_SUBDIR is not set
+# CONFIG_NCPFS_NDS_DOMAINS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# Input core support
+#
+# CONFIG_INPUT is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+# CONFIG_MIPS_FPE_MODULE is not set
+# CONFIG_REMOTE_DEBUG is not set
+# CONFIG_MAGIC_SYSRQ is not set
diff --git a/arch/mips/galileo-boards/ev96100/Makefile b/arch/mips/galileo-boards/ev96100/Makefile
new file mode 100644
index 000000000..90034f016
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/Makefile
@@ -0,0 +1,27 @@
+#
+#  Copyright 2000 MontaVista Software Inc.
+#  Author: MontaVista Software, Inc.
+#     	ppopov@mvista.com or support@mvista.com
+#
+# Makefile for the Galileo EV96100 board.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+.S.s:
+	$(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+	$(CC) $(CFLAGS) -c $< -o $*.o
+
+all: ev96100.o
+
+O_TARGET:= ev96100.o
+
+O_OBJS:= prom.o time.o rtc.o irq.o int-handler.o setup.o puts.o uart.o pci-dma.o memory.o
+
+dep:
+	$(CPP) -M *.c > .depend
+
+include $(TOPDIR)/Rules.make
diff --git a/arch/mips/galileo-boards/ev96100/int-handler.S b/arch/mips/galileo-boards/ev96100/int-handler.S
new file mode 100644
index 000000000..19bf163d1
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/int-handler.S
@@ -0,0 +1,56 @@
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+
+	.text
+	.set    mips1
+	.set    macro
+	.set    noat
+	.align	5
+
+NESTED(ev96100IRQ, PT_SIZE, sp)
+	SAVE_ALL
+	CLI				# Important: mark KERNEL mode !
+
+        /* We're working with 'reorder' set at this point. */
+	/*
+	 * Get pending interrupts
+	 */
+
+	mfc0	t0,CP0_CAUSE		# get pending interrupts
+	mfc0	t1,CP0_STATUS		# get enabled interrupts
+	and	t0,t1			# isolate allowed ones
+
+        # FIX ME add R7000 extensions
+	andi	t0,0xff00		# isolate pending bits
+        andi    a0, t0, CAUSEF_IP7
+        beq     a0, zero, 1f
+        move    a0, sp                  # delay slot
+        jal     mips_timer_interrupt
+	j	ret_from_irq
+        nop
+        
+
+1:
+        beqz    t0, 3f                  # spurious interrupt
+        move    a0,t0
+	move	a1,sp                   # delay slot
+	jal	do_IRQ
+
+	mfc0	t0,CP0_STATUS		# disable interrupts
+	ori	t0,1
+	xori	t0,1
+	mtc0	t0,CP0_STATUS
+        nop
+        nop
+        nop
+	
+	la      a1, ret_from_irq
+	jr	a1
+	
+3:	j	spurious_interrupt
+
+/* dbg:       .asciz "\nev96100IRQ"  */
+END(ev96100IRQ)
+
diff --git a/arch/mips/galileo-boards/ev96100/irq.c b/arch/mips/galileo-boards/ev96100/irq.c
new file mode 100644
index 000000000..0458e643b
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/irq.c
@@ -0,0 +1,351 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Galileo EV96100 interrupt/setup routines.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or support@mvista.com
+ *
+ * This file was derived from Carsten Langgaard's 
+ * arch/mips/mips-boards/atlas/atlas_int.c.
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/malloc.h>
+#include <linux/random.h>
+
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/galileo-boards/ev96100int.h>
+
+extern void mips_timer_interrupt(int irq, struct pt_regs *regs);
+extern asmlinkage void ev96100IRQ(void);
+irq_cpustat_t irq_stat[NR_CPUS];
+unsigned int local_bh_count[NR_CPUS];
+unsigned int local_irq_count[NR_CPUS];
+unsigned long spurious_count = 0;
+irq_desc_t irq_desc[NR_IRQS];
+irq_desc_t *irq_desc_base = &irq_desc[0];
+
+static struct irqaction timer_action = {
+	NULL, 0, 0, "R7000 timer/counter", NULL, NULL,
+};
+
+static struct hw_interrupt_type mips_timer = {
+	"MIPS CPU Timer",
+	NULL,
+	NULL,
+	NULL,			/* unmask_irq */
+	NULL,			/* mask_irq */
+	NULL,			/* mask_and_ack */
+	0
+};
+
+/* Function for careful CP0 interrupt mask access */
+static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask)
+{
+	unsigned long status = read_32bit_cp0_register(CP0_STATUS);
+	status &= ~((clr_mask & 0xFF) << 8);
+	status |= (set_mask & 0xFF) << 8;
+	write_32bit_cp0_register(CP0_STATUS, status);
+}
+
+static inline void mask_irq(unsigned int irq_nr)
+{
+	modify_cp0_intmask(irq_nr, 0);
+}
+
+static inline void unmask_irq(unsigned int irq_nr)
+{
+	modify_cp0_intmask(0, irq_nr);
+}
+
+void disable_irq(unsigned int irq_nr)
+{
+	unsigned long flags;
+
+	save_and_cli(flags);
+	mask_irq(irq_nr);
+	restore_flags(flags);
+}
+
+void enable_irq(unsigned int irq_nr)
+{
+	unsigned long flags;
+
+#if 0
+	printk("enable irq %d\n", irq_nr);
+	printk("status reg: %x, cause %x\n",
+	       read_32bit_cp0_register(CP0_STATUS),
+	       read_32bit_cp0_register(CP0_CAUSE));
+#endif
+	save_and_cli(flags);
+	unmask_irq(irq_nr);
+	restore_flags(flags);
+#if 0
+	printk("new status reg: %x, cause %x\n",
+	       read_32bit_cp0_register(CP0_STATUS),
+	       read_32bit_cp0_register(CP0_CAUSE));
+#endif
+}
+
+
+void __init ev96100_time_init()
+{
+	puts("ev96100 time_init\n");
+
+}
+
+int get_irq_list(char *buf)
+{
+	int i, len = 0, j;
+	struct irqaction *action;
+
+	len += sprintf(buf + len, "           ");
+	for (j = 0; j < smp_num_cpus; j++)
+		len += sprintf(buf + len, "CPU%d       ", j);
+	*(char *) (buf + len++) = '\n';
+
+	for (i = 0; i < NR_IRQS; i++) {
+		action = irq_desc[i].action;
+		if (!action || !action->handler)
+			continue;
+		len += sprintf(buf + len, "%3d: ", i);
+		len += sprintf(buf + len, "%10u ", kstat_irqs(i));
+		if (irq_desc[i].handler)
+			len +=
+			    sprintf(buf + len, " %s ",
+				    irq_desc[i].handler->typename);
+		else
+			len += sprintf(buf + len, "  None      ");
+		len += sprintf(buf + len, "    %s", action->name);
+		for (action = action->next; action; action = action->next) {
+			len += sprintf(buf + len, ", %s", action->name);
+		}
+		len += sprintf(buf + len, "\n");
+	}
+	len += sprintf(buf + len, "BAD: %10lu\n", spurious_count);
+	return len;
+}
+
+asmlinkage void do_IRQ(unsigned long cause, struct pt_regs *regs)
+{
+	struct irqaction *action;
+	int cpu;
+	int status;
+	int irq;
+
+	//printk("do_IRQ: cause %x *regs %x\n", cause, regs);
+	/*
+	 * Service one interrupt only.
+	 * The "priority" is not really defined at this point.
+	 * This will change once we add the R7000 extensions.
+	 */
+//        if (cause & CAUSEF_IP7)
+//            irq = 7;
+	if (cause & CAUSEF_IP6)
+		irq = 6;
+	else if (cause & CAUSEF_IP5)
+		irq = 5;
+	else if (cause & CAUSEF_IP4)
+		irq = 4;
+	else if (cause & CAUSEF_IP3)
+		irq = 3;
+	else if (cause & CAUSEF_IP2)
+		irq = 2;
+	else if (cause & CAUSEF_IP1)
+		irq = 1;
+	else if (cause & CAUSEF_IP0)
+		irq = 0;
+	else
+		return;		/* should not happen */
+
+	cpu = smp_processor_id();
+	irq_enter(cpu);
+	kstat.irqs[cpu][irq]++;
+	status = 0;
+
+	if (irq_desc[irq].handler && irq_desc[irq].handler->ack) {
+		irq_desc[irq].handler->ack(irq);
+	}
+
+	action = irq_desc[irq].action;
+
+	if (action && action->handler) {
+		//if (!(action->flags & SA_INTERRUPT)) __sti();
+		//printk("irq %d, action->handler %x\n", irq, action->handler);
+		do {
+			status |= action->flags;
+			action->handler(irq, action->dev_id, regs);
+			action = action->next;
+		} while (action);
+		//__cli();
+		if (irq_desc[irq].handler) {
+			printk("handler??\n");
+			while (1);
+			if (irq_desc[irq].handler->end)
+				irq_desc[irq].handler->end(irq);
+			else if (irq_desc[irq].handler->enable)
+				irq_desc[irq].handler->enable(irq);
+		}
+	} else {
+		spurious_count++;
+		//printk(KERN_DEBUG "Unhandled interrupt %x, disabled\n", irq);
+		printk("Unhandled interrupt %x, disabled\n", irq);
+		disable_irq(1 << irq);
+		if (irq_desc[irq].handler->end)
+			irq_desc[irq].handler->end(irq);
+	}
+
+	irq_exit(cpu);
+
+	if (softirq_active(cpu) & softirq_mask(cpu))
+		do_softirq();
+}
+
+int request_irq(unsigned int irq,
+		void (*handler) (int, void *, struct pt_regs *),
+		unsigned long irqflags, const char *devname, void *dev_id)
+{
+	struct irqaction *old, **p, *action;
+	unsigned long flags;
+
+	/*
+	 * IRQs are number 0 through 7, where 0 corresponds to IP0 and
+	 * 7 corresponds to IP7.  IP0 and IP1 are software interrupts. IP7
+	 * is typically the timer interrupt, unless the R7000 extensions are
+	 * used.
+	 */
+
+	printk("request_irq %d, handler %x\n", irq, handler);
+
+	if (irq >= NR_IRQS)
+		return -EINVAL;
+	if (!handler) {
+		/* Free */
+		for (p = &irq_desc[irq].action; (action = *p) != NULL;
+		     p = &action->next) {
+			/* Found it - now free it */
+			save_flags(flags);
+			cli();
+			*p = action->next;
+			restore_flags(flags);
+			kfree(action);
+			return 0;
+		}
+		return -ENOENT;
+	}
+
+	action = (struct irqaction *)
+	    kmalloc(sizeof(struct irqaction), GFP_KERNEL);
+	if (!action)
+		return -ENOMEM;
+	memset(action, 0, sizeof(struct irqaction));
+
+	save_flags(flags);
+	cli();
+
+	action->handler = handler;
+	action->flags = irqflags;
+	action->mask = 0;
+	action->name = devname;
+	action->dev_id = dev_id;
+	action->next = NULL;
+
+	p = &irq_desc[irq].action;
+
+	if ((old = *p) != NULL) {
+		/* Can't share interrupts unless both agree to */
+		if (!(old->flags & action->flags & SA_SHIRQ))
+			return -EBUSY;
+		/* add new interrupt at end of irq queue */
+		do {
+			p = &old->next;
+			old = *p;
+		} while (old);
+	}
+	*p = action;
+	printk("action %x, action->handler %x\n",
+	       irq_desc[irq].action, irq_desc[irq].action->handler);
+
+	enable_irq(1 << irq);
+	restore_flags(flags);
+	return 0;
+}
+
+void free_irq(unsigned int irq, void *dev_id)
+{
+	printk("free_irq %d\n", irq);
+	request_irq(irq, NULL, 0, NULL, dev_id);
+}
+
+
+unsigned long probe_irq_on(void)
+{
+	return 0;
+}
+
+int probe_irq_off(unsigned long irqs)
+{
+	return 0;
+}
+
+int (*irq_cannonicalize) (int irq);
+
+int ev96100_irq_cannonicalize(int i)
+{
+	return i;
+}
+
+void __init init_IRQ(void)
+{
+	puts("init_IRQ\n");
+	memset(irq_desc, 0, sizeof(irq_desc));
+	irq_cannonicalize = ev96100_irq_cannonicalize;
+
+	/*
+	   irq_desc[EV96100INT_TIMER].handler = &mips_timer;
+	   irq_desc[EV96100INT_TIMER].action = &timer_action;
+	   irq_desc[EV96100INT_TIMER].action->handler = mips_timer_interrupt;
+	 */
+
+	set_except_vector(0, ev96100IRQ);
+}
+
+EXPORT_SYMBOL(irq_cannonicalize);
diff --git a/arch/mips/galileo-boards/ev96100/memory.c b/arch/mips/galileo-boards/ev96100/memory.c
new file mode 100644
index 000000000..1512f13ab
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/memory.c
@@ -0,0 +1,79 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Galileo EV96100 prom memory routines.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or support@mvista.com
+ *
+ * This file was derived from Carsten Langgaard's 
+ * arch/mips/mips-boards/generic/memory.c.
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
+
+#include <asm/bootinfo.h>
+#include <asm/page.h>
+
+
+/* #define DEBUG */
+
+ /* 
+  * FIX ME!!!
+  */
+
+
+int __init page_is_ram(unsigned long pagenr)
+{
+	return 1;
+#if 0
+	if ((pagenr << PAGE_SHIFT) < mdesc[3].base + mdesc[3].size)
+		return 1;
+
+	return 0;
+#endif
+}
+
+
+static inline unsigned long find_max_low_pfn(void)
+{
+	return 0;
+}
+
+static inline struct prom_pmemblock *find_largest_memblock(void)
+{
+}
+
+void __init prom_meminit(void)
+{
+}
+
+void prom_free_prom_memory(void)
+{
+}
diff --git a/arch/mips/galileo-boards/ev96100/pci-dma.c b/arch/mips/galileo-boards/ev96100/pci-dma.c
new file mode 100644
index 000000000..b66cfbff4
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/pci-dma.c
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2000   Ani Joshi <ajoshi@unixbox.com>
+ *
+ *
+ * Dynamic DMA mapping support.
+ *
+ * swiped from i386, and cloned for MIPS by Geert.
+ *
+ */
+
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/string.h>
+#include <linux/pci.h>
+#include <asm/io.h>
+
+/*
+ * [jsun] We want to return non-cached area so that data can be consistent
+ * Apparently on x86, this is not an issue because cache is automatically
+ * invalidated.
+ *
+ * To make we are doing the right thing, I add some extra debug macros.
+ */
+
+void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
+			   dma_addr_t *dma_handle)
+{
+	void *ret;
+	int gfp = GFP_ATOMIC;
+
+        printk("pci_alloc_consistent\n");
+	if (hwdev == NULL || hwdev->dma_mask != 0xffffffff)
+		gfp |= GFP_DMA;
+	ret = (void *)__get_free_pages(gfp, get_order(size));
+
+	if (ret != NULL) {
+		dma_cache_inv((unsigned long)ret, size);
+		*dma_handle = virt_to_bus(ret);
+	}
+        ret = (void*) ((unsigned long)ret | 0xA0000000);
+        printk("ret %x dma_handle %x\n", ret, *dma_handle);
+
+	return ret;
+}
+
+void pci_free_consistent(struct pci_dev *hwdev, size_t size,
+			 void *vaddr, dma_addr_t dma_handle)
+{
+        vaddr = (void*) ((unsigned long)vaddr & ~0xA0000000);
+	free_pages((unsigned long)vaddr, get_order(size));
+}
diff --git a/arch/mips/galileo-boards/ev96100/prom.c b/arch/mips/galileo-boards/ev96100/prom.c
new file mode 100644
index 000000000..75c3c8a6c
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/prom.c
@@ -0,0 +1,42 @@
+
+/*
+ * ev96100_prom.c
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Prom routines supplied by some boot codes.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	pete_popov@mvista.com or support@mvista.com
+ *
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/stddef.h>
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+
+/* FIX ME */
+void __init prom_printf(char *fmt, ...)
+{
+}
diff --git a/arch/mips/galileo-boards/ev96100/puts.c b/arch/mips/galileo-boards/ev96100/puts.c
new file mode 100644
index 000000000..7c2f231e4
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/puts.c
@@ -0,0 +1,102 @@
+
+
+#include <linux/types.h>
+#include <asm/galileo-boards/ev96100.h>
+
+
+//#define SERIAL_BASE    EV96100_UART0_REGS_BASE
+#define SERIAL_BASE    0xBD000020
+#define NS16550_BASE   SERIAL_BASE
+
+#define SERA_CMD       0x0D
+#define SERA_DATA      0x08
+//#define SERB_CMD       0x05
+#define SERB_CMD       20
+#define SERB_DATA      0x00
+#define TX_BUSY        0x20
+
+static const char digits[16] = "0123456789abcdef";
+static volatile unsigned char *const com1 = (unsigned char *) SERIAL_BASE;
+
+
+void putch(const unsigned char c)
+{
+	unsigned char ch;
+	unsigned i;
+
+	do {
+		ch = com1[SERB_CMD];
+	} while (0 == (ch & TX_BUSY));
+	com1[SERB_DATA] = c;
+}
+
+void putchar(const unsigned char c)
+{
+	unsigned char ch;
+	unsigned i;
+
+	do {
+		ch = com1[SERB_CMD];
+	} while (0 == (ch & TX_BUSY));
+	com1[SERB_DATA] = c;
+}
+
+void puts(unsigned char *cp)
+{
+	unsigned char ch;
+	unsigned i = 0;
+
+	while (*cp) {
+		do {
+			ch = com1[SERB_CMD];
+		} while (0 == (ch & TX_BUSY));
+		com1[SERB_DATA] = *cp++;
+	}
+	putch('\r');
+	putch('\n');
+}
+
+void fputs(unsigned char *cp)
+{
+	unsigned char ch;
+	unsigned i;
+
+	while (*cp) {
+
+		do {
+			ch = com1[SERB_CMD];
+		} while (0 == (ch & TX_BUSY));
+		com1[SERB_DATA] = *cp++;
+	}
+}
+
+
+void put64(uint64_t ul)
+{
+	int cnt;
+	unsigned ch;
+
+	cnt = 16;		/* 16 nibbles in a 64 bit long */
+	putch('0');
+	putch('x');
+	do {
+		cnt--;
+		ch = (unsigned char) (ul >> cnt * 4) & 0x0F;
+		putch(digits[ch]);
+	} while (cnt > 0);
+}
+
+void put32(unsigned u)
+{
+	int cnt;
+	unsigned ch;
+
+	cnt = 8;		/* 8 nibbles in a 32 bit long */
+	putch('0');
+	putch('x');
+	do {
+		cnt--;
+		ch = (unsigned char) (u >> cnt * 4) & 0x0F;
+		putch(digits[ch]);
+	} while (cnt > 0);
+}
diff --git a/arch/mips/galileo-boards/ev96100/rtc.c b/arch/mips/galileo-boards/ev96100/rtc.c
new file mode 100644
index 000000000..697926815
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/rtc.c
@@ -0,0 +1,50 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Galileo EV96100 rtc routines (no rtc on the EV96100).
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or support@mvista.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/mc146818rtc.h>
+static unsigned char ev96100_rtc_read_data(unsigned long addr)
+{
+	return 0;
+}
+
+static void ev96100_rtc_write_data(unsigned char data, unsigned long addr)
+{
+}
+
+static int ev96100_rtc_bcd_mode(void)
+{
+	return 0;
+}
+
+struct rtc_ops ev96100_rtc_ops = {
+	&ev96100_rtc_read_data,
+	&ev96100_rtc_write_data,
+	&ev96100_rtc_bcd_mode
+};
diff --git a/arch/mips/galileo-boards/ev96100/setup.c b/arch/mips/galileo-boards/ev96100/setup.c
new file mode 100644
index 000000000..9292041f8
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/setup.c
@@ -0,0 +1,169 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Galileo EV96100 setup.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or support@mvista.com
+ *
+ * This file was derived from Carsten Langgaard's 
+ * arch/mips/mips-boards/atlas/atlas_setup.c.
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/mc146818rtc.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/galileo-boards/ev96100.h>
+#include <asm/galileo-boards/ev96100int.h>
+#include <asm/mipsregs.h>
+
+
+#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_PROM_CONSOLE)
+extern void console_setup(char *, int *);
+char serial_console[20];
+#endif
+
+#ifdef CONFIG_REMOTE_DEBUG
+extern void rs_kgdb_hook(int);
+extern void saa9730_kgdb_hook(void);
+extern void breakpoint(void);
+static int remote_debug = 0;
+static int kgdb_on_pci = 0;
+#endif
+
+void (*board_time_init) (struct irqaction * irq);
+extern void ev96100_time_init(struct irqaction *irq);
+
+extern void mips_reboot_setup(void);
+extern struct rtc_ops ev96100_rtc_ops;
+extern struct resource ioport_resource;
+
+static void __init ev96100_irq_setup(void)
+{
+	puts("ev96100_irq_setup");
+	init_IRQ();
+
+#ifdef CONFIG_REMOTE_DEBUG
+	/* If local serial I/O used for debug port, enter kgdb at once */
+	/* Otherwise, this will be done after the SAA9730 is up */
+	if (remote_debug && !kgdb_on_pci) {
+		set_debug_traps();
+		breakpoint();
+	}
+#endif
+}
+
+
+void __init ev96100_setup(void)
+{
+
+	unsigned long mem_size, free_start, free_end, start_pfn,
+	    bootmap_size;
+
+#ifdef CONFIG_REMOTE_DEBUG
+	int rs_putDebugChar(char);
+	char rs_getDebugChar(void);
+	int saa9730_putDebugChar(char);
+	char saa9730_getDebugChar(void);
+	extern int (*putDebugChar) (char);
+	extern char (*getDebugChar) (void);
+#endif
+	char *argptr;
+
+	irq_setup = ev96100_irq_setup;
+
+	puts("ev96100_setup");
+	puts("config reg:");
+	put32(read_32bit_cp0_register(CP0_CONFIG));
+	puts("");
+
+
+#ifdef CONFIG_SERIAL_CONSOLE
+	argptr = prom_getcmdline();
+	if ((argptr = strstr(argptr, "console=ttyS0")) == NULL) {
+		int i = 0;
+		char *s = prom_getenv("modetty0");
+		while (s[i] >= '0' && s[i] <= '9')
+			i++;
+		strcpy(serial_console, "ttyS0,");
+		strncpy(serial_console + 6, s, i);
+		//prom_printf("Config serial console: %s\n", serial_console);
+		puts("Config serial console: %s\n", serial_console);
+		console_setup(serial_console, NULL);
+	}
+#endif
+
+#ifdef CONFIG_REMOTE_DEBUG
+	argptr = prom_getcmdline();
+	if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
+		int line;
+		argptr += strlen("kgdb=ttyS");
+		if (*argptr != '0' && *argptr != '1')
+			printk("KGDB: Uknown serial line /dev/ttyS%c, "
+			       "falling back to /dev/ttyS1\n", *argptr);
+		line = *argptr == '0' ? 0 : 1;
+		printk("KGDB: Using serial line /dev/ttyS%d for session\n",
+		       line ? 1 : 0);
+
+		if (line == 0) {
+			rs_kgdb_hook(line);
+			putDebugChar = rs_putDebugChar;
+			getDebugChar = rs_getDebugChar;
+		} else {
+			saa9730_kgdb_hook();
+			putDebugChar = saa9730_putDebugChar;
+			getDebugChar = saa9730_getDebugChar;
+			kgdb_on_pci = 1;
+		}
+
+		prom_printf
+		    ("KGDB: Using serial line /dev/ttyS%d for session, "
+		     "please connect your debugger\n", line ? 1 : 0);
+
+		remote_debug = 1;
+		/* Breakpoints and stuff are in ev96100_irq_setup() */
+	}
+#endif
+	argptr = prom_getcmdline();
+
+	board_time_init = ev96100_time_init;
+	rtc_ops = &ev96100_rtc_ops;
+	mips_reboot_setup();
+
+	/*
+	 * reassign the start and end from the statically defined start and
+	 * end in kernel/resource.
+	 */
+	ioport_resource.start = GT_PCI_IO_BASE;
+	//ioport_resource.end   = GT_PCI_IO_BASE + GT_PCI_IO_SIZE;
+	ioport_resource.end = 0xB1FFFFFF;	/* what a hack! */
+}
diff --git a/arch/mips/galileo-boards/ev96100/time.c b/arch/mips/galileo-boards/ev96100/time.c
new file mode 100644
index 000000000..d5e66fe7b
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/time.c
@@ -0,0 +1,278 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Galileo EV96100 rtc routines.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or support@mvista.com
+ *
+ * This file was derived from Carsten Langgaard's 
+ * arch/mips/mips-boards/atlas/atlas_rtc.c.
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+
+#include <asm/mipsregs.h>
+#include <asm/ptrace.h>
+
+#include <linux/timex.h>
+
+
+#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
+
+extern volatile unsigned long wall_jiffies;
+static long last_rtc_update = 0;
+unsigned long missed_heart_beats = 0;
+
+static unsigned long r4k_offset; /* Amount to increment compare reg each time */
+static unsigned long r4k_cur;    /* What counter should be at next timer irq */
+extern rwlock_t xtime_lock;
+
+
+static unsigned int timer_tick_count=0;
+
+static inline void ack_r4ktimer(unsigned long newval)
+{
+	write_32bit_cp0_register(CP0_COMPARE, newval);
+}
+
+static int set_rtc_mmss(unsigned long nowtime)
+{
+    /* EV96100 does not have a real time clock */
+    int retval = 0;
+
+    return retval;
+}
+
+/*
+ * There are a lot of conceptually broken versions of the MIPS timer interrupt
+ * handler floating around.  This one is rather different, but the algorithm
+ * is probably more robust.
+ */
+static unsigned long alive;
+void mips_timer_interrupt(struct pt_regs *regs)
+{
+        unsigned long status;
+        unsigned long ret_addr;
+        int irq = 7; /* FIX ME */
+
+	if (r4k_offset == 0) {
+            goto null;
+        }
+
+	do {
+		kstat.irqs[0][irq]++;
+		do_timer(regs);
+		r4k_cur += r4k_offset;
+		ack_r4ktimer(r4k_cur);
+
+	} while (((unsigned long)read_32bit_cp0_register(CP0_COUNT) 
+                    - r4k_cur) < 0x7fffffff);
+	return;
+
+null:
+	ack_r4ktimer(0);
+}
+
+/* 
+ * Figure out the r4k offset, the amount to increment the compare
+ * register for each time tick. 
+ * Use the RTC to calculate offset.
+ */
+static unsigned long __init cal_r4koff(void)
+{
+	unsigned long count;
+        count = 300000000/2;
+	return (count / HZ);
+}
+
+static unsigned long __init get_mips_time(void)
+{
+	unsigned int year, mon, day, hour, min, sec;
+	unsigned char save_control;
+
+        year = 2000;
+        mon = 10;
+        day = 31;
+        hour = 0;
+        min = 0;
+        sec = 0;
+	return mktime(year, mon, day, hour, min, sec);
+}
+
+
+/*
+ * called from start_kernel()
+ */
+void __init time_init(void)
+{
+
+        unsigned int est_freq, flags;
+
+	r4k_offset = cal_r4koff();
+
+	est_freq = 2*r4k_offset*HZ;	
+	est_freq += 5000;    /* round */
+	est_freq -= est_freq%10000;
+	printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, 
+	       (est_freq%1000000)*100/1000000);
+	r4k_cur = (read_32bit_cp0_register(CP0_COUNT) + r4k_offset);
+
+	write_32bit_cp0_register(CP0_COMPARE, r4k_cur);
+
+        /* FIX ME */
+	set_cp0_status(ST0_IM, IE_IRQ5);
+}
+
+/* This is for machines which generate the exact clock. */
+#define USECS_PER_JIFFY (1000000/HZ)
+
+/* Cycle counter value at the previous timer interrupt.. */
+
+static unsigned int timerhi = 0, timerlo = 0;
+
+/*
+ * FIXME: Does playing with the RP bit in c0_status interfere with this code?
+ */
+static unsigned long do_fast_gettimeoffset(void)
+{
+	u32 count;
+	unsigned long res, tmp;
+
+	/* Last jiffy when do_fast_gettimeoffset() was called. */
+	static unsigned long last_jiffies=0;
+	unsigned long quotient;
+
+	/*
+	 * Cached "1/(clocks per usec)*2^32" value.
+	 * It has to be recalculated once each jiffy.
+	 */
+	static unsigned long cached_quotient=0;
+
+	tmp = jiffies;
+
+	quotient = cached_quotient;
+
+	if (tmp && last_jiffies != tmp) {
+		last_jiffies = tmp;
+		__asm__(".set\tnoreorder\n\t"
+			".set\tnoat\n\t"
+			".set\tmips3\n\t"
+			"lwu\t%0,%2\n\t"
+			"dsll32\t$1,%1,0\n\t"
+			"or\t$1,$1,%0\n\t"
+			"ddivu\t$0,$1,%3\n\t"
+			"mflo\t$1\n\t"
+			"dsll32\t%0,%4,0\n\t"
+			"nop\n\t"
+			"ddivu\t$0,%0,$1\n\t"
+			"mflo\t%0\n\t"
+			".set\tmips0\n\t"
+			".set\tat\n\t"
+			".set\treorder"
+			:"=&r" (quotient)
+			:"r" (timerhi),
+			 "m" (timerlo),
+			 "r" (tmp),
+			 "r" (USECS_PER_JIFFY)
+			:"$1");
+		cached_quotient = quotient;
+	}
+
+	/* Get last timer tick in absolute kernel time */
+	count = read_32bit_cp0_register(CP0_COUNT);
+
+	/* .. relative to previous jiffy (32 bits is enough) */
+	count -= timerlo;
+
+	__asm__("multu\t%1,%2\n\t"
+		"mfhi\t%0"
+		:"=r" (res)
+		:"r" (count),
+		 "r" (quotient));
+
+	/*
+ 	 * Due to possible jiffies inconsistencies, we need to check 
+	 * the result so that we'll get a timer that is monotonic.
+	 */
+	if (res >= USECS_PER_JIFFY)
+		res = USECS_PER_JIFFY-1;
+
+	return res;
+}
+
+void do_gettimeofday(struct timeval *tv)
+{
+	unsigned int flags;
+
+	read_lock_irqsave (&xtime_lock, flags);
+	*tv = xtime;
+	tv->tv_usec += do_fast_gettimeoffset();
+
+	/*
+	 * xtime is atomically updated in timer_bh. jiffies - wall_jiffies
+	 * is nonzero if the timer bottom half hasnt executed yet.
+	 */
+	if (jiffies - wall_jiffies)
+		tv->tv_usec += USECS_PER_JIFFY;
+
+	read_unlock_irqrestore (&xtime_lock, flags);
+
+	if (tv->tv_usec >= 1000000) {
+		tv->tv_usec -= 1000000;
+		tv->tv_sec++;
+	}
+}
+
+void do_settimeofday(struct timeval *tv)
+{
+	write_lock_irq (&xtime_lock);
+
+	/* This is revolting. We need to set the xtime.tv_usec correctly.
+	 * However, the value in this location is is value at the last tick.
+	 * Discover what correction gettimeofday would have done, and then
+	 * undo it!
+	 */
+	tv->tv_usec -= do_fast_gettimeoffset();
+
+	if (tv->tv_usec < 0) {
+		tv->tv_usec += 1000000;
+		tv->tv_sec--;
+	}
+
+	xtime = *tv;
+	time_adjust = 0;		/* stop active adjtime() */
+	time_status |= STA_UNSYNC;
+	time_maxerror = NTP_PHASE_LIMIT;
+	time_esterror = NTP_PHASE_LIMIT;
+
+	write_unlock_irq (&xtime_lock);
+}
diff --git a/arch/mips/galileo-boards/ev96100/uart.S b/arch/mips/galileo-boards/ev96100/uart.S
new file mode 100644
index 000000000..549bbb68d
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/uart.S
@@ -0,0 +1,92 @@
+
+/*
+ * Low level serial I/O routines.
+ */
+#include <asm/asm.h>
+#include <linux/errno.h>
+#include <asm/current.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+#include <asm/isadep.h>
+#include <asm/unistd.h>
+
+#define SERIAL_BASE             0xbd000020
+#define SERB_DLABLO             0
+#define SERB_DLABHI             1
+#define SERB_FIFO               2
+#define SERB_DATA               0
+#define SERB_LCR                3
+#define SERB_MCR                4
+#define SERB_CMD                5
+
+#define SERA_DLABLO             0x08
+#define SERA_DLABHI             0x09
+#define SERA_DATA               0x08
+#define SERA_LCR                0x0B
+#define SERA_MCR                0x0C
+#define SERA_CMD                0x0D
+
+#define TX_BUSY			0x20
+
+/*
+ * To calculate divisor for different baud rates:
+ * divisor = 3686400/(baud rate x 16), where 3686400 is our
+ * 3.6864MHz clock input.
+ */
+
+/*
+ * routine to initialize the serial DUART.  Channel A only
+ */
+	.set	noreorder
+ 	.global	init_serial
+	.ent	init_serial
+init_serial:
+        li      a0,SERIAL_BASE
+
+#if 0
+	# init channel A
+        li      t0,0x0083
+        sb      t0,SERA_LCR(a0)           # set DLAB
+
+#        li      t0,24                    # 9600 baud
+		li      t0,2                      # 115200 baud
+        sb      t0,SERA_DLABLO(a0)        # set divisor
+
+        li      t0,0
+        sb      t0,SERA_DLABHI(a0)
+
+        li      t0,0x0003                 # 8 data bits
+        sb      t0,SERA_LCR(a0)
+#endif
+
+#if 1
+	# init channel B
+        li      t0,0x0083
+        sb      t0,SERB_LCR(a0)           # set DLAB
+
+        li      t0,24
+        sb      t0,SERB_DLABLO(a0)        # set divisor for 115200 baud
+
+        li      t0,0
+        sb      t0,SERB_DLABHI(a0)
+
+        li      t0,0x0003                 # 8 data bits
+        sb      t0,SERB_LCR(a0)
+
+        li      t0,0                      # no fifo
+        sb      t0,SERB_FIFO(a0)
+#endif
+
+        li a0, 0xB4000000
+        li t0, 0x002fffff
+        sw t0, 0x464(a0)
+        
+
+        jr      ra
+	nop
+
+  	.size	init_serial, . - init_serial;
+  	.end	init_serial
+
+	.set	reorder
diff --git a/arch/mips/galileo-boards/generic/Makefile b/arch/mips/galileo-boards/generic/Makefile
new file mode 100644
index 000000000..0fc5d8b5b
--- /dev/null
+++ b/arch/mips/galileo-boards/generic/Makefile
@@ -0,0 +1,41 @@
+#
+# Carsten Langgaard, carstenl@mips.com
+# Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+#
+# ########################################################################
+#
+# This program is free software; you can distribute it and/or modify it
+# under the terms of the GNU General Public License (Version 2) as
+# published by the Free Software Foundation.
+# 
+# This program is distributed in the hope it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+# 
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+#
+# #######################################################################
+#
+# Makefile for the MIPS boards generic routines under Linux.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+# Note 2! The CFLAGS definitions are now in the main makefile...
+
+.S.s:
+	$(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+	$(CC) $(CFLAGS) -c $< -o $*.o
+
+all: galboards.o
+
+O_TARGET:= galboards.o
+
+O_OBJS:= pci.o reset.o init.o  cmdline.o
+
+include $(TOPDIR)/Rules.make
diff --git a/arch/mips/galileo-boards/generic/cmdline.c b/arch/mips/galileo-boards/generic/cmdline.c
new file mode 100644
index 000000000..3574e976c
--- /dev/null
+++ b/arch/mips/galileo-boards/generic/cmdline.c
@@ -0,0 +1,61 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ * 
+ * Kernel command line creation using the prom monitor (YAMON) argc/argv.
+ *
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+
+/* #define DEBUG_CMDLINE /**/
+
+extern int prom_argc;
+extern char **prom_argv;
+
+char arcs_cmdline[CL_SIZE];
+
+char * __init prom_getcmdline(void)
+{
+	return &(arcs_cmdline[0]);
+}
+
+void  __init prom_init_cmdline(void)
+{
+	char *cp;
+	int actr;
+
+	actr = 1; /* Always ignore argv[0] */
+
+	cp = &(arcs_cmdline[0]);
+	while(actr < prom_argc) {
+	        strcpy(cp, prom_argv[actr]);
+		cp += strlen(prom_argv[actr]);
+		*cp++ = ' ';
+		actr++;
+	}
+	if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */
+		--cp;
+	*cp = '\0';
+
+}
diff --git a/arch/mips/galileo-boards/generic/init.c b/arch/mips/galileo-boards/generic/init.c
new file mode 100644
index 000000000..b488cb349
--- /dev/null
+++ b/arch/mips/galileo-boards/generic/init.c
@@ -0,0 +1,176 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *    Galileo PROM library initialisation code.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or support@mvista.com
+ *
+ * This file was derived from Carsten Langgaard's 
+ * arch/mips/mips-boards/generic/generic.c
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <linux/config.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+
+#include <asm/galileo-boards/ev96100.h>
+
+
+extern char _end;
+
+#define PFN_UP(x)	(((x) + PAGE_SIZE-1) >> PAGE_SHIFT)
+#define PFN_ALIGN(x)	(((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
+/* Environment variable */
+
+typedef struct {
+	char *name;
+	char *val;
+} t_env_var;
+
+int prom_argc;
+char **prom_argv, **prom_envp;
+
+int init_debug = 0;
+
+char *prom_getenv(char *envname)
+{
+	/*
+	 * Return a pointer to the given environment variable.
+	 */
+
+	t_env_var *env = (t_env_var *) prom_envp;
+	int i;
+
+	i = strlen(envname);
+
+	while (env->name) {
+		if (strncmp(envname, env->name, i) == 0) {
+			return (env->val);
+		}
+		env++;
+	}
+	return (NULL);
+}
+
+static inline unsigned char str2hexnum(unsigned char c)
+{
+	if (c >= '0' && c <= '9')
+		return c - '0';
+	if (c >= 'a' && c <= 'f')
+		return c - 'a' + 10;
+	return 0;		/* foo */
+}
+
+static inline void str2eaddr(unsigned char *ea, unsigned char *str)
+{
+	int i;
+
+	for (i = 0; i < 6; i++) {
+		unsigned char num;
+
+		if ((*str == '.') || (*str == ':'))
+			str++;
+		num = str2hexnum(*str++) << 4;
+		num |= (str2hexnum(*str++));
+		ea[i] = num;
+	}
+}
+
+int get_ethernet_addr(char *ethernet_addr)
+{
+	char *ethaddr_str;
+
+	ethaddr_str = prom_getenv("ethaddr");
+	if (!ethaddr_str) {
+		printk("ethaddr not set in boot prom\n");
+		return -1;
+	}
+	str2eaddr(ethernet_addr, ethaddr_str);
+
+	if (init_debug > 1) {
+		int i;
+		printk("get_ethernet_addr: ");
+		for (i = 0; i < 5; i++)
+			printk("%02x:",
+			       (unsigned char) *(ethernet_addr + i));
+		printk("%02x\n", *(ethernet_addr + i));
+	}
+
+	return 0;
+}
+
+
+int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+{
+	unsigned long mem_size, free_start, free_end, start_pfn,
+	    bootmap_size;
+	volatile unsigned char *uart;
+	char ppbuf[8];
+
+	prom_argc = argc;
+	prom_argv = argv;
+	prom_envp = envp;
+
+	//init_serial();
+
+	mips_machgroup = MACH_GROUP_GALILEO;
+#if 0
+	prom_ops = &ev96100_prom_ops;
+	prom_ops->printf = prom_vec[5];
+#endif
+	puts("Linux running");
+	puts("");
+
+	prom_init_cmdline();
+
+	//prom_meminit();
+
+
+	/* 64 MB non-upgradable */
+	mem_size = 64 << 20;
+
+	free_start = PHYSADDR(PFN_ALIGN(&_end));
+	free_end = mem_size;
+	start_pfn = PFN_UP((unsigned long) &_end);
+
+	/* Register all the contiguous memory with the bootmem allocator
+	   and free it.  Be careful about the bootmem freemap.  */
+	bootmap_size = init_bootmem(start_pfn, mem_size >> PAGE_SHIFT);
+
+	/* Free the entire available memory after the _end symbol.  */
+	free_start += bootmap_size;
+	free_bootmem(free_start, free_end - free_start);
+
+	return 0;
+}
diff --git a/arch/mips/galileo-boards/generic/pci.c b/arch/mips/galileo-boards/generic/pci.c
new file mode 100644
index 000000000..c49e86963
--- /dev/null
+++ b/arch/mips/galileo-boards/generic/pci.c
@@ -0,0 +1,340 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Galileo EV96100 board specific pci support.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or support@mvista.com
+ *
+ * This file was derived from Carsten Langgaard's 
+ * arch/mips/mips-boards/generic/pci.c
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+
+#ifdef CONFIG_PCI
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/galileo-boards/ev96100.h>
+#include <asm/galileo-boards/gt64120.h>
+
+#define PCI_ACCESS_READ  0
+#define PCI_ACCESS_WRITE 1
+
+static int
+mips_pcibios_config_access(unsigned char access_type, struct pci_dev *dev,
+                           unsigned char where, u32 *data)
+{
+	unsigned char bus = dev->bus->number;
+	unsigned char dev_fn = dev->devfn;
+        u32 intr;
+
+
+	if ((bus == 0) && (dev_fn >= PCI_DEVFN(31,0))) {
+            return -1; /* Because of a bug in the galileo (for slot 31). */
+        }
+
+	/* Clear cause register bits */
+	GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT | 
+	                             GT_INTRCAUSE_TARABORT0_BIT));
+
+	/* Setup address */
+	GT_WRITE(GT_PCI0_CFGADDR_OFS,  
+		 (bus         << GT_PCI0_CFGADDR_BUSNUM_SHF)   |
+		 (dev_fn      << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
+		 ((where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF)   |
+		 GT_PCI0_CFGADDR_CONFIGEN_BIT);
+
+
+	if (access_type == PCI_ACCESS_WRITE) {
+            if (dev_fn != 0) {
+                *data = le32_to_cpu(*data);
+            }
+            GT_WRITE(GT_PCI0_CFGDATA_OFS, *data);
+	} 
+        else {
+            GT_READ(GT_PCI0_CFGDATA_OFS, *data);
+            if (dev_fn != 0) {
+                *data = le32_to_cpu(*data);
+            }
+	}
+
+	/* Check for master or target abort */
+	GT_READ(GT_INTRCAUSE_OFS, intr);
+
+	if (intr & (GT_INTRCAUSE_MASABORT0_BIT | GT_INTRCAUSE_TARABORT0_BIT))
+	{
+	        /* Error occured */
+
+	        /* Clear bits */
+	        GT_WRITE( GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT | 
+					      GT_INTRCAUSE_TARABORT0_BIT) );
+
+		return -1;
+	}
+	return 0;
+}
+
+
+/*
+ * We can't address 8 and 16 bit words directly.  Instead we have to
+ * read/write a 32bit word and mask/modify the data we actually want.
+ */
+static int
+mips_pcibios_read_config_byte (struct pci_dev *dev, int where, u8 *val)
+{
+	u32 data = 0;
+
+	if (mips_pcibios_config_access(PCI_ACCESS_READ, dev, where, &data))
+		return -1;
+
+	*val = (data >> ((where & 3) << 3)) & 0xff;
+#if 0
+        printk("cfg read byte: bus %d dev_fn %x where %x: val %x\n", 
+                dev->bus->number, dev->devfn, where, *val);
+#endif
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+
+static int
+mips_pcibios_read_config_word (struct pci_dev *dev, int where, u16 *val)
+{
+	u32 data = 0;
+
+	if (where & 1)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+
+	if (mips_pcibios_config_access(PCI_ACCESS_READ, dev, where, &data))
+	       return -1;
+
+	*val = (data >> ((where & 3) << 3)) & 0xffff;
+#if 0
+        printk("cfg read word: bus %d dev_fn %x where %x: val %x\n", 
+                dev->bus->number, dev->devfn, where, *val);
+#endif
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int
+mips_pcibios_read_config_dword (struct pci_dev *dev, int where, u32 *val)
+{
+	u32 data = 0;
+
+	if (where & 3)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+	
+	if (mips_pcibios_config_access(PCI_ACCESS_READ, dev, where, &data))
+		return -1;
+
+	*val = data;
+#if 0
+        printk("cfg read dword: bus %d dev_fn %x where %x: val %x\n", 
+                dev->bus->number, dev->devfn, where, *val);
+#endif
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+
+static int
+mips_pcibios_write_config_byte (struct pci_dev *dev, int where, u8 val)
+{
+	u32 data = 0;
+       
+	if (mips_pcibios_config_access(PCI_ACCESS_READ, dev, where, &data))
+		return -1;
+
+	data = (data & ~(0xff << ((where & 3) << 3))) |
+	       (val << ((where & 3) << 3));
+
+	if (mips_pcibios_config_access(PCI_ACCESS_WRITE, dev, where, &data))
+		return -1;
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int
+mips_pcibios_write_config_word (struct pci_dev *dev, int where, u16 val)
+{
+        u32 data = 0;
+
+	if (where & 1)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+       
+        if (mips_pcibios_config_access(PCI_ACCESS_READ, dev, where, &data))
+	       return -1;
+
+	data = (data & ~(0xffff << ((where & 3) << 3))) | 
+	       (val << ((where & 3) << 3));
+
+	if (mips_pcibios_config_access(PCI_ACCESS_WRITE, dev, where, &data))
+	       return -1;
+
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int
+mips_pcibios_write_config_dword(struct pci_dev *dev, int where, u32 val)
+{
+	if (where & 3)
+		return PCIBIOS_BAD_REGISTER_NUMBER;
+
+	if (mips_pcibios_config_access(PCI_ACCESS_WRITE, dev, where, &val))
+	       return -1;
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+struct pci_ops mips_pci_ops = {
+	mips_pcibios_read_config_byte,
+        mips_pcibios_read_config_word,
+	mips_pcibios_read_config_dword,
+	mips_pcibios_write_config_byte,
+	mips_pcibios_write_config_word,
+	mips_pcibios_write_config_dword
+};
+
+void __init pcibios_init(void)
+{
+
+	printk("PCI: Probing PCI hardware on host bus 0.\n");
+	pci_scan_bus(0, &mips_pci_ops, NULL);
+
+	/* 
+	 * Due to a bug in the Galileo system controller, we need to setup 
+	 * the PCI BAR for the Galileo internal registers.
+	 * This should be done in the bios/bootprom and will be fixed in
+	 * a later revision of YAMON (the MIPS boards boot prom).
+	 */
+	GT_WRITE(GT_PCI0_CFGADDR_OFS, cpu_to_le32(
+		 (0 << GT_PCI0_CFGADDR_BUSNUM_SHF)   |  /* Local bus */
+		 (0 << GT_PCI0_CFGADDR_DEVNUM_SHF)   |  /* GT64120 device */
+		 (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |  /* Function 0 */
+		 ((0x20/4) << GT_PCI0_CFGADDR_REGNUM_SHF) |  /* BAR 4 */
+		 GT_PCI0_CFGADDR_CONFIGEN_BIT ));
+
+	/* Perform the write */
+	GT_WRITE( GT_PCI0_CFGDATA_OFS, cpu_to_le32(PHYSADDR(MIPS_GT_BASE))); 
+
+}
+
+int __init
+pcibios_enable_device(struct pci_dev *dev)
+{
+	u16 cmd, old_cmd;
+	int idx;
+	struct resource *r;
+
+	pci_read_config_word(dev, PCI_COMMAND, &cmd);
+	old_cmd = cmd;
+	for(idx=0; idx<6; idx++) {
+		r = &dev->resource[idx];
+		if (!r->start && r->end) {
+			printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", dev->slot_name);
+			return -EINVAL;
+		}
+		if (r->flags & IORESOURCE_IO)
+			cmd |= PCI_COMMAND_IO;
+		if (r->flags & IORESOURCE_MEM)
+			cmd |= PCI_COMMAND_MEMORY;
+	}
+	if (dev->resource[PCI_ROM_RESOURCE].start)
+		cmd |= PCI_COMMAND_MEMORY;
+	if (cmd != old_cmd) {
+		printk("PCI: Enabling device %s (%04x -> %04x)\n", dev->slot_name, old_cmd, cmd);
+		pci_write_config_word(dev, PCI_COMMAND, cmd);
+	}
+	return 0;
+}
+
+void __init
+pcibios_align_resource(void *data, struct resource *res, unsigned long size)
+{
+    printk("pcibios_align_resource\n");
+#if 0 /* from ppc */
+	struct pci_dev *dev = data;
+
+	if (res->flags & IORESOURCE_IO) {
+		unsigned long start = res->start;
+
+		if (size > 0x100) {
+			printk(KERN_ERR "PCI: I/O Region %s/%d too large"
+			       " (%ld bytes)\n", dev->slot_name,
+			       dev->resource - res, size);
+		}
+
+		if (start & 0x300) {
+			start = (start + 0x3ff) & ~0x3ff;
+			res->start = start;
+		}
+	}
+#endif
+}
+
+char * __init
+pcibios_setup(char *str)
+{
+	/* Nothing to do for now.  */
+
+	return str;
+}
+
+struct pci_fixup pcibios_fixups[] = {
+	{ 0 }
+};
+
+void __init
+pcibios_update_resource(struct pci_dev *dev, struct resource *root,
+                        struct resource *res, int resource)
+{
+	unsigned long where, size;
+	u32 reg;
+
+	where = PCI_BASE_ADDRESS_0 + (resource * 4);
+	size = res->end - res->start;
+	pci_read_config_dword(dev, where, &reg);
+	reg = (reg & size) | (((u32)(res->start - root->start)) & ~size);
+	pci_write_config_dword(dev, where, reg);
+}
+
+/*
+ *  Called after each bus is probed, but before its children
+ *  are examined.
+ */
+void __init pcibios_fixup_bus(struct pci_bus *b)
+{
+	pci_read_bridge_bases(b);
+}
+
+#endif /* CONFIG_PCI */
diff --git a/arch/mips/galileo-boards/generic/printf.c b/arch/mips/galileo-boards/generic/printf.c
new file mode 100644
index 000000000..f731cc257
--- /dev/null
+++ b/arch/mips/galileo-boards/generic/printf.c
@@ -0,0 +1,53 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Putting things on the screen/serial line using YAMONs facilities.
+ *
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/addrspace.h>
+#include <asm/galileo-boards/generic.h>
+
+static char ppbuf[1024];
+
+void (*prom_print_str)(unsigned int out, char *s, int len);
+
+void __init setup_prom_printf(void)
+{
+        prom_print_str = (void *)*(unsigned int *)YAMON_PROM_PRINT_ADDR;
+}
+
+void __init prom_printf(char *fmt, ...)
+{
+        va_list args;
+	int len;
+
+        va_start(args, fmt);
+        vsprintf(ppbuf, fmt, args);
+	len = strlen(ppbuf);
+
+	prom_print_str(0, ppbuf, len);
+
+        va_end(args);
+        return;
+}
diff --git a/arch/mips/galileo-boards/generic/prom-no.c b/arch/mips/galileo-boards/generic/prom-no.c
new file mode 100644
index 000000000..826acad15
--- /dev/null
+++ b/arch/mips/galileo-boards/generic/prom-no.c
@@ -0,0 +1,50 @@
+
+/*
+ * prom-no.c
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Stubs for prom routines.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	frank_rowand@mvista.com or support@mvista.com
+ * 	   	debbie_chu@mvista.com
+ *
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <asm/galileo-boards/prom.h>
+
+static int no_printf (const char *fmt, ...)
+{
+    /* nop */
+}
+
+static void no_flushcache()
+{
+    /* nop */
+}
+
+struct prom_ops no_prom_ops = {
+	&no_printf,
+        &no_flushcache
+};
diff --git a/arch/mips/galileo-boards/generic/reset.c b/arch/mips/galileo-boards/generic/reset.c
new file mode 100644
index 000000000..fc080c080
--- /dev/null
+++ b/arch/mips/galileo-boards/generic/reset.c
@@ -0,0 +1,60 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Galileo EV96100 reset routines.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or support@mvista.com
+ *
+ * This file was derived from Carsten Langgaard's 
+ * arch/mips/mips-boards/generic/reset.c
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+
+#include <asm/reboot.h>
+#include <asm/galileo-boards/ev96100.h>
+
+static void mips_machine_restart(char *command);
+static void mips_machine_halt(void);
+
+static void mips_machine_restart(char *command)
+{
+	printk("mips_machine_restart: not implemented\n");
+	while (1);
+}
+
+static void mips_machine_halt(void)
+{
+	printk("mips_machine_halt: not implemented\n");
+	while (1);
+}
+
+void mips_reboot_setup(void)
+{
+	_machine_restart = mips_machine_restart;
+	_machine_halt = mips_machine_halt;
+}
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index ea332cb10..2125c2f9c 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -37,10 +37,14 @@ ifndef CONFIG_DECSTATION
     ifndef CONFIG_ORION
       ifndef CONFIG_MIPS_ATLAS
 	ifndef CONFIG_MIPS_MALTA
-	  O_OBJS += time.o
-          ifndef CONFIG_SGI_IP22
-	    OX_OBJS += irq.o
-	  endif
+          ifndef CONFIG_MIPS_EV96100
+	    O_OBJS += time.o
+            ifndef CONFIG_SGI_IP22
+              ifndef CONFIG_MIPS_EV96100
+	        OX_OBJS += irq.o
+              endif
+	    endif
+          endif
         endif
       endif
     endif
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index c067218b6..4e8c64fb6 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -265,6 +265,7 @@ void __init setup_arch(char **cmdline_p)
 	void sgi_setup(void);
 	void ddb_setup(void);
 	void orion_setup(void);
+        void ev96100_setup(void);
 
 	/* Save defaults for configuration-dependent routines.  */
 	irq_setup = default_irq_setup;
@@ -331,6 +332,11 @@ void __init setup_arch(char **cmdline_p)
 		orion_setup();
 		break;
 #endif
+#ifdef CONFIG_MIPS_EV96100
+	case MACH_GROUP_GALILEO:
+		ev96100_setup();
+		break;
+#endif
 	default:
 		panic("Unsupported architecture");
 	}
diff --git a/arch/mips/kernel/sysmips.c b/arch/mips/kernel/sysmips.c
index 7d34f2d8c..baf2f81df 100644
--- a/arch/mips/kernel/sysmips.c
+++ b/arch/mips/kernel/sysmips.c
@@ -49,7 +49,7 @@ sys_sysmips(int cmd, int arg1, int arg2, int arg3)
 {
 	int	*p;
 	char	*name;
-	int	flags, tmp, len, retval, errno;
+	int	tmp, len, retval, errno;
 
 	switch(cmd) {
 	case SETNAME: {
@@ -72,8 +72,6 @@ sys_sysmips(int cmd, int arg1, int arg2, int arg3)
 	}
 
 	case MIPS_ATOMIC_SET: {
-		/* This is broken in case of page faults and SMP ...
-		    Risc/OS faults after maximum 20 tries with EAGAIN.  */
 		unsigned int tmp;
 
 		p = (int *) arg1;
@@ -81,16 +79,42 @@ sys_sysmips(int cmd, int arg1, int arg2, int arg3)
 		if (errno)
 			return errno;
 		errno = 0;
-		save_and_cli(flags);
-		errno |= __get_user(tmp, p);
-		errno |= __put_user(arg2, p);
-		restore_flags(flags);
+
+		__asm__(".set\tpush\t\t\t# sysmips(MIPS_ATOMIC, ...)\n\t"
+			".set\tnoreorder\n\t"
+			".set\tnoat\n\t"
+			"1:\tll\t%0, %4\n\t"
+			"2:\tmove\t$1, %3\n\t"
+			"3:\tsc\t$1, %1\n\t"
+			"beqzl\t$1, 2b\n\t"
+			"4:\t ll\t%0, %4\n\t"
+			".set\tpop\n\t"
+			".section\t.fixup,\"ax\"\n"
+			"5:\tli\t%2, 1\t\t\t# error\n\t"
+			".previous\n\t"
+			".section\t__ex_table,\"a\"\n\t"
+			".dword\t1b, 5b\n\t"
+			".dword\t3b, 5b\n\t"
+			".dword\t4b, 5b\n\t"
+			".previous\n\t"
+			: "=&r" (tmp), "=o" (* (u32 *) p), "=r" (errno)
+			: "r" (arg2), "o" (* (u32 *) p), "2" (errno)
+			: "$1");
 
 		if (errno)
-			return tmp;
+			return -EFAULT;
 
-		return tmp;             /* This is broken ...  */ 
-        }
+		/* We're skipping error handling etc.  */
+		if (current->ptrace & PT_TRACESYS)
+			syscall_trace();
+
+		__asm__ __volatile__(
+			"move\t$29, %0\n\t"
+			"j\tret_from_sys_call"
+			: /* No outputs */
+			: "r" (&cmd));
+		/* Unreached */
+	}
 
 	case MIPS_FIXADE:
 		tmp = current->thread.mflags & ~3;