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authorRalf Baechle <ralf@linux-mips.org>2001-03-12 01:16:54 +0000
committerRalf Baechle <ralf@linux-mips.org>2001-03-12 01:16:54 +0000
commit37541f7211fcefcd88059a5274700d84ceca7a99 (patch)
tree5b437b09cf1e969b0edd44208cdb36e138dd404f /arch
parentfc5394fd5c8e777cbcc382f766330a774e595abb (diff)
Don't clear ST0_FR; generic code already does that.
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/galileo-boards/ev64120/setup.c1
-rw-r--r--arch/mips/ite-boards/generic/it8172_setup.c1
2 files changed, 0 insertions, 2 deletions
diff --git a/arch/mips/galileo-boards/ev64120/setup.c b/arch/mips/galileo-boards/ev64120/setup.c
index a04088aef..5a928cf86 100644
--- a/arch/mips/galileo-boards/ev64120/setup.c
+++ b/arch/mips/galileo-boards/ev64120/setup.c
@@ -133,7 +133,6 @@ void ev64120_setup(void)
board_time_init = galileo_time_init;
mips_io_port_base = KSEG1;
- clear_cp0_status(ST0_FR);
#ifdef CONFIG_L2_L3_CACHE
#error "external cache not implemented yet"
diff --git a/arch/mips/ite-boards/generic/it8172_setup.c b/arch/mips/ite-boards/generic/it8172_setup.c
index 8e7f67edd..8fd937beb 100644
--- a/arch/mips/ite-boards/generic/it8172_setup.c
+++ b/arch/mips/ite-boards/generic/it8172_setup.c
@@ -127,7 +127,6 @@ void __init it8172_setup(void)
}
#endif
- clear_cp0_status(ST0_FR);
rtc_ops = &it8172_rtc_ops;
_machine_restart = it8172_restart;