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authorRalf Baechle <ralf@linux-mips.org>2000-06-12 20:10:17 +0000
committerRalf Baechle <ralf@linux-mips.org>2000-06-12 20:10:17 +0000
commit4925c5662482c19b880fe231e216090a074dd190 (patch)
tree1bd88852e6e8d436087106b30e93707d2cb58a0f /arch
parent17adfedca60bc231027cde57642647f9bb32b396 (diff)
Same for mainline.
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/kernel/head.S9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index df612cbf8..ea8610da3 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -101,6 +101,15 @@
END(except_vec0_r4600)
/* TLB refill, EXL == 0, R52x0 "Nevada" version */
+ /*
+ * This version has a bug workaround for the Nevada. It seems
+ * as if under certain circumstances the move from cp0_context
+ * might produce a bogus result when the mfc0 instruction and
+ * it's consumer are in a different cacheline or a load instruction,
+ * probably any memory reference, is between them. This is
+ * potencially slower than the R4000 version, so we use this
+ * special version.
+ */
.set noreorder
.set noat
LEAF(except_vec0_nevada)