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authorRalf Baechle <ralf@linux-mips.org>2000-09-29 22:53:47 +0000
committerRalf Baechle <ralf@linux-mips.org>2000-09-29 22:53:47 +0000
commit4b5739c111692222160055e3e8d288227d727cf9 (patch)
tree2a5f335d8d10cea3bc71902ffed3415fe3ab970a /arch
parent38f203cda97d1fafc642406829447404717065bf (diff)
Fixup a number of loose ends in RM7000 support.
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/mm/andes.c6
-rw-r--r--arch/mips/mm/loadmmu.c8
-rw-r--r--arch/mips/mm/r2300.c40
-rw-r--r--arch/mips/mm/r4xx0.c7
-rw-r--r--arch/mips/mm/rm7k.c3
5 files changed, 37 insertions, 27 deletions
diff --git a/arch/mips/mm/andes.c b/arch/mips/mm/andes.c
index 5e5cb4768..d99892771 100644
--- a/arch/mips/mm/andes.c
+++ b/arch/mips/mm/andes.c
@@ -119,6 +119,11 @@ static void andes_flush_page_to_ram(struct page * page)
/* XXX */
}
+static void __andes_flush_icache_range(unsigned long start, unsigned long end)
+{
+ /* XXX */
+}
+
static void andes_flush_icache_page(struct vm_area_struct *vma,
struct page *page, unsigned long addr)
{
@@ -178,6 +183,7 @@ void __init ld_mmu_andes(void)
_flush_cache_sigtramp = andes_flush_cache_sigtramp;
_flush_page_to_ram = andes_flush_page_to_ram;
_flush_icache_page = andes_flush_icache_page;
+ _flush_icache_range = andes_flush_icache_range;
flush_cache_all();
flush_tlb_all();
diff --git a/arch/mips/mm/loadmmu.c b/arch/mips/mm/loadmmu.c
index 5c96d7804..5dd412b36 100644
--- a/arch/mips/mm/loadmmu.c
+++ b/arch/mips/mm/loadmmu.c
@@ -92,12 +92,6 @@ void __init loadmmu(void)
#endif
default:
- /* XXX We need an generic routine in the MIPS port
- * XXX to jabber stuff onto the screen on all machines
- * XXX before the console is setup. The ARCS prom
- * XXX routines look good for this, but only the SGI
- * XXX code has a full library for that at this time.
- */
- panic("Yeee, unsupported mmu/cache architecture.");
+ prom_printf("Yeee, unsupported mmu/cache architecture.");
}
}
diff --git a/arch/mips/mm/r2300.c b/arch/mips/mm/r2300.c
index fa1cc970a..cf1342c1f 100644
--- a/arch/mips/mm/r2300.c
+++ b/arch/mips/mm/r2300.c
@@ -280,7 +280,7 @@ static inline unsigned long get_phys_page (unsigned long addr,
static inline void r3k_flush_cache_all(void)
{
- r3k_flush_icache_range(KSEG0, icache_size);
+ r3k_flush_icache_range(KSEG0, KSEG0 + icache_size);
}
static void r3k_flush_cache_mm(struct mm_struct *mm)
@@ -308,21 +308,22 @@ static void r3k_flush_cache_range(struct mm_struct *mm,
printk("crange[%d,%08lx,%08lx]", (int)mm->context, start, end);
#endif
vma = find_vma(mm, start);
- if (vma) {
- if (mm->context != current->active_mm->context) {
- flush_cache_all();
- } else {
- unsigned long flags, physpage;
+ if (!vma)
+ return;
- save_and_cli(flags);
- while (start < end) {
- if ((physpage = get_phys_page(start, mm)))
- r3k_flush_icache_range(physpage, PAGE_SIZE);
-
- start += PAGE_SIZE;
- }
- restore_flags(flags);
+ if (mm->context != current->active_mm->context) {
+ flush_cache_all();
+ } else {
+ unsigned long flags, physpage;
+
+ save_and_cli(flags);
+ while (start < end) {
+ if ((physpage = get_phys_page(start, mm)))
+ r3k_flush_icache_range(physpage,
+ physpage + PAGE_SIZE);
+ start += PAGE_SIZE;
}
+ restore_flags(flags);
}
}
@@ -341,8 +342,7 @@ static void r3k_flush_cache_page(struct vm_area_struct *vma,
unsigned long physpage;
if ((physpage = get_phys_page(page, vma->vm_mm)))
- r3k_flush_icache_range(physpage, PAGE_SIZE);
-
+ r3k_flush_icache_range(physpage, physpage + PAGE_SIZE);
}
}
@@ -354,7 +354,7 @@ static void r3k_flush_page_to_ram(struct page * page)
}
static void r3k_flush_icache_page(struct vm_area_struct *vma,
- unsigned long page, unsigned long address)
+ struct page *page, unsigned long address)
{
struct mm_struct *mm = vma->vm_mm;
unsigned long physpage;
@@ -369,8 +369,9 @@ static void r3k_flush_icache_page(struct vm_area_struct *vma,
printk("cpage[%d,%08lx]", (int)mm->context, page);
#endif
- if ((physpage = get_phys_page(page, vma->vm_mm)))
- r3k_flush_icache_range(physpage, PAGE_SIZE);
+ physpage = (unsigned long) page_address(page);
+ if (physpage)
+ r3k_flush_icache_range(physpage, physpage + PAGE_SIZE);
}
static void r3k_flush_cache_sigtramp(unsigned long addr)
@@ -662,6 +663,7 @@ void __init ld_mmu_r2300(void)
_flush_cache_sigtramp = r3k_flush_cache_sigtramp;
_flush_page_to_ram = r3k_flush_page_to_ram;
_flush_icache_page = r3k_flush_icache_page;
+ _flush_icache_range = r3k_flush_icache_range;
_dma_cache_wback_inv = r3k_dma_cache_wback_inv;
diff --git a/arch/mips/mm/r4xx0.c b/arch/mips/mm/r4xx0.c
index ae3819645..0c8616c3e 100644
--- a/arch/mips/mm/r4xx0.c
+++ b/arch/mips/mm/r4xx0.c
@@ -1956,6 +1956,12 @@ r4k_flush_icache_page_s(struct vm_area_struct *vma, struct page *page,
}
static void
+r4k_flush_icache_range(unsigned long start, unsigned long end)
+{
+ flush_cache_all();
+}
+
+static void
r4k_flush_icache_page_i16(struct vm_area_struct *vma, struct page *page,
unsigned long address)
{
@@ -2697,6 +2703,7 @@ void __init ld_mmu_r4xx0(void)
}
_flush_cache_sigtramp = r4k_flush_cache_sigtramp;
+ _flush_icache_range = r4k_flush_icache_range; /* Ouch */
if ((read_32bit_cp0_register(CP0_PRID) & 0xfff0) == 0x2020) {
_flush_cache_sigtramp = r4600v20k_flush_cache_sigtramp;
}
diff --git a/arch/mips/mm/rm7k.c b/arch/mips/mm/rm7k.c
index 85bb7e1c5..4b5a20325 100644
--- a/arch/mips/mm/rm7k.c
+++ b/arch/mips/mm/rm7k.c
@@ -181,7 +181,8 @@ static void rm7k_flush_icache_range(unsigned long start, unsigned long end)
__flush_cache_all_d32i32();
}
-static void rm7k_flush_icache_page(struct page *page, unsigned long addr)
+static void rm7k_flush_icache_page(struct vm_area_struct *vma,
+ struct page *page, unsigned long addr)
{
/*
* FIXME: We should not flush the entire cache but establish some