added add_wired_entry(); at the moment it's only implemented in r4xx0.c

6 files changed, 79 insertions, 8 deletions

diff --git a/arch/mips/mm/andes.c b/arch/mips/mm/andes.c
index ee0771a74..4ef02dfa0 100644
--- a/arch/mips/mm/andes.c
+++ b/arch/mips/mm/andes.c
@@ -1,4 +1,4 @@
-/* $Id: andes.c,v 1.3 1996/07/29 11:10:06 dm Exp $
+/* $Id: andes.c,v 1.1.1.1 1997/06/01 03:16:38 ralf Exp $
  * andes.c: MMU and cache operations for the R10000 (ANDES).
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
@@ -79,6 +79,12 @@ static void andes_pgd_init(unsigned long page)
 {
 }
 
+static void andes_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
+				  unsigned long entryhi, unsigned long pagemask)
+{
+        /* XXX */
+}
+
 void ld_mmu_andes(void)
 {
 	flush_cache_all = andes_flush_cache_all;
@@ -92,6 +98,8 @@ void ld_mmu_andes(void)
 	flush_tlb_mm = andes_flush_tlb_mm;
 	flush_tlb_range = andes_flush_tlb_range;
 	flush_tlb_page = andes_flush_tlb_page;
+    
+        add_wired_entry = andes_add_wired_entry;
 
 	load_pgd = andes_load_pgd;
 	pgd_init = andes_pgd_init;
diff --git a/arch/mips/mm/loadmmu.c b/arch/mips/mm/loadmmu.c
index 4ca1326f7..70597201a 100644
--- a/arch/mips/mm/loadmmu.c
+++ b/arch/mips/mm/loadmmu.c
@@ -1,4 +1,4 @@
-/* $Id: loadmmu.c,v 1.6 1996/07/29 11:10:07 dm Exp $
+/* $Id: loadmmu.c,v 1.1.1.1 1997/06/01 03:16:38 ralf Exp $
  * loadmmu.c: Setup cpu/cache specific function ptrs at boot time.
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
@@ -41,6 +41,10 @@ void (*update_mmu_cache)(struct vm_area_struct * vma,
 			 unsigned long address, pte_t pte);
 
 void (*show_regs)(struct pt_regs *);
+
+void (*add_wired_entry)(unsigned long entrylo0, unsigned long entrylo1,
+			unsigned long entryhi, unsigned long pagemask);
+
 asmlinkage void (*resume)(void *tsk);
 
 extern void ld_mmu_r2300(void);
diff --git a/arch/mips/mm/r2300.c b/arch/mips/mm/r2300.c
index 954fb6284..98dbaaf5c 100644
--- a/arch/mips/mm/r2300.c
+++ b/arch/mips/mm/r2300.c
@@ -3,7 +3,7 @@
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
  *
- * $Id: r2300.c,v 1.2 1997/06/28 23:27:19 ralf Exp $
+ * $Id: r2300.c,v 1.2 1997/07/01 09:00:49 ralf Exp $
  */
 
 #include <linux/kernel.h>
@@ -245,6 +245,14 @@ static void r2300_show_regs(struct pt_regs * regs)
 	       (unsigned int) regs->cp0_cause);
 }
 
+static void r2300_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
+				  unsigned long entryhi, unsigned long pagemask)
+{
+        /*
+	 * FIXME, to be done
+	 */
+}
+
 void ld_mmu_r2300(void)
 {
 	clear_page = r2300_clear_page;
@@ -267,6 +275,8 @@ void ld_mmu_r2300(void)
 	update_mmu_cache = r2300_update_mmu_cache;
 
 	show_regs = r2300_show_regs;
+    
+        add_wired_entry = r2300_add_wired_entry;
 
 	flush_tlb_all();
 }
diff --git a/arch/mips/mm/r4xx0.c b/arch/mips/mm/r4xx0.c
index 05e093e92..c00d63bc8 100644
--- a/arch/mips/mm/r4xx0.c
+++ b/arch/mips/mm/r4xx0.c
@@ -3,7 +3,7 @@
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
  *
- * $Id: r4xx0.c,v 1.5 1997/06/28 23:27:20 ralf Exp $
+ * $Id: r4xx0.c,v 1.4 1997/07/01 09:00:50 ralf Exp $
  */
 #include <linux/config.h>
 
@@ -1856,7 +1856,7 @@ static inline void r4k_flush_tlb_all(void)
 	set_entrylo1(0);
 	BARRIER;
 
-	entry = 0;
+	entry = get_wired();
 
 	/* Blast 'em all away. */
 	while(entry < NTLB_ENTRIES) {
@@ -2122,6 +2122,37 @@ static void r4k_show_regs(struct pt_regs * regs)
 	printk("epc   : %08lx\nStatus: %08lx\nCause : %08lx\n",
 	       regs->cp0_epc, regs->cp0_status, regs->cp0_cause);
 }
+			
+static void r4k_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
+				      unsigned long entryhi, unsigned long pagemask)
+{
+        unsigned long flags;
+        unsigned long wired;
+        unsigned long old_pagemask;
+        unsigned long old_ctx;
+
+        save_and_cli(flags);
+        /* Save old context and create impossible VPN2 value */
+        old_ctx = (get_entryhi() & 0xff);
+        old_pagemask = get_pagemask();
+        wired = get_wired();
+        set_wired (wired + 1);
+        set_index (wired);
+        BARRIER;    
+        set_pagemask (pagemask);
+        set_entryhi(entryhi);
+        set_entrylo0(entrylo0);
+        set_entrylo1(entrylo1);
+        BARRIER;    
+        tlb_write_indexed();
+        BARRIER;    
+    
+        set_entryhi(old_ctx);
+        BARRIER;    
+        set_pagemask (old_pagemask);
+        flush_tlb_all();    
+        restore_flags(flags);
+}
 
 /* Detect and size the various r4k caches. */
 static void probe_icache(unsigned long config)
@@ -2567,6 +2598,8 @@ try_again:
 	update_mmu_cache = r4k_update_mmu_cache;
 
 	show_regs = r4k_show_regs;
+    
+        add_wired_entry = r4k_add_wired_entry;
 
 	flush_cache_all();
 	write_32bit_cp0_register(CP0_WIRED, 0);
diff --git a/arch/mips/mm/r6000.c b/arch/mips/mm/r6000.c
index 04c19b322..4f792fcd6 100644
--- a/arch/mips/mm/r6000.c
+++ b/arch/mips/mm/r6000.c
@@ -1,4 +1,4 @@
-/* $Id: r6000.c,v 1.5 1996/07/29 11:10:08 dm Exp $
+/* $Id: r6000.c,v 1.1.1.1 1997/06/01 03:16:38 ralf Exp $
  * r6000.c: MMU and cache routines for the R6000 processors.
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
@@ -156,6 +156,12 @@ static void r6000_show_regs(struct pt_regs * regs)
 	       (unsigned int) regs->cp0_cause);
 }
 
+static void r6000_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
+				  unsigned long entryhi, unsigned long pagemask)
+{
+        /* XXX */
+}
+
 void ld_mmu_r6000(void)
 {
 	flush_cache_all = r6000_flush_cache_all;
@@ -175,6 +181,8 @@ void ld_mmu_r6000(void)
 	update_mmu_cache = r6000_update_mmu_cache;
 
 	show_regs = r6000_show_regs;
+    
+        add_wired_entry = r6000_add_wired_entry;
 
 	flush_cache_all();
 	flush_tlb_all();
diff --git a/arch/mips/mm/tfp.c b/arch/mips/mm/tfp.c
index cdc61f1f6..04db52b98 100644
--- a/arch/mips/mm/tfp.c
+++ b/arch/mips/mm/tfp.c
@@ -1,4 +1,4 @@
-/* $Id: tfp.c,v 1.3 1996/07/29 11:10:08 dm Exp $
+/* $Id: tfp.c,v 1.1.1.1 1997/06/01 03:16:38 ralf Exp $
  * tfp.c: MMU and cache routines specific to the r8000 (TFP).
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
@@ -79,6 +79,12 @@ static void tfp_pgd_init(unsigned long page)
 {
 }
 
+static void tfp_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
+				unsigned long entryhi, unsigned long pagemask)
+{
+        /* XXX */
+}
+
 void ld_mmu_tfp(void)
 {
 	flush_cache_all = tfp_flush_cache_all;
@@ -93,9 +99,11 @@ void ld_mmu_tfp(void)
 	flush_tlb_range = tfp_flush_tlb_range;
 	flush_tlb_page = tfp_flush_tlb_page;
 
+        add_wired_entry = tfp_add_wired_entry;
+
 	load_pgd = tfp_load_pgd;
 	pgd_init = tfp_pgd_init;
-
+    
 	flush_cache_all();
 	flush_tlb_all();
 }