Mapped kernel changes: create elf sections as close as possible to

IRIX, to get the same kind of loader behavior. Read comments in
mapped_kernel.h for more details.

4 files changed, 30 insertions, 33 deletions

diff --git a/arch/mips64/Makefile b/arch/mips64/Makefile
index 3257fcbb9..b37fabe69 100644
--- a/arch/mips64/Makefile
+++ b/arch/mips64/Makefile
@@ -132,7 +132,7 @@ endif
 
 ifdef CONFIG_MAPPED_KERNEL
 vmlinux.64: vmlinux
-	$(OBJCOPY) -O $(64bit-bfd) --change-addresses=0xa7ffffff40000000 $< $@
+	$(OBJCOPY) -O $(64bit-bfd) --change-addresses=0xbfffffff40000000 $< $@
 else
 vmlinux.64: vmlinux
 	$(OBJCOPY) -O $(64bit-bfd) --change-addresses=0xa7ffffff80000000 $< $@
diff --git a/arch/mips64/kernel/head.S b/arch/mips64/kernel/head.S
index 87db8483d..ebdcaa2fc 100644
--- a/arch/mips64/kernel/head.S
+++ b/arch/mips64/kernel/head.S
@@ -30,6 +30,31 @@
 #endif
 	.endm
 
+	.macro MAPPED_KERNEL_SETUP_TLB
+#ifdef CONFIG_MAPPED_KERNEL
+	/*
+	 * This needs to read the nasid - assume 0 for now.
+	 * Drop in 0xffffffffc0000000 in tlbhi, 0+VG in tlblo_0,
+	 * 0+DVG in tlblo_1.
+	 */
+	dli	t0, 0xffffffffc0000000
+	dmtc0	t0, CP0_ENTRYHI
+	li	t0, ((_PAGE_GLOBAL|_PAGE_VALID| _CACHE_CACHABLE_COW) >> 6)
+	mtc0	t0, CP0_ENTRYLO0	# physaddr 0, VG, cach exlwr
+	li	t0, ((_PAGE_GLOBAL|_PAGE_VALID| _PAGE_DIRTY|_CACHE_CACHABLE_COW) >> 6)
+	mtc0	t0, CP0_ENTRYLO1	# physaddr 0, DVG, cach exlwr
+	li	t0, 0x1ffe000		# MAPPED_KERN_TLBMASK, TLBPGMASK_16M
+	mtc0	t0, CP0_PAGEMASK
+	li	t0, 0			# KMAP_INX
+	mtc0	t0, CP0_INDEX
+	li	t0, 1
+	mtc0	t0, CP0_WIRED
+	tlbwi
+#else
+	mtc0	zero, CP0_WIRED
+#endif
+	.endm
+
 	.text
 
 EXPORT(stext)					# used for profiling
@@ -42,7 +67,7 @@ NESTED(kernel_entry, 16, sp)			# kernel entry point
 	ori	sp, 0xf				# align stack on 16 byte.
 	xori	sp, 0xf
 
-	jal	mapped_kernel_setup_tlb
+	MAPPED_KERNEL_SETUP_TLB
 
 	ARC64_TWIDDLE_PC
 
@@ -77,37 +102,8 @@ NESTED(kernel_entry, 16, sp)			# kernel entry point
 1:	b	1b				# just in case ...
 	END(kernel_entry)
 
-NESTED(mapped_kernel_setup_tlb, 16, sp)
-#ifdef CONFIG_MAPPED_KERNEL
-	/*
-	 * This needs to read the nasid - assume 0 for now.
-	 * Drop in 0xffffffffc0000000 in tlbhi, 0+DVG in tlblo_0,
-	 * 0x10000+DVG in tlblo_1. Assumes sash will load kernel
-	 * at physical 0x1c000 and virtual 0xa80000000001c000.
-	 * (mips64/Makefile has a --change-address to do this).
-	 */
-	dli	t0, 0xffffffffc0000000
-	dmtc0	t0, CP0_ENTRYHI
-	li	t0, ((_PAGE_GLOBAL|_PAGE_VALID| _PAGE_DIRTY|_CACHE_CACHABLE_COW) >> 6)
-	mtc0	t0, CP0_ENTRYLO0	# physaddr 0, DVG, cach exlwr
-	li	t0, (_PAGE_GLOBAL >> 6)	# allow global access to kernel
-	mtc0	t0, CP0_ENTRYLO1	# 16M should be enough for text+data
-	li	t0, 0x1ffe000		# MAPPED_KERN_TLBMASK, TLBPGMASK_16M
-	mtc0	t0, CP0_PAGEMASK
-	li	t0, 0			# KMAP_INX
-	mtc0	t0, CP0_INDEX
-	li	t0, 1
-	mtc0	t0, CP0_WIRED
-	tlbwi
-#else
-	mtc0	zero, CP0_WIRED
-	tlbwi
-#endif
-	jr	ra
-	END(mapped_kernel_setup_tlb)
-
 NESTED(bootstrap, 16, sp)
-	jal	mapped_kernel_setup_tlb
+	MAPPED_KERNEL_SETUP_TLB
 	ARC64_TWIDDLE_PC
 	CLI
 	mfc0	t0, CP0_STATUS
diff --git a/arch/mips64/ld.script.elf32 b/arch/mips64/ld.script.elf32
index 8dff092af..659e3761a 100644
--- a/arch/mips64/ld.script.elf32
+++ b/arch/mips64/ld.script.elf32
@@ -15,6 +15,7 @@ SECTIONS
   _etext = .;
 
   . = ALIGN(16384);
+  /* This for CONFIG_MAPPED_KERNEL . = . + 16777216; */
   .data.init_task : { *(.data.init_task) }
 
   /* Startup code */
diff --git a/arch/mips64/sgi-ip27/ip27-memory.c b/arch/mips64/sgi-ip27/ip27-memory.c
index f0db21bc0..67ca9ab09 100644
--- a/arch/mips64/sgi-ip27/ip27-memory.c
+++ b/arch/mips64/sgi-ip27/ip27-memory.c
@@ -58,7 +58,7 @@ pfn_t node_getfirstfree(cnodeid_t cnode)
 	nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode);
 
 #ifdef CONFIG_MAPPED_KERNEL
-	loadbase = CKSSEG;
+	loadbase = CKSSEG + 16777216;
 #endif
 	if (cnode == 0)
 		return (KDM_TO_PHYS(PAGE_ALIGN((unsigned long)(&_end)) -