Port the recent cache changes forward and backward between mips and

mips64.

6 files changed, 164 insertions, 301 deletions

diff --git a/arch/mips/config.in b/arch/mips/config.in
index 8126ff15b..3d2bfc141 100644
--- a/arch/mips/config.in
+++ b/arch/mips/config.in
@@ -32,6 +32,7 @@ bool 'Support for SNI RM200 PCI' CONFIG_SNI_RM200_PCI
 # Select some configuration options automatically for certain systems.
 #
 unset CONFIG_ARC32
+unset CONFIG_BOARD_SCACHE
 unset CONFIG_ISA
 unset CONFIG_PCI
 unset CONFIG_MIPS_JAZZ
@@ -46,6 +47,7 @@ fi
 if [ "$CONFIG_MIPS_MAGNUM_4000" = "y" -o \
      "$CONFIG_OLIVETTI_M700" = "y" ]; then
    define_bool CONFIG_ARC32 y
+   define_bool CONFIG_BOARD_SCACHE y
    define_bool CONFIG_ISA y
    define_bool CONFIG_FB y
    define_bool CONFIG_FB_G364 y	
diff --git a/arch/mips/defconfig b/arch/mips/defconfig
index 99df6b011..b3ac37d5e 100644
--- a/arch/mips/defconfig
+++ b/arch/mips/defconfig
@@ -24,7 +24,6 @@ CONFIG_SGI_IP22=y
 # CONFIG_SBUS is not set
 CONFIG_ARC32=y
 CONFIG_PC_KEYB=y
-# CONFIG_PSMOUSE is not set
 CONFIG_SGI=y
 # CONFIG_ISA is not set
 # CONFIG_PCI is not set
@@ -59,6 +58,7 @@ CONFIG_KCORE_ELF=y
 CONFIG_ELF_KERNEL=y
 CONFIG_BINFMT_IRIX=y
 CONFIG_FORWARD_KEYBOARD=y
+# CONFIG_ARC_CONSOLE is not set
 # CONFIG_BINFMT_AOUT is not set
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_MISC is not set
@@ -220,7 +220,7 @@ CONFIG_VT=y
 CONFIG_VT_CONSOLE=y
 CONFIG_SGI_NEWPORT_CONSOLE=y
 CONFIG_FONT_8x16=y
-# CONFIG_ARC_CONSOLE is not set
+# CONFIG_PSMOUSE is not set
 # CONFIG_UNIX98_PTYS is not set
 
 #
diff --git a/arch/mips/defconfig-ip22 b/arch/mips/defconfig-ip22
index bef1b1f71..a5167c1bb 100644
--- a/arch/mips/defconfig-ip22
+++ b/arch/mips/defconfig-ip22
@@ -24,7 +24,6 @@ CONFIG_SGI_IP22=y
 # CONFIG_SBUS is not set
 CONFIG_ARC32=y
 CONFIG_PC_KEYB=y
-CONFIG_PSMOUSE=y
 CONFIG_SGI=y
 # CONFIG_ISA is not set
 # CONFIG_PCI is not set
@@ -59,6 +58,7 @@ CONFIG_KCORE_ELF=y
 CONFIG_ELF_KERNEL=y
 CONFIG_BINFMT_IRIX=y
 CONFIG_FORWARD_KEYBOARD=y
+# CONFIG_ARC_CONSOLE is not set
 # CONFIG_BINFMT_AOUT is not set
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_MISC is not set
@@ -220,7 +220,8 @@ CONFIG_VT=y
 CONFIG_VT_CONSOLE=y
 CONFIG_SGI_NEWPORT_CONSOLE=y
 CONFIG_FONT_8x16=y
-# CONFIG_ARC_CONSOLE is not set
+CONFIG_PSMOUSE=y
+CONFIG_MOUSE=y
 # CONFIG_UNIX98_PTYS is not set
 
 #
diff --git a/arch/mips/defconfig-rm200 b/arch/mips/defconfig-rm200
index de2f2e8c2..5204e102f 100644
--- a/arch/mips/defconfig-rm200
+++ b/arch/mips/defconfig-rm200
@@ -55,6 +55,7 @@ CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_LITTLE_ENDIAN=y
 CONFIG_KCORE_ELF=y
 CONFIG_ELF_KERNEL=y
+# CONFIG_ARC_CONSOLE is not set
 # CONFIG_BINFMT_AOUT is not set
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_MISC is not set
diff --git a/arch/mips/mm/r4xx0.c b/arch/mips/mm/r4xx0.c
index 0446ec7b8..fe51ac981 100644
--- a/arch/mips/mm/r4xx0.c
+++ b/arch/mips/mm/r4xx0.c
@@ -208,7 +208,7 @@ static void r4k_clear_page_r4600_v2(void * page)
 {
 	unsigned int flags;
 
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	*(volatile unsigned int *)KSEG1;
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
@@ -235,7 +235,7 @@ static void r4k_clear_page_r4600_v2(void * page)
 		 "I" (PAGE_SIZE),
 		 "i" (Create_Dirty_Excl_D)
 		:"$1","memory");
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 /*
@@ -626,7 +626,7 @@ static void r4k_copy_page_r4600_v2(void * to, void * from)
 		:"0" (to), "1" (from),
 		 "I" (PAGE_SIZE),
 		 "i" (Create_Dirty_Excl_D));
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 /*
@@ -910,81 +910,81 @@ static inline void r4k_flush_cache_all_s16d16i16(void)
 {
 	unsigned long flags;
 
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	blast_dcache16(); blast_icache16(); blast_scache16();
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static inline void r4k_flush_cache_all_s32d16i16(void)
 {
 	unsigned long flags;
 
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	blast_dcache16(); blast_icache16(); blast_scache32();
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static inline void r4k_flush_cache_all_s64d16i16(void)
 {
 	unsigned long flags;
 
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	blast_dcache16(); blast_icache16(); blast_scache64();
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static inline void r4k_flush_cache_all_s128d16i16(void)
 {
 	unsigned long flags;
 
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	blast_dcache16(); blast_icache16(); blast_scache128();
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static inline void r4k_flush_cache_all_s32d32i32(void)
 {
 	unsigned long flags;
 
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	blast_dcache32(); blast_icache32(); blast_scache32();
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static inline void r4k_flush_cache_all_s64d32i32(void)
 {
 	unsigned long flags;
 
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	blast_dcache32(); blast_icache32(); blast_scache64();
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static inline void r4k_flush_cache_all_s128d32i32(void)
 {
 	unsigned long flags;
 
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	blast_dcache32(); blast_icache32(); blast_scache128();
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static inline void r4k_flush_cache_all_d16i16(void)
 {
 	unsigned long flags;
 
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	blast_dcache16(); blast_icache16();
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static inline void r4k_flush_cache_all_d32i32(void)
 {
 	unsigned long flags;
 
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	blast_dcache32(); blast_icache32();
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void
@@ -1011,7 +1011,7 @@ r4k_flush_cache_range_s16d16i16(struct mm_struct *mm,
 			pmd_t *pmd;
 			pte_t *pte;
 
-			save_and_cli(flags);
+			__save_and_cli(flags);
 			while(start < end) {
 				pgd = pgd_offset(mm, start);
 				pmd = pmd_offset(pgd, start);
@@ -1021,7 +1021,7 @@ r4k_flush_cache_range_s16d16i16(struct mm_struct *mm,
 					blast_scache16_page(start);
 				start += PAGE_SIZE;
 			}
-			restore_flags(flags);
+			__restore_flags(flags);
 		}
 	}
 }
@@ -1050,7 +1050,7 @@ r4k_flush_cache_range_s32d16i16(struct mm_struct *mm,
 			pmd_t *pmd;
 			pte_t *pte;
 
-			save_and_cli(flags);
+			__save_and_cli(flags);
 			while(start < end) {
 				pgd = pgd_offset(mm, start);
 				pmd = pmd_offset(pgd, start);
@@ -1060,7 +1060,7 @@ r4k_flush_cache_range_s32d16i16(struct mm_struct *mm,
 					blast_scache32_page(start);
 				start += PAGE_SIZE;
 			}
-			restore_flags(flags);
+			__restore_flags(flags);
 		}
 	}
 }
@@ -1088,7 +1088,7 @@ static void r4k_flush_cache_range_s64d16i16(struct mm_struct *mm,
 			pmd_t *pmd;
 			pte_t *pte;
 
-			save_and_cli(flags);
+			__save_and_cli(flags);
 			while(start < end) {
 				pgd = pgd_offset(mm, start);
 				pmd = pmd_offset(pgd, start);
@@ -1098,7 +1098,7 @@ static void r4k_flush_cache_range_s64d16i16(struct mm_struct *mm,
 					blast_scache64_page(start);
 				start += PAGE_SIZE;
 			}
-			restore_flags(flags);
+			__restore_flags(flags);
 		}
 	}
 }
@@ -1126,7 +1126,7 @@ static void r4k_flush_cache_range_s128d16i16(struct mm_struct *mm,
 			pmd_t *pmd;
 			pte_t *pte;
 
-			save_and_cli(flags);
+			__save_and_cli(flags);
 			while(start < end) {
 				pgd = pgd_offset(mm, start);
 				pmd = pmd_offset(pgd, start);
@@ -1136,7 +1136,7 @@ static void r4k_flush_cache_range_s128d16i16(struct mm_struct *mm,
 					blast_scache128_page(start);
 				start += PAGE_SIZE;
 			}
-			restore_flags(flags);
+			__restore_flags(flags);
 		}
 	}
 }
@@ -1164,7 +1164,7 @@ static void r4k_flush_cache_range_s32d32i32(struct mm_struct *mm,
 			pmd_t *pmd;
 			pte_t *pte;
 
-			save_and_cli(flags);
+			__save_and_cli(flags);
 			while(start < end) {
 				pgd = pgd_offset(mm, start);
 				pmd = pmd_offset(pgd, start);
@@ -1174,7 +1174,7 @@ static void r4k_flush_cache_range_s32d32i32(struct mm_struct *mm,
 					blast_scache32_page(start);
 				start += PAGE_SIZE;
 			}
-			restore_flags(flags);
+			__restore_flags(flags);
 		}
 	}
 }
@@ -1202,7 +1202,7 @@ static void r4k_flush_cache_range_s64d32i32(struct mm_struct *mm,
 			pmd_t *pmd;
 			pte_t *pte;
 
-			save_and_cli(flags);
+			__save_and_cli(flags);
 			while(start < end) {
 				pgd = pgd_offset(mm, start);
 				pmd = pmd_offset(pgd, start);
@@ -1212,7 +1212,7 @@ static void r4k_flush_cache_range_s64d32i32(struct mm_struct *mm,
 					blast_scache64_page(start);
 				start += PAGE_SIZE;
 			}
-			restore_flags(flags);
+			__restore_flags(flags);
 		}
 	}
 }
@@ -1240,7 +1240,7 @@ static void r4k_flush_cache_range_s128d32i32(struct mm_struct *mm,
 			pmd_t *pmd;
 			pte_t *pte;
 
-			save_and_cli(flags);
+			__save_and_cli(flags);
 			while(start < end) {
 				pgd = pgd_offset(mm, start);
 				pmd = pmd_offset(pgd, start);
@@ -1250,7 +1250,7 @@ static void r4k_flush_cache_range_s128d32i32(struct mm_struct *mm,
 					blast_scache128_page(start);
 				start += PAGE_SIZE;
 			}
-			restore_flags(flags);
+			__restore_flags(flags);
 		}
 	}
 }
@@ -1265,9 +1265,9 @@ static void r4k_flush_cache_range_d16i16(struct mm_struct *mm,
 #ifdef DEBUG_CACHE
 		printk("crange[%d,%08lx,%08lx]", (int)mm->context, start, end);
 #endif
-		save_and_cli(flags);
+		__save_and_cli(flags);
 		blast_dcache16(); blast_icache16();
-		restore_flags(flags);
+		__restore_flags(flags);
 	}
 }
 
@@ -1281,9 +1281,9 @@ static void r4k_flush_cache_range_d32i32(struct mm_struct *mm,
 #ifdef DEBUG_CACHE
 		printk("crange[%d,%08lx,%08lx]", (int)mm->context, start, end);
 #endif
-		save_and_cli(flags);
+		__save_and_cli(flags);
 		blast_dcache32(); blast_icache32();
-		restore_flags(flags);
+		__restore_flags(flags);
 	}
 }
 
@@ -1401,7 +1401,7 @@ static void r4k_flush_cache_page_s16d16i16(struct vm_area_struct *vma,
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1431,7 +1431,7 @@ static void r4k_flush_cache_page_s16d16i16(struct vm_area_struct *vma,
 	} else
 		blast_scache16_page(page);
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void r4k_flush_cache_page_s32d16i16(struct vm_area_struct *vma,
@@ -1453,7 +1453,7 @@ static void r4k_flush_cache_page_s32d16i16(struct vm_area_struct *vma,
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1482,7 +1482,7 @@ static void r4k_flush_cache_page_s32d16i16(struct vm_area_struct *vma,
 	} else
 		blast_scache32_page(page);
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void r4k_flush_cache_page_s64d16i16(struct vm_area_struct *vma,
@@ -1504,7 +1504,7 @@ static void r4k_flush_cache_page_s64d16i16(struct vm_area_struct *vma,
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1533,7 +1533,7 @@ static void r4k_flush_cache_page_s64d16i16(struct vm_area_struct *vma,
 	} else
 		blast_scache64_page(page);
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void r4k_flush_cache_page_s128d16i16(struct vm_area_struct *vma,
@@ -1555,7 +1555,7 @@ static void r4k_flush_cache_page_s128d16i16(struct vm_area_struct *vma,
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1585,7 +1585,7 @@ static void r4k_flush_cache_page_s128d16i16(struct vm_area_struct *vma,
 	} else
 		blast_scache128_page(page);
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void r4k_flush_cache_page_s32d32i32(struct vm_area_struct *vma,
@@ -1607,7 +1607,7 @@ static void r4k_flush_cache_page_s32d32i32(struct vm_area_struct *vma,
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1637,7 +1637,7 @@ static void r4k_flush_cache_page_s32d32i32(struct vm_area_struct *vma,
 	} else
 		blast_scache32_page(page);
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void r4k_flush_cache_page_s64d32i32(struct vm_area_struct *vma,
@@ -1659,7 +1659,7 @@ static void r4k_flush_cache_page_s64d32i32(struct vm_area_struct *vma,
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1689,7 +1689,7 @@ static void r4k_flush_cache_page_s64d32i32(struct vm_area_struct *vma,
 	} else
 		blast_scache64_page(page);
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void r4k_flush_cache_page_s128d32i32(struct vm_area_struct *vma,
@@ -1711,7 +1711,7 @@ static void r4k_flush_cache_page_s128d32i32(struct vm_area_struct *vma,
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1740,7 +1740,7 @@ static void r4k_flush_cache_page_s128d32i32(struct vm_area_struct *vma,
 	} else
 		blast_scache128_page(page);
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void r4k_flush_cache_page_d16i16(struct vm_area_struct *vma,
@@ -1762,7 +1762,7 @@ static void r4k_flush_cache_page_d16i16(struct vm_area_struct *vma,
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1791,7 +1791,7 @@ static void r4k_flush_cache_page_d16i16(struct vm_area_struct *vma,
 		blast_dcache16_page_indexed(page);
 	}
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void r4k_flush_cache_page_d32i32(struct vm_area_struct *vma,
@@ -1813,7 +1813,7 @@ static void r4k_flush_cache_page_d32i32(struct vm_area_struct *vma,
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1843,7 +1843,7 @@ static void r4k_flush_cache_page_d32i32(struct vm_area_struct *vma,
 		blast_dcache32_page_indexed(page);
 	}
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void r4k_flush_cache_page_d32i32_r4600(struct vm_area_struct *vma,
@@ -1865,7 +1865,7 @@ static void r4k_flush_cache_page_d32i32_r4600(struct vm_area_struct *vma,
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1895,7 +1895,7 @@ static void r4k_flush_cache_page_d32i32_r4600(struct vm_area_struct *vma,
 		blast_dcache32_page_indexed(page ^ dcache_waybit);
 	}
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 /* If the addresses passed to these routines are valid, they are
@@ -1909,32 +1909,32 @@ out:
  */
 static void r4k_flush_page_to_ram_s16(struct page *page)
 {
-	blast_scache16_page(page_address(page));
+	blast_scache16_page((unsigned long)page_address(page));
 }
 
 static void r4k_flush_page_to_ram_s32(struct page *page)
 {
-	blast_scache32_page(page_address(page));
+	blast_scache32_page((unsigned long)page_address(page));
 }
 
 static void r4k_flush_page_to_ram_s64(struct page *page)
 {
-	blast_scache64_page(page_address(page));
+	blast_scache64_page((unsigned long)page_address(page));
 }
 
 static void r4k_flush_page_to_ram_s128(struct page *page)
 {
-	blast_scache128_page(page_address(page));
+	blast_scache128_page((unsigned long)page_address(page));
 }
 
 static void r4k_flush_page_to_ram_d16(struct page *page)
 {
-	blast_dcache16_page(page_address(page));
+	blast_dcache16_page((unsigned long)page_address(page));
 }
 
 static void r4k_flush_page_to_ram_d32(struct page *page)
 {
-	blast_dcache32_page(page_address(page));
+	blast_dcache32_page((unsigned long)page_address(page));
 }
 
 static void r4k_flush_page_to_ram_d32_r4600(struct page *page)
@@ -1942,7 +1942,7 @@ static void r4k_flush_page_to_ram_d32_r4600(struct page *page)
 	unsigned long flags;
 
 	__save_and_cli(flags);			/* For R4600 v1.7 bug.  */
-	blast_dcache32_page(page_address(page));
+	blast_dcache32_page((unsigned long)page_address(page));
 	__restore_flags(flags);
 }
 
@@ -1996,7 +1996,7 @@ r4k_dma_cache_wback_inv_pc(unsigned long addr, unsigned long size)
 		flush_cache_all();
 	} else {
 		/* Workaround for R4600 bug.  See comment above. */
-		save_and_cli(flags);
+		__save_and_cli(flags);
 		*(volatile unsigned long *)KSEG1;
 
 		a = addr & ~(dc_lsize - 1);
@@ -2006,7 +2006,7 @@ r4k_dma_cache_wback_inv_pc(unsigned long addr, unsigned long size)
 			if (a == end) break;
 			a += dc_lsize;
 		}
-		restore_flags(flags);
+		__restore_flags(flags);
 	}
 	bcops->bc_wback_inv(addr, size);
 }
@@ -2040,7 +2040,7 @@ r4k_dma_cache_inv_pc(unsigned long addr, unsigned long size)
 		flush_cache_all();
 	} else {
 		/* Workaround for R4600 bug.  See comment above. */
-		save_and_cli(flags);
+		__save_and_cli(flags);
 		*(volatile unsigned long *)KSEG1;
 
 		a = addr & ~(dc_lsize - 1);
@@ -2050,7 +2050,7 @@ r4k_dma_cache_inv_pc(unsigned long addr, unsigned long size)
 			if (a == end) break;
 			a += dc_lsize;
 		}
-		restore_flags(flags);
+		__restore_flags(flags);
 	}
 
 	bcops->bc_inv(addr, size);
@@ -2135,7 +2135,7 @@ void flush_tlb_all(void)
 	printk("[tlball]");
 #endif
 
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	/* Save old context and create impossible VPN2 value */
 	old_ctx = (get_entryhi() & 0xff);
 	set_entryhi(KSEG0);
@@ -2155,7 +2155,7 @@ void flush_tlb_all(void)
 	}
 	BARRIER;
 	set_entryhi(old_ctx);
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 void flush_tlb_mm(struct mm_struct *mm)
@@ -2166,11 +2166,11 @@ void flush_tlb_mm(struct mm_struct *mm)
 #ifdef DEBUG_TLB
 		printk("[tlbmm<%d>]", mm->context);
 #endif
-		save_and_cli(flags);
+		__save_and_cli(flags);
 		get_new_mmu_context(mm, asid_cache);
 		if (mm == current->active_mm)
 			set_entryhi(mm->context & 0xff);
-		restore_flags(flags);
+		__restore_flags(flags);
 	}
 }
 
@@ -2185,7 +2185,7 @@ void flush_tlb_range(struct mm_struct *mm, unsigned long start,
 		printk("[tlbrange<%02x,%08lx,%08lx>]", (mm->context & 0xff),
 		       start, end);
 #endif
-		save_and_cli(flags);
+		__save_and_cli(flags);
 		size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
 		size = (size + 1) >> 1;
 		if(size <= NTLB_ENTRIES_HALF) {
@@ -2219,7 +2219,7 @@ void flush_tlb_range(struct mm_struct *mm, unsigned long start,
 			if (mm == current->active_mm)
 				set_entryhi(mm->context & 0xff);
 		}
-		restore_flags(flags);
+		__restore_flags(flags);
 	}
 }
 
@@ -2234,7 +2234,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 #endif
 		newpid = (vma->vm_mm->context & 0xff);
 		page &= (PAGE_MASK << 1);
-		save_and_cli(flags);
+		__save_and_cli(flags);
 		oldpid = (get_entryhi() & 0xff);
 		set_entryhi(page | newpid);
 		BARRIER;
@@ -2252,7 +2252,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 	finish:
 		BARRIER;
 		set_entryhi(oldpid);
-		restore_flags(flags);
+		__restore_flags(flags);
 	}
 }
 
@@ -2306,7 +2306,7 @@ void update_mmu_cache(struct vm_area_struct * vma,
 	}
 #endif
 
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	address &= (PAGE_MASK << 1);
 	set_entryhi(address | (pid));
 	pgdp = pgd_offset(vma->vm_mm, address);
@@ -2329,7 +2329,7 @@ void update_mmu_cache(struct vm_area_struct * vma,
 	BARRIER;
 	set_entryhi(pid);
 	BARRIER;
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 #if 0
@@ -2342,7 +2342,7 @@ static void r4k_update_mmu_cache_hwbug(struct vm_area_struct * vma,
 	pte_t *ptep;
 	int idx;
 
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	address &= (PAGE_MASK << 1);
 	set_entryhi(address | (get_entryhi() & 0xff));
 	pgdp = pgd_offset(vma->vm_mm, address);
@@ -2358,7 +2358,7 @@ static void r4k_update_mmu_cache_hwbug(struct vm_area_struct * vma,
 	else
 		tlb_write_indexed();
 	BARRIER;
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 #endif
 
@@ -2395,7 +2395,7 @@ void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
         unsigned long old_pagemask;
         unsigned long old_ctx;
 
-        save_and_cli(flags);
+        __save_and_cli(flags);
         /* Save old context and create impossible VPN2 value */
         old_ctx = (get_entryhi() & 0xff);
         old_pagemask = get_pagemask();
@@ -2415,7 +2415,7 @@ void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
         BARRIER;    
         set_pagemask (old_pagemask);
         flush_tlb_all();    
-        restore_flags(flags);
+        __restore_flags(flags);
 }
 
 /* Detect and size the various r4k caches. */
@@ -2475,7 +2475,7 @@ static int __init probe_scache(unsigned long config)
 	/* This is such a bitch, you'd think they would make it
 	 * easy to do this.  Away you daemons of stupidity!
 	 */
-	save_and_cli(flags);
+	__save_and_cli(flags);
 
 	/* Fill each size-multiple cache line with a valid tag. */
 	pow2 = (64 * 1024);
@@ -2519,7 +2519,7 @@ static int __init probe_scache(unsigned long config)
 			break;
 		pow2 <<= 1;
 	}
-	restore_flags(flags);
+	__restore_flags(flags);
 	addr -= begin;
 	printk("Secondary cache sized at %dK linesize %d\n",
 	       (int) (addr >> 10), sc_lsize);
diff --git a/arch/mips64/mm/r4xx0.c b/arch/mips64/mm/r4xx0.c
index 1b2fb35bf..3bb95a216 100644
--- a/arch/mips64/mm/r4xx0.c
+++ b/arch/mips64/mm/r4xx0.c
@@ -1,5 +1,4 @@
-/* $Id: r4xx0.c,v 1.8 2000/02/24 00:12:41 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -811,7 +810,7 @@ r4k_flush_cache_range_s16d16i16(struct mm_struct *mm, unsigned long start,
 					blast_scache16_page(start);
 				start += PAGE_SIZE;
 			}
-			restore_flags(flags);
+			__restore_flags(flags);
 		}
 	}
 }
@@ -840,7 +839,7 @@ r4k_flush_cache_range_s32d16i16(struct mm_struct *mm, unsigned long start,
 			pmd_t *pmd;
 			pte_t *pte;
 
-			save_and_cli(flags);
+			__save_and_cli(flags);
 			while(start < end) {
 				pgd = pgd_offset(mm, start);
 				pmd = pmd_offset(pgd, start);
@@ -850,7 +849,7 @@ r4k_flush_cache_range_s32d16i16(struct mm_struct *mm, unsigned long start,
 					blast_scache32_page(start);
 				start += PAGE_SIZE;
 			}
-			restore_flags(flags);
+			__restore_flags(flags);
 		}
 	}
 }
@@ -879,7 +878,7 @@ r4k_flush_cache_range_s64d16i16(struct mm_struct *mm, unsigned long start,
 			pmd_t *pmd;
 			pte_t *pte;
 
-			save_and_cli(flags);
+			__save_and_cli(flags);
 			while(start < end) {
 				pgd = pgd_offset(mm, start);
 				pmd = pmd_offset(pgd, start);
@@ -889,7 +888,7 @@ r4k_flush_cache_range_s64d16i16(struct mm_struct *mm, unsigned long start,
 					blast_scache64_page(start);
 				start += PAGE_SIZE;
 			}
-			restore_flags(flags);
+			__restore_flags(flags);
 		}
 	}
 }
@@ -918,7 +917,7 @@ r4k_flush_cache_range_s128d16i16(struct mm_struct *mm, unsigned long start,
 			pmd_t *pmd;
 			pte_t *pte;
 
-			save_and_cli(flags);
+			__save_and_cli(flags);
 			while(start < end) {
 				pgd = pgd_offset(mm, start);
 				pmd = pmd_offset(pgd, start);
@@ -928,7 +927,7 @@ r4k_flush_cache_range_s128d16i16(struct mm_struct *mm, unsigned long start,
 					blast_scache128_page(start);
 				start += PAGE_SIZE;
 			}
-			restore_flags(flags);
+			__restore_flags(flags);
 		}
 	}
 }
@@ -957,7 +956,7 @@ r4k_flush_cache_range_s32d32i32(struct mm_struct *mm, unsigned long start,
 			pmd_t *pmd;
 			pte_t *pte;
 
-			save_and_cli(flags);
+			__save_and_cli(flags);
 			while(start < end) {
 				pgd = pgd_offset(mm, start);
 				pmd = pmd_offset(pgd, start);
@@ -967,7 +966,7 @@ r4k_flush_cache_range_s32d32i32(struct mm_struct *mm, unsigned long start,
 					blast_scache32_page(start);
 				start += PAGE_SIZE;
 			}
-			restore_flags(flags);
+			__restore_flags(flags);
 		}
 	}
 }
@@ -996,7 +995,7 @@ r4k_flush_cache_range_s64d32i32(struct mm_struct *mm, unsigned long start,
 			pmd_t *pmd;
 			pte_t *pte;
 
-			save_and_cli(flags);
+			__save_and_cli(flags);
 			while(start < end) {
 				pgd = pgd_offset(mm, start);
 				pmd = pmd_offset(pgd, start);
@@ -1006,7 +1005,7 @@ r4k_flush_cache_range_s64d32i32(struct mm_struct *mm, unsigned long start,
 					blast_scache64_page(start);
 				start += PAGE_SIZE;
 			}
-			restore_flags(flags);
+			__restore_flags(flags);
 		}
 	}
 }
@@ -1035,7 +1034,7 @@ r4k_flush_cache_range_s128d32i32(struct mm_struct *mm, unsigned long start,
 			pmd_t *pmd;
 			pte_t *pte;
 
-			save_and_cli(flags);
+			__save_and_cli(flags);
 			while(start < end) {
 				pgd = pgd_offset(mm, start);
 				pmd = pmd_offset(pgd, start);
@@ -1045,7 +1044,7 @@ r4k_flush_cache_range_s128d32i32(struct mm_struct *mm, unsigned long start,
 					blast_scache128_page(start);
 				start += PAGE_SIZE;
 			}
-			restore_flags(flags);
+			__restore_flags(flags);
 		}
 	}
 }
@@ -1060,9 +1059,9 @@ r4k_flush_cache_range_d16i16(struct mm_struct *mm, unsigned long start,
 #ifdef DEBUG_CACHE
 		printk("crange[%d,%08lx,%08lx]", (int)mm->context, start, end);
 #endif
-		save_and_cli(flags);
+		__save_and_cli(flags);
 		blast_dcache16(); blast_icache16();
-		restore_flags(flags);
+		__restore_flags(flags);
 	}
 }
 
@@ -1076,9 +1075,9 @@ r4k_flush_cache_range_d32i32(struct mm_struct *mm, unsigned long start,
 #ifdef DEBUG_CACHE
 		printk("crange[%d,%08lx,%08lx]", (int)mm->context, start, end);
 #endif
-		save_and_cli(flags);
+		__save_and_cli(flags);
 		blast_dcache32(); blast_icache32();
-		restore_flags(flags);
+		__restore_flags(flags);
 	}
 }
 
@@ -1185,7 +1184,6 @@ r4k_flush_cache_page_s16d16i16(struct vm_area_struct *vma, unsigned long page)
 	pgd_t *pgdp;
 	pmd_t *pmdp;
 	pte_t *ptep;
-	int text;
 
 	/*
 	 * If ownes no valid ASID yet, cannot possibly have gotten
@@ -1197,7 +1195,7 @@ r4k_flush_cache_page_s16d16i16(struct vm_area_struct *vma, unsigned long page)
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1210,7 +1208,6 @@ r4k_flush_cache_page_s16d16i16(struct vm_area_struct *vma, unsigned long page)
 	if(!(pte_val(*ptep) & _PAGE_VALID))
 		goto out;
 
-	text = (vma->vm_flags & VM_EXEC);
 	/* Doing flushes for another ASID than the current one is
 	 * too difficult since stupid R4k caches do a TLB translation
 	 * for every cache flush operation.  So we do indexed flushes
@@ -1223,13 +1220,11 @@ r4k_flush_cache_page_s16d16i16(struct vm_area_struct *vma, unsigned long page)
 		 */
 		page = (KSEG0 + (page & (scache_size - 1)));
 		blast_dcache16_page_indexed(page);
-		if(text)
-			blast_icache16_page_indexed(page);
 		blast_scache16_page_indexed(page);
 	} else
 		blast_scache16_page(page);
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void
@@ -1240,7 +1235,6 @@ r4k_flush_cache_page_s32d16i16(struct vm_area_struct *vma, unsigned long page)
 	pgd_t *pgdp;
 	pmd_t *pmdp;
 	pte_t *ptep;
-	int text;
 
 	/*
 	 * If ownes no valid ASID yet, cannot possibly have gotten
@@ -1252,7 +1246,7 @@ r4k_flush_cache_page_s32d16i16(struct vm_area_struct *vma, unsigned long page)
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1264,7 +1258,6 @@ r4k_flush_cache_page_s32d16i16(struct vm_area_struct *vma, unsigned long page)
 	if(!(pte_val(*ptep) & _PAGE_VALID))
 		goto out;
 
-	text = (vma->vm_flags & VM_EXEC);
 	/* Doing flushes for another ASID than the current one is
 	 * too difficult since stupid R4k caches do a TLB translation
 	 * for every cache flush operation.  So we do indexed flushes
@@ -1277,13 +1270,11 @@ r4k_flush_cache_page_s32d16i16(struct vm_area_struct *vma, unsigned long page)
 		 */
 		page = (KSEG0 + (page & (scache_size - 1)));
 		blast_dcache16_page_indexed(page);
-		if(text)
-			blast_icache16_page_indexed(page);
 		blast_scache32_page_indexed(page);
 	} else
 		blast_scache32_page(page);
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void
@@ -1294,7 +1285,6 @@ r4k_flush_cache_page_s64d16i16(struct vm_area_struct *vma, unsigned long page)
 	pgd_t *pgdp;
 	pmd_t *pmdp;
 	pte_t *ptep;
-	int text;
 
 	/*
 	 * If ownes no valid ASID yet, cannot possibly have gotten
@@ -1306,7 +1296,7 @@ r4k_flush_cache_page_s64d16i16(struct vm_area_struct *vma, unsigned long page)
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1318,7 +1308,6 @@ r4k_flush_cache_page_s64d16i16(struct vm_area_struct *vma, unsigned long page)
 	if(!(pte_val(*ptep) & _PAGE_VALID))
 		goto out;
 
-	text = (vma->vm_flags & VM_EXEC);
 	/*
 	 * Doing flushes for another ASID than the current one is
 	 * too difficult since stupid R4k caches do a TLB translation
@@ -1332,13 +1321,11 @@ r4k_flush_cache_page_s64d16i16(struct vm_area_struct *vma, unsigned long page)
 		 */
 		page = (KSEG0 + (page & (scache_size - 1)));
 		blast_dcache16_page_indexed(page);
-		if(text)
-			blast_icache16_page_indexed(page);
 		blast_scache64_page_indexed(page);
 	} else
 		blast_scache64_page(page);
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void
@@ -1349,7 +1336,6 @@ r4k_flush_cache_page_s128d16i16(struct vm_area_struct *vma, unsigned long page)
 	pgd_t *pgdp;
 	pmd_t *pmdp;
 	pte_t *ptep;
-	int text;
 
 	/*
 	 * If ownes no valid ASID yet, cannot possibly have gotten
@@ -1361,7 +1347,7 @@ r4k_flush_cache_page_s128d16i16(struct vm_area_struct *vma, unsigned long page)
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1374,7 +1360,6 @@ r4k_flush_cache_page_s128d16i16(struct vm_area_struct *vma, unsigned long page)
 	if(!(pte_val(*ptep) & _PAGE_VALID))
 		goto out;
 
-	text = (vma->vm_flags & VM_EXEC);
 	/* Doing flushes for another ASID than the current one is
 	 * too difficult since stupid R4k caches do a TLB translation
 	 * for every cache flush operation.  So we do indexed flushes
@@ -1388,13 +1373,11 @@ r4k_flush_cache_page_s128d16i16(struct vm_area_struct *vma, unsigned long page)
 		 */
 		page = (KSEG0 + (page & (scache_size - 1)));
 		blast_dcache16_page_indexed(page);
-		if(text)
-			blast_icache16_page_indexed(page);
 		blast_scache128_page_indexed(page);
 	} else
 		blast_scache128_page(page);
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void
@@ -1405,7 +1388,6 @@ r4k_flush_cache_page_s32d32i32(struct vm_area_struct *vma, unsigned long page)
 	pgd_t *pgdp;
 	pmd_t *pmdp;
 	pte_t *ptep;
-	int text;
 
 	/*
 	 * If ownes no valid ASID yet, cannot possibly have gotten
@@ -1417,7 +1399,7 @@ r4k_flush_cache_page_s32d32i32(struct vm_area_struct *vma, unsigned long page)
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1430,7 +1412,6 @@ r4k_flush_cache_page_s32d32i32(struct vm_area_struct *vma, unsigned long page)
 	if(!(pte_val(*ptep) & _PAGE_VALID))
 		goto out;
 
-	text = (vma->vm_flags & VM_EXEC);
 	/*
 	 * Doing flushes for another ASID than the current one is
 	 * too difficult since stupid R4k caches do a TLB translation
@@ -1445,13 +1426,11 @@ r4k_flush_cache_page_s32d32i32(struct vm_area_struct *vma, unsigned long page)
 		 */
 		page = (KSEG0 + (page & (scache_size - 1)));
 		blast_dcache32_page_indexed(page);
-		if(text)
-			blast_icache32_page_indexed(page);
 		blast_scache32_page_indexed(page);
 	} else
 		blast_scache32_page(page);
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void
@@ -1462,7 +1441,6 @@ r4k_flush_cache_page_s64d32i32(struct vm_area_struct *vma, unsigned long page)
 	pgd_t *pgdp;
 	pmd_t *pmdp;
 	pte_t *ptep;
-	int text;
 
 	/*
 	 * If ownes no valid ASID yet, cannot possibly have gotten
@@ -1474,7 +1452,7 @@ r4k_flush_cache_page_s64d32i32(struct vm_area_struct *vma, unsigned long page)
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1487,7 +1465,6 @@ r4k_flush_cache_page_s64d32i32(struct vm_area_struct *vma, unsigned long page)
 	if(!(pte_val(*ptep) & _PAGE_VALID))
 		goto out;
 
-	text = (vma->vm_flags & VM_EXEC);
 	/*
 	 * Doing flushes for another ASID than the current one is
 	 * too difficult since stupid R4k caches do a TLB translation
@@ -1502,13 +1479,11 @@ r4k_flush_cache_page_s64d32i32(struct vm_area_struct *vma, unsigned long page)
 		 */
 		page = (KSEG0 + (page & (scache_size - 1)));
 		blast_dcache32_page_indexed(page);
-		if(text)
-			blast_icache32_page_indexed(page);
 		blast_scache64_page_indexed(page);
 	} else
 		blast_scache64_page(page);
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void
@@ -1519,7 +1494,6 @@ r4k_flush_cache_page_s128d32i32(struct vm_area_struct *vma, unsigned long page)
 	pgd_t *pgdp;
 	pmd_t *pmdp;
 	pte_t *ptep;
-	int text;
 
 	/*
 	 * If ownes no valid ASID yet, cannot possibly have gotten
@@ -1531,7 +1505,7 @@ r4k_flush_cache_page_s128d32i32(struct vm_area_struct *vma, unsigned long page)
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1543,7 +1517,6 @@ r4k_flush_cache_page_s128d32i32(struct vm_area_struct *vma, unsigned long page)
 	if(!(pte_val(*ptep) & _PAGE_VALID))
 		goto out;
 
-	text = (vma->vm_flags & VM_EXEC);
 	/*
 	 * Doing flushes for another ASID than the current one is
 	 * too difficult since stupid R4k caches do a TLB translation
@@ -1557,13 +1530,11 @@ r4k_flush_cache_page_s128d32i32(struct vm_area_struct *vma, unsigned long page)
 		 */
 		page = (KSEG0 + (page & (scache_size - 1)));
 		blast_dcache32_page_indexed(page);
-		if(text)
-			blast_icache32_page_indexed(page);
 		blast_scache128_page_indexed(page);
 	} else
 		blast_scache128_page(page);
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void
@@ -1574,7 +1545,6 @@ r4k_flush_cache_page_d16i16(struct vm_area_struct *vma, unsigned long page)
 	pgd_t *pgdp;
 	pmd_t *pmdp;
 	pte_t *ptep;
-	int text;
 
 	/*
 	 * If ownes no valid ASID yet, cannot possibly have gotten
@@ -1586,7 +1556,7 @@ r4k_flush_cache_page_d16i16(struct vm_area_struct *vma, unsigned long page)
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1598,7 +1568,6 @@ r4k_flush_cache_page_d16i16(struct vm_area_struct *vma, unsigned long page)
 	if(!(pte_val(*ptep) & _PAGE_VALID))
 		goto out;
 
-	text = (vma->vm_flags & VM_EXEC);
 	/*
 	 * Doing flushes for another ASID than the current one is
 	 * too difficult since stupid R4k caches do a TLB translation
@@ -1607,19 +1576,15 @@ r4k_flush_cache_page_d16i16(struct vm_area_struct *vma, unsigned long page)
 	 */
 	if(mm == current->mm) {
 		blast_dcache16_page(page);
-		if(text)
-			blast_icache16_page(page);
 	} else {
 		/* Do indexed flush, too much work to get the (possible)
 		 * tlb refills to work correctly.
 		 */
 		page = (KSEG0 + (page & (dcache_size - 1)));
 		blast_dcache16_page_indexed(page);
-		if(text)
-			blast_icache16_page_indexed(page);
 	}
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void
@@ -1630,7 +1595,6 @@ r4k_flush_cache_page_d32i32(struct vm_area_struct *vma, unsigned long page)
 	pgd_t *pgdp;
 	pmd_t *pmdp;
 	pte_t *ptep;
-	int text;
 
 	/*
 	 * If ownes no valid ASID yet, cannot possibly have gotten
@@ -1642,7 +1606,7 @@ r4k_flush_cache_page_d32i32(struct vm_area_struct *vma, unsigned long page)
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1655,7 +1619,6 @@ r4k_flush_cache_page_d32i32(struct vm_area_struct *vma, unsigned long page)
 	if(!(pte_val(*ptep) & _PAGE_PRESENT))
 		goto out;
 
-	text = (vma->vm_flags & VM_EXEC);
 	/*
 	 * Doing flushes for another ASID than the current one is
 	 * too difficult since stupid R4k caches do a TLB translation
@@ -1664,8 +1627,6 @@ r4k_flush_cache_page_d32i32(struct vm_area_struct *vma, unsigned long page)
 	 */
 	if((mm == current->mm) && (pte_val(*ptep) & _PAGE_VALID)) {
 		blast_dcache32_page(page);
-		if(text)
-			blast_icache32_page(page);
 	} else {
 		/*
 		 * Do indexed flush, too much work to get the (possible)
@@ -1673,11 +1634,9 @@ r4k_flush_cache_page_d32i32(struct vm_area_struct *vma, unsigned long page)
 		 */
 		page = (KSEG0 + (page & (dcache_size - 1)));
 		blast_dcache32_page_indexed(page);
-		if(text)
-			blast_icache32_page_indexed(page);
 	}
 out:
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 static void
@@ -1689,7 +1648,6 @@ r4k_flush_cache_page_d32i32_r4600(struct vm_area_struct *vma,
 	pgd_t *pgdp;
 	pmd_t *pmdp;
 	pte_t *ptep;
-	int text;
 
 	/*
 	 * If ownes no valid ASID yet, cannot possibly have gotten
@@ -1701,7 +1659,7 @@ r4k_flush_cache_page_d32i32_r4600(struct vm_area_struct *vma,
 #ifdef DEBUG_CACHE
 	printk("cpage[%d,%08lx]", (int)mm->context, page);
 #endif
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	page &= PAGE_MASK;
 	pgdp = pgd_offset(mm, page);
 	pmdp = pmd_offset(pgdp, page);
@@ -1714,7 +1672,6 @@ r4k_flush_cache_page_d32i32_r4600(struct vm_area_struct *vma,
 	if(!(pte_val(*ptep) & _PAGE_PRESENT))
 		goto out;
 
-	text = (vma->vm_flags & VM_EXEC);
 	/*
 	 * Doing flushes for another ASID than the current one is
 	 * too difficult since stupid R4k caches do a TLB translation
@@ -1723,8 +1680,6 @@ r4k_flush_cache_page_d32i32_r4600(struct vm_area_struct *vma,
 	 */
 	if((mm == current->mm) && (pte_val(*ptep) & _PAGE_VALID)) {
 		blast_dcache32_page(page);
-		if(text)
-			blast_icache32_page(page);
 	} else {
 		/* Do indexed flush, too much work to get the (possible)
 		 * tlb refills to work correctly.
@@ -1732,136 +1687,47 @@ r4k_flush_cache_page_d32i32_r4600(struct vm_area_struct *vma,
 		page = (KSEG0 + (page & (dcache_size - 1)));
 		blast_dcache32_page_indexed(page);
 		blast_dcache32_page_indexed(page ^ dcache_waybit);
-		if(text) {
-			blast_icache32_page_indexed(page);
-			blast_icache32_page_indexed(page ^ icache_waybit);
-		}
 	}
 out:
-	restore_flags(flags);
-}
-
-/* If the addresses passed to these routines are valid, they are either:
- *
- * 1) In KSEG0, so we can do a direct flush of the page.
- * 2) In KSEG2, and since every process can translate those addresses all
- *    the time in kernel mode we can do a direct flush.
- * 3) In KSEG1, no flush necessary.
- */
-static void r4k_flush_page_to_ram_s16d16i16(struct page * page)
-{
-	unsigned long addr = page_address(page) & PAGE_MASK;
-
-	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
-#ifdef DEBUG_CACHE
-		printk("cram[%08lx]", addr);
-#endif
-		blast_scache16_page(addr);
-	}
-}
-
-static void r4k_flush_page_to_ram_s32d16i16(struct page * page)
-{
-	unsigned long addr = page_address(page) & PAGE_MASK;
-
-	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
-#ifdef DEBUG_CACHE
-		printk("cram[%08lx]", addr);
-#endif
-		blast_scache32_page(addr);
-	}
-}
-
-static void r4k_flush_page_to_ram_s64d16i16(struct page * page)
-{
-	unsigned long addr = page_address(page) & PAGE_MASK;
-
-	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
-#ifdef DEBUG_CACHE
-		printk("cram[%08lx]", addr);
-#endif
-		blast_scache64_page(addr);
-	}
+	__restore_flags(flags);
 }
 
-static void r4k_flush_page_to_ram_s128d16i16(struct page * page)
+static void r4k_flush_page_to_ram_s16(struct page *page)
 {
-	unsigned long addr = page_address(page) & PAGE_MASK;
-
-	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
-#ifdef DEBUG_CACHE
-		printk("cram[%08lx]", addr);
-#endif
-		blast_scache128_page(addr);
-	}
+	blast_scache16_page((unsigned long)page_address(page));
 }
 
-static void r4k_flush_page_to_ram_s32d32i32(struct page * page)
+static void r4k_flush_page_to_ram_s32(struct page *page)
 {
-	unsigned long addr = page_address(page) & PAGE_MASK;
-
-	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
-#ifdef DEBUG_CACHE
-		printk("cram[%08lx]", addr);
-#endif
-		blast_scache32_page(addr);
-	}
+	blast_scache32_page((unsigned long)page_address(page));
 }
 
-static void r4k_flush_page_to_ram_s64d32i32(struct page * page)
+static void r4k_flush_page_to_ram_s64(struct page *page)
 {
-	unsigned long addr = page_address(page) & PAGE_MASK;
-
-	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
-#ifdef DEBUG_CACHE
-		printk("cram[%08lx]", addr);
-#endif
-		blast_scache64_page(addr);
-	}
+	blast_scache64_page((unsigned long)page_address(page));
 }
 
-static void r4k_flush_page_to_ram_s128d32i32(struct page * page)
+static void r4k_flush_page_to_ram_s128(struct page *page)
 {
-	unsigned long addr = page_address(page) & PAGE_MASK;
-
-	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
-#ifdef DEBUG_CACHE
-		printk("cram[%08lx]", addr);
-#endif
-		blast_scache128_page(addr);
-	}
+	blast_scache128_page((unsigned long)page_address(page));
 }
 
-static void r4k_flush_page_to_ram_d16i16(struct page * page)
+static void r4k_flush_page_to_ram_d16(struct page *page)
 {
-	unsigned long addr = page_address(page) & PAGE_MASK;
-
-	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
-		unsigned long flags;
+	unsigned long flags;
 
-#ifdef DEBUG_CACHE
-		printk("cram[%08lx]", addr);
-#endif
-		__save_and_cli(flags);
-		blast_dcache16_page(addr);
-		__restore_flags(flags);
-	}
+	__save_and_cli(flags);
+	blast_dcache16_page((unsigned long)page_address(page));
+	__restore_flags(flags);
 }
 
-static void r4k_flush_page_to_ram_d32i32(struct page * page)
+static void r4k_flush_page_to_ram_d32(struct page *page)
 {
-	unsigned long addr = page_address(page) & PAGE_MASK;
-
-	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
-		unsigned long flags;
+	unsigned long flags;
 
-#ifdef DEBUG_CACHE
-		printk("cram[%08lx]", addr);
-#endif
-		__save_and_cli(flags);
-		blast_dcache32_page(addr);
-		__restore_flags(flags);
-	}
+	__save_and_cli(flags);
+	blast_dcache32_page((unsigned long)page_address(page));
+	__restore_flags(flags);
 }
 
 /*
@@ -2008,7 +1874,6 @@ static void r4600v20k_flush_cache_sigtramp(unsigned long addr)
 }
 
 #undef DEBUG_TLB
-#undef DEBUG_TLBUPDATE
 
 #define NTLB_ENTRIES       48  /* Fixed on all R4XX0 variants... */
 
@@ -2151,12 +2016,6 @@ r4k_flush_cache_l2(void)
 {
 }
 
-#ifdef DEBUG_TLBUPDATE
-static unsigned long ehi_debug[NTLB_ENTRIES];
-static unsigned long el0_debug[NTLB_ENTRIES];
-static unsigned long el1_debug[NTLB_ENTRIES];
-#endif
-
 /* We will need multiple versions of update_mmu_cache(), one that just
  * updates the TLB with the new pte(s), and another which also checks
  * for the R4k "end of page" hardware bug and does the needy.
@@ -2386,7 +2245,6 @@ static void __init setup_noscache_funcs(void)
 		_flush_cache_mm = r4k_flush_cache_mm_d16i16;
 		_flush_cache_range = r4k_flush_cache_range_d16i16;
 		_flush_cache_page = r4k_flush_cache_page_d16i16;
-		_flush_page_to_ram = r4k_flush_page_to_ram_d16i16;
 		break;
 	case 32:
 		prid = read_32bit_cp0_register(CP0_PRID) & 0xfff0;
@@ -2404,9 +2262,18 @@ static void __init setup_noscache_funcs(void)
 		_flush_cache_mm = r4k_flush_cache_mm_d32i32;
 		_flush_cache_range = r4k_flush_cache_range_d32i32;
 		_flush_cache_page = r4k_flush_cache_page_d32i32;
-		_flush_page_to_ram = r4k_flush_page_to_ram_d32i32;
 		break;
 	}
+
+	switch(ic_lsize) {
+	case 16:
+		_flush_page_to_ram = r4k_flush_page_to_ram_d16;
+		break;
+	case 32:
+		_flush_page_to_ram = r4k_flush_page_to_ram_d32;
+		break;
+	}
+
 	_dma_cache_wback_inv = r4k_dma_cache_wback_inv_pc;
 	_dma_cache_wback = r4k_dma_cache_wback;
 	_dma_cache_inv = r4k_dma_cache_inv_pc;
@@ -2422,11 +2289,11 @@ static void __init setup_scache_funcs(void)
 			_flush_cache_mm = r4k_flush_cache_mm_s16d16i16;
 			_flush_cache_range = r4k_flush_cache_range_s16d16i16;
 			_flush_cache_page = r4k_flush_cache_page_s16d16i16;
-			_flush_page_to_ram = r4k_flush_page_to_ram_s16d16i16;
 			break;
 		case 32:
 			panic("Invalid cache configuration detected");
 		};
+		_flush_page_to_ram = r4k_flush_page_to_ram_s16;
 		_clear_page = r4k_clear_page_s16;
 		_copy_page = r4k_copy_page_s16;
 		break;
@@ -2437,16 +2304,15 @@ static void __init setup_scache_funcs(void)
 			_flush_cache_mm = r4k_flush_cache_mm_s32d16i16;
 			_flush_cache_range = r4k_flush_cache_range_s32d16i16;
 			_flush_cache_page = r4k_flush_cache_page_s32d16i16;
-			_flush_page_to_ram = r4k_flush_page_to_ram_s32d16i16;
 			break;
 		case 32:
 			_flush_cache_l1 = r4k_flush_cache_all_s32d32i32;
 			_flush_cache_mm = r4k_flush_cache_mm_s32d32i32;
 			_flush_cache_range = r4k_flush_cache_range_s32d32i32;
 			_flush_cache_page = r4k_flush_cache_page_s32d32i32;
-			_flush_page_to_ram = r4k_flush_page_to_ram_s32d32i32;
 			break;
 		};
+		_flush_page_to_ram = r4k_flush_page_to_ram_s32;
 		_clear_page = r4k_clear_page_s32;
 		_copy_page = r4k_copy_page_s32;
 		break;
@@ -2457,16 +2323,15 @@ static void __init setup_scache_funcs(void)
 			_flush_cache_mm = r4k_flush_cache_mm_s64d16i16;
 			_flush_cache_range = r4k_flush_cache_range_s64d16i16;
 			_flush_cache_page = r4k_flush_cache_page_s64d16i16;
-			_flush_page_to_ram = r4k_flush_page_to_ram_s64d16i16;
 			break;
 		case 32:
 			_flush_cache_l1 = r4k_flush_cache_all_s64d32i32;
 			_flush_cache_mm = r4k_flush_cache_mm_s64d32i32;
 			_flush_cache_range = r4k_flush_cache_range_s64d32i32;
 			_flush_cache_page = r4k_flush_cache_page_s64d32i32;
-			_flush_page_to_ram = r4k_flush_page_to_ram_s64d32i32;
 			break;
 		};
+		_flush_page_to_ram = r4k_flush_page_to_ram_s64;
 		_clear_page = r4k_clear_page_s64;
 		_copy_page = r4k_copy_page_s64;
 		break;
@@ -2477,16 +2342,15 @@ static void __init setup_scache_funcs(void)
 			_flush_cache_mm = r4k_flush_cache_mm_s128d16i16;
 			_flush_cache_range = r4k_flush_cache_range_s128d16i16;
 			_flush_cache_page = r4k_flush_cache_page_s128d16i16;
-			_flush_page_to_ram = r4k_flush_page_to_ram_s128d16i16;
 			break;
 		case 32:
 			_flush_cache_l1 = r4k_flush_cache_all_s128d32i32;
 			_flush_cache_mm = r4k_flush_cache_mm_s128d32i32;
 			_flush_cache_range = r4k_flush_cache_range_s128d32i32;
 			_flush_cache_page = r4k_flush_cache_page_s128d32i32;
-			_flush_page_to_ram = r4k_flush_page_to_ram_s128d32i32;
 			break;
 		};
+		_flush_page_to_ram = r4k_flush_page_to_ram_s128;
 		_clear_page = r4k_clear_page_s128;
 		_copy_page = r4k_copy_page_s128;
 		break;
@@ -2515,11 +2379,6 @@ static inline void __init setup_scache(unsigned int config)
 	setup_noscache_funcs();
 }
 
-static int r4k_user_mode(struct pt_regs *regs)
-{
-	return (regs->cp0_status & ST0_KSU) == KSU_USER;
-}
-
 void __init ld_mmu_r4xx0(void)
 {
 	unsigned long config = read_32bit_cp0_register(CP0_CONFIG);