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authorKanoj Sarcar <kanoj@engr.sgi.com>2000-05-18 19:38:27 +0000
committerKanoj Sarcar <kanoj@engr.sgi.com>2000-05-18 19:38:27 +0000
commitff456a3329ebcf2c630b08a3c1da166f4950da08 (patch)
treef0707ea3fd5ef47fb6118425ee9aa2e28f3c44fc /arch
parent4c4a05121d9d7e6cae0ee6b2e63da40d3839481b (diff)
irq.h: With the current scheme of encoding the bus number into the
pci irq, we need to bump up NR_IRQs to handle more than 4 PCI busses. io.h: Port numbers are really "unsigned long", since they need to contain the nasids too. ip27-pci.c: Encode the nasid into the port number for isp1020 for pio.
Diffstat (limited to 'arch')
-rw-r--r--arch/mips64/sgi-ip27/ip27-pci.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips64/sgi-ip27/ip27-pci.c b/arch/mips64/sgi-ip27/ip27-pci.c
index bd068d289..cbdd6a5c4 100644
--- a/arch/mips64/sgi-ip27/ip27-pci.c
+++ b/arch/mips64/sgi-ip27/ip27-pci.c
@@ -265,6 +265,7 @@ pci_fixup_isp1020(struct pci_dev *d)
{
unsigned short command;
+ d->resource[0].start |= ((unsigned long)(bus_to_nid[d->bus->number])<<32);
printk("PCI: Fixing isp1020 in [bus:slot.fn] %s\n", d->slot_name);
/* Configure device to allow bus mastering, i/o and memory mapping.