diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 1998-08-25 09:12:35 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 1998-08-25 09:12:35 +0000 |
| commit | c7fc24dc4420057f103afe8fc64524ebc25c5d37 (patch) | |
| tree | 3682407a599b8f9f03fc096298134cafba1c9b2f /drivers/macintosh | |
| parent | 1d793fade8b063fde3cf275bf1a5c2d381292cd9 (diff) | |
o Merge with Linux 2.1.116.
o New Newport console code.
o New G364 console code.
Diffstat (limited to 'drivers/macintosh')
26 files changed, 342 insertions, 6197 deletions
diff --git a/drivers/macintosh/Makefile b/drivers/macintosh/Makefile index 116a1d98e..6ab7eba3a 100644 --- a/drivers/macintosh/Makefile +++ b/drivers/macintosh/Makefile @@ -19,10 +19,10 @@ ifndef CONFIG_MBX L_OBJS := via-cuda.o adb.o nvram.o macio-adb.o via-pmu.o mediabay.o endif -ifeq ($(CONFIG_SERIAL)$(CONFIG_PMAC),yy) +ifeq ($(CONFIG_MAC_SERIAL),y) LX_OBJS += macserial.o else - ifeq ($(CONFIG_SERIAL)$(CONFIG_PMAC),my) + ifeq ($(CONFIG_MAC_SERIAL),m) MX_OBJS += macserial.o endif endif @@ -31,30 +31,6 @@ ifdef CONFIG_MAC_KEYBOARD L_OBJS += mac_keyb.o endif -ifdef CONFIG_VT - ifdef CONFIG_PMAC_CONSOLE - L_OBJS += pmac-cons.o - ifdef CONFIG_CONTROL_VIDEO - L_OBJS += control.o - endif - ifdef CONFIG_PLATINUM_VIDEO - L_OBJS += platinum.o - endif - ifdef CONFIG_VALKYRIE_VIDEO - L_OBJS += valkyrie.o - endif - ifdef CONFIG_CHIPS_VIDEO - L_OBJS += chips.o - endif - ifdef CONFIG_ATY_VIDEO - L_OBJS += aty.o - endif - ifdef CONFIG_IMSTT_VIDEO - L_OBJS += imstt.o - endif - endif -endif - include $(TOPDIR)/Rules.make # Integrated in mac_keyb.c diff --git a/drivers/macintosh/adb.c b/drivers/macintosh/adb.c index c20efde6b..f8a7d46e5 100644 --- a/drivers/macintosh/adb.c +++ b/drivers/macintosh/adb.c @@ -17,8 +17,9 @@ #include <asm/pmu.h> #include <asm/uaccess.h> #include <asm/hydra.h> +#include <asm/init.h> -enum adb_hw adb_hardware; +enum adb_hw adb_hardware = ADB_NONE; int (*adb_send_request)(struct adb_request *req, int sync); int (*adb_autopoll)(int on); static void adb_scan_bus(void); @@ -29,6 +30,8 @@ static struct adb_handler { int handler_id; } adb_handler[16]; +__openfirmware + static int adb_nodev(void) { return -1; @@ -137,7 +140,6 @@ static void adb_scan_bus(void) void adb_init(void) { - adb_hardware = ADB_NONE; adb_send_request = (void *) adb_nodev; adb_autopoll = (void *) adb_nodev; if ( (_machine != _MACH_chrp) && (_machine != _MACH_Pmac) ) diff --git a/drivers/macintosh/ati-gt.h b/drivers/macintosh/ati-gt.h deleted file mode 100644 index 32dc792b5..000000000 --- a/drivers/macintosh/ati-gt.h +++ /dev/null @@ -1,203 +0,0 @@ -/* the usage for the following structs vary from the gx and vt: -and sdram and sgram gt's - pll registers (sdram) 6,7,11; - crtc_h_sync_strt_wid[3]; - dsp1[3] (sdram,sgram,unused) - dsp2[3] (offset regbase+24, depends on colour mode); - crtc_h_tot_disp,crtc_v_tot_disp,crtc_v_sync_strt_wid,unused; - pll registers (sgram) 7,11; -*/ - -/* Register values for 1280x1024, 75Hz mode (20). no 16/32 */ -static struct aty_regvals aty_gt_reg_init_20 = { - { 0x41, 0xf9, 0x04 }, - { 0xe02a7, 0x1401a6, 0 }, - { 0x260957, 0x2806d6, 0 }, - { 0x10006b6, 0x20006b6, 0x30006b6 }, - - 0x9f00d2, 0x03ff0429, 0x30400, 0, - { 0xb5, 0x04 } -}; - -#if 0 -/* Register values for 1280x960, 75Hz mode (19) */ -static struct aty_regvals aty_gt_reg_init_19 = { -}; -#endif - -/* Register values for 1152x870, 75Hz mode (18) */ -static struct aty_regvals aty_gt_reg_init_18 = { - { 0x41, 0xe6, 0x04 }, - { 0x300295, 0x300194, 0x300593 }, - { 0x260a1c, 0x380561, 0}, - { 0x1000744, 0x2000744, 0x3000744 }, - - 0x8f00b5, 0x3650392, 0x230368, 0, - { 0xe6, 0x04 } -}; - -/* Register values for 1024x768, 75Hz mode (17), 32 bpp untested */ -static struct aty_regvals aty_gt_reg_init_17 = { - { 0x41, 0xb5, 0x04 }, - { 0xc0283, 0xc0182, 0xc0581 }, - { 0x36066d, 0x3806d6, 0}, - { 0xa0049e, 0x100049e, 0x200049e }, - - 0x7f00a3, 0x2ff031f, 0x30300, 0, - { 0xb8, 0x04 } -}; - -#if 0 -/* Register values for x, Hz mode (16) */ -static struct aty_regvals aty_gt_reg_init_16 = { -}; -#endif - -/* Register values for 1024x768, 70Hz mode (15) */ -static struct aty_regvals aty_gt_reg_init_15 = { - { 0x41, 0xad, 0x04 }, - { 0x310284, 0x310183, 0x310582 }, - { 0x0, 0x380727 }, - { 0x0 }, - 0x7f00a5, 0x2ff0325, 0x260302, -}; - -/* Register values for 1024x768, 60Hz mode (14) */ -static struct aty_regvals aty_gt_reg_init_14 = { - { 0x40, 0xe1, 0x14 }, - { 0x310284, 0x310183, 0x310582 }, - { 0x3607c0, 0x380840, 0x0 }, - { 0xa80592, 0x1000592, 0x0 }, - - 0x7f00a7, 0x2ff0325, 0x260302, 0, - { 0xe1, 0x14 } -}; - -/* Register values for 832x624, 75Hz mode (13) */ -static struct aty_regvals aty_gt_reg_init_13 = { - { 0x40, 0xc6, 0x14 }, - { 0x28026d, 0x28016c, 0x28056b }, - { 0x3608cf, 0x380960, 0 }, - { 0xb00655, 0x1000655, 0x2000655 }, - - 0x67008f, 0x26f029a, 0x230270, 0, - { 0xc6, 0x14 } -}; - -/* Register values for 800x600, 75Hz mode (12) */ -static struct aty_regvals aty_gt_reg_init_12 = { - { 0x42, 0xe4, 0x04 }, - { 0xa0267, 0xa0166, 0x0a0565}, - { 0x360a33, 0x48056d, 0}, - { 0xc00755, 0x1000755, 0x02000755}, - - 0x630083, 0x2570270, 0x30258, 0, - { 0xe4, 0x4 } -}; - -/* Register values for 800x600, 72Hz mode (11) */ -static struct aty_regvals aty_gt_reg_init_11 = { - { 0x42, 0xe6, 0x04 }, - { 0xf026c, 0xf016b, 0xf056a }, - { 0x360a1d, 0x480561, 0}, - { 0xc00745, 0x1000745, 0x2000745 }, - - 0x630081, 0x02570299, 0x6027c -}; - -/* Register values for 800x600, 60Hz mode (10) */ -static struct aty_regvals aty_gt_reg_init_10 = { - { 0x42, 0xb8, 0x04 }, - { 0x10026a, 0x100169, 0x100568 }, - { 0x460652, 0x4806ba, 0}, - { 0x68048b, 0xa0048b, 0x100048b }, - - 0x630083, 0x02570273, 0x40258, 0, - { 0xb8, 0x4 } -}; - -/* Register values for 800x600, 56Hz mode (9) */ -static struct aty_regvals aty_gt_reg_init_9 = { - { 0x42, 0xf9, 0x14 }, - { 0x90268, 0x90167, 0x090566 }, - { 0x460701, 0x480774, 0}, - { 0x700509, 0xa80509, 0x1000509 }, - - 0x63007f, 0x2570270, 0x20258 -}; - -#if 0 -/* Register values for 768x576, 50Hz mode (8) */ -static struct aty_regvals aty_gt_reg_init_8 = { -}; - -/* Register values for 640x870, 75Hz Full Page Display (7) */ -static struct aty_regvals aty_gt_reg_init_7 = { -}; -#endif - -/* Register values for 640x480, 67Hz mode (6) */ -static struct aty_regvals aty_gt_reg_init_6 = { - { 0x42, 0xd1, 0x14 }, - { 0x280259, 0x280158, 0x280557 }, - { 0x460858, 0x4808e2, 0}, - { 0x780600, 0xb00600, 0x1000600 }, - - 0x4f006b, 0x1df020c, 0x2301e2, 0, - { 0x8b, 0x4 } -}; - -/* Register values for 640x480, 60Hz mode (5) */ -static struct aty_regvals aty_gt_reg_init_5 = { - { 0x43, 0xe8, 0x04 }, - { 0x2c0253, 0x2c0152, 0x2c0551 }, - { 0x460a06, 0x580555, 0}, - { 0x880734, 0xc00734, 0x1000734 }, - - 0x4f0063, 0x1df020c, 0x2201e9, 0, - { 0xe8, 0x04 } -}; - -#if 0 -/* Register values for x, Hz mode (4) */ -static struct aty_regvals aty_gt_reg_init_4 = { -}; - -/* Register values for x, Hz mode (3) */ -static struct aty_regvals aty_gt_reg_init_3 = { -}; - -/* Register values for x, Hz mode (2) */ -static struct aty_regvals aty_gt_reg_init_2 = { -}; - -/* Register values for x, Hz mode (1) */ -static struct aty_regvals aty_gt_reg_init_1 = { -}; -#endif - -/* yikes, more data structures (dsp2) - * XXX kludge for sgram - */ -static int sgram_dsp[20][3] = { - {0,0,0}, - {0,0,0}, - {0,0,0}, - {0,0,0}, - {0x5203d7,0x7803d9,0xb803dd}, //5 - {0x940666,0xe0066a,0x1700672}, //6 - {0,0,0}, - {0,0,0}, - {0x88055f,0xd80563,0x170056b}, //9 - {0x8404d9,0xb804dd,0x17004e5}, //10 - {0x7803e2,0xb803e6,0x17003ee}, //11 - {0x7803eb,0xb803ef,0x17003f7}, //12 - {0xe806c5,0x17006cd,0x2e006dd}, //13 - {0xe005f6,0x17005fe,0x2e0060e}, //14 - {0xd8052c,0x1700534,0x2e00544}, //15 - {0,0,0}, - {0xb804f2,0x17004e5,0x2e0050a}, //17 - {0xb803e6,0x17003ee,0x2e003fe}, //18 - {0,0,0}, - {0,0,0}, -}; diff --git a/drivers/macintosh/ati-gx.h b/drivers/macintosh/ati-gx.h deleted file mode 100644 index df48c1865..000000000 --- a/drivers/macintosh/ati-gx.h +++ /dev/null @@ -1,122 +0,0 @@ -/* Register values for 1280x1024, 75Hz (WAS 60) mode (20) */ -static struct aty_regvals aty_gx_reg_init_20 = { - { 0x200, 0x200, 0x200 }, - - { 0x1200a5, 0x1200a3, 0x1200a3 }, - { 0x30c0200, 0x30e0300, 0x30e0300 }, - { 0x2, 0x3, 0x3 }, - - 0x9f00d2, 0x3ff0429, 0x30400, 0x28100040, - { 0xd4, 0x9 } -}; - -/* Register values for 1152x870, 75Hz mode (18) */ -static struct aty_regvals aty_gx_reg_init_18 = { - { 0x200, 0x200, 0x200 }, - - { 0x300097, 0x300095, 0x300094 }, - { 0x3090200, 0x30e0300, 0x30e0600 }, - { 0x2, 0x3, 0x6 }, - - 0x8f00b5, 0x3650392, 0x230368, 0x24100040, - { 0x53, 0x3 } -}; - -/* Register values for 1024x768, 75Hz mode (17) */ -static struct aty_regvals aty_gx_reg_init_17 = { - { 0x200, 0x200, 0x200 }, - - { 0x2c0087, 0x2c0085, 0x2c0084 }, - { 0x3070200, 0x30e0300, 0x30e0600 }, - { 0x2, 0x3, 0x6 }, - - 0x7f00a5, 0x2ff0323, 0x230302, 0x20100000, - { 0x42, 0x3 } -}; - -/* Register values for 1024x768, 72Hz mode (15) */ -static struct aty_regvals aty_gx_reg_init_15 = { - { 0, 0, 0 }, - - { 0x310086, 0x310084, 0x310084 }, - { 0x3070200, 0x30e0300, 0x30e0300 }, - { 0x2002312, 0x3002312, 0x3002312 }, - - 0x7f00a5, 0x2ff0325, 0x260302, 0x20100000, - { 0x88, 0x7 } -}; - -/* Register values for 1024x768, 60Hz mode (14) */ -static struct aty_regvals aty_gx_reg_init_14 = { - { 0, 0, 0 }, - - { 0x310086, 0x310084, 0x310084 }, - { 0x3060200, 0x30d0300, 0x30d0300 }, - { 0x2002312, 0x3002312, 0x3002312 }, - - 0x7f00a7, 0x2ff0325, 0x260302, 0x20100000, - { 0x6c, 0x6 } -}; - -/* Register values for 832x624, 75Hz mode (13) */ -static struct aty_regvals aty_gx_reg_init_13 = { - { 0x200, 0x200, 0x200 }, - - { 0x28006f, 0x28006d, 0x28006c }, - { 0x3050200, 0x30b0300, 0x30e0600 }, - { 0x2, 0x3, 0x6 }, - - 0x67008f, 0x26f029a, 0x230270, 0x1a100040, - { 0x4f, 0x5 } -}; - -#if 0 /* not filled in yet */ -/* Register values for 800x600, 75Hz mode (12) */ -static struct aty_regvals aty_gx_reg_init_12 = { - { 0x10, 0x28, 0x50 }, - { }, - { } /* pixel clock = 49.11MHz for V=74.40Hz */ -}; - -/* Register values for 800x600, 72Hz mode (11) */ -static struct aty_regvals aty_gx_reg_init_11 = { - { 0x10, 0x28, 0x50 }, - { }, - { } /* pixel clock = 49.63MHz for V=71.66Hz */ -}; - -/* Register values for 800x600, 60Hz mode (10) */ -static struct aty_regvals aty_gx_reg_init_10 = { - { 0x10, 0x28, 0x50 }, - { }, - { } /* pixel clock = 41.41MHz for V=59.78Hz */ -}; - -/* Register values for 640x870, 75Hz Full Page Display (7) */ -static struct aty_regvals aty_gx_reg_init_7 = { - { 0x10, 0x30, 0x68 }, - { }, - { } /* pixel clock = 57.29MHz for V=75.01Hz */ -}; -#endif - -/* Register values for 640x480, 67Hz mode (6) */ -static struct aty_regvals aty_gx_reg_init_6 = { - { 0x200, 0x200, 0x200 }, - - { 0x28005b, 0x280059, 0x280058 }, - { 0x3040200, 0x3060300, 0x30c0600 }, - { 0x2002312, 0x3002312, 0x6002312 }, - - 0x4f006b, 0x1df020c, 0x2301e2, 0x14100040, - { 0x35, 0x07 } -}; - -#if 0 /* not filled in yet */ -/* Register values for 640x480, 60Hz mode (5) */ -static struct aty_regvals aty_gx_reg_init_5 = { - { 0x200, 0x200, 0x200 }, - { }, - { 0x35, 0x07 } -}; -#endif diff --git a/drivers/macintosh/ati-vt.h b/drivers/macintosh/ati-vt.h deleted file mode 100644 index 3b25d6d5d..000000000 --- a/drivers/macintosh/ati-vt.h +++ /dev/null @@ -1,147 +0,0 @@ -/* Register values for 1280x1024, 60Hz mode (20) */ -static struct aty_regvals aty_vt_reg_init_20 = { - { 0, 0, 0 }, - - { 0x002e02a7, 0x002e02a7, 0 }, - { 0x03070200, 0x03070200, 0 }, - { 0x0a00cb22, 0x0b00cb23, 0 }, - - 0x009f00d2, 0x03ff0429, 0x00030400, 0x28000000, - { 0x00, 0xaa } -}; - -/* Register values for 1280x960, 75Hz mode (19) */ -static struct aty_regvals aty_vt_reg_init_19 = { - { 0, 0, 0 }, - { 0x003202a3, 0x003201a2, 0 }, - { 0x030b0200, 0x030b0300, 0 }, - { 0x0a00cb22, 0x0b00cb23, 0 }, - - 0x009f00d1, 0x03bf03e7, 0x000303c0, 0x28000000, - { 0x00, 0xc6 } -}; - -/* Register values for 1152x870, 75Hz mode (18) */ -static struct aty_regvals aty_vt_reg_init_18 = { - { 0, 0, 0 }, - - { 0x00300295, 0x00300194, 0 }, - { 0x03080200, 0x03080300, 0 }, - { 0x0a00cb21, 0x0b00cb22, 0 }, - - 0x008f00b5, 0x03650392, 0x00230368, 0x24000000, - { 0x00, 0x9d } -}; - -/* Register values for 1024x768, 75Hz mode (17) */ -static struct aty_regvals aty_vt_reg_init_17 = { - { 0, 0, 0 }, - - { 0x002c0283, 0x002c0182, 0 }, - { 0x03080200, 0x03080300, 0 }, - { 0x0a00cb21, 0x0b00cb22, 0 }, - - 0x007f00a3, 0x02ff031f, 0x00030300, 0x20000000, - { 0x01, 0xf7 } -}; - -/* Register values for 1024x768, 70Hz mode (15) */ -static struct aty_regvals aty_vt_reg_init_15 = { - { 0, 0, 0 }, - { 0x00310284, 0x00310183, 0 }, - { 0x03080200, 0x03080300, 0 }, - { 0x0a00cb21, 0x0b00cb22, 0 }, - - 0x007f00a5, 0x02ff0325, 0x00260302, 0x20000000, - { 0x01, 0xeb } -}; - -/* Register values for 1024x768, 60Hz mode (14) */ -static struct aty_regvals aty_vt_reg_init_14 = { - { 0, 0, 0 }, - - { 0x00310284, 0x00310183, 0x00310582 }, /* 32 bit 0x00310582 */ - { 0x03080200, 0x03080300, 0x03070600 }, /* 32 bit 0x03070600 */ - { 0x0a00cb21, 0x0b00cb22, 0x0e00cb23 }, - - 0x007f00a7, 0x02ff0325, 0x00260302, 0x20000000, - { 0x01, 0xcc } -}; - -/* Register values for 832x624, 75Hz mode (13) */ -static struct aty_regvals aty_vt_reg_init_13 = { - { 0, 0, 0 }, - - { 0x0028026d, 0x0028016c, 0x0028056b }, - { 0x03080200, 0x03070300, 0x03090600 }, - { 0x0a00cb21, 0x0b00cb21, 0x0e00cb22 }, - - 0x0067008f, 0x026f029a, 0x00230270, 0x1a000000, - { 0x01, 0xb4 } -}; - -/* Register values for 800x600, 75Hz mode (12) */ -static struct aty_regvals aty_vt_reg_init_12 = { - { 0, 0, 0 }, - - { 0x002a0267, 0x002a0166, 0x002a0565 }, - { 0x03040200, 0x03060300, 0x03070600 }, - { 0x0a00cb21, 0x0b00cb21, 0x0e00cb22 }, - - 0x00630083, 0x02570270, 0x00030258, 0x19000000, - { 0x01, 0x9c } -}; - -/* Register values for 800x600, 72Hz mode (11) */ -static struct aty_regvals aty_vt_reg_init_11 = { - { 0, 0, 0 }, - - { 0x002f026c, 0x002f016b, 0x002f056a }, - { 0x03050200, 0x03070300, 0x03090600 }, - { 0x0a00cb21, 0x0b00cb21, 0x0e00cb22 }, - - 0x00630081, 0x02570299, 0x0006027c, 0x19000000, - { 0x01, 0x9d } -}; - -/* Register values for 800x600, 60Hz mode (10) */ -static struct aty_regvals aty_vt_reg_init_10 = { - { 0, 0, 0 }, - - { 0x0030026a, 0x00300169, 0x00300568 }, - { 0x03050200, 0x03070300, 0x03090600 }, - { 0x0a00cb21, 0x0b00cb21, 0x0e00cb22 }, - - 0x00630083, 0x02570273, 0x00040258, 0x19000000, - { 0x02, 0xfb } -}; - -/* Register values for 640x480, 67Hz mode (6) */ -static struct aty_regvals aty_vt_reg_init_6 = { - { 0, 0, 0 }, - - { 0x00280259, 0x00280158, 0x00280557 }, - { 0x03050200, 0x03070300, 0x030a0600 }, - { 0x0a00cb21, 0x0b00cb21, 0x0e00cb22 }, - - 0x004f006b, 0x01df020c, 0x002301e2, 0x14000000, - { 0x02, 0xbe } -}; - -/* Register values for 640x480, 60Hz mode (5) */ -static struct aty_regvals aty_vt_reg_init_5 = { - { 0, 0, 0 }, - - { 0x002c0253, 0x002c0152, 0x002c0551 }, - { 0x03050200, 0x03070300, 0x03090600 }, - { 0x0a00cb21, 0x0b00cb21, 0x0e00cb22 }, - - 0x004f0063, 0x01df020c, 0x002201e9, 0x14000000, - { 0x02, 0x9e } -}; - /* 8 bit 15 bit 32 bit */ -static int vt_mem_cntl[3][3] = { { 0x0A00CB21, 0x0B00CB21, 0x0E00CB21 }, /* 1 MB VRAM */ - { 0x0A00CB22, 0x0B00CB22, 0x0E00CB22 }, /* 2 MB VRAM */ - { 0x0200053B, 0x0300053B, 0x0600053B } /* 4 M B VRAM */ - }; - diff --git a/drivers/macintosh/aty.c b/drivers/macintosh/aty.c deleted file mode 100644 index 7bd48052b..000000000 --- a/drivers/macintosh/aty.c +++ /dev/null @@ -1,838 +0,0 @@ -/* - * aty.c: Console support for ATI/mach64 display adaptor cards. - * - * Copyright (C) 1997 Michael AK Tesch - * written with much help from Jon Howell - * changes to support the vt chip set by harry ac eaton - * gt chipset support, scrollback console by anthony tong <atong@uiuc.edu> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <linux/config.h> /* for CONFIG_CHIP_ID and CONFIG_STAT0 */ -#include <linux/kernel.h> -#include <linux/sched.h> -#include <linux/delay.h> -#include <linux/string.h> -#include <linux/vc_ioctl.h> -#include <linux/pci.h> -#include <linux/nvram.h> -#include <linux/selection.h> -#include <linux/vt_kern.h> -#include <asm/prom.h> -#include <asm/io.h> -#include <asm/pgtable.h> -#include <asm/pci-bridge.h> -#include "pmac-cons.h" -#include "aty.h" - -struct aty_cmap_regs { - unsigned char windex; - unsigned char lut; - unsigned char mask; - unsigned char rindex; - unsigned char cntl; -}; - -typedef struct aty_regvals { - int offset[3]; /* first pixel address */ - - int crtc_h_sync_strt_wid[3]; /* depth dependent */ - int crtc_gen_cntl[3]; - int mem_cntl[3]; - - int crtc_h_tot_disp; /* mode dependent */ - int crtc_v_tot_disp; - int crtc_v_sync_strt_wid; - int crtc_off_pitch; - - unsigned char clock_val[2]; /* vals for 20 and 21 */ -} aty_regvals; - -struct rage_regvals { - int h_total, h_sync_start, h_sync_width; - int v_total, v_sync_start, v_sync_width; - int h_sync_neg, v_sync_neg; -}; - -static int aty_vram_reqd(int vmode, int cmode); -static aty_regvals *get_aty_struct(void); - -static unsigned char *frame_buffer; -static unsigned long frame_buffer_phys; -static int total_vram; /* total amount of video memory, bytes */ -static int chip_type; /* what chip type was detected */ - -static unsigned long ati_regbase; -static unsigned long ati_regbase_phys; -static struct aty_cmap_regs *aty_cmap_regs; - -#if 0 -/* this array contains the number of bytes/line for each mode and color depth */ -static int pitch[20][3] = { - {512, 1024, 2048}, /* mode 1 */ - {512, 1024, 2048}, /* mode 2 */ - {640, 1024, 2048}, /* mode 3 */ - {640, 1024, 2048}, /* mode 4 */ - {640, 1280, 2560}, /* mode 5 */ - {640, 1280, 2560}, /* mode 6 */ - {640, 1280, 2560}, /* mode 7 */ - {800, 1600, 3200}, /* mode 8 */ - {768, 1536, 2072}, /* mode 9 */ - {800, 1600, 3200}, /* mode 10 */ - {800, 1600, 3200}, /* mode 11 */ - {800, 1600, 3200}, /* mode 12 */ - {832, 1664, 3328}, /* mode 13 */ - {1024, 2048, 4096}, /* mode 14 */ - {1024, 2048, 4096}, /* mode 15 */ - {1024, 2048, 4096}, /* mode 16 */ - {1024, 2048, 4096}, /* mode 17 */ - {1152, 2304, 4608}, /* mode 18 */ - {1280, 2560, 5120}, /* mode 19 */ - {1280, 2560, 5120} /* mode 20 */ -}; -#endif - -#include "ati-gx.h" -#include "ati-gt.h" -#include "ati-vt.h" - -static struct aty_regvals *aty_gt_reg_init[20] = { - NULL, NULL, NULL, NULL, - &aty_gt_reg_init_5, - &aty_gt_reg_init_6, - NULL, NULL, - &aty_gt_reg_init_9, - &aty_gt_reg_init_10, - &aty_gt_reg_init_11, - &aty_gt_reg_init_12, - &aty_gt_reg_init_13, - &aty_gt_reg_init_14, - &aty_gt_reg_init_15, - NULL, - &aty_gt_reg_init_17, - &aty_gt_reg_init_18, - NULL, - &aty_gt_reg_init_20 -}; - -static struct aty_regvals *aty_gx_reg_init[20] = { - NULL, NULL, NULL, NULL, - &aty_gx_reg_init_6, - &aty_gx_reg_init_6, - NULL, NULL, NULL, NULL, NULL, NULL, - &aty_gx_reg_init_13, - &aty_gx_reg_init_14, - &aty_gx_reg_init_15, - NULL, - &aty_gx_reg_init_17, - &aty_gx_reg_init_18, - NULL, - &aty_gx_reg_init_20 -}; - -static struct aty_regvals *aty_vt_reg_init[21] = { - NULL, NULL, NULL, NULL, - &aty_vt_reg_init_5, - &aty_vt_reg_init_6, - NULL, NULL, NULL, - &aty_vt_reg_init_10, - &aty_vt_reg_init_11, - &aty_vt_reg_init_12, - &aty_vt_reg_init_13, - &aty_vt_reg_init_14, - &aty_vt_reg_init_15, - NULL, - &aty_vt_reg_init_17, - &aty_vt_reg_init_18, - &aty_vt_reg_init_19, - &aty_vt_reg_init_20 -}; - -static inline int -aty_vram_reqd(int vmode, int cmode) -{ - return vmode_attrs[vmode - 1].vres * - (vmode_attrs[vmode - 1].hres << cmode); -} - -extern inline unsigned aty_ld_le32(volatile unsigned long addr) -{ - register unsigned long temp = ati_regbase,val; - - asm("lwbrx %0,%1,%2": "=r"(val):"r"(addr), "r"(temp)); - return val; -} - -extern inline void aty_st_le32(volatile unsigned long addr, unsigned val) -{ - register unsigned long temp = ati_regbase; - asm("stwbrx %0,%1,%2": : "r"(val), "r"(addr), "r"(temp):"memory"); -} - -extern inline unsigned char aty_ld_8(volatile unsigned long addr) -{ - return *(char *) ((long) addr + (long) ati_regbase); -} - -extern inline void aty_st_8(volatile unsigned long addr, unsigned char val) -{ - *(unsigned char *) (addr + (unsigned long) ati_regbase) = val; -} - -static void aty_st_514(int offset, char val) -{ - aty_WaitQueue(5); - aty_st_8(DAC_CNTL, 1); - aty_st_8(DAC_W_INDEX, offset & 0xff); /* right addr byte */ - aty_st_8(DAC_DATA, (offset >> 8) & 0xff); /* left addr byte */ - eieio(); - aty_st_8(DAC_MASK, val); - eieio(); - aty_st_8(DAC_CNTL, 0); -} - -static void -aty_st_pll(int offset, char val) -{ - aty_WaitQueue(3); - aty_st_8(CLOCK_CNTL + 1, (offset << 2) | PLL_WR_EN); /* write addr byte */ - eieio(); - aty_st_8(CLOCK_CNTL + 2, val); /* write the register value */ - eieio(); - aty_st_8(CLOCK_CNTL + 1, (offset << 2) & ~PLL_WR_EN); -} - -#if 0 // unused -static char -aty_ld_pll(int offset) -{ - aty_WaitQueue(2); - aty_st_8(CLOCK_CNTL + 1, offset << 2); - eieio(); - return aty_ld_8(CLOCK_CNTL + 2); -} -#endif - -unsigned char -aty_ld_514(int offset) -{ -/* do the same thing as aty_st_514, just read the DAC_MASK instead of writing */ - char val; - - aty_WaitQueue(5); - aty_st_8(DAC_CNTL, 1); - aty_st_8(DAC_W_INDEX, offset & 0xff); /* right addr byte */ - aty_st_8(DAC_DATA, (offset >> 8) & 0xff); /* left addr byte */ - val = aty_ld_8(DAC_MASK); - eieio(); - aty_st_8(DAC_CNTL, 0); - return val; -} - -void -aty_set_palette(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors) -{ - int i, scale; - - aty_WaitQueue(2); - - i = aty_ld_8(DAC_CNTL) & 0xfc; - if (chip_type == MACH64_GT_ID) - i |= 0x2; /*DAC_CNTL|0x2 turns off the extra brightness for gt*/ - aty_st_8(DAC_CNTL, i); - aty_st_8(DAC_REGS + DAC_MASK, 0xff); - eieio(); - scale = (chip_type != MACH64_GX_ID) - ? ((color_mode == CMODE_16) ? 3 : 0) : 0; - - for (i = 0; i < ncolors; ++i) { - aty_WaitQueue(4); - aty_cmap_regs->windex = (index + i) << scale; eieio(); - aty_cmap_regs->lut = red[i]; eieio(); - aty_cmap_regs->lut = green[i]; eieio(); - aty_cmap_regs->lut = blue[i]; eieio(); - } -} - -static aty_regvals -*get_aty_struct() -{ - int v = video_mode - 1; - - switch (chip_type) { - case MACH64_GT_ID: - return aty_gt_reg_init[v]; - break; - case MACH64_VT_ID: - return aty_vt_reg_init[v]; - break; - default: /* default to MACH64_GX_ID */ - return aty_gx_reg_init[v]; - break; - } -} - -static int -read_aty_sense(void) -{ - int sense, i; - - aty_st_le32(MON_SENSE, 0x31003100); /* drive outputs high */ - __delay(200); - aty_st_le32(MON_SENSE, 0); /* turn off outputs */ - __delay(2000); - i = aty_ld_le32(MON_SENSE); /* get primary sense value */ - sense = ((i & 0x3000) >> 3) | (i & 0x100); - - /* drive each sense line low in turn and collect the other 2 */ - aty_st_le32(MON_SENSE, 0x20000000); /* drive A low */ - __delay(2000); - i = aty_ld_le32(MON_SENSE); - sense |= ((i & 0x1000) >> 7) | ((i & 0x100) >> 4); - aty_st_le32(MON_SENSE, 0x20002000); /* drive A high again */ - __delay(200); - - aty_st_le32(MON_SENSE, 0x10000000); /* drive B low */ - __delay(2000); - i = aty_ld_le32(MON_SENSE); - sense |= ((i & 0x2000) >> 10) | ((i & 0x100) >> 6); - aty_st_le32(MON_SENSE, 0x10001000); /* drive B high again */ - __delay(200); - - aty_st_le32(MON_SENSE, 0x01000000); /* drive C low */ - __delay(2000); - sense |= (aty_ld_le32(MON_SENSE) & 0x3000) >> 12; - aty_st_le32(MON_SENSE, 0); /* turn off outputs */ - - return sense; -} - -void -map_aty_display(struct device_node *dp) -{ - struct aty_regvals *init; - int i, sense; - unsigned long addr; - unsigned char bus, devfn; - unsigned short cmd; - - if (dp->next != 0) - printk("Warning: only using first ATI card detected\n"); - if (dp->n_addrs != 1 && dp->n_addrs != 3) - printk("Warning: expecting 1 or 3 addresses for ATY (got %d)", - dp->n_addrs); - - ati_regbase_phys = 0x7ffc00 + dp->addrs[0].address; - ati_regbase = (int) ioremap(ati_regbase_phys, 0x1000); - aty_cmap_regs = (struct aty_cmap_regs *) (ati_regbase + 0xC0); - - /* enable memory-space accesses using config-space command register */ - if (pci_device_loc(dp, &bus, &devfn) == 0) { - pcibios_read_config_word(bus, devfn, PCI_COMMAND, &cmd); - if (cmd != 0xffff) { - cmd |= PCI_COMMAND_MEMORY; - pcibios_write_config_word(bus, devfn, PCI_COMMAND, cmd); - } - } - chip_type = (aty_ld_le32(CONFIG_CHIP_ID) & CFG_CHIP_TYPE); - - i = aty_ld_le32(MEM_CNTL); - if (chip_type != MACH64_GT_ID) - switch (i & MEM_SIZE_ALIAS) { - case MEM_SIZE_512K: - total_vram = 0x80000; - break; - case MEM_SIZE_1M: - total_vram = 0x100000; - break; - case MEM_SIZE_2M: - total_vram = 0x200000; - break; - case MEM_SIZE_4M: - total_vram = 0x400000; - break; - case MEM_SIZE_6M: - total_vram = 0x600000; - break; - case MEM_SIZE_8M: - total_vram = 0x800000; - break; - default: - total_vram = 0x80000; - } - else - switch (i & 0xF) { /* 0xF used instead of MEM_SIZE_ALIAS */ - case MEM_SIZE_512K: - total_vram = 0x80000; - break; - case MEM_SIZE_1M: - total_vram = 0x100000; - break; - case MEM_SIZE_2M_GTB: - total_vram = 0x200000; - break; - case MEM_SIZE_4M_GTB: - total_vram = 0x400000; - break; - case MEM_SIZE_6M_GTB: - total_vram = 0x600000; - break; - case MEM_SIZE_8M_GTB: - total_vram = 0x800000; - break; - default: - total_vram = 0x80000; - } - -#if 0 - printk("aty_display_init: node = %p, addrs = ", dp->node); - printk(" %x(%x)", dp->addrs[0].address, dp->addrs[0].size); - printk(", intrs ="); - for (i = 0; i < dp->n_intrs; ++i) - printk(" %x", dp->intrs[i].line); - printk("\nregbase: %x pci loc: %x:%x total_vram: %x cregs: %x\n", (int) ati_regbase, - bus, devfn, total_vram, (int) aty_cmap_regs); -#endif - /* Map in frame buffer */ - addr = dp->addrs[0].address; - - /* use the big-endian aperture (??) */ - addr += 0x800000; - frame_buffer_phys = addr; - frame_buffer = __ioremap(addr, 0x800000, _PAGE_WRITETHRU); - - sense = read_aty_sense(); - printk(KERN_INFO "monitor sense = %x\n", sense); - if (video_mode == VMODE_NVRAM) { - video_mode = nvram_read_byte(NV_VMODE); - init = get_aty_struct(); - if (video_mode <= 0 || video_mode > VMODE_MAX || init == 0) - video_mode = VMODE_CHOOSE; - } - if (video_mode == VMODE_CHOOSE) - video_mode = map_monitor_sense(sense); - - init = get_aty_struct(); - if (!init) - video_mode = VMODE_640_480_60; - - /* - * Reduce the pixel size if we don't have enough VRAM. - */ - - if (color_mode == CMODE_NVRAM) - color_mode = nvram_read_byte(NV_CMODE); - if (color_mode < CMODE_8 || color_mode > CMODE_32) - color_mode = CMODE_8; - - while (aty_vram_reqd(video_mode, color_mode) > total_vram) { - while (color_mode > CMODE_8 - && aty_vram_reqd(video_mode, color_mode) > total_vram) - --color_mode; - /* - * adjust the video mode smaller if there still is not enough VRAM - */ - if (aty_vram_reqd(video_mode, color_mode) > total_vram) { - do { - video_mode--; - init = get_aty_struct(); - } while ((init == 0) && (video_mode > VMODE_640_480_60)); - } - } - - if (chip_type == MACH64_GT_ID && (aty_ld_le32(CONFIG_STAT0) & 7) == 5 - && init->crtc_gen_cntl[1] == 0) { - video_mode = 6; color_mode = 0; - } - return; -} - -void -RGB514_Program(int cmode) -{ - typedef struct { - char pixel_dly; - char misc2_cntl; - char pixel_rep; - char pixel_cntl_index; - char pixel_cntl_v1; - } RGB514_DAC_Table; - - static RGB514_DAC_Table RGB514DAC_Tab[8] = { - {0, 0x41, 0x03, 0x71, 0x45}, // 8bpp - {0, 0x45, 0x04, 0x0c, 0x01}, // 555 - {0, 0x45, 0x06, 0x0e, 0x00}, // XRGB - }; - RGB514_DAC_Table *pDacProgTab; - - pDacProgTab = &RGB514DAC_Tab[cmode]; - - aty_st_514(0x90, 0x00); - aty_st_514(0x04, pDacProgTab->pixel_dly); - aty_st_514(0x05, 0x00); - - aty_st_514(0x2, 0x1); - aty_st_514(0x71, pDacProgTab->misc2_cntl); - aty_st_514(0x0a, pDacProgTab->pixel_rep); - - aty_st_514(pDacProgTab->pixel_cntl_index, pDacProgTab->pixel_cntl_v1); -} - -void -aty_init() -{ - int i, hres; - struct aty_regvals *init = get_aty_struct(); - int vram_type = aty_ld_le32(CONFIG_STAT0) & 7; - - if (init == 0) /* paranoia, shouldn't get here */ - panic("aty: display mode %d not supported", video_mode); - - n_scanlines = vmode_attrs[video_mode - 1].vres; - hres = vmode_attrs[video_mode - 1].hres; - pixel_size = 1 << color_mode; - line_pitch = vmode_attrs[video_mode - 1].hres << color_mode; - row_pitch = line_pitch * 16; - - /* clear FIFO errors */ - aty_st_le32(BUS_CNTL, aty_ld_le32(BUS_CNTL) | BUS_HOST_ERR_ACK - | BUS_FIFO_ERR_ACK); - - /* Reset engine */ - i = aty_ld_le32(GEN_TEST_CNTL); - aty_st_le32(GEN_TEST_CNTL, i & ~GUI_ENGINE_ENABLE); - eieio(); - aty_WaitIdleEmpty(); - aty_st_le32(GEN_TEST_CNTL, i | GUI_ENGINE_ENABLE); - aty_WaitIdleEmpty(); - - if ( chip_type != MACH64_GT_ID ) { - i = aty_ld_le32(CRTC_GEN_CNTL); - aty_st_le32(CRTC_GEN_CNTL, i | CRTC_EXT_DISP_EN); - } - - if ( chip_type == MACH64_GX_ID ) { - i = aty_ld_le32(GEN_TEST_CNTL); - aty_st_le32(GEN_TEST_CNTL, i | GEN_OVR_OUTPUT_EN ); - } - - switch (chip_type) { - case MACH64_VT_ID: - aty_st_pll(PLL_MACRO_CNTL, 0xb5); - aty_st_pll(PLL_REF_DIV, 0x2d); - aty_st_pll(PLL_GEN_CNTL, 0x14); - aty_st_pll(MCLK_FB_DIV, 0xbd); - aty_st_pll(PLL_VCLK_CNTL, 0x0b); - aty_st_pll(VCLK_POST_DIV, init->clock_val[0]); - aty_st_pll(VCLK0_FB_DIV, init->clock_val[1]); - aty_st_pll(VCLK1_FB_DIV, 0xd6); - aty_st_pll(VCLK2_FB_DIV, 0xee); - aty_st_pll(VCLK3_FB_DIV, 0xf8); - aty_st_pll(PLL_XCLK_CNTL, 0x0); - aty_st_pll(PLL_TEST_CTRL, 0x0); - aty_st_pll(PLL_TEST_COUNT, 0x0); - break; - case MACH64_GT_ID: - if (vram_type == 5) { - aty_st_pll(0, 0xcd); - aty_st_pll(PLL_MACRO_CNTL, - video_mode >= VMODE_1024_768_60? 0xd3: 0xd5); - aty_st_pll(PLL_REF_DIV, 0x21); - aty_st_pll(PLL_GEN_CNTL, 0x44); - aty_st_pll(MCLK_FB_DIV, 0xe8); - aty_st_pll(PLL_VCLK_CNTL, 0x03); - aty_st_pll(VCLK_POST_DIV, init->offset[0]); - aty_st_pll(VCLK0_FB_DIV, init->offset[1]); - aty_st_pll(VCLK1_FB_DIV, 0x8e); - aty_st_pll(VCLK2_FB_DIV, 0x9e); - aty_st_pll(VCLK3_FB_DIV, 0xc6); - aty_st_pll(PLL_XCLK_CNTL, init->offset[2]); - aty_st_pll(12, 0xa6); - aty_st_pll(13, 0x1b); - } else { - aty_st_pll(PLL_MACRO_CNTL, 0xd5); - aty_st_pll(PLL_REF_DIV, 0x21); - aty_st_pll(PLL_GEN_CNTL, 0xc4); - aty_st_pll(MCLK_FB_DIV, 0xda); - aty_st_pll(PLL_VCLK_CNTL, 0x03); - /* offset actually holds clock values */ - aty_st_pll(VCLK_POST_DIV, init->offset[0]); - aty_st_pll(VCLK0_FB_DIV, init->offset[1]); - aty_st_pll(VCLK1_FB_DIV, 0x8e); - aty_st_pll(VCLK2_FB_DIV, 0x9e); - aty_st_pll(VCLK3_FB_DIV, 0xc6); - aty_st_pll(PLL_TEST_CTRL, 0x0); - aty_st_pll(PLL_XCLK_CNTL, init->offset[2]); - aty_st_pll(12, 0xa0); - aty_st_pll(13, 0x1b); - } - break; - default: - RGB514_Program(color_mode); - aty_WaitIdleEmpty(); - aty_st_514(0x06, 0x02); - aty_st_514(0x10, 0x01); - aty_st_514(0x70, 0x01); - aty_st_514(0x8f, 0x1f); - aty_st_514(0x03, 0x00); - aty_st_514(0x05, 0x00); - aty_st_514(0x20, init->clock_val[0]); - aty_st_514(0x21, init->clock_val[1]); - break; - } - - aty_ld_8(DAC_REGS); /* clear counter */ - aty_WaitIdleEmpty(); - - aty_st_le32(CRTC_H_TOTAL_DISP, init->crtc_h_tot_disp); - aty_st_le32(CRTC_H_SYNC_STRT_WID, init->crtc_h_sync_strt_wid[color_mode]); - aty_st_le32(CRTC_V_TOTAL_DISP, init->crtc_v_tot_disp); - aty_st_le32(CRTC_V_SYNC_STRT_WID, init->crtc_v_sync_strt_wid); - - aty_st_8(CLOCK_CNTL, 0); - aty_st_8(CLOCK_CNTL, CLOCK_STROBE); - - aty_st_le32(CRTC_VLINE_CRNT_VLINE, 0); - - if (chip_type == MACH64_GT_ID) { - aty_st_le32(BUS_CNTL, 0x7b23a040); - - /* we calculate this so we can use a scrollback buffer. - * this should theoretically work with other ati's - * OFF_PITCH == (((hres + 7) & 0xfff8) >> 3) << 22 - */ - ati_set_origin(0); - - /* need to set DSP values !! assume sdram */ - i = init->crtc_gen_cntl[0] - (0x100000 * color_mode); - if ( vram_type == 5 ) - i = init->crtc_gen_cntl[1] - (0x100000 * color_mode); - aty_st_le32(DSP_CONFIG, i); - - i = aty_ld_le32(MEM_CNTL) & MEM_SIZE_ALIAS; - if ( vram_type == 5 ) { - i |= ((1 * color_mode) << 26) | 0x4215b0; - aty_st_le32(DSP_ON_OFF,sgram_dsp[video_mode-1][color_mode]); - - //aty_st_le32(CLOCK_CNTL,8192); - } else { - i |= ((1 * color_mode) << 26) | 0x300090; - aty_st_le32(DSP_ON_OFF, init->mem_cntl[color_mode]); - } - - aty_st_le32(MEM_CNTL, i); - aty_st_le32(EXT_MEM_CNTL, 0x5000001); - - /* if (total_vram > 0x400000) - i |= 0x538; this not been verified on > 4Megs!! */ - } else { - aty_st_le32(CRTC_OFF_PITCH, init->crtc_off_pitch); - -/* The magic constant below translates into: - * 5 = No RDY delay, 1 wait st for mem write, increment during burst transfer - * 9 = DAC access delayed, 1 wait state for DAC - * 0 = Disables interupts for FIFO errors - * e = Allows FIFO to generate 14 wait states before generating error - * 1 = DAC snooping disabled, ROM disabled - * 0 = ROM page at 0 (disabled so doesn't matter) - * f = 15 ROM wait states (disabled so doesn't matter) - * f = 15 BUS wait states (I'm not sure this applies to PCI bus types) - * at some point it would be good to experiment with bench marks to see if - * we can gain some speed by fooling with the wait states etc. - */ - if (chip_type == MACH64_VT_ID) - aty_st_le32(BUS_CNTL, 0x680000f9); - else - aty_st_le32(BUS_CNTL, 0x590e10ff); - - switch (total_vram) { - case 0x00100000: - aty_st_le32(MEM_CNTL, vt_mem_cntl[0][color_mode]); - break; - case 0x00200000: - aty_st_le32(MEM_CNTL, vt_mem_cntl[1][color_mode]); - break; - case 0x00400000: - aty_st_le32(MEM_CNTL, vt_mem_cntl[2][color_mode]); - break; - default: - i = aty_ld_le32(MEM_CNTL) & 0x000F; - aty_st_le32(MEM_CNTL, (init->mem_cntl[color_mode] & 0xFFFFFFF0) | i); - } - } -/* These magic constants are harder to figure out - * on the vt chipset bit 2 set makes the screen brighter - * and bit 15 makes the screen black! But nothing else - * seems to matter for the vt DAC_CNTL - */ - switch (chip_type) { - case MACH64_GT_ID: - i = 0x86010102; - break; - case MACH64_VT_ID: - i = 0x87010184; - break; - default: - i = 0x47012100; - break; - } - - aty_st_le32(DAC_CNTL, i); - aty_st_8(DAC_MASK, 0xff); - - switch (color_mode) { - case CMODE_16: - i = CRTC_PIX_WIDTH_15BPP; break; - /*case CMODE_24: */ - case CMODE_32: - i = CRTC_PIX_WIDTH_32BPP; break; - case CMODE_8: - default: - i = CRTC_PIX_WIDTH_8BPP; break; - } - - if (chip_type != MACH64_GT_ID) { - aty_st_le32(CRTC_INT_CNTL, 0x00000002); - aty_st_le32(GEN_TEST_CNTL, GUI_ENGINE_ENABLE | BLOCK_WRITE_ENABLE); /* gui_en block_en */ - i |= init->crtc_gen_cntl[color_mode]; - } - /* Gentlemen, start your crtc engine */ - aty_st_le32(CRTC_GEN_CNTL, CRTC_EXT_DISP_EN | CRTC_EXT_EN | i); - pmac_init_palette(); /* Initialize colormap */ - - /* clear screen */ - fb_start = frame_buffer + (((n_scanlines % 16) * line_pitch) >> 1); - memsetw((unsigned short *) fb_start, 0, total_vram); - - display_info.height = n_scanlines; - display_info.width = hres; - display_info.depth = pixel_size << 3; - display_info.pitch = line_pitch; - display_info.mode = video_mode; - strncpy(display_info.name, "ATY Mach64", sizeof(display_info.name)); - switch ( chip_type ) { - case MACH64_GX_ID: strcat(display_info.name,"GX"); - break; - case MACH64_VT_ID: strcat(display_info.name,"VT"); - break; - case MACH64_GT_ID: strcat(display_info.name,"GT"); - break; - default: strcat(display_info.name,"unknown"); - break; - } - display_info.fb_address = (chip_type != MACH64_GT_ID) ? - frame_buffer_phys + init->offset[color_mode] : - frame_buffer_phys; - display_info.cmap_adr_address = ati_regbase_phys + 0xc0; - display_info.cmap_data_address = ati_regbase_phys + 0xc1; - display_info.disp_reg_address = ati_regbase_phys; -} - -int -aty_setmode(struct vc_mode *mode, int doit) -{ - int cmode,old_vmode=video_mode; - struct aty_regvals *init; - -#if 1 - if (mode->mode == 21) { - printk("hace: about to set 0x%x to 0x%x\n", mode->depth, mode->pitch & 0xff); - aty_st_8(mode->depth, mode->pitch & 0xff); - return 0; - } - if (mode->mode == 0) { - printk("hace: 0x%x contains 0x%x\n", mode->depth, aty_ld_8(mode->depth)); - return 0; - } -#endif - - if (mode->mode <= 0 || mode->mode > VMODE_MAX ) - return -EINVAL; - - switch (mode->depth) { - case 24: - case 32: - cmode = CMODE_32; - break; - case 16: - cmode = CMODE_16; - break; - case 8: - case 0: /* (default) */ - cmode = CMODE_8; - break; - default: - return -EINVAL; - } - if (aty_vram_reqd(mode->mode, cmode) > total_vram) - return -EINVAL; - - video_mode = mode->mode; - init = get_aty_struct(); - - /* Check if we know about the wanted video mode */ - if ( init == 0 || init->crtc_h_sync_strt_wid[cmode] == 0 - || (chip_type != MACH64_GT_ID && init->crtc_gen_cntl[cmode] == 0) - || (chip_type == MACH64_GT_ID && (aty_ld_le32(CONFIG_STAT0) & 7) == 5 - && init->crtc_gen_cntl[1] == 0)) { - video_mode = old_vmode; - return -EINVAL; - } - - if (doit) { - video_mode = mode->mode; - color_mode = cmode; - hide_cursor(); - aty_init(); - } - return 0; -} - -void -aty_set_blanking(int blank_mode) -{ - char gen_cntl; - - gen_cntl = aty_ld_8(CRTC_GEN_CNTL); - if (blank_mode & VESA_VSYNC_SUSPEND) - gen_cntl |= 0x8; - if (blank_mode & VESA_HSYNC_SUSPEND) - gen_cntl |= 0x4; - if ((blank_mode & VESA_POWERDOWN) == VESA_POWERDOWN) - gen_cntl |= 0x40; - if (blank_mode == VESA_NO_BLANKING) - gen_cntl &= ~(0x4c); - aty_st_8(CRTC_GEN_CNTL, gen_cntl); -} - -/* handle video scrollback; offset is in # of characters */ -void -ati_set_origin(unsigned short offset) -{ - register int x = (vmode_attrs[video_mode - 1].hres + 7) & 0xfff8, - lines = offset / video_num_columns, reg; - - reg = ((x >> 3) << 22) | /* calculate pitch */ - ((lines * video_font_height * x * (1<<color_mode)) >> 3); /*offset*/ - - aty_st_le32(CRTC_OFF_PITCH, reg); - aty_st_le32(DST_OFF_PITCH, reg); - aty_st_le32(SRC_OFF_PITCH, reg); - -#if 0 - fb_start = display_info.fb_address = - (unsigned long) frame_buffer + ((lines-2) * - vmode_attrs[video_mode-1].hres) << (4 + color_mode); -#endif -} - -int -ati_vram(void) -{ - return total_vram; -} - diff --git a/drivers/macintosh/aty.h b/drivers/macintosh/aty.h deleted file mode 100644 index abf644b33..000000000 --- a/drivers/macintosh/aty.h +++ /dev/null @@ -1,632 +0,0 @@ -/* - * Exported procedures for the ATI/mach64 display driver on PowerMacs. - * - * Copyright (C) 1997 Michael AK Tesch - * written with much help from Jon Howell - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -extern void map_aty_display(struct device_node *); -extern void aty_init(void); -extern int aty_setmode(struct vc_mode *mode, int doit); -extern void aty_set_palette(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors); -extern void aty_set_blanking(int blank_mode); - -extern void ati_set_origin(unsigned short offset); -extern int ati_vram(void); - -/* - * most of the rest of this file comes from ATI sample code - */ -#ifndef REGMACH64_H -#define REGMACH64_H - -/* NON-GUI MEMORY MAPPED Registers - expressed in BYTE offsets */ - -#define CRTC_H_TOTAL_DISP 0x0000 /* Dword offset 00 */ -#define CRTC_H_SYNC_STRT_WID 0x0004 /* Dword offset 01 */ -#define CRTC_H_SYNC_STRT 0x0004 -#define CRTC_H_SYNC_DLY 0x0005 -#define CRTC_H_SYNC_WID 0x0006 - -#define CRTC_V_TOTAL_DISP 0x0008 /* Dword offset 02 */ -#define CRTC_V_TOTAL 0x0008 -#define CRTC_V_DISP 0x000a -#define CRTC_V_SYNC_STRT_WID 0x000C /* Dword offset 03 */ -#define CRTC_V_SYNC_STRT 0x000c -#define CRTC_V_SYNC_WID 0x000e - -#define CRTC_VLINE_CRNT_VLINE 0x0010 /* Dword offset 04 */ -#define CRTC_OFF_PITCH 0x0014 /* Dword offset 05 */ -#define CRTC_OFFSET 0x0014 -#define CRTC_PITCH 0x0016 - -#define CRTC_INT_CNTL 0x0018 /* Dword offset 06 */ -#define CRTC_GEN_CNTL 0x001C /* Dword offset 07 */ -#define CRTC_PIX_WIDTH 0x001d -#define CRTC_FIFO 0x001e -#define CRTC_EXT_DISP 0x001f - -#define DSP_CONFIG 0x0020 /* Dword offset 08 */ -#define DSP_ON_OFF 0x0024 /* Dword offset 09 */ - -#define OVR_CLR 0x0040 /* Dword offset 10 */ -#define OVR_WID_LEFT_RIGHT 0x0044 /* Dword offset 11 */ -#define OVR_WID_TOP_BOTTOM 0x0048 /* Dword offset 12 */ - -#define CUR_CLR0 0x0060 /* Dword offset 18 */ -#define CUR_CLR1 0x0064 /* Dword offset 19 */ -#define CUR_OFFSET 0x0068 /* Dword offset 1A */ -#define CUR_HORZ_VERT_POSN 0x006C /* Dword offset 1B */ -#define CUR_HORZ_VERT_OFF 0x0070 /* Dword offset 1C */ - -#define MON_SENSE 0x0078 - -#define SCRATCH_REG0 0x0080 /* Dword offset 20 */ -#define SCRATCH_REG1 0x0084 /* Dword offset 21 */ - -#define CLOCK_CNTL 0x0090 /* Dword offset 24 */ -#define CLOCK_SEL_CNTL 0x0090 // Dword offset 24 - -#define BUS_CNTL 0x00A0 /* Dword offset 28 */ - -#define EXT_MEM_CNTL 0x00AC /* Dword offset 2B */ -#define MEM_CNTL 0x00B0 /* Dword offset 2C */ - -#define MEM_VGA_WP_SEL 0x00B4 /* Dword offset 2D */ -#define MEM_VGA_RP_SEL 0x00B8 /* Dword offset 2E */ - -#define DAC_REGS 0x00C0 /* Dword offset 30 */ -#define DAC_W_INDEX 0x00C0 /* Dword offset 30 */ -#define DAC_DATA 0x00C1 /* Dword offset 30 */ -#define DAC_MASK 0x00C2 /* Dword offset 30 */ -#define DAC_R_INDEX 0x00C3 /* Dword offset 30 */ -#define DAC_CNTL 0x00C4 /* Dword offset 31 */ - -#define GEN_TEST_CNTL 0x00D0 /* Dword offset 34 */ - -#define CONFIG_CNTL 0x00DC /* Dword offset 37 (CT, ET, VT) */ -#define CONFIG_CHIP_ID 0x00E0 /* Dword offset 38 */ -#define CONFIG_STAT0 0x00E4 /* Dword offset 39 */ -#define CONFIG_STAT1 0x00E8 /* Dword offset 3A */ - - -/* GUI MEMORY MAPPED Registers */ - -#define DST_OFF_PITCH 0x0100 /* Dword offset 40 */ -#define DST_X 0x0104 /* Dword offset 41 */ -#define DST_Y 0x0108 /* Dword offset 42 */ -#define DST_Y_X 0x010C /* Dword offset 43 */ -#define DST_WIDTH 0x0110 /* Dword offset 44 */ -#define DST_HEIGHT 0x0114 /* Dword offset 45 */ -#define DST_HEIGHT_WIDTH 0x0118 /* Dword offset 46 */ -#define DST_X_WIDTH 0x011C /* Dword offset 47 */ -#define DST_BRES_LNTH 0x0120 /* Dword offset 48 */ -#define DST_BRES_ERR 0x0124 /* Dword offset 49 */ -#define DST_BRES_INC 0x0128 /* Dword offset 4A */ -#define DST_BRES_DEC 0x012C /* Dword offset 4B */ -#define DST_CNTL 0x0130 /* Dword offset 4C */ - -#define SRC_OFF_PITCH 0x0180 /* Dword offset 60 */ -#define SRC_X 0x0184 /* Dword offset 61 */ -#define SRC_Y 0x0188 /* Dword offset 62 */ -#define SRC_Y_X 0x018C /* Dword offset 63 */ -#define SRC_WIDTH1 0x0190 /* Dword offset 64 */ -#define SRC_HEIGHT1 0x0194 /* Dword offset 65 */ -#define SRC_HEIGHT1_WIDTH1 0x0198 /* Dword offset 66 */ -#define SRC_X_START 0x019C /* Dword offset 67 */ -#define SRC_Y_START 0x01A0 /* Dword offset 68 */ -#define SRC_Y_X_START 0x01A4 /* Dword offset 69 */ -#define SRC_WIDTH2 0x01A8 /* Dword offset 6A */ -#define SRC_HEIGHT2 0x01AC /* Dword offset 6B */ -#define SRC_HEIGHT2_WIDTH2 0x01B0 /* Dword offset 6C */ -#define SRC_CNTL 0x01B4 /* Dword offset 6D */ - -#define HOST_DATA0 0x0200 /* Dword offset 80 */ -#define HOST_DATA1 0x0204 /* Dword offset 81 */ -#define HOST_DATA2 0x0208 /* Dword offset 82 */ -#define HOST_DATA3 0x020C /* Dword offset 83 */ -#define HOST_DATA4 0x0210 /* Dword offset 84 */ -#define HOST_DATA5 0x0214 /* Dword offset 85 */ -#define HOST_DATA6 0x0218 /* Dword offset 86 */ -#define HOST_DATA7 0x021C /* Dword offset 87 */ -#define HOST_DATA8 0x0220 /* Dword offset 88 */ -#define HOST_DATA9 0x0224 /* Dword offset 89 */ -#define HOST_DATAA 0x0228 /* Dword offset 8A */ -#define HOST_DATAB 0x022C /* Dword offset 8B */ -#define HOST_DATAC 0x0230 /* Dword offset 8C */ -#define HOST_DATAD 0x0234 /* Dword offset 8D */ -#define HOST_DATAE 0x0238 /* Dword offset 8E */ -#define HOST_DATAF 0x023C /* Dword offset 8F */ -#define HOST_CNTL 0x0240 /* Dword offset 90 */ - -#define PAT_REG0 0x0280 /* Dword offset A0 */ -#define PAT_REG1 0x0284 /* Dword offset A1 */ -#define PAT_CNTL 0x0288 /* Dword offset A2 */ - -#define SC_LEFT 0x02A0 /* Dword offset A8 */ -#define SC_RIGHT 0x02A4 /* Dword offset A9 */ -#define SC_LEFT_RIGHT 0x02A8 /* Dword offset AA */ -#define SC_TOP 0x02AC /* Dword offset AB */ -#define SC_BOTTOM 0x02B0 /* Dword offset AC */ -#define SC_TOP_BOTTOM 0x02B4 /* Dword offset AD */ - -#define DP_BKGD_CLR 0x02C0 /* Dword offset B0 */ -#define DP_FRGD_CLR 0x02C4 /* Dword offset B1 */ -#define DP_WRITE_MASK 0x02C8 /* Dword offset B2 */ -#define DP_CHAIN_MASK 0x02CC /* Dword offset B3 */ -#define DP_PIX_WIDTH 0x02D0 /* Dword offset B4 */ -#define DP_MIX 0x02D4 /* Dword offset B5 */ -#define DP_SRC 0x02D8 /* Dword offset B6 */ - -#define CLR_CMP_CLR 0x0300 /* Dword offset C0 */ -#define CLR_CMP_MASK 0x0304 /* Dword offset C1 */ -#define CLR_CMP_CNTL 0x0308 /* Dword offset C2 */ - -#define FIFO_STAT 0x0310 /* Dword offset C4 */ - -#define CONTEXT_MASK 0x0320 /* Dword offset C8 */ -#define CONTEXT_LOAD_CNTL 0x032C /* Dword offset CB */ - -#define GUI_TRAJ_CNTL 0x0330 /* Dword offset CC */ -#define GUI_STAT 0x0338 /* Dword offset CE */ - - -/* CRTC control values (mostly CRTC_GEN_CNTL) */ - -#define CRTC_H_SYNC_NEG 0x00200000 -#define CRTC_V_SYNC_NEG 0x00200000 - -#define CRTC_DBL_SCAN_EN 0x00000001 -#define CRTC_INTERLACE_EN 0x00000002 -#define CRTC_HSYNC_DIS 0x00000004 -#define CRTC_VSYNC_DIS 0x00000008 -#define CRTC_CSYNC_EN 0x00000010 -#define CRTC_PIX_BY_2_EN 0x00000020 -#define CRTC_BLANK 0x00000040 - -#define CRTC_PIX_WIDTH_MASK 0x00000700 -#define CRTC_PIX_WIDTH_4BPP 0x00000100 -#define CRTC_PIX_WIDTH_8BPP 0x00000200 -#define CRTC_PIX_WIDTH_15BPP 0x00000300 -#define CRTC_PIX_WIDTH_16BPP 0x00000400 -#define CRTC_PIX_WIDTH_24BPP 0x00000500 -#define CRTC_PIX_WIDTH_32BPP 0x00000600 - -#define CRTC_BYTE_PIX_ORDER 0x00000800 -#define CRTC_PIX_ORDER_MSN_LSN 0x00000000 -#define CRTC_PIX_ORDER_LSN_MSN 0x00000800 - -#define CRTC_FIFO_LWM 0x000f0000 -#define CRTC_EXT_DISP_EN 0x01000000 -#define CRTC_EXT_EN 0x02000000 - -#define CRTC_CRNT_VLINE 0x07f00000 -#define CRTC_VBLANK 0x00000001 - -/* DAC control values */ - -#define DAC_EXT_SEL_RS2 0x01 -#define DAC_EXT_SEL_RS3 0x02 -#define DAC_8BIT_EN 0x00000100 -#define DAC_PIX_DLY_MASK 0x00000600 -#define DAC_PIX_DLY_0NS 0x00000000 -#define DAC_PIX_DLY_2NS 0x00000200 -#define DAC_PIX_DLY_4NS 0x00000400 -#define DAC_BLANK_ADJ_MASK 0x00001800 -#define DAC_BLANK_ADJ_0 0x00000000 -#define DAC_BLANK_ADJ_1 0x00000800 -#define DAC_BLANK_ADJ_2 0x00001000 - - -/* Mix control values */ - -#define MIX_NOT_DST 0x0000 -#define MIX_0 0x0001 -#define MIX_1 0x0002 -#define MIX_DST 0x0003 -#define MIX_NOT_SRC 0x0004 -#define MIX_XOR 0x0005 -#define MIX_XNOR 0x0006 -#define MIX_SRC 0x0007 -#define MIX_NAND 0x0008 -#define MIX_NOT_SRC_OR_DST 0x0009 -#define MIX_SRC_OR_NOT_DST 0x000a -#define MIX_OR 0x000b -#define MIX_AND 0x000c -#define MIX_SRC_AND_NOT_DST 0x000d -#define MIX_NOT_SRC_AND_DST 0x000e -#define MIX_NOR 0x000f - -/* Maximum engine dimensions */ -#define ENGINE_MIN_X 0 -#define ENGINE_MIN_Y 0 -#define ENGINE_MAX_X 4095 -#define ENGINE_MAX_Y 16383 - -/* Mach64 engine bit constants - these are typically ORed together */ - -/* BUS_CNTL register constants */ -#define BUS_FIFO_ERR_ACK 0x00200000 -#define BUS_HOST_ERR_ACK 0x00800000 - -/* GEN_TEST_CNTL register constants */ -#define GEN_OVR_OUTPUT_EN 0x20 -#define HWCURSOR_ENABLE 0x80 -#define GUI_ENGINE_ENABLE 0x100 -#define BLOCK_WRITE_ENABLE 0x200 - -/* DSP_CONFIG register constants */ -#define DSP_XCLKS_PER_QW 0x00003fff -#define DSP_LOOP_LATENCY 0x000f0000 -#define DSP_PRECISION 0x00700000 - -/* DSP_ON_OFF register constants */ -#define DSP_OFF 0x000007ff -#define DSP_ON 0x07ff0000 - -/* CLOCK_CNTL register constants */ -#define CLOCK_SEL 0x0f -#define CLOCK_DIV 0x30 -#define CLOCK_DIV1 0x00 -#define CLOCK_DIV2 0x10 -#define CLOCK_DIV4 0x20 -#define CLOCK_STROBE 0x40 -#define PLL_WR_EN 0x02 - -/* PLL registers */ -#define PLL_MACRO_CNTL 0x01 -#define PLL_REF_DIV 0x02 -#define PLL_GEN_CNTL 0x03 -#define MCLK_FB_DIV 0x04 -#define PLL_VCLK_CNTL 0x05 -#define VCLK_POST_DIV 0x06 -#define VCLK0_FB_DIV 0x07 -#define VCLK1_FB_DIV 0x08 -#define VCLK2_FB_DIV 0x09 -#define VCLK3_FB_DIV 0x0A -#define PLL_XCLK_CNTL 0x0B -#define PLL_TEST_CTRL 0x0E -#define PLL_TEST_COUNT 0x0F - -/* Fields in PLL registers */ -#define PLL_PC_GAIN 0x07 -#define PLL_VC_GAIN 0x18 -#define PLL_DUTY_CYC 0xE0 -#define PLL_OVERRIDE 0x01 -#define PLL_MCLK_RST 0x02 -#define OSC_EN 0x04 -#define EXT_CLK_EN 0x08 -#define MCLK_SRC_SEL 0x70 -#define EXT_CLK_CNTL 0x80 -#define VCLK_SRC_SEL 0x03 -#define PLL_VCLK_RST 0x04 -#define VCLK_INVERT 0x08 -#define VCLK0_POST 0x03 -#define VCLK1_POST 0x0C -#define VCLK2_POST 0x30 -#define VCLK3_POST 0xC0 - -/* CONFIG_CNTL register constants */ -#define APERTURE_4M_ENABLE 1 -#define APERTURE_8M_ENABLE 2 -#define VGA_APERTURE_ENABLE 4 - -/* CONFIG_STAT0 register constants (GX, CX) */ -#define CFG_BUS_TYPE 0x00000007 -#define CFG_MEM_TYPE 0x00000038 -#define CFG_INIT_DAC_TYPE 0x00000e00 - -/* CONFIG_STAT0 register constants (CT, ET, VT) */ -#define CFG_MEM_TYPE_xT 0x00000007 - -#define ISA 0 -#define EISA 1 -#define LOCAL_BUS 6 -#define PCI 7 - -/* Memory types for GX, CX */ -#define DRAMx4 0 -#define VRAMx16 1 -#define VRAMx16ssr 2 -#define DRAMx16 3 -#define GraphicsDRAMx16 4 -#define EnhancedVRAMx16 5 -#define EnhancedVRAMx16ssr 6 - -/* Memory types for CT, ET, VT, GT */ -#define DRAM 0 -#define EDO_DRAM 1 -#define PSEUDO_EDO 2 -#define SDRAM 3 - -#define DAC_INTERNAL 0x00 -#define DAC_IBMRGB514 0x01 -#define DAC_ATI68875 0x02 -#define DAC_TVP3026_A 0x72 -#define DAC_BT476 0x03 -#define DAC_BT481 0x04 -#define DAC_ATT20C491 0x14 -#define DAC_SC15026 0x24 -#define DAC_MU9C1880 0x34 -#define DAC_IMSG174 0x44 -#define DAC_ATI68860_B 0x05 -#define DAC_ATI68860_C 0x15 -#define DAC_TVP3026_B 0x75 -#define DAC_STG1700 0x06 -#define DAC_ATT498 0x16 -#define DAC_STG1702 0x07 -#define DAC_SC15021 0x17 -#define DAC_ATT21C498 0x27 -#define DAC_STG1703 0x37 -#define DAC_CH8398 0x47 -#define DAC_ATT20C408 0x57 - -#define CLK_ATI18818_0 0 -#define CLK_ATI18818_1 1 -#define CLK_STG1703 2 -#define CLK_CH8398 3 -#define CLK_INTERNAL 4 -#define CLK_ATT20C408 5 -#define CLK_IBMRGB514 6 - -/* MEM_CNTL register constants */ -#define MEM_SIZE_ALIAS 0x00000007 -#define MEM_SIZE_512K 0x00000000 -#define MEM_SIZE_1M 0x00000001 -#define MEM_SIZE_2M 0x00000002 -#define MEM_SIZE_4M 0x00000003 -#define MEM_SIZE_6M 0x00000004 -#define MEM_SIZE_8M 0x00000005 -#define MEM_SIZE_ALIAS_GTB 0x0000000F -#define MEM_SIZE_2M_GTB 0x00000003 -#define MEM_SIZE_4M_GTB 0x00000007 -#define MEM_SIZE_6M_GTB 0x00000009 -#define MEM_SIZE_8M_GTB 0x0000000B -#define MEM_BNDRY 0x00030000 -#define MEM_BNDRY_0K 0x00000000 -#define MEM_BNDRY_256K 0x00010000 -#define MEM_BNDRY_512K 0x00020000 -#define MEM_BNDRY_1M 0x00030000 -#define MEM_BNDRY_EN 0x00040000 - -/* ATI PCI constants */ -#define PCI_ATI_VENDOR_ID 0x1002 -#define PCI_MACH64_GX 0x4758 -#define PCI_MACH64_CX 0x4358 -#define PCI_MACH64_CT 0x4354 -#define PCI_MACH64_ET 0x4554 -#define PCI_MACH64_VT 0x5654 -#define PCI_MACH64_GT 0x4754 - -/* CONFIG_CHIP_ID register constants */ -#define CFG_CHIP_TYPE 0x0000FFFF -#define CFG_CHIP_CLASS 0x00FF0000 -#define CFG_CHIP_REV 0xFF000000 -#define CFG_CHIP_VERSION 0x07000000 -#define CFG_CHIP_FOUNDRY 0x38000000 -#define CFG_CHIP_REVISION 0xC0000000 - -/* Chip IDs read from CONFIG_CHIP_ID */ -#define MACH64_GX_ID 0xD7 -#define MACH64_CX_ID 0x57 -#define MACH64_CT_ID 0x4354 -#define MACH64_ET_ID 0x4554 -#define MACH64_VT_ID 0x5654 -#define MACH64_GT_ID 0x4754 - -/* Mach64 chip types */ -#define MACH64_UNKNOWN 0 -#define MACH64_GX 1 -#define MACH64_CX 2 -#define MACH64_CT 3 -#define MACH64_ET 4 -#define MACH64_VT 5 -#define MACH64_GT 6 - -/* DST_CNTL register constants */ -#define DST_X_RIGHT_TO_LEFT 0 -#define DST_X_LEFT_TO_RIGHT 1 -#define DST_Y_BOTTOM_TO_TOP 0 -#define DST_Y_TOP_TO_BOTTOM 2 -#define DST_X_MAJOR 0 -#define DST_Y_MAJOR 4 -#define DST_X_TILE 8 -#define DST_Y_TILE 0x10 -#define DST_LAST_PEL 0x20 -#define DST_POLYGON_ENABLE 0x40 -#define DST_24_ROTATION_ENABLE 0x80 - -/* SRC_CNTL register constants */ -#define SRC_PATTERN_ENABLE 1 -#define SRC_ROTATION_ENABLE 2 -#define SRC_LINEAR_ENABLE 4 -#define SRC_BYTE_ALIGN 8 -#define SRC_LINE_X_RIGHT_TO_LEFT 0 -#define SRC_LINE_X_LEFT_TO_RIGHT 0x10 - -/* HOST_CNTL register constants */ -#define HOST_BYTE_ALIGN 1 - -/* GUI_TRAJ_CNTL register constants */ -#define PAT_MONO_8x8_ENABLE 0x01000000 -#define PAT_CLR_4x2_ENABLE 0x02000000 -#define PAT_CLR_8x1_ENABLE 0x04000000 - -/* DP_CHAIN_MASK register constants */ -#define DP_CHAIN_4BPP 0x8888 -#define DP_CHAIN_7BPP 0xD2D2 -#define DP_CHAIN_8BPP 0x8080 -#define DP_CHAIN_8BPP_RGB 0x9292 -#define DP_CHAIN_15BPP 0x4210 -#define DP_CHAIN_16BPP 0x8410 -#define DP_CHAIN_24BPP 0x8080 -#define DP_CHAIN_32BPP 0x8080 - -/* DP_PIX_WIDTH register constants */ -#define DST_1BPP 0 -#define DST_4BPP 1 -#define DST_8BPP 2 -#define DST_15BPP 3 -#define DST_16BPP 4 -#define DST_32BPP 6 -#define SRC_1BPP 0 -#define SRC_4BPP 0x100 -#define SRC_8BPP 0x200 -#define SRC_15BPP 0x300 -#define SRC_16BPP 0x400 -#define SRC_32BPP 0x600 -#define HOST_1BPP 0 -#define HOST_4BPP 0x10000 -#define HOST_8BPP 0x20000 -#define HOST_15BPP 0x30000 -#define HOST_16BPP 0x40000 -#define HOST_32BPP 0x60000 -#define BYTE_ORDER_MSB_TO_LSB 0 -#define BYTE_ORDER_LSB_TO_MSB 0x1000000 - -/* DP_MIX register constants */ -#define BKGD_MIX_NOT_D 0 -#define BKGD_MIX_ZERO 1 -#define BKGD_MIX_ONE 2 -#define BKGD_MIX_D 3 -#define BKGD_MIX_NOT_S 4 -#define BKGD_MIX_D_XOR_S 5 -#define BKGD_MIX_NOT_D_XOR_S 6 -#define BKGD_MIX_S 7 -#define BKGD_MIX_NOT_D_OR_NOT_S 8 -#define BKGD_MIX_D_OR_NOT_S 9 -#define BKGD_MIX_NOT_D_OR_S 10 -#define BKGD_MIX_D_OR_S 11 -#define BKGD_MIX_D_AND_S 12 -#define BKGD_MIX_NOT_D_AND_S 13 -#define BKGD_MIX_D_AND_NOT_S 14 -#define BKGD_MIX_NOT_D_AND_NOT_S 15 -#define BKGD_MIX_D_PLUS_S_DIV2 0x17 -#define FRGD_MIX_NOT_D 0 -#define FRGD_MIX_ZERO 0x10000 -#define FRGD_MIX_ONE 0x20000 -#define FRGD_MIX_D 0x30000 -#define FRGD_MIX_NOT_S 0x40000 -#define FRGD_MIX_D_XOR_S 0x50000 -#define FRGD_MIX_NOT_D_XOR_S 0x60000 -#define FRGD_MIX_S 0x70000 -#define FRGD_MIX_NOT_D_OR_NOT_S 0x80000 -#define FRGD_MIX_D_OR_NOT_S 0x90000 -#define FRGD_MIX_NOT_D_OR_S 0xa0000 -#define FRGD_MIX_D_OR_S 0xb0000 -#define FRGD_MIX_D_AND_S 0xc0000 -#define FRGD_MIX_NOT_D_AND_S 0xd0000 -#define FRGD_MIX_D_AND_NOT_S 0xe0000 -#define FRGD_MIX_NOT_D_AND_NOT_S 0xf0000 -#define FRGD_MIX_D_PLUS_S_DIV2 0x170000 - -/* DP_SRC register constants */ -#define BKGD_SRC_BKGD_CLR 0 -#define BKGD_SRC_FRGD_CLR 1 -#define BKGD_SRC_HOST 2 -#define BKGD_SRC_BLIT 3 -#define BKGD_SRC_PATTERN 4 -#define FRGD_SRC_BKGD_CLR 0 -#define FRGD_SRC_FRGD_CLR 0x100 -#define FRGD_SRC_HOST 0x200 -#define FRGD_SRC_BLIT 0x300 -#define FRGD_SRC_PATTERN 0x400 -#define MONO_SRC_ONE 0 -#define MONO_SRC_PATTERN 0x10000 -#define MONO_SRC_HOST 0x20000 -#define MONO_SRC_BLIT 0x30000 - -/* CLR_CMP_CNTL register constants */ -#define COMPARE_FALSE 0 -#define COMPARE_TRUE 1 -#define COMPARE_NOT_EQUAL 4 -#define COMPARE_EQUAL 5 -#define COMPARE_DESTINATION 0 -#define COMPARE_SOURCE 0x1000000 - -/* FIFO_STAT register constants */ -#define FIFO_ERR 0x80000000 - -/* CONTEXT_LOAD_CNTL constants */ -#define CONTEXT_NO_LOAD 0 -#define CONTEXT_LOAD 0x10000 -#define CONTEXT_LOAD_AND_DO_FILL 0x20000 -#define CONTEXT_LOAD_AND_DO_LINE 0x30000 -#define CONTEXT_EXECUTE 0 -#define CONTEXT_CMD_DISABLE 0x80000000 - -/* GUI_STAT register constants */ -#define ENGINE_IDLE 0 -#define ENGINE_BUSY 1 -#define SCISSOR_LEFT_FLAG 0x10 -#define SCISSOR_RIGHT_FLAG 0x20 -#define SCISSOR_TOP_FLAG 0x40 -#define SCISSOR_BOTTOM_FLAG 0x80 - -/* ATI VGA Extended Regsiters */ -#define sioATIEXT 0x1ce -#define bioATIEXT 0x3ce - -#define ATI2E 0xae -#define ATI32 0xb2 -#define ATI36 0xb6 - -/* VGA Graphics Controller Registers */ -#define VGAGRA 0x3ce -#define GRA06 0x06 - -/* VGA Seququencer Registers */ -#define VGASEQ 0x3c4 -#define SEQ02 0x02 -#define SEQ04 0x04 - -#define MACH64_MAX_X ENGINE_MAX_X -#define MACH64_MAX_Y ENGINE_MAX_Y - -#define INC_X 0x0020 -#define INC_Y 0x0080 - -#define RGB16_555 0x0000 -#define RGB16_565 0x0040 -#define RGB16_655 0x0080 -#define RGB16_664 0x00c0 - -#define POLY_TEXT_TYPE 0x0001 -#define IMAGE_TEXT_TYPE 0x0002 -#define TEXT_TYPE_8_BIT 0x0004 -#define TEXT_TYPE_16_BIT 0x0008 -#define POLY_TEXT_TYPE_8 (POLY_TEXT_TYPE | TEXT_TYPE_8_BIT) -#define IMAGE_TEXT_TYPE_8 (IMAGE_TEXT_TYPE | TEXT_TYPE_8_BIT) -#define POLY_TEXT_TYPE_16 (POLY_TEXT_TYPE | TEXT_TYPE_16_BIT) -#define IMAGE_TEXT_TYPE_16 (IMAGE_TEXT_TYPE | TEXT_TYPE_16_BIT) - -#define MACH64_NUM_CLOCKS 16 -#define MACH64_NUM_FREQS 50 - -/* Wait until "v" queue entries are free */ -#define aty_WaitQueue(v) { while ((aty_ld_le32(FIFO_STAT) & 0xffff) > \ - ((unsigned short)(0x8000 >> (v)))); } - -/* Wait until GP is idle and queue is empty */ -#define aty_WaitIdleEmpty() { aty_WaitQueue(16); \ - while ((aty_ld_le32(GUI_STAT) & 1) != 0); } - -#define SKIP_2(_v) ((((_v)<<1)&0xfff8)|((_v)&0x3)|(((_v)&0x80)>>5)) - -#define MACH64_BIT_BLT(_srcx, _srcy, _dstx, _dsty, _w, _h, _dir) \ -{ \ - aty_WaitQueue(5); \ - aty_st_le32(SRC_Y_X, (((_srcx) << 16) | ((_srcy) & 0x0000ffff))); \ - aty_st_le32(SRC_WIDTH1, (_w)); \ - aty_st_le32(DST_CNTL, (_dir)); \ - aty_st_le32(DST_Y_X, (((_dstx) << 16) | ((_dsty) & 0x0000ffff))); \ - aty_st_le32(DST_HEIGHT_WIDTH, (((_w) << 16) | ((_h) & 0x0000ffff))); \ -} -#endif /* REGMACH64_H */ - diff --git a/drivers/macintosh/chips.c b/drivers/macintosh/chips.c deleted file mode 100644 index d60abe84f..000000000 --- a/drivers/macintosh/chips.c +++ /dev/null @@ -1,184 +0,0 @@ -/* - * chips.c: Console support for PowerBook 3400/2400 chips65550 display adaptor. - * - * Copyright (C) 1997 Fabio Riccardi. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <linux/kernel.h> -#include <linux/sched.h> -#include <linux/delay.h> -#include <linux/string.h> -#include <linux/vc_ioctl.h> -#include <linux/pci.h> -#include <linux/selection.h> -#include <asm/prom.h> -#include <asm/io.h> -#include <asm/pgtable.h> -#include <asm/adb.h> -#include <asm/cuda.h> -#include <asm/pmu.h> -#include <asm/pci-bridge.h> -#include "pmac-cons.h" -#include "chips.h" - - -static unsigned char *frame_buffer; -static unsigned char *blitter_regs; -static unsigned char *io_space; -static unsigned long chips_base_phys; -static unsigned long chips_io_phys; - -void -map_chips_display(struct device_node *dp) -{ - unsigned char bus, devfn; - unsigned short cmd; - unsigned long addr; - - addr = dp->addrs[0].address; - chips_base_phys = addr; - frame_buffer = __ioremap(addr + 0x800000, 0x100000, _PAGE_WRITETHRU); - blitter_regs = ioremap(addr + 0xC00000, 4096); - - printk("Mapped chips65550 frame buffer at %p, blitter at %p\n", - frame_buffer, blitter_regs); - - if (pci_device_loc(dp, &bus, &devfn) == 0) { - pcibios_read_config_word(bus, devfn, PCI_COMMAND, &cmd); - cmd |= 3; // enable memory and IO space - pcibios_write_config_word(bus, devfn, PCI_COMMAND, cmd); - io_space = (unsigned char *) pci_io_base(bus); - /* XXX really want the physical address here */ - chips_io_phys = (unsigned long) pci_io_base(bus); - printk("Chips65550 IO space at %p\n", io_space); - } - - video_mode = VMODE_800_600_60; - color_mode = CMODE_8; -} - -#define write_xr(num,val) { out_8(io_space + 0x3D6, num); out_8(io_space + 0x3D7, val); } -#define read_xr(num,var) { out_8(io_space + 0x3D6, num); var = in_8(io_space + 0x3D7); } -#define write_fr(num,val) { out_8(io_space + 0x3D0, num); out_8(io_space + 0x3D1, val); } -#define read_fr(num,var) { out_8(io_space + 0x3D0, num); var = in_8(io_space + 0x3D1); } -#define write_cr(num,val) { out_8(io_space + 0x3D4, num); out_8(io_space + 0x3D5, val); } -#define read_cr(num,var) { out_8(io_space + 0x3D4, num); var = in_8(io_space + 0x3D5); } - -void -chips_init() -{ - unsigned *p; - int i, hres; - - if (video_mode != VMODE_800_600_60) { - printk(KERN_ERR "chips65550: display mode %d not supported", video_mode); - video_mode = VMODE_800_600_60; - } - - if (color_mode != CMODE_8 && color_mode != CMODE_16) { - printk(KERN_ERR "chips65550: color mode %d not supported", color_mode); - color_mode = CMODE_8; - } - - n_scanlines = 600; - hres = 800; - pixel_size = 1 << color_mode; - line_pitch = hres * pixel_size; - row_pitch = line_pitch * 16; - - if (color_mode == CMODE_16) { - write_cr(0x13, 200); // 16 bit display width (decimal) - write_xr(0x81, 0x14); // 15 bit (TrueColor) color mode - write_xr(0x82, 0x00); // disable palettes - write_xr(0x20, 0x10); // 16 bit blitter mode - // write_xr(0x80, 0x00); // 6 bit DAC - // write_fr(0x11, 0X50); // No dither, 5 bits/color - } else if (color_mode == CMODE_8) { - write_cr(0x13, 100); // 8 bit display width (decimal) - write_xr(0x81, 0x12); // 8 bit color mode - write_xr(0x82, 0x08); // Graphics gamma enable - write_xr(0x20, 0x00); // 8 bit blitter mode - // write_xr(0x80, 0x82); // 8 bit DAC, CRT overscan - // write_fr(0x11, 0XE0); // Res Dither on, 6 bits/pixel - } - - pmac_init_palette(); /* Initialize colormap */ - - fb_start = frame_buffer; - - printk(KERN_INFO "hres = %d height = %d pitch = %d\n", - hres, n_scanlines, line_pitch); - - display_info.height = n_scanlines; - display_info.width = hres; - display_info.depth = pixel_size * 8; - display_info.pitch = line_pitch; - display_info.mode = video_mode; - strncpy(display_info.name, "chips65550", sizeof(display_info.name)); - display_info.fb_address = chips_base_phys + 0x800000; - display_info.cmap_adr_address = chips_io_phys + 0x3c8; - display_info.cmap_data_address = chips_io_phys + 0x3c9; - display_info.disp_reg_address = chips_base_phys + 0xC00000; - - /* Clear screen */ - p = (unsigned *) frame_buffer; - for (i = n_scanlines * line_pitch / sizeof(unsigned); i != 0; --i) - *p++ = 0; - - /* Turn on backlight */ - pmu_enable_backlight(1); -} - -int -chips_setmode(struct vc_mode *mode, int doit) -{ - int cmode; - - switch (mode->depth) { - case 16: - cmode = CMODE_16; - break; - case 8: - case 0: /* (default) */ - cmode = CMODE_8; - break; - default: - return -EINVAL; - } - - if (mode->mode != VMODE_800_600_60) - return -EINVAL; - - if (doit) { - video_mode = mode->mode; - color_mode = cmode; - chips_init(); - } - - return 0; -} - -void -chips_set_palette(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors) -{ - int i; - - for (i = 0; i < ncolors; ++i) { - out_8(&io_space[0x3C8], index + i); - udelay(1); - out_8(&io_space[0x3C9], red[i]); - out_8(&io_space[0x3C9], green[i]); - out_8(&io_space[0x3C9], blue[i]); - } -} - -void -chips_set_blanking(int blank_mode) -{ - pmu_enable_backlight(blank_mode == VESA_NO_BLANKING); -} diff --git a/drivers/macintosh/chips.h b/drivers/macintosh/chips.h deleted file mode 100644 index bdf5a5801..000000000 --- a/drivers/macintosh/chips.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Exported procedures for the chips65550 display driver on PowerBook 3400/2400 - * - * Copyright (C) 1997 Fabio Riccardi. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -extern void map_chips_display(struct device_node *); -extern void chips_init(void); -extern int chips_setmode(struct vc_mode *mode, int doit); -extern void chips_set_palette(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors); -extern void chips_set_blanking(int blank_mode); diff --git a/drivers/macintosh/control.c b/drivers/macintosh/control.c deleted file mode 100644 index 9db048a4a..000000000 --- a/drivers/macintosh/control.c +++ /dev/null @@ -1,529 +0,0 @@ -/* - * control.c: Console support for PowerMac "control" display adaptor. - * - * Copyright (C) 1996 Paul Mackerras. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <linux/kernel.h> -#include <linux/sched.h> -#include <linux/delay.h> -#include <linux/string.h> -#include <linux/vc_ioctl.h> -#include <linux/nvram.h> -#include <asm/prom.h> -#include <asm/io.h> -#include <asm/adb.h> -#include <asm/cuda.h> -#include <asm/pgtable.h> -#include <linux/selection.h> -#include "pmac-cons.h" -#include "control.h" - -/* - * Structure of the registers for the RADACAL colormap device. - */ -struct cmap_regs { - unsigned char addr; - char pad1[15]; - unsigned char d1; - char pad2[15]; - unsigned char d2; - char pad3[15]; - unsigned char lut; - char pad4[15]; -}; - -/* - * Structure of the registers for the "control" display adaptor". - */ -#define PAD(x) char x[12] - -struct preg { /* padded register */ - unsigned r; - char pad[12]; -}; - -struct control_regs { - struct preg vcount; /* vertical counter */ - /* Vertical parameters are in units of 1/2 scan line */ - struct preg vswin; /* between vsblank and vssync */ - struct preg vsblank; /* vert start blank */ - struct preg veblank; /* vert end blank (display start) */ - struct preg vewin; /* between vesync and veblank */ - struct preg vesync; /* vert end sync */ - struct preg vssync; /* vert start sync */ - struct preg vperiod; /* vert period */ - struct preg reg8; - /* Horizontal params are in units of 2 pixels */ - struct preg hperiod; /* horiz period - 2 */ - struct preg hsblank; /* horiz start blank */ - struct preg heblank; /* horiz end blank */ - struct preg hesync; /* horiz end sync */ - struct preg hssync; /* horiz start sync */ - struct preg rege; - struct preg regf; - struct preg reg10; - struct preg reg11; - struct preg ctrl; /* display control */ - struct preg start_addr; /* start address: 5 lsbs zero */ - struct preg pitch; /* addrs diff between scan lines */ - struct preg mon_sense; /* monitor sense bits */ - struct preg flags; - struct preg mode; - struct preg reg18; - struct preg reg19; - struct preg res[6]; -}; - -static void set_control_clock(unsigned char *params); -static int read_control_sense(void); -static int control_vram_reqd(int vmode, int cmode); - -static int total_vram; /* total amount of video memory, bytes */ -static unsigned char *frame_buffer; -static struct cmap_regs *cmap_regs; -static struct control_regs *disp_regs; -static int control_use_bank2; - -static unsigned long frame_buffer_phys; -static unsigned long disp_regs_phys; -static unsigned long cmap_regs_phys; - -/* - * Register initialization tables for the control display. - * - * Dot clock rate is - * 3.9064MHz * 2**clock_params[2] * clock_params[1] / clock_params[0]. - * - * The values for vertical frequency (V) in the comments below - * are the values measured using the modes under MacOS. - */ -struct control_regvals { - int pitch[3]; /* bytes/line, indexed by color_mode */ - int offset[3]; /* first pixel address */ - unsigned regs[16]; /* for vswin .. reg10 */ - unsigned char mode[3]; /* indexed by color_mode */ - unsigned char radacal_ctrl[3]; - unsigned char clock_params[3]; -}; - -/* Register values for 1280x1024, 75Hz mode (20) */ -static struct control_regvals control_reg_init_20 = { - { 1280, 2560, 0 }, - { 0x10, 0x20, 0 }, - { 2129, 2128, 80, 42, 4, 2130, 2132, 88, - 420, 411, 91, 35, 421, 18, 211, 386, }, - { 1, 1, 1}, - { 0x50, 0x64, 0x64 }, - { 13, 56, 3 } /* pixel clock = 134.61MHz for V=74.81Hz */ -}; - -/* Register values for 1280x960, 75Hz mode (19) */ -static struct control_regvals control_reg_init_19 = { - { 1280, 2560, 0 }, - { 0x10, 0x20, 0 }, - { 1997, 1996, 76, 40, 4, 1998, 2000, 86, - 418, 409, 89, 35, 419, 18, 210, 384, }, - { 1, 1, 1 }, - { 0x50, 0x64, 0x64 }, - { 31, 125, 3 } /* pixel clock = 126.01MHz for V=75.01 Hz */ -}; - -/* Register values for 1152x870, 75Hz mode (18) */ -static struct control_regvals control_reg_init_18 = { - { 1152, 2304, 4608 }, - { 0x10, 0x28, 0x50 }, - { 1825, 1822, 82, 43, 4, 1828, 1830, 120, - 726, 705, 129, 63, 727, 32, 364, 664 }, - { 2, 1, 1 }, - { 0x10, 0x14, 0x28 }, - { 19, 61, 3 } /* pixel clock = 100.33MHz for V=75.31Hz */ -}; - -/* Register values for 1024x768, 75Hz mode (17) */ -static struct control_regvals control_reg_init_17 = { - { 1024, 2048, 4096 }, - { 0x10, 0x28, 0x50 }, - { 1603, 1600, 64, 34, 4, 1606, 1608, 120, - 662, 641, 129, 47, 663, 24, 332, 616 }, - { 2, 1, 1 }, - { 0x10, 0x14, 0x28 }, - { 11, 28, 3 } /* pixel clock = 79.55MHz for V=74.50Hz */ -}; - -/* Register values for 1024x768, 72Hz mode (15) */ -static struct control_regvals control_reg_init_15 = { - { 1024, 2048, 4096 }, - { 0x10, 0x28, 0x50 }, - { 1607, 1604, 68, 39, 10, 1610, 1612, 132, - 670, 653, 141, 67, 671, 34, 336, 604, }, - { 2, 1, 1 }, - { 0x10, 0x14, 0x28 }, - { 12, 30, 3 } /* pixel clock = 78.12MHz for V=72.12Hz */ -}; - -/* Register values for 1024x768, 60Hz mode (14) */ -static struct control_regvals control_reg_init_14 = { - { 1024, 2048, 4096 }, - { 0x10, 0x28, 0x50 }, - { 1607, 1604, 68, 39, 10, 1610, 1612, 132, - 670, 653, 141, 67, 671, 34, 336, 604, }, - { 2, 1, 1 }, - { 0x10, 0x14, 0x28 }, - { 15, 31, 3 } /* pixel clock = 64.58MHz for V=59.62Hz */ -}; - -/* Register values for 832x624, 75Hz mode (13) */ -static struct control_regvals control_reg_init_13 = { - { 832, 1664, 3328 }, - { 0x10, 0x28, 0x50 }, - { 1331, 1330, 82, 43, 4, 1332, 1334, 128, - 574, 553, 137, 31, 575, 16, 288, 544 }, - { 2, 1, 0 }, { 0x10, 0x14, 0x18 }, - { 23, 42, 3 } /* pixel clock = 57.07MHz for V=74.27Hz */ -}; - -/* Register values for 800x600, 75Hz mode (12) */ -static struct control_regvals control_reg_init_12 = { - { 800, 1600, 3200 }, - { 0x10, 0x28, 0x50 }, - { 1247, 1246, 46, 25, 4, 1248, 1250, 104, - 526, 513, 113, 39, 527, 20, 264, 488, }, - { 2, 1, 0 }, { 0x10, 0x14, 0x18 }, - { 7, 11, 3 } /* pixel clock = 49.11MHz for V=74.40Hz */ -}; - -/* Register values for 800x600, 72Hz mode (11) */ -static struct control_regvals control_reg_init_11 = { - { 800, 1600, 3200 }, - { 0x10, 0x28, 0x50 }, - { 1293, 1256, 56, 33, 10, 1330, 1332, 76, - 518, 485, 85, 59, 519, 30, 260, 460, }, - { 2, 1, 0 }, { 0x10, 0x14, 0x18 }, - { 17, 27, 3 } /* pixel clock = 49.63MHz for V=71.66Hz */ -}; - -/* Register values for 800x600, 60Hz mode (10) */ -static struct control_regvals control_reg_init_10 = { - { 800, 1600, 3200 }, - { 0x10, 0x28, 0x50 }, - { 1293, 1256, 56, 33, 10, 1330, 1332, 76, - 518, 485, 85, 59, 519, 30, 260, 460, }, - { 2, 1, 0 }, { 0x10, 0x14, 0x18 }, - { 20, 53, 2 } /* pixel clock = 41.41MHz for V=59.78Hz */ -}; - -/* Register values for 640x870, 75Hz Full Page Display (7) */ -static struct control_regvals control_reg_init_7 = { - { 640, 1280, 2560 }, - { 0x10, 0x30, 0x68 }, - { 0x727, 0x724, 0x58, 0x2e, 0x4, 0x72a, 0x72c, 0x40, - 0x19e, 0x18c, 0x4c, 0x27, 0x19f, 0x14, 0xd0, 0x178 }, - { 2, 1, 0 }, { 0x10, 0x14, 0x18 }, - { 9, 33, 2 } /* pixel clock = 57.29MHz for V=75.01Hz */ -}; - -/* Register values for 640x480, 67Hz mode (6) */ -static struct control_regvals control_reg_init_6 = { - { 640, 1280, 2560 }, - { 0, 8, 0x10 }, - { 1045, 1042, 82, 43, 4, 1048, 1050, 72, - 430, 393, 73, 31, 431, 16, 216, 400 }, - { 2, 1, 0 }, { 0x10, 0x14, 0x18 }, - { 14, 27, 2 } /* pixel clock = 30.13MHz for V=66.43Hz */ -}; - -/* Register values for 640x480, 60Hz mode (5) */ -static struct control_regvals control_reg_init_5 = { - { 640, 1280, 2560 }, - { 0x10, 0x28, 0x50 }, - { 1037, 1026, 66, 34, 2, 1048, 1050, 56, - 398, 385, 65, 47, 399, 24, 200, 352, }, - { 2, 1, 0 }, { 0x10, 0x14, 0x18 }, - { 23, 37, 2 } /* pixel clock = 25.14MHz for V=59.85Hz */ -}; - -static struct control_regvals *control_reg_init[20] = { - NULL, NULL, NULL, NULL, - &control_reg_init_5, - &control_reg_init_6, - &control_reg_init_7, - NULL, NULL, - &control_reg_init_10, - &control_reg_init_11, - &control_reg_init_12, - &control_reg_init_13, - &control_reg_init_14, - &control_reg_init_15, - NULL, - &control_reg_init_17, - &control_reg_init_18, - &control_reg_init_19, - &control_reg_init_20 -}; - -/* - * Get the monitor sense value. - * Note that this can be called before calibrate_delay, - * so we can't use udelay. - */ -static int -read_control_sense() -{ - int sense; - - out_le32(&disp_regs->mon_sense.r, 7); /* drive all lines high */ - __delay(200); - out_le32(&disp_regs->mon_sense.r, 077); /* turn off drivers */ - __delay(2000); - sense = (in_le32(&disp_regs->mon_sense.r) & 0x1c0) << 2; - - /* drive each sense line low in turn and collect the other 2 */ - out_le32(&disp_regs->mon_sense.r, 033); /* drive A low */ - __delay(2000); - sense |= (in_le32(&disp_regs->mon_sense.r) & 0xc0) >> 2; - out_le32(&disp_regs->mon_sense.r, 055); /* drive B low */ - __delay(2000); - sense |= ((in_le32(&disp_regs->mon_sense.r) & 0x100) >> 5) - | ((in_le32(&disp_regs->mon_sense.r) & 0x40) >> 4); - out_le32(&disp_regs->mon_sense.r, 066); /* drive C low */ - __delay(2000); - sense |= (in_le32(&disp_regs->mon_sense.r) & 0x180) >> 7; - - out_le32(&disp_regs->mon_sense.r, 077); /* turn off drivers */ - return sense; -} - -static inline int control_vram_reqd(int vmode, int cmode) -{ - return vmode_attrs[vmode-1].vres - * control_reg_init[vmode-1]->pitch[cmode]; -} - -void -map_control_display(struct device_node *dp) -{ - int i, sense; - unsigned long addr, size; - int bank1, bank2; - - if (dp->next != 0) - printk("Warning: only using first control display device\n"); - if (dp->n_addrs != 2) - panic("expecting 2 addresses for control (got %d)", dp->n_addrs); - -#if 0 - printk("pmac_display_init: node = %p, addrs =", dp->node); - for (i = 0; i < dp->n_addrs; ++i) - printk(" %x(%x)", dp->addrs[i].address, dp->addrs[i].size); - printk(", intrs ="); - for (i = 0; i < dp->n_intrs; ++i) - printk(" %x", dp->intrs[i].line); - printk("\n"); -#endif - - /* Map in frame buffer and registers */ - for (i = 0; i < dp->n_addrs; ++i) { - addr = dp->addrs[i].address; - size = dp->addrs[i].size; - if (size >= 0x800000) { - /* use the big-endian aperture (??) */ - addr += 0x800000; - /* map at most 8MB for the frame buffer */ - frame_buffer_phys = addr; - frame_buffer = __ioremap(addr, 0x800000, _PAGE_WRITETHRU); - } else { - disp_regs_phys = addr; - disp_regs = ioremap(addr, size); - } - } - cmap_regs_phys = 0xf301b000; /* XXX not in prom? */ - cmap_regs = ioremap(cmap_regs_phys, 0x1000); - - /* Work out which banks of VRAM we have installed. */ - frame_buffer[0] = 0x5a; - frame_buffer[1] = 0xc7; - bank1 = frame_buffer[0] == 0x5a && frame_buffer[1] == 0xc7; - frame_buffer[0x600000] = 0xa5; - frame_buffer[0x600001] = 0x38; - bank2 = frame_buffer[0x600000] == 0xa5 && frame_buffer[0x600001] == 0x38; - total_vram = (bank1 + bank2) * 0x200000; - /* If we don't have bank 1 installed, we hope we have bank 2 :-) */ - control_use_bank2 = !bank1; - if (control_use_bank2) - frame_buffer += 0x600000; - - sense = read_control_sense(); - if (video_mode == VMODE_NVRAM) { - video_mode = nvram_read_byte(NV_VMODE); - if (video_mode <= 0 || video_mode > VMODE_MAX - || control_reg_init[video_mode-1] == 0) - video_mode = VMODE_CHOOSE; - } - if (video_mode == VMODE_CHOOSE) - video_mode = map_monitor_sense(sense); - if (control_reg_init[video_mode-1] == 0) - video_mode = VMODE_640_480_60; - - /* - * Reduce the pixel size if we don't have enough VRAM. - */ - if (color_mode == CMODE_NVRAM) - color_mode = nvram_read_byte(NV_CMODE); - if (color_mode < CMODE_8 || color_mode > CMODE_32) - color_mode = CMODE_8; - while (color_mode > CMODE_8 - && control_vram_reqd(video_mode, color_mode) > total_vram) - --color_mode; - - printk("Monitor sense value = 0x%x, ", sense); -} - -static void -set_control_clock(unsigned char *params) -{ - struct adb_request req; - int i; - - for (i = 0; i < 3; ++i) { - cuda_request(&req, NULL, 5, CUDA_PACKET, CUDA_GET_SET_IIC, - 0x50, i + 1, params[i]); - while (!req.complete) - cuda_poll(); - } -} - -void -control_init() -{ - struct preg *rp; - int i, yoff, hres; - int ctrl, flags; - unsigned *p; - struct control_regvals *init; - - if (video_mode <= 0 || video_mode > VMODE_MAX - || (init = control_reg_init[video_mode-1]) == 0) - panic("control: display mode %d not supported", video_mode); - n_scanlines = vmode_attrs[video_mode-1].vres; - hres = vmode_attrs[video_mode-1].hres; - pixel_size = 1 << color_mode; - line_pitch = init->pitch[color_mode]; - row_pitch = line_pitch * 16; - - if (control_vram_reqd(video_mode, color_mode) > 0x200000) - flags = 0x51; - else if (control_use_bank2) - flags = 0x39; - else - flags = 0x31; - if (video_mode >= VMODE_1280_960_75 && color_mode >= CMODE_16) - ctrl = 0x7f; - else - ctrl = 0x3b; - - /* Initialize display timing registers */ - out_le32(&disp_regs->ctrl.r, 0x43b); - set_control_clock(init->clock_params); - cmap_regs->addr = 0x20; cmap_regs->d2 = init->radacal_ctrl[color_mode]; - cmap_regs->addr = 0x21; cmap_regs->d2 = control_use_bank2? 0: 1; - cmap_regs->addr = 0x10; cmap_regs->d2 = 0; - cmap_regs->addr = 0x11; cmap_regs->d2 = 0; - rp = &disp_regs->vswin; - for (i = 0; i < 16; ++i, ++rp) - out_le32(&rp->r, init->regs[i]); - out_le32(&disp_regs->pitch.r, line_pitch); - out_le32(&disp_regs->mode.r, init->mode[color_mode]); - out_le32(&disp_regs->flags.r, flags); - out_le32(&disp_regs->start_addr.r, 0); - out_le32(&disp_regs->reg18.r, 0x1e5); - out_le32(&disp_regs->reg19.r, 0); - - pmac_init_palette(); /* Initialize colormap */ - - /* Turn on display */ - out_le32(&disp_regs->ctrl.r, ctrl); - - yoff = (n_scanlines % 16) / 2; - fb_start = frame_buffer + yoff * line_pitch + init->offset[color_mode]; - - /* Clear screen */ - p = (unsigned *) (frame_buffer + init->offset[color_mode]); - for (i = n_scanlines * line_pitch / sizeof(unsigned); i != 0; --i) - *p++ = 0; - - display_info.height = n_scanlines; - display_info.width = hres; - display_info.depth = pixel_size * 8; - display_info.pitch = line_pitch; - display_info.mode = video_mode; - strncpy(display_info.name, "control", sizeof(display_info.name)); - display_info.fb_address = frame_buffer_phys + init->offset[color_mode]; - display_info.cmap_adr_address = cmap_regs_phys; - display_info.cmap_data_address = cmap_regs_phys + 0x30; - display_info.disp_reg_address = disp_regs_phys; -} - -int -control_setmode(struct vc_mode *mode, int doit) -{ - int cmode; - - if (mode->mode <= 0 || mode->mode > VMODE_MAX - || control_reg_init[mode->mode-1] == 0) - return -EINVAL; - switch (mode->depth) { - case 24: - case 32: - cmode = CMODE_32; - break; - case 16: - cmode = CMODE_16; - break; - case 8: - case 0: /* (default) */ - cmode = CMODE_8; - break; - default: - return -EINVAL; - } - if (control_vram_reqd(mode->mode, cmode) > total_vram) - return -EINVAL; - if (doit) { - video_mode = mode->mode; - color_mode = cmode; - control_init(); - } - return 0; -} - -void -control_set_palette(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors) -{ - int i; - - for (i = 0; i < ncolors; ++i) { - cmap_regs->addr = index + i; eieio(); - cmap_regs->lut = red[i]; eieio(); - cmap_regs->lut = green[i]; eieio(); - cmap_regs->lut = blue[i]; eieio(); - } -} - -void -control_set_blanking(int blank_mode) -{ - int ctrl; - - ctrl = ld_le32(&disp_regs->ctrl.r) | 0x33; - if (blank_mode & VESA_VSYNC_SUSPEND) - ctrl &= ~3; - if (blank_mode & VESA_HSYNC_SUSPEND) - ctrl &= ~0x30; - out_le32(&disp_regs->ctrl.r, ctrl); -} diff --git a/drivers/macintosh/control.h b/drivers/macintosh/control.h deleted file mode 100644 index edf87fe5b..000000000 --- a/drivers/macintosh/control.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Exported procedures for the "control" display driver on PowerMacs. - * - * Copyright (C) 1997 Paul Mackerras. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -extern void map_control_display(struct device_node *); -extern void control_init(void); -extern int control_setmode(struct vc_mode *mode, int doit); -extern void control_set_palette(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors); -extern void control_set_blanking(int blank_mode); diff --git a/drivers/macintosh/imstt.c b/drivers/macintosh/imstt.c deleted file mode 100644 index 0cf18edc7..000000000 --- a/drivers/macintosh/imstt.c +++ /dev/null @@ -1,945 +0,0 @@ -/* - * imstt.c: Console support for PowerMac "imstt" display adaptor. - * - * Copyright (C) 1997 Sigurdur Asgeirsson - * Modified by Danilo Beuche 1997 - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <linux/module.h> - -#include <linux/kernel.h> -#include <linux/sched.h> -#include <linux/delay.h> -#include <linux/string.h> -#include <linux/vc_ioctl.h> -#include <linux/pci.h> -#include <linux/nvram.h> -#include <asm/prom.h> -#include <asm/io.h> -#include <asm/pgtable.h> -#include <asm/pci-bridge.h> -#include <linux/selection.h> -#include <linux/vt_kern.h> -#include "pmac-cons.h" -#include "imstt.h" - - -enum { - IBMRAMDAC = 0x00, - TVPRAMDAC = 0x01 -}; - - -// IMS TWIN TURBO -enum -{ - S1SA = 0, /* 0x00 */ - S2SA = 1, /* 0x04 */ - SP = 2, /* 0x08 */ - DSA = 3, /* 0x0C */ - CNT = 4, /* 0x10 */ - DP_OCTRL = 5, /* 0x14 */ - BLTCTL = 10, /* 0x28 */ - - // Scan Timing Generator Registers - HES = 12, /* 0x30 */ - HEB = 13, /* 0x34 */ - HSB = 14, /* 0x38 */ - HT = 15, /* 0x3C */ - VES = 16, /* 0x40 */ - VEB = 17, /* 0x44 */ - VSB = 18, /* 0x48 */ - VT = 19, /* 0x4C */ - HCIV = 20, /* 0x50 */ - VCIV = 21, /* 0x54 */ - TCDR = 22, /* 0x58 */ - VIL = 23, /* 0x5C */ - STGCTL = 24, /* 0x60 */ - - // Screen Refresh Generator Registers - SSR = 25, /* 0x64 */ - HRIR = 26, /* 0x68 */ - SPR = 27, /* 0x6C */ - CMR = 28, /* 0x70 */ - SRGCTL = 29, /* 0x74 */ - - // RAM Refresh Generator Registers - RRCIV = 30, /* 0x78 */ - RRSC = 31, /* 0x7C */ - RRCR = 34, /* 0x88 */ - - // System Registers - GIOE = 32, /* 0x80 */ - GIO = 33, /* 0x84 */ - SCR = 35, /* 0x8C */ - SSTATUS = 36, /* 0x90 */ - PRC = 37, /* 0x94 */ - -#if 0 - // PCI Registers - DVID = 0x00000000L, - SC = 0x00000004L, - CCR = 0x00000008L, - OG = 0x0000000CL, - BARM = 0x00000010L, - BARER = 0x00000030L, -#endif -}; - - -// IBM RAMDAC -enum -{ - PADDRW = 0x00, - PDATA = 0x04, - PPMASK = 0x08, - PADDRR = 0x0C, - PIDXLO = 0x10, - PIDXHI = 0x14, - PIDXDATA = 0x18, - PIDXCTL = 0x1C, - - PPIXREP = 0x0A, - PM0 = 0x20, - PN0 = 0x21, - PP0 = 0x22, - PC0 = 0x23 -}; - -// TI TVP 3030 RAMDAC Direct Registers -enum -{ - TVPADDRW = 0x00, // 0 Palette/Cursor RAM Write Adress/Index - TVPPDATA = 0x04, // 1 Palette Data RAM Data - TVPPMASK = 0x08, // 2 Pixel Read-Mask - TVPPADRR = 0x0c, // 3 Palette/Cursor RAM Read Adress - TVPCADRW = 0x10, // 4 Cursor/Overscan Color Write Address - TVPCDATA = 0x14, // 5 Cursor/Overscan Color Data - // 6 reserved - TVPCADRR = 0x1c, // 7 Cursor/Overscan Color Read Address - // 8 reserved - TVPDCCTL = 0x24, // 9 Direct Cursor Control - TVPIDATA = 0x28, // 10 Index Data - TVPCRDAT = 0x2c, // 11 Cursor RAM Data - TVPCXPOL = 0x30, // 12 Cursor-Position X LSB - TVPCXPOH = 0x34, // 13 Cursor-Position X MSB - TVPCYPOL = 0x38, // 14 Cursor-Position Y LSB - TVPCYPOH = 0x3c, // 15 Cursor-Position Y MSB -}; - -// TI TVP 3030 RAMDAC Indirect Registers -enum -{ - TVPIRREV = 0x01, // Silicon Revision [RO] - TVPIRICC = 0x06, // Indirect Cursor Control (0x00) - TVPIRBRC = 0x07, // Byte Router Control (0xe4) - TVPIRLAC = 0x0f, // Latch Control (0x06) - TVPIRTCC = 0x18, // True Color Control (0x80) - TVPIRMXC = 0x19, // Multiplex Control (0x98) - TVPIRCLS = 0x1a, // Clock Selection (0x07) - TVPIRPPG = 0x1c, // Palette Page (0x00) - TVPIRGEC = 0x1d, // General Control (0x00) - TVPIRMIC = 0x1e, // Miscellaneous Control (0x00) - TVPIRPLA = 0x2c, // PLL Address - TVPIRPPD = 0x2d, // Pixel Clock PLL Data - TVPIRMPD = 0x2e, // Memory Clock PLL Data - TVPIRLPD = 0x2f, // Loop Clock PLL Data - TVPIRCKL = 0x30, // Color-Key Overlay Low - TVPIRCKH = 0x31, // Color-Key Overlay High - TVPIRCRL = 0x32, // Color-Key Red Low - TVPIRCRH = 0x33, // Color-Key Red High - TVPIRCGL = 0x34, // Color-Key Green Low - TVPIRCGH = 0x35, // Color-Key Green High - TVPIRCBL = 0x36, // Color-Key Blue Low - TVPIRCBH = 0x37, // Color-Key Blue High - TVPIRCKC = 0x38, // Color-Key Control (0x00) - TVPIRMLC = 0x39, // MCLK/Loop Clock Control (0x18) - TVPIRSEN = 0x3a, // Sense Test (0x00) - TVPIRTMD = 0x3b, // Test Mode Data - TVPIRRML = 0x3c, // CRC Remainder LSB [RO] - TVPIRRMM = 0x3d, // CRC Remainder MSB [RO] - TVPIRRMS = 0x3e, // CRC Bit Select [WO] - TVPIRDID = 0x3f, // Device ID [RO] (0x30) - TVPIRRES = 0xff, // Software Reset [WO] - -}; - -struct initvalues -{ - unsigned char addr, value; -}; - - - -// Values which only depend on resolution not on color mode -struct tt_single_rmodevals -{ - unsigned short hes; - unsigned short heb; - unsigned short hsb; - unsigned short ht; - unsigned short ves; - unsigned short veb; - unsigned short vsb; - unsigned short vt; -}; - -struct tvp_single_rmodevals -{ - unsigned char pclk_n; - unsigned char pclk_m; - unsigned char pclk_p; -}; - -struct ibm_single_rmodevals -{ - unsigned char pclk_m; - unsigned char pclk_n; - unsigned char pclk_p; - unsigned char pclk_c; -}; - -// Values which only depend on color mode not on resolution -struct tvp_single_cmodevals -{ - unsigned char tcc; // True Color control - unsigned char mxc; // Multiplexer control - unsigned char lckl_n; // N value of LCKL PLL -}; - -struct ibm_single_cmodevals -{ - unsigned char pformat; // pixel format -}; - -// Values of the tvp which change depending on colormode x resolution -struct tvp_single_crmodevals -{ - unsigned char mlc; // Memory Loop Config 0x39 - unsigned char lckl_p; // P value of LCKL PLL -}; - -struct ibm_single_crmodevals -{ - // oh nothing changes -}; - -// complete configuration for a resolution in all depths -// 0 = 8 Bit, 15/16 bit = 1 , 32 Bit = 2 -struct ims_crmodevals -{ - int pitch; - struct tt_single_rmodevals tt[2]; // for each ramdac seperate tt config - - struct tvp_single_rmodevals tvp_clock; // for each ramdac seperate clock config - struct tvp_single_crmodevals tvp[3]; // for each colormode - - struct ibm_single_rmodevals ibm_clock; // for each ramdac seperate clock config -// struct ibm_single_crmodevals ibm[3]; // for each color mode -}; - -struct ims_modevals -{ - int dac; // which dac do we have - int total_vram; // how much vram is on board - int sense; // what monitor - unsigned char* fb; // frame buffer address - unsigned char* fb_phys; // frame buffer address - unsigned char* cmap; // dac address - unsigned char* cmap_phys; // dac address - unsigned int* dc; // tt address - unsigned int* dc_phys; // tt address - - struct initvalues* init[2]; // initial register settings for each ramdac - - struct ims_crmodevals* mode[20]; // for each possible mode - - struct tvp_single_cmodevals tvp[3]; // for each color mode - - struct ibm_single_cmodevals ibm[3]; // for each color mode -}; - - -struct ims_crmodevals imsmode_6 = -{ - 640, - { - { 0x08, 0x12, 0x62, 0x6C, 0x0003, 0x002A, 0x020A, 0x020C }, - { 0x04, 0x0009, 0x0031, 0x0036, 0x0003, 0x002a, 0x020a, 0x020d }, - }, - { 0xef, 0x2e, 0xb2 }, - { - { 0x39, 0xf3 }, - { 0x39, 0xf3 }, - { 0x38, 0xf3 } - }, - // IBM CLOCK - { 0x78, 0x13, 0x02, 0x02 }, -}; - -struct ims_crmodevals imsmode_13 = -{ - 832, - { - { 0x05, 0x20, 0x88, 0x90, 0x0003, 0x0028, 0x0298, 0x029B }, - { 0x04, 0x0011, 0x0045, 0x0048, 0x0003, 0x002a, 0x029a, 0x029b}, - }, - { 0xfe, 0x3e, 0xf1 }, - { - { 0x39, 0xf3 }, - { 0x38, 0xf3 }, - { 0x38, 0xf2 } - }, - { 0x3E, 0x0A, 0x01, 0x02 } -}; -struct ims_crmodevals imsmode_17 = -{ - 1024, - { - { 0x0A, 0x1C, 0x9C, 0xA6, 0x0003, 0x0020, 0x0320, 0x0323 } , - { 0x06, 0x0210, 0x0250, 0x0053, 0x1003, 0x0021, 0x0321, 0x0324 }, - }, - { 0xfc, 0x3a, 0xf1 }, - { - { 0x39, 0xf3 }, - { 0x38, 0xf3 }, - { 0x38, 0xf2 } - }, - { 0x07, 0x00, 0x01, 0x02 } -}; -struct ims_crmodevals imsmode_18 = -{ - 1152, - { - { 0, 0, 0, 0, 0, 0, 0, 0 }, - { 0x09, 0x0011, 0x059, 0x5b, 0x0003, 0x0031, 0x0397, 0x039a }, - }, - { 0xfd, 0x3a, 0xf1 }, - { - { 0x39, 0xf3 }, - { 0x38, 0xf3 }, - { 0x38, 0xf2 } - }, - { 0, 0, 0, 0 } -}; -struct ims_crmodevals imsmode_19 = -{ - 1280, - { - { 0, 0, 0, 0, 0, 0, 0, 0 }, - { 0x09, 0x0016, 0x0066, 0x0069, 0x0003, 0x0027, 0x03e7, 0x03e8 }, - }, - { 0xf7, 0x36, 0xf0 }, - { - { 0x38, 0xf3 }, - { 0x38, 0xf2 }, - { 0x38, 0xf1 } - }, - { 0, 0, 0, 0 } -}; -struct ims_crmodevals imsmode_20 = -{ - 1280, - { - { 0, 0, 0, 0, 0, 0, 0, 0 }, - { 0x09, 0x0018, 0x0068, 0x006a, 0x0003, 0x0029, 0x0429, 0x042a }, - }, - { 0xf0, 0x2d, 0xf0 }, - { - { 0x38, 0xf3 }, - { 0x38, 0xf2 }, - { 0x38, 0xf1 } - }, - { 0, 0, 0, 0 } -}; - -// IBM RAMDAC initial register values - -static struct initvalues ibm_initregs[] = -{ - { 0x02, 0x21 }, /* (0x01) Miscellaneous Clock Control */ - { 0x03, 0x00 }, /* (0x00) Sync Control */ - { 0x04, 0x00 }, /* (0x00) Horizontal Sync Position */ - { 0x05, 0x00 }, /* (0x00) Power Management */ - { 0x06, 0x0B }, /* (0x02) DAC Operation */ - { 0x07, 0x00 }, /* (0x00) Palette Control */ - { 0x08, 0x01 }, /* (0x01) System Clock Control */ - { 0x0B, 0x00 }, /* (U) 8 BPP Control */ - { 0x0C, 0xC4 }, /* (U) 16 BPP Control */ - { 0x0D, 0x00 }, /* (U) 24 BPP Packed Control */ - { 0x0E, 0x03 }, /* (U) 32 BPP Control */ - { 0x10, 0x05 }, /* (0x00) Pixel PLL Control 1 */ - { 0x11, 0x00 }, /* (0x00) Pixel PLL Control 2 */ - { 0x15, 0x08 }, /* (0x08) SYSCLK N (System PLL Reference Divider) */ - { 0x16, 0x57 }, /* (0x41) SYSCLK M (System PLL VCO Divider) */ - { 0x17, 0x00 }, /* (U) SYSCLK P */ - { 0x18, 0x00 }, /* (U) SYSCLK C */ - { 0x30, 0x00 }, /* (0x00) Cursor Control */ - { 0x60, 0xFF }, /* (U) Border Color Red */ - { 0x61, 0xFF }, /* (U) Border Color Green */ - { 0x62, 0xFF }, /* (U) Border Color Blue */ - { 0x70, 0x01 }, /* (0x00) Miscellaneous Control 1 */ - { 0x71, 0x45 }, /* (0x00) Miscellaneous Control 2 */ - { 0x72, 0x00 }, /* (0x00) Miscellaneous Control 3 */ - { 0x78, 0x00 }, /* (0x00) Key Control/DB Operation */ - { 0x00, 0x00 } -}; - - -static struct initvalues tvp_initregs[] = -{ -{ 0x6, 0x00}, -{ 0x7, 0xe4}, -{ 0xf, 0x06}, -{ 0x18, 0x80}, -{ 0x19, 0x4d}, -{ 0x1a, 0x05}, -{ 0x1c, 0x00}, -{ 0x1d, 0x00}, -{ 0x1e, 0x08}, -{ 0x30, 0xff}, -{ 0x31, 0xff}, -{ 0x32, 0xff}, -{ 0x33, 0xff}, -{ 0x34, 0xff}, -{ 0x35, 0xff}, -{ 0x36, 0xff}, -{ 0x37, 0xff}, -{ 0x38, 0x00}, -{ TVPIRPLA, 0x00 }, -{ TVPIRPPD, 0xc0 }, -{ TVPIRPPD, 0xd5 }, -{ TVPIRPPD, 0xea }, -{ TVPIRPLA, 0x00 }, -{ TVPIRMPD, 0xb9 }, -{ TVPIRMPD, 0x3a }, -{ TVPIRMPD, 0xb1 }, -{ TVPIRPLA, 0x00 }, -{ TVPIRLPD, 0xc1 }, -{ TVPIRLPD, 0x3d }, -{ TVPIRLPD, 0xf3 }, -{ 0x00, 0x00 } -}; - - -static struct ims_modevals ims_info = -{ - -1, // DAC - -1, // VRAM - -1, // Monitor; - 0, // Framebuffer - 0, // Framebuffer_phys - 0, // colormap - 0, // colormap_phys - 0, // dc - 0, // dc_phys - { ibm_initregs, tvp_initregs}, - { - NULL, - NULL, - NULL, - NULL, - &imsmode_6, - &imsmode_6, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - &imsmode_13, - NULL, - NULL, - NULL, - &imsmode_17, - &imsmode_18, - &imsmode_19, - &imsmode_20 - }, - { - { 0x80, 0x4d, 0xc1 }, - { 0x44, 0x55, 0xe1 }, - { 0x46, 0x5d, 0xf1 } - }, - { - { 0x03 }, - { 0x04 }, - { 0x06 } - } -}; - - - - -// static void set_imstt_clock(unsigned char *params); -static void map_imstt_display(struct device_node *, int); -static int read_imstt_sense(void); -static int imstt_vram_reqd(int vmode, int cmode); - - -#if 0 -static int get_tvp_ireg(int iaddr) -{ - ims_info.cmap[0] = iaddr & 0xff; eieio(); - return ims_info.cmap[40]; -} -#endif - -static void set_tvp_ireg(int iaddr,unsigned char value) -{ - ims_info.cmap[0] = iaddr & 0xff; eieio(); - ims_info.cmap[40] = value; eieio(); -} -/* - * Get the monitor sense value. - * Note that this can be called before calibrate_delay, - * so we can't use udelay. - */ -static int -read_imstt_sense() -{ -#if 0 - int sense; - unsigned gio, gioe; - - gio = ld_le32(ims_info.dc + GIO) & ~0x0038; - gioe = ld_le32(dc_ - - out_le32(ims_info.dc + GIOE, reg); /* drive all lines high */ - __delay(200); - out_le32(ims_info.dc + GIOE, 077); /* turn off drivers */ - __delay(2000); - sense = (in_le32(ims_info.dc + GIOE) & 0x1c0) << 2; - - /* drive each sense line low in turn and collect the other 2 */ - out_le32(ims_info.dc + GIOE, 033); /* drive A low */ - __delay(2000); - sense |= (in_le32(ims_info.dc + GIOE) & 0xc0) >> 2; - out_le32(ims_info.dc + GIOE, 055); /* drive B low */ - __delay(2000); - sense |= ((in_le32(ims_info.dc + GIOE) & 0x100) >> 5) - | ((in_le32(ims_info.dc + GIOE) & 0x40) >> 4); - out_le32(ims_info.dc + GIOE, 066); /* drive C low */ - __delay(2000); - sense |= (in_le32(ims_info.dc + GIOE) & 0x180) >> 7; - - out_le32(ims_info.dc + GIOE, 077); /* turn off drivers */ - return sense; -#else - return 0; -#endif -} - -static inline int imstt_vram_reqd(int vmode, int cmode) -{ - return vmode_attrs[vmode-1].vres * - (ims_info.mode[vmode-1])->pitch * ( 1 << cmode); -} - -void -map_imstt_display_tvp(struct device_node *dp) -{ - map_imstt_display(dp,1); -} - -void -map_imstt_display_ibm(struct device_node *dp) -{ - map_imstt_display(dp,0); -} - -static void -map_imstt_display(struct device_node *dp, int which) -{ - int i, sense; - unsigned long addr, size, tmp; - unsigned char bus, devfn; - unsigned short cmd; - - if (dp->next != 0) - printk("Warning: only using first imstt display device\n"); - -#if 0 - printk("pmac_display_init: node = %p, addrs =", dp->node); - for (i = 0; i < dp->n_addrs; ++i) - printk(" %x(%x)", dp->addrs[i].address, dp->addrs[i].size); - printk(", intrs ="); - for (i = 0; i < dp->n_intrs; ++i) - printk(" %x", dp->intrs[i]); - printk("\n"); -#endif - - /* Map in frame buffer and registers */ - for (i = 0; i < dp->n_addrs; ++i) { - addr = dp->addrs[i].address; - size = dp->addrs[i].size; - if (size >= 0x02000000) { - ims_info.fb = __ioremap(addr, size, _PAGE_NO_CACHE); - ims_info.fb_phys = (unsigned char*)addr; - ims_info.dc = (unsigned*)(ims_info.fb + 0x00800000); - ims_info.dc_phys = (unsigned*)(ims_info.fb_phys + 0x00800000); - ims_info.cmap = (unsigned char*)(ims_info.fb + 0x00840000); - ims_info.cmap_phys = (unsigned char*)(ims_info.fb_phys + 0x00840000); - printk("mapped ims_info.fb=%x(%x)", (unsigned)ims_info.fb, (unsigned)size); - printk(" ims_info.dc=%x, ims_info.cmap=%x\n", (unsigned)ims_info.dc, (unsigned)ims_info.cmap); - } - } - - /* enable memory-space accesses using config-space command register */ - if (pci_device_loc(dp, &bus, &devfn) == 0) { - pcibios_read_config_word(bus, devfn, PCI_COMMAND, &cmd); - - printk("command word 0x%04X\n", cmd); - - if (cmd != 0xffff) { - cmd |= PCI_COMMAND_MEMORY; - pcibios_write_config_word(bus, devfn, PCI_COMMAND, cmd); - } - } - else - printk("unable to find pci device\n"); - - tmp = in_le32(ims_info.dc + SSTATUS); - printk("chip version %ld, ", (tmp & 0x0F00) >> 8); - - tmp = in_le32(ims_info.dc + PRC); - - if (0 == which ) - ims_info.total_vram = (tmp & 0x0004) ? 0x000400000L : 0x000200000L; - else - ims_info.total_vram = 0x000800000L; - - printk("VRAM size %ldM\n", ims_info.total_vram / 0x000100000L); - - if (ims_info.total_vram == 0x000800000L) - { - ims_info.dac = TVPRAMDAC; - printk("Selecting TVP 3030 RAMDAC\n"); - } - else - { - ims_info.dac = IBMRAMDAC; - printk("Selecting IBM RAMDAC\n"); - } - - sense = read_imstt_sense(); - printk("Monitor sense value = 0x%x, ", sense); -#if 0 - if (video_mode == VMODE_NVRAM) { - video_mode = nvram_read_byte(NV_VMODE); - if (video_mode <= 0 || video_mode > VMODE_MAX - || imstt_reg_init[video_mode-1] == 0) - video_mode = VMODE_CHOOSE; - } - if (video_mode == VMODE_CHOOSE) - video_mode = map_monitor_sense(sense); - if (imstt_reg_init[video_mode-1] == 0) - video_mode = VMODE_640_480_67; - - /* - * Reduce the pixel size if we don't have enough VRAM. - */ - if (color_mode == CMODE_NVRAM) - color_mode = nvram_read_byte(NV_CMODE); - if (color_mode < CMODE_8 || color_mode > CMODE_32) - color_mode = CMODE_8; - while (color_mode > CMODE_8 - && imstt_vram_reqd(video_mode, color_mode) > ims_info.total_vram) - --color_mode; - -#endif - // Hack Hack Hack !!! - video_mode = VMODE_640_480_67; - color_mode = CMODE_8; -} - -/* - * We dont need it ( all is done in ims_init ) -static void -set_imstt_clock_tvp(char* tvprv) -{ - int j; - for (j=0;j<3;j++) - { - set_tvp_ireg(TVPIRPLA,(j << 4) | (j << 2) | j); // Select same value for all plls - set_tvp_ireg(TVPIRPPD,tvprv[j]); - set_tvp_ireg(TVPIRMPD,tvprv[3+j]); - set_tvp_ireg(TVPIRLPD,tvprv[6+j]); - } -} - -static void -set_imstt_clock_ibm(unsigned char *params) -{ - ims_info.cmap[PIDXHI] = 0; eieio(); - ims_info.cmap[PIDXLO] = PM0; eieio(); - ims_info.cmap[PIDXDATA] = params[0]; eieio(); - - ims_info.cmap[PIDXLO] = PN0; eieio(); - ims_info.cmap[PIDXDATA] = params[1]; eieio(); - - ims_info.cmap[PIDXLO] = PP0; eieio(); - ims_info.cmap[PIDXDATA] = params[2]; eieio(); - - ims_info.cmap[PIDXLO] = PC0; eieio(); - ims_info.cmap[PIDXDATA] = params[3]; eieio(); -} -*/ - -void -imstt_init() -{ - int i, yoff, hres; - unsigned long ctl, pitch, tmp, scrCmode; - struct ims_crmodevals *init; - - if (video_mode <= 0 || video_mode > VMODE_MAX ) panic("imstt: display mode %d not supported(not in valid range)", video_mode); - if ((init = ims_info.mode[video_mode-1]) == 0) panic("imstt: display mode %d not supported(no mode definition)", video_mode); - if (init->tt[ims_info.dac].vt == 0) panic("imstt: display mode %d not supported (no timing definition)", video_mode); - - - n_scanlines = vmode_attrs[video_mode-1].vres; - hres = vmode_attrs[video_mode-1].hres; - pixel_size = 1 << color_mode; - line_pitch = init->pitch * pixel_size; - row_pitch = line_pitch * 16; - - /* initialize the card */ - tmp = in_le32(ims_info.dc + STGCTL); - out_le32(ims_info.dc + STGCTL, tmp & ~0x1); -#if 0 - out_le32(ims_info.dc + SCR, 0); -#endif - - switch(ims_info.dac) - { - case IBMRAMDAC: - ims_info.cmap[PPMASK] = 0xFF; eieio(); - ims_info.cmap[PIDXHI] = 0x00; eieio(); - for (i = 0; ims_info.init[IBMRAMDAC][i].addr != 0 && ims_info.init[IBMRAMDAC][i].value != 0 ;i++) - { - ims_info.cmap[PIDXLO] = ims_info.init[IBMRAMDAC][i].addr; eieio(); - ims_info.cmap[PIDXDATA] = ims_info.init[IBMRAMDAC][i].value; eieio(); - } - - ims_info.cmap[PIDXHI] = 0; eieio(); - ims_info.cmap[PIDXLO] = PM0; eieio(); - ims_info.cmap[PIDXDATA] = init->ibm_clock.pclk_m; eieio(); - - ims_info.cmap[PIDXLO] = PN0; eieio(); - ims_info.cmap[PIDXDATA] = init->ibm_clock.pclk_n; eieio(); - - ims_info.cmap[PIDXLO] = PP0; eieio(); - ims_info.cmap[PIDXDATA] = init->ibm_clock.pclk_p; eieio(); - - ims_info.cmap[PIDXLO] = PC0; eieio(); - ims_info.cmap[PIDXDATA] = init->ibm_clock.pclk_c; eieio(); - - ims_info.cmap[PIDXLO] = PPIXREP; eieio(); - ims_info.cmap[PIDXDATA] = ims_info.ibm[color_mode].pformat; eieio(); - - break; - case TVPRAMDAC: - for (i = 0; ims_info.init[TVPRAMDAC][i].addr != 0 && ims_info.init[TVPRAMDAC][i].value != 0 ;i++) - { - set_tvp_ireg(ims_info.init[TVPRAMDAC][i].addr,ims_info.init[TVPRAMDAC][i].value); - } - set_tvp_ireg(TVPIRPLA,0x00); - set_tvp_ireg(TVPIRPPD,init->tvp_clock.pclk_n); - set_tvp_ireg(TVPIRPPD,init->tvp_clock.pclk_m); - set_tvp_ireg(TVPIRPPD,init->tvp_clock.pclk_p); - - set_tvp_ireg(TVPIRTCC,ims_info.tvp[color_mode].tcc); - set_tvp_ireg(TVPIRMXC,ims_info.tvp[color_mode].mxc); - - set_tvp_ireg(TVPIRPLA,0x00); - set_tvp_ireg(TVPIRLPD,ims_info.tvp[color_mode].lckl_n); - - set_tvp_ireg(TVPIRPLA,0x15); - set_tvp_ireg(TVPIRMLC,(init->tvp[color_mode]).mlc); - - set_tvp_ireg(TVPIRPLA,0x2a); - set_tvp_ireg(TVPIRLPD,init->tvp[color_mode].lckl_p); - break; - } - - - switch(color_mode) { - case CMODE_32: - ctl = 0x1785; - pitch = init->pitch; - scrCmode = 0x300; - break; - case CMODE_16: - ctl = 0x1783; - pitch = init->pitch / 2; - scrCmode = 0x100; - break; - case CMODE_8: - default: - ctl = 0x1781; - pitch = init->pitch / 4; - scrCmode = 0x000; - break; - } - - out_le32(&ims_info.dc[HES], init->tt[ims_info.dac].hes); - out_le32(&ims_info.dc[HEB], init->tt[ims_info.dac].heb); - out_le32(&ims_info.dc[HSB], init->tt[ims_info.dac].hsb); - out_le32(&ims_info.dc[HT], init->tt[ims_info.dac].ht); - out_le32(&ims_info.dc[VES], init->tt[ims_info.dac].ves); - out_le32(&ims_info.dc[VEB], init->tt[ims_info.dac].veb); - out_le32(&ims_info.dc[VSB], init->tt[ims_info.dac].vsb); - out_le32(&ims_info.dc[VT], init->tt[ims_info.dac].vt); - out_le32(&ims_info.dc[HCIV], 1); - out_le32(&ims_info.dc[VCIV], 1); - out_le32(&ims_info.dc[TCDR], 4); - out_le32(&ims_info.dc[VIL], 0); - - out_le32(&ims_info.dc[SSR], 0); - out_le32(&ims_info.dc[HRIR], 0x0200); - out_le32(&ims_info.dc[CMR], 0x01FF); - out_le32(&ims_info.dc[SRGCTL], 0x0003); - switch(ims_info.total_vram) - { - case 0x000200000: - out_le32(&ims_info.dc[SCR], 0x0059D| scrCmode); - break; - case 0x000400000: - pitch /= 2; - out_le32(&ims_info.dc[SCR], 0x00D0DC | scrCmode); - break; - case 0x000800000: - pitch /= 2; - out_le32(&ims_info.dc[SCR], 0x0150DD | scrCmode); - break; - } - - out_le32(&ims_info.dc[SPR], pitch); - - if (ims_info.dac == IBMRAMDAC) - { - - - } - - pmac_init_palette(); /* Initialize colormap */ - - out_le32(&ims_info.dc[STGCTL], ctl); - - yoff = (n_scanlines % 16) / 2; - fb_start = ims_info.fb + yoff * line_pitch; - - /* Clear screen */ - { - unsigned long *p; - p = (unsigned long*)ims_info.fb; - for (i = n_scanlines * line_pitch / sizeof(unsigned); i != 0; --i) - *p++ = 0; - } - - display_info.height = n_scanlines; - display_info.width = hres; - display_info.depth = pixel_size * 8; - display_info.pitch = line_pitch; - display_info.mode = video_mode; - - if (ims_info.dac == IBMRAMDAC ) - strncpy(display_info.name, "IMS,tt128mb2/4", sizeof(display_info.name)); - else - strncpy(display_info.name, "IMS,tt128mb8/8A", sizeof(display_info.name)); - - display_info.fb_address = (unsigned long) ims_info.fb_phys; - display_info.cmap_adr_address = (unsigned long) &ims_info.cmap_phys[PADDRW]; - display_info.cmap_data_address = (unsigned long) &ims_info.cmap_phys[PDATA]; - display_info.disp_reg_address = (unsigned long) NULL; -} - -int -imstt_setmode(struct vc_mode *mode, int doit) -{ - int cmode; - struct ims_crmodevals *init; - - if (video_mode <= 0 || video_mode > VMODE_MAX ) - return -EINVAL; - if ((init = ims_info.mode[video_mode-1]) == 0) - return -EINVAL; - if (init->tt[ims_info.dac].vt == 0) - return -EINVAL; - - if (mode->mode <= 0 || mode->mode > VMODE_MAX - || (ims_info.mode[mode->mode-1] == 0)) - return -EINVAL; - switch (mode->depth) { - case 24: - case 32: - cmode = CMODE_32; - break; - case 16: - cmode = CMODE_16; - break; - case 8: - case 0: /* (default) */ - cmode = CMODE_8; - break; - default: - return -EINVAL; - } - if (imstt_vram_reqd(mode->mode, cmode) > ims_info.total_vram) - return -EINVAL; - if (doit) { - video_mode = mode->mode; - color_mode = cmode; - imstt_init(); - } - return 0; -} - -// set palette for TI TVP3030 ramdac (used on 8MB version) -void -imstt_set_palette_tvp(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors) -{ - int i; - for (i = 0; i < ncolors; ++i) { - ims_info.cmap[TVPADDRW] = index + i; eieio(); - ims_info.cmap[TVPPDATA] = red[i]; eieio(); - ims_info.cmap[TVPPDATA] = green[i]; eieio(); - ims_info.cmap[TVPPDATA] = blue[i]; eieio(); - } -} - -// set palette for IBM ramdac (used on 2MB/4MB version) -void -imstt_set_palette_ibm(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors) -{ - int i; - - for (i = 0; i < ncolors; ++i) { - ims_info.cmap[PADDRW] = index + i; eieio(); - ims_info.cmap[PDATA] = red[i]; eieio(); - ims_info.cmap[PDATA] = green[i]; eieio(); - ims_info.cmap[PDATA] = blue[i]; eieio(); - } -} - -void -imstt_set_blanking(int blank_mode) -{ - long ctrl; - - ctrl = ld_le32(ims_info.dc + STGCTL) | 0x0030; - if (blank_mode & VESA_VSYNC_SUSPEND) - ctrl &= ~0x0020; - if (blank_mode & VESA_HSYNC_SUSPEND) - ctrl &= ~0x0010; - out_le32(ims_info.dc + STGCTL, ctrl); -} - - diff --git a/drivers/macintosh/imstt.h b/drivers/macintosh/imstt.h deleted file mode 100644 index a7f635982..000000000 --- a/drivers/macintosh/imstt.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Exported procedures for the "control" display driver on PowerMacs. - * - * Copyright (C) 1997 Paul Mackerras. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -extern void map_imstt_display_ibm(struct device_node *); -extern void map_imstt_display_tvp(struct device_node *); -extern void imstt_init(void); -extern int imstt_setmode(struct vc_mode *mode, int doit); -extern void imstt_set_palette_ibm(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors); -extern void imstt_set_palette_tvp(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors); -extern void imstt_set_blanking(int blank_mode); - diff --git a/drivers/macintosh/mac_keyb.c b/drivers/macintosh/mac_keyb.c index 190e5222a..5c49af36f 100644 --- a/drivers/macintosh/mac_keyb.c +++ b/drivers/macintosh/mac_keyb.c @@ -20,6 +20,7 @@ #include <asm/bitops.h> #include <asm/adb.h> #include <asm/cuda.h> +#include <asm/init.h> #include <linux/kbd_kern.h> #include <linux/kbd_ll.h> @@ -28,7 +29,7 @@ #define KEYB_LEDREG 2 /* register # for leds on ADB keyboard */ #define MOUSE_DATAREG 0 /* reg# for movement/button codes from mouse */ -static u_short macplain_map[NR_KEYS] = __initdata { +static u_short macplain_map[NR_KEYS] __initdata = { 0xfb61, 0xfb73, 0xfb64, 0xfb66, 0xfb68, 0xfb67, 0xfb7a, 0xfb78, 0xfb63, 0xfb76, 0xf200, 0xfb62, 0xfb71, 0xfb77, 0xfb65, 0xfb72, 0xfb79, 0xfb74, 0xf031, 0xf032, 0xf033, 0xf034, 0xf036, 0xf035, @@ -195,6 +196,8 @@ static unsigned char dont_repeat[128] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; +__openfirmware + int mackbd_setkeycode(unsigned int scancode, unsigned int keycode) { return -EINVAL; @@ -457,7 +460,7 @@ mouse_input(unsigned char *data, int nb, struct pt_regs *regs, int autopoll) /* Only send mouse codes when keyboard is in raw mode. */ if (kbd->kbdmode == VC_RAW) { - static unsigned char uch_ButtonStateSecond = 0; + static unsigned char uch_ButtonStateSecond = 0x80; unsigned char uchButtonSecond; /* Send first button, second button and movement. */ @@ -477,8 +480,8 @@ mouse_input(unsigned char *data, int nb, struct pt_regs *regs, int autopoll) } /* Macintosh 3-button mouse (handler 4). */ - if ((nb == 6) && autopoll /*?*/) { - static unsigned char uch_ButtonStateThird = 0; + if ((nb == 4) && autopoll /*?*/) { + static unsigned char uch_ButtonStateThird = 0x80; unsigned char uchButtonThird; /* Store the button state for speed. */ @@ -560,13 +563,13 @@ __initfunc(void mackbd_init_hw(void)) return; /* setup key map */ - memcpy(plain_map, macplain_map, sizeof(plain_map)); - memcpy(shift_map, macshift_map, sizeof(shift_map)); - memcpy(altgr_map, macaltgr_map, sizeof(altgr_map)); - memcpy(ctrl_map, macctrl_map, sizeof(ctrl_map)); - memcpy(shift_ctrl_map, macshift_ctrl_map, sizeof(shift_ctrl_map)); - memcpy(alt_map, macalt_map, sizeof(alt_map)); - memcpy(ctrl_alt_map, macctrl_alt_map, sizeof(ctrl_alt_map)); + memcpy(key_maps[0], macplain_map, sizeof(plain_map)); + memcpy(key_maps[1], macshift_map, sizeof(plain_map)); + memcpy(key_maps[2], macaltgr_map, sizeof(plain_map)); + memcpy(key_maps[4], macctrl_map, sizeof(plain_map)); + memcpy(key_maps[5], macshift_ctrl_map, sizeof(plain_map)); + memcpy(key_maps[8], macalt_map, sizeof(plain_map)); + memcpy(key_maps[12], macctrl_alt_map, sizeof(plain_map)); /* initialize mouse interrupt hook */ adb_mouse_interrupt_hook = NULL; diff --git a/drivers/macintosh/macio-adb.c b/drivers/macintosh/macio-adb.c index a826daea6..0af447c08 100644 --- a/drivers/macintosh/macio-adb.c +++ b/drivers/macintosh/macio-adb.c @@ -14,6 +14,7 @@ #include <asm/hydra.h> #include <asm/irq.h> #include <asm/system.h> +#include <asm/init.h> struct preg { unsigned char r; @@ -64,6 +65,8 @@ static int macio_adb_autopoll(int on); static void macio_adb_poll(void); static void completed(void); +__openfirmware + void macio_adb_init(void) { struct device_node *adbs; diff --git a/drivers/macintosh/macserial.c b/drivers/macintosh/macserial.c index 9c3f18c9e..7c8cf23d8 100644 --- a/drivers/macintosh/macserial.c +++ b/drivers/macintosh/macserial.c @@ -36,6 +36,7 @@ #ifdef CONFIG_KGDB #include <asm/kgdb.h> #endif +#include <asm/init.h> #include "macserial.h" @@ -79,9 +80,9 @@ static unsigned char scc_inittab[] = { #endif #define ZS_CLOCK 3686400 /* Z8530 RTxC input clock rate */ -DECLARE_TASK_QUEUE(tq_serial); +static DECLARE_TASK_QUEUE(tq_serial); -struct tty_driver serial_driver, callout_driver; +static struct tty_driver serial_driver, callout_driver; static int serial_refcount; /* serial subtype definitions */ @@ -127,6 +128,8 @@ static struct termios *serial_termios_locked[NUM_CHANNELS]; static unsigned char tmp_buf[4096]; /* This is cheating */ static struct semaphore tmp_buf_sem = MUTEX; +__openfirmware + static inline int serial_paranoia_check(struct mac_serial *info, dev_t device, const char *routine) { @@ -281,7 +284,7 @@ static _INLINE_ void rs_sched_event(struct mac_serial *info, { info->event |= 1 << event; queue_task(&info->tqueue, &tq_serial); - mark_bh(SERIAL_BH); + mark_bh(MACSERIAL_BH); } static _INLINE_ void receive_chars(struct mac_serial *info, @@ -299,6 +302,8 @@ static _INLINE_ void receive_chars(struct mac_serial *info, if (info->kgdb_channel) { if (ch == 0x03 || ch == '$') breakpoint(); + if (stat & (Rx_OVR|FRM_ERR|PAR_ERR)) + write_zsreg(info->zs_channel, 0, ERR_RES); return; } #endif @@ -319,17 +324,15 @@ static _INLINE_ void receive_chars(struct mac_serial *info, } if (stat & Rx_OVR) { flag = TTY_OVERRUN; - /* reset the error indication */ - write_zsreg(info->zs_channel, 0, ERR_RES); } else if (stat & FRM_ERR) { - /* this error is not sticky */ flag = TTY_FRAME; } else if (stat & PAR_ERR) { flag = TTY_PARITY; - /* reset the error indication */ - write_zsreg(info->zs_channel, 0, ERR_RES); } else flag = 0; + if (flag) + /* reset the error indication */ + write_zsreg(info->zs_channel, 0, ERR_RES); *tty->flip.flag_buf_ptr++ = flag; *tty->flip.char_buf_ptr++ = ch; } @@ -410,7 +413,7 @@ static _INLINE_ void status_handle(struct mac_serial *info) /* * This is the serial driver's generic interrupt routine */ -void rs_interrupt(int irq, void *dev_id, struct pt_regs * regs) +static void rs_interrupt(int irq, void *dev_id, struct pt_regs * regs) { struct mac_serial *info = (struct mac_serial *) dev_id; unsigned char zs_intreg; @@ -1311,7 +1314,7 @@ static void rs_wait_until_sent(struct tty_struct *tty, int timeout) /* * rs_hangup() --- called by tty_hangup() when a hangup is signaled. */ -void rs_hangup(struct tty_struct *tty) +static void rs_hangup(struct tty_struct *tty) { struct mac_serial * info = (struct mac_serial *)tty->driver_data; @@ -1464,7 +1467,7 @@ static int block_til_ready(struct tty_struct *tty, struct file * filp, * the IRQ chain. It also performs the serial-specific * initialization for the tty structure. */ -int rs_open(struct tty_struct *tty, struct file * filp) +static int rs_open(struct tty_struct *tty, struct file * filp) { struct mac_serial *info; int retval, line; @@ -1579,10 +1582,6 @@ probe_sccs() + ch->addrs[0].size / 2; zs_soft[n].zs_channel = &zs_channels[n]; zs_soft[n].irq = ch->intrs[0].line; - if (request_irq(ch->intrs[0].line, rs_interrupt, 0, - "SCC", &zs_soft[n])) - printk(KERN_ERR "macserial: can't get irq %d\n", - ch->intrs[0].line); /* XXX this assumes the prom puts chan A before B */ if (n & 1) zs_soft[n].zs_chan_a = &zs_channels[n-1]; @@ -1599,14 +1598,14 @@ probe_sccs() } /* rs_init inits the driver */ -int rs_init(void) +int macserial_init(void) { int channel, i; unsigned long flags; struct mac_serial *info; /* Setup base handler, and timer table. */ - init_bh(SERIAL_BH, do_serial_bh); + init_bh(MACSERIAL_BH, do_serial_bh); timer_table[RS_TIMER].fn = rs_timer; timer_table[RS_TIMER].expires = 0; @@ -1614,6 +1613,14 @@ int rs_init(void) if (zs_chain == 0) probe_sccs(); + /* Register the interrupt handler for each one */ + for (i = 0; i < zs_channels_found; ++i) { + if (request_irq(zs_soft[i].irq, rs_interrupt, 0, + "SCC", &zs_soft[i])) + printk(KERN_ERR "macserial: can't get irq %d\n", + zs_soft[i].irq); + } + show_serial_version(); /* Initialize the tty_driver structure */ @@ -1673,6 +1680,7 @@ int rs_init(void) for (channel = 0; channel < zs_channels_found; ++channel) { #ifdef CONFIG_KGDB if (zs_soft[channel].kgdb_channel) { + kgdb_interruptible(1); continue; } #endif @@ -1722,6 +1730,7 @@ int rs_init(void) return 0; } +#if 0 /* * register_serial and unregister_serial allows for serial ports to be * configured at run-time, to support PCMCIA modems. @@ -1736,6 +1745,7 @@ void unregister_serial(int line) { return; } +#endif /* * ------------------------------------------------------------ @@ -1864,12 +1874,12 @@ static struct console sercons = { /* * Register console. */ -__initfunc (long serial_console_init(long kmem_start, long kmem_end)) +__initfunc (void serial_console_init(void)) { register_console(&sercons); - return kmem_start; } #endif /* ifdef CONFIG_SERIAL_CONSOLE */ + #ifdef CONFIG_KGDB /* These are for receiving and sending characters under the kgdb * source level kernel debugger. @@ -1881,6 +1891,7 @@ void putDebugChar(char kgdb_char) udelay(5); write_zsdata(chan, kgdb_char); } + char getDebugChar(void) { struct mac_zschannel *chan = zs_kgdbchan; @@ -1888,6 +1899,7 @@ char getDebugChar(void) eieio(); /*barrier();*/ return read_zsdata(chan); } + void kgdb_interruptible(int yes) { struct mac_zschannel *chan = zs_kgdbchan; @@ -1905,6 +1917,7 @@ void kgdb_interruptible(int yes) write_zsreg(chan, 1, one); write_zsreg(chan, 9, nine); } + /* This sets up the serial port we're using, and turns on * interrupts for that channel, so kgdb is usable once we're done. */ @@ -1923,23 +1936,26 @@ static inline void kgdb_chaninit(struct mac_zschannel *ms, int intson, int bps) i++; } } + /* This is called at boot time to prime the kgdb serial debugging * serial line. The 'tty_num' argument is 0 for /dev/ttya and 1 * for /dev/ttyb which is determined in setup_arch() from the * boot command line flags. + * XXX at the moment probably only channel A will work */ __initfunc(void zs_kgdb_hook(int tty_num)) { /* Find out how many Z8530 SCCs we have */ if (zs_chain == 0) probe_sccs(); - zs_soft[tty_num].zs_channel = &zs_channels[tty_num]; + zs_kgdbchan = zs_soft[tty_num].zs_channel; zs_soft[tty_num].change_needed = 0; zs_soft[tty_num].clk_divisor = 16; zs_soft[tty_num].zs_baud = 38400; zs_soft[tty_num].kgdb_channel = 1; /* This runs kgdb */ zs_soft[tty_num ^ 1].kgdb_channel = 0; /* This does not */ + /* Turn on transmitter/receiver at 8-bits/char */ kgdb_chaninit(zs_soft[tty_num].zs_channel, 1, 38400); printk("KGDB: on channel %d initialized\n", tty_num); diff --git a/drivers/macintosh/mediabay.c b/drivers/macintosh/mediabay.c index 6e39367e0..53f7ab62e 100644 --- a/drivers/macintosh/mediabay.c +++ b/drivers/macintosh/mediabay.c @@ -21,6 +21,7 @@ #include <asm/io.h> #include <asm/ohare.h> #include <asm/mediabay.h> +#include <asm/init.h> struct media_bay_hw { unsigned char b0; @@ -85,6 +86,8 @@ static void set_media_bay(int id); * Therefore we do it all by polling the media bay once each tick. */ +__pmac /* I don't know of any chrp with a mediabay -- Cort */ + void media_bay_init(void) { diff --git a/drivers/macintosh/nvram.c b/drivers/macintosh/nvram.c index 004d15424..ad06d3f85 100644 --- a/drivers/macintosh/nvram.c +++ b/drivers/macintosh/nvram.c @@ -9,9 +9,12 @@ #include <linux/nvram.h> #include <linux/init.h> #include <asm/uaccess.h> +#include <asm/init.h> #define NVRAM_SIZE 8192 +__openfirmware + static long long nvram_llseek(struct file *file, loff_t offset, int origin) { switch (origin) { diff --git a/drivers/macintosh/platinum.c b/drivers/macintosh/platinum.c deleted file mode 100644 index d35961d79..000000000 --- a/drivers/macintosh/platinum.c +++ /dev/null @@ -1,631 +0,0 @@ -/* - * platinum.c: Console support for PowerMac "platinum" display adaptor. - * - * Copyright (C) 1996 Paul Mackerras and Mark Abene. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <linux/kernel.h> -#include <linux/sched.h> -#include <linux/delay.h> -#include <linux/string.h> -#include <linux/vc_ioctl.h> -#include <linux/nvram.h> -#include <asm/prom.h> -#include <asm/io.h> -#include <asm/pgtable.h> -#include <linux/selection.h> -#include "pmac-cons.h" -#include "platinum.h" - -/* - * Structure of the registers for the DACula colormap device. - */ -struct cmap_regs { - unsigned char addr; - char pad1[15]; - unsigned char d1; - char pad2[15]; - unsigned char d2; - char pad3[15]; - unsigned char lut; - char pad4[15]; -}; - -/* - * Structure of the registers for the "platinum" display adaptor". - */ -#define PAD(x) char x[12] - -struct preg { /* padded register */ - unsigned r; - char pad[12]; -}; - -struct platinum_regs { - struct preg reg[128]; -}; - -static void set_platinum_clock(unsigned char *clksel); -static int read_platinum_sense(void); -static int platinum_vram_reqd(int vmode, int cmode); - -static int total_vram; /* total amount of video memory, bytes */ -static unsigned char *frame_buffer; -static unsigned char *base_frame_buffer; -static struct cmap_regs *cmap_regs; -static volatile struct platinum_regs *plat_regs; - -static unsigned long frame_buffer_phys; -static unsigned long cmap_regs_phys; -static unsigned long plat_regs_phys; - -/* - * Register initialization tables for the platinum display. - * - * It seems that there are two different types of platinum display - * out there. Older ones use the values in clocksel[1], for which - * the formula for the clock frequency seems to be - * F = 14.3MHz * c0 / (c1 & 0x1f) / (1 << (c1 >> 5)) - * Newer ones use the values in clocksel[0], for which the formula - * seems to be - * F = 15MHz * c0 / ((c1 & 0x1f) + 2) / (1 << (c1 >> 5)) - */ -struct plat_regvals { - int fb_offset; - int pitch[3]; - unsigned regs[26]; - unsigned char plat_offset[3]; - unsigned char mode[3]; - unsigned char dacula_ctrl[3]; - unsigned char clocksel[2][2]; -}; - -#define DIV2 0x20 -#define DIV4 0x40 -#define DIV8 0x60 -#define DIV16 0x80 - -/* 1280x1024, 75Hz (20) */ -static struct plat_regvals platinum_reg_init_20 = { - 0x5c00, - { 1312, 2592, 2592 }, - { 0xffc, 4, 0, 0, 0, 0, 0x428, 0, - 0, 0xb3, 0xd3, 0x12, 0x1a5, 0x23, 0x28, 0x2d, - 0x5e, 0x19e, 0x1a4, 0x854, 0x852, 4, 9, 0x50, - 0x850, 0x851 }, { 0x58, 0x5d, 0x5d }, - { 0, 0xff, 0xff }, { 0x51, 0x55, 0x55 }, - {{ 45, 3 }, { 66, 7 }} -}; - -/* 1280x960, 75Hz (19) */ -static struct plat_regvals platinum_reg_init_19 = { - 0x5c00, - { 1312, 2592, 2592 }, - { 0xffc, 4, 0, 0, 0, 0, 0x428, 0, - 0, 0xb2, 0xd2, 0x12, 0x1a3, 0x23, 0x28, 0x2d, - 0x5c, 0x19c, 0x1a2, 0x7d0, 0x7ce, 4, 9, 0x4c, - 0x7cc, 0x7cd }, { 0x56, 0x5b, 0x5b }, - { 0, 0xff, 0xff }, { 0x51, 0x55, 0x55 }, - {{ 42, 3 }, { 44, 5 }} -}; - -/* 1152x870, 75Hz (18) */ -static struct plat_regvals platinum_reg_init_18 = { - 0x11b0, - { 1184, 2336, 4640 }, - { 0xff0, 4, 0, 0, 0, 0, 0x38f, 0, - 0, 0x294, 0x16c, 0x20, 0x2d7, 0x3f, 0x49, 0x53, - 0x82, 0x2c2, 0x2d6, 0x726, 0x724, 4, 9, 0x52, - 0x71e, 0x722 }, { 0x74, 0x7c, 0x81 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 26, 0 + DIV2 }, { 42, 6 }} -}; - -/* 1024x768, 75Hz (17) */ -static struct plat_regvals platinum_reg_init_17 = { - 0x10b0, - { 1056, 2080, 4128 }, - { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, - 0, 0x254, 0x14b, 0x18, 0x295, 0x2f, 0x32, 0x3b, - 0x80, 0x280, 0x296, 0x648, 0x646, 4, 9, 0x40, - 0x640, 0x644 }, { 0x72, 0x7a, 0x7f }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 54, 3 + DIV2 }, { 67, 12 }} -}; - -/* 1024x768, 75Hz (16) */ -static struct plat_regvals platinum_reg_init_16 = { - 0x10b0, - { 1056, 2080, 4128 }, - { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, - 0, 0x250, 0x147, 0x17, 0x28f, 0x2f, 0x35, 0x47, - 0x82, 0x282, 0x28e, 0x640, 0x63e, 4, 9, 0x3c, - 0x63c, 0x63d }, { 0x74, 0x7c, 0x81 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 20, 0 + DIV2 }, { 11, 2 }} -}; - -/* 1024x768, 70Hz (15) */ -static struct plat_regvals platinum_reg_init_15 = { - 0x10b0, - { 1056, 2080, 4128 }, - { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, - 0, 0x254, 0x14b, 0x22, 0x297, 0x43, 0x49, 0x5b, - 0x86, 0x286, 0x296, 0x64c, 0x64a, 0xa, 0xf, 0x44, - 0x644, 0x646 }, { 0x78, 0x80, 0x85 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 19, 0 + DIV2 }, { 110, 21 }} -}; - -/* 1024x768, 60Hz (14) */ -static struct plat_regvals platinum_reg_init_14 = { - 0x10b0, - { 1056, 2080, 4128 }, - { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, - 0, 0x25a, 0x14f, 0x22, 0x29f, 0x43, 0x49, 0x5b, - 0x8e, 0x28e, 0x29e, 0x64c, 0x64a, 0xa, 0xf, 0x44, - 0x644, 0x646 }, { 0x80, 0x88, 0x8d }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 71, 6 + DIV2 }, { 118, 13 + DIV2 }} -}; - -/* 832x624, 75Hz (13) */ -static struct plat_regvals platinum_reg_init_13 = { - 0x70, - { 864, 1680, 3360 }, /* MacOS does 1680 instead of 1696 to fit 16bpp in 1MB */ - { 0xff0, 4, 0, 0, 0, 0, 0x299, 0, - 0, 0x21e, 0x120, 0x10, 0x23f, 0x1f, 0x25, 0x37, - 0x8a, 0x22a, 0x23e, 0x536, 0x534, 4, 9, 0x52, - 0x532, 0x533 }, { 0x7c, 0x84, 0x89 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 30, 0 + DIV4 }, { 56, 7 + DIV2 }} -}; - -/* 800x600, 75Hz (12) */ -static struct plat_regvals platinum_reg_init_12 = { - 0x1010, - { 832, 1632, 3232 }, - { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, - 0, 0x1ce, 0x108, 0x14, 0x20f, 0x27, 0x30, 0x39, - 0x72, 0x202, 0x20e, 0x4e2, 0x4e0, 4, 9, 0x2e, - 0x4de, 0x4df }, { 0x64, 0x6c, 0x71 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 122, 7 + DIV4 }, { 62, 9 + DIV2 }} -}; - -/* 800x600, 72Hz (11) */ -static struct plat_regvals platinum_reg_init_11 = { - 0x1010, - { 832, 1632, 3232 }, - { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, - 0, 0x1ca, 0x104, 0x1e, 0x207, 0x3b, 0x44, 0x4d, - 0x56, 0x1e6, 0x206, 0x534, 0x532, 0xa, 0xe, 0x38, - 0x4e8, 0x4ec }, { 0x48, 0x50, 0x55 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 26, 0 + DIV4 }, { 42, 6 + DIV2 }} -}; - -/* 800x600, 60Hz (10) */ -static struct plat_regvals platinum_reg_init_10 = { - 0x1010, - { 832, 1632, 3232 }, - { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, - 0, 0x1ce, 0x108, 0x20, 0x20f, 0x3f, 0x45, 0x5d, - 0x66, 0x1f6, 0x20e, 0x4e8, 0x4e6, 6, 0xa, 0x34, - 0x4e4, 0x4e5 }, { 0x58, 0x60, 0x65 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 54, 3 + DIV4 }, { 95, 1 + DIV8 }} -}; - -/* 800x600, 56Hz (9) --unsupported? copy of mode 10 for now... */ -static struct plat_regvals platinum_reg_init_9 = { - 0x1010, - { 832, 1632, 3232 }, - { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, - 0, 0x1ce, 0x108, 0x20, 0x20f, 0x3f, 0x45, 0x5d, - 0x66, 0x1f6, 0x20e, 0x4e8, 0x4e6, 6, 0xa, 0x34, - 0x4e4, 0x4e5 }, { 0x58, 0x60, 0x65 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 54, 3 + DIV4 }, { 88, 1 + DIV8 }} -}; - -/* 768x576, 50Hz Interlaced-PAL (8) */ -static struct plat_regvals platinum_reg_init_8 = { - 0x1010, - { 800, 1568, 3104 }, - { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, - 0, 0xc8, 0xec, 0x11, 0x1d7, 0x22, 0x25, 0x36, - 0x47, 0x1c7, 0x1d6, 0x271, 0x270, 4, 9, 0x27, - 0x267, 0x26b }, { 0x39, 0x41, 0x46 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 31, 0 + DIV16 }, { 74, 9 + DIV8 }} -}; - -/* 640x870, 75Hz Portrait (7) */ -static struct plat_regvals platinum_reg_init_7 = { - 0xb10, - { 672, 1312, 2592 }, - { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, - 0, 0x176, 0xd0, 0x14, 0x19f, 0x27, 0x2d, 0x3f, - 0x4a, 0x18a, 0x19e, 0x72c, 0x72a, 4, 9, 0x58, - 0x724, 0x72a }, { 0x3c, 0x44, 0x49 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 30, 0 + DIV4 }, { 56, 7 + DIV2 }} -}; - -/* 640x480, 67Hz (6) */ -static struct plat_regvals platinum_reg_init_6 = { - 0x1010, - { 672, 1312, 2592 }, - { 0xff0, 4, 0, 0, 0, 0, 0x209, 0, - 0, 0x18e, 0xd8, 0x10, 0x1af, 0x1f, 0x25, 0x37, - 0x4a, 0x18a, 0x1ae, 0x41a, 0x418, 4, 9, 0x52, - 0x412, 0x416 }, { 0x3c, 0x44, 0x49 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 99, 4 + DIV8 }, { 42, 5 + DIV4 }} -}; - -/* 640x480, 60Hz (5) */ -static struct plat_regvals platinum_reg_init_5 = { - 0x1010, - { 672, 1312, 2592 }, - { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, - 0, 0x15e, 0xc8, 0x18, 0x18f, 0x2f, 0x35, 0x3e, - 0x42, 0x182, 0x18e, 0x41a, 0x418, 2, 7, 0x44, - 0x404, 0x408 }, { 0x34, 0x3c, 0x41 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 26, 0 + DIV8 }, { 14, 2 + DIV4 }} -}; - -/* 640x480, 60Hz Interlaced-NTSC (4) */ -static struct plat_regvals platinum_reg_init_4 = { - 0x1010, - { 672, 1312, 2592 }, - { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, - 0, 0xa5, 0xc3, 0xe, 0x185, 0x1c, 0x1f, 0x30, - 0x37, 0x177, 0x184, 0x20d, 0x20c, 5, 0xb, 0x23, - 0x203, 0x206 }, { 0x29, 0x31, 0x36 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 94, 5 + DIV16 }, { 48, 7 + DIV8 }} -}; - -/* 640x480, 50Hz Interlaced-PAL (3) */ -static struct plat_regvals platinum_reg_init_3 = { - 0x1010, - { 672, 1312, 2592 }, - { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, - 0, 0xc8, 0xec, 0x11, 0x1d7, 0x22, 0x25, 0x36, - 0x67, 0x1a7, 0x1d6, 0x271, 0x270, 4, 9, 0x57, - 0x237, 0x26b }, { 0x59, 0x61, 0x66 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 31, 0 + DIV16 }, { 74, 9 + DIV8 }} -}; - -/* 512x384, 60Hz (2) */ -static struct plat_regvals platinum_reg_init_2 = { - 0x1010, - { 544, 1056, 2080 }, - { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, - 0, 0x25c, 0x140, 0x10, 0x27f, 0x1f, 0x2b, 0x4f, - 0x68, 0x268, 0x27e, 0x32e, 0x32c, 4, 9, 0x2a, - 0x32a, 0x32b }, { 0x5a, 0x62, 0x67 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 33, 2 + DIV8 }, { 79, 9 + DIV8 }} -}; - -/* 512x384, 60Hz Interlaced-NTSC (1) */ -static struct plat_regvals platinum_reg_init_1 = { - 0x1010, - { 544, 1056, 2080 }, - { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, - 0, 0xa5, 0xc3, 0xe, 0x185, 0x1c, 0x1f, 0x30, - 0x57, 0x157, 0x184, 0x20d, 0x20c, 5, 0xb, 0x53, - 0x1d3, 0x206 }, { 0x49, 0x51, 0x56 }, - { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, - {{ 94, 5 + DIV16 }, { 48, 7 + DIV8 }} -}; - -static struct plat_regvals *platinum_reg_init[VMODE_MAX] = { - &platinum_reg_init_1, - &platinum_reg_init_2, - &platinum_reg_init_3, - &platinum_reg_init_4, - &platinum_reg_init_5, - &platinum_reg_init_6, - &platinum_reg_init_7, - &platinum_reg_init_8, - &platinum_reg_init_9, - &platinum_reg_init_10, - &platinum_reg_init_11, - &platinum_reg_init_12, - &platinum_reg_init_13, - &platinum_reg_init_14, - &platinum_reg_init_15, - &platinum_reg_init_16, - &platinum_reg_init_17, - &platinum_reg_init_18, - &platinum_reg_init_19, - &platinum_reg_init_20 -}; - -/* - * Get the monitor sense value. - */ -static int -read_platinum_sense() -{ - int sense; - - plat_regs->reg[23].r = 7; /* turn off drivers */ - eieio(); __delay(2000); - sense = (~plat_regs->reg[23].r & 7) << 8; - - /* drive each sense line low in turn and collect the other 2 */ - plat_regs->reg[23].r = 3; /* drive A low */ - eieio(); __delay(2000); - sense |= (~plat_regs->reg[23].r & 3) << 4; - eieio(); - plat_regs->reg[23].r = 5; /* drive B low */ - eieio(); __delay(2000); - sense |= (~plat_regs->reg[23].r & 4) << 1; - sense |= (~plat_regs->reg[23].r & 1) << 2; - eieio(); - plat_regs->reg[23].r = 6; /* drive C low */ - eieio(); __delay(2000); - sense |= (~plat_regs->reg[23].r & 6) >> 1; - eieio(); - - plat_regs->reg[23].r = 7; /* turn off drivers */ - return sense; -} - -static inline int platinum_vram_reqd(int vmode, int cmode) -{ - return vmode_attrs[vmode-1].vres - * platinum_reg_init[vmode-1]->pitch[cmode]; -} - -void -map_platinum(struct device_node *dp) -{ - int i, sense; - unsigned long addr, size; - int bank0, bank1, bank2, bank3; - - if (dp->next != 0) - printk("Warning: only using first platinum display device\n"); - if (dp->n_addrs != 2) - panic("expecting 2 addresses for platinum (got %d)", - dp->n_addrs); - - /* Map in frame buffer and registers */ - for (i = 0; i < dp->n_addrs; ++i) { - addr = dp->addrs[i].address; - size = dp->addrs[i].size; - if (size >= 0x400000) { - /* frame buffer - map only 4MB */ - frame_buffer_phys = addr; - frame_buffer = __ioremap(addr, 0x400000, _PAGE_WRITETHRU); - base_frame_buffer = frame_buffer; - } else { - /* registers */ - plat_regs_phys = addr; - plat_regs = ioremap(addr, size); - } - } - cmap_regs_phys = 0xf301b000; /* XXX not in prom? */ - cmap_regs = ioremap(cmap_regs_phys, 0x1000); - - /* Grok total video ram */ - plat_regs->reg[16].r = (unsigned)frame_buffer; - plat_regs->reg[20].r = 0x1011; /* select max vram */ - plat_regs->reg[24].r = 0; /* switch in vram */ - eieio(); - frame_buffer[0x100000] = 0x34; - frame_buffer[0x200000] = 0x56; - frame_buffer[0x300000] = 0x78; - eieio(); - bank0 = 1; /* builtin 1MB vram, always there */ - bank1 = frame_buffer[0x100000] == 0x34; - bank2 = frame_buffer[0x200000] == 0x56; - bank3 = frame_buffer[0x300000] == 0x78; - total_vram = (bank0 + bank1 + bank2 + bank3) * 0x100000; - printk("Total VRAM = %dMB\n", total_vram / 1024 / 1024); - - sense = read_platinum_sense(); - if (video_mode == VMODE_NVRAM) { - video_mode = nvram_read_byte(NV_VMODE); - if (video_mode <= 0 || video_mode > VMODE_MAX - || platinum_reg_init[video_mode-1] == 0) - video_mode = VMODE_CHOOSE; - } - if (video_mode == VMODE_CHOOSE) - video_mode = map_monitor_sense(sense); - if (platinum_reg_init[video_mode-1] == 0) - video_mode = VMODE_640_480_60; - printk("Monitor sense value = 0x%x, ", sense); - - if (color_mode == CMODE_NVRAM) - color_mode = nvram_read_byte(NV_CMODE); - if (color_mode < CMODE_8 || color_mode > CMODE_32) - color_mode = CMODE_8; - /* - * Reduce the pixel size if we don't have enough VRAM. - */ - while (color_mode > CMODE_8 - && platinum_vram_reqd(video_mode, color_mode) > total_vram) - --color_mode; - /* - * Reduce the video mode if we don't have enough VRAM. - */ - while (platinum_vram_reqd(video_mode, color_mode) > total_vram) - --video_mode; -} - -#define STORE_D2(a, v) { \ - out_8(&cmap_regs->addr, (a+32)); \ - out_8(&cmap_regs->d2, (v)); \ -} - -static void -set_platinum_clock(unsigned char *clksel) -{ - STORE_D2(6, 0xc6); - out_8(&cmap_regs->addr, 3+32); - if (cmap_regs->d2 == 2) { - STORE_D2(7, clksel[0]); - STORE_D2(8, clksel[1]); - STORE_D2(3, 3); - } else { - STORE_D2(4, clksel[0]); - STORE_D2(5, clksel[1]); - STORE_D2(3, 2); - } - __delay(5000); - STORE_D2(9, 0xa6); -} - -void -platinum_init() -{ - int i, yoff, width, clkmode, dtype; - struct plat_regvals *init; - unsigned *p; - int one_mb = 0; - - if (total_vram == 0x100000) one_mb=1; - - if (video_mode <= 0 || video_mode > VMODE_MAX - || (init = platinum_reg_init[video_mode-1]) == 0) - panic("platinum: video mode %d not supported", video_mode); - - frame_buffer = base_frame_buffer + init->fb_offset; - /* printk("Frame buffer start address is %p\n", frame_buffer); */ - - pixel_size = 1 << color_mode; - line_pitch = init->pitch[color_mode]; - width = vmode_attrs[video_mode-1].hres; - n_scanlines = vmode_attrs[video_mode-1].vres; - row_pitch = line_pitch * 16; - - /* Initialize display timing registers */ - out_be32(&plat_regs->reg[24].r, 7); /* turn display off */ - - for (i = 0; i < 26; ++i) - plat_regs->reg[i+32].r = init->regs[i]; - plat_regs->reg[26+32].r = (one_mb ? init->plat_offset[color_mode] + 4 - color_mode : init->plat_offset[color_mode]); - plat_regs->reg[16].r = (unsigned) frame_buffer; - plat_regs->reg[18].r = line_pitch; - plat_regs->reg[19].r = (one_mb ? init->mode[color_mode+1] : init->mode[color_mode]); - plat_regs->reg[20].r = (one_mb ? 0x11 : 0x1011); - plat_regs->reg[21].r = 0x100; - plat_regs->reg[22].r = 1; - plat_regs->reg[23].r = 1; - plat_regs->reg[26].r = 0xc00; - plat_regs->reg[27].r = 0x235; - /* plat_regs->reg[27].r = 0x2aa; */ - - STORE_D2(0, (one_mb ? init->dacula_ctrl[color_mode] & 0xf : init->dacula_ctrl[color_mode])); - STORE_D2(1, 4); - STORE_D2(2, 0); - /* - * Try to determine whether we have an old or a new DACula. - */ - out_8(&cmap_regs->addr, 0x40); - dtype = cmap_regs->d2; - switch (dtype) { - case 0x3c: - clkmode = 1; - break; - case 0x84: - clkmode = 0; - break; - default: - clkmode = 0; - printk("Unknown DACula type: %x\n", cmap_regs->d2); - } - set_platinum_clock(init->clocksel[clkmode]); - - out_be32(&plat_regs->reg[24].r, 0); /* turn display on */ - - pmac_init_palette(); - - yoff = (n_scanlines % 16) / 2; - fb_start = frame_buffer + yoff * line_pitch + 0x10; - - /* Clear screen */ - p = (unsigned *) (frame_buffer + 0x10); - for (i = n_scanlines * line_pitch / sizeof(unsigned); i != 0; --i) - *p++ = 0; - - display_info.height = n_scanlines; - display_info.width = width; - display_info.depth = 8 * pixel_size; - display_info.pitch = line_pitch; - display_info.mode = video_mode; - strncpy(display_info.name, "platinum", sizeof(display_info.name)); - display_info.fb_address = frame_buffer_phys + init->fb_offset + 0x10; - display_info.cmap_adr_address = cmap_regs_phys; - display_info.cmap_data_address = cmap_regs_phys + 0x30; - display_info.disp_reg_address = plat_regs_phys; -} - -int -platinum_setmode(struct vc_mode *mode, int doit) -{ - int cmode; - - if (mode->mode <= 0 || mode->mode > VMODE_MAX - || platinum_reg_init[mode->mode-1] == 0) - return -EINVAL; - if (mode->depth != 8 && mode->depth != 16 && mode->depth != 24 && mode->depth != 32) - return -EINVAL; - - switch (mode->depth) { - case 24: - case 32: - cmode = CMODE_32; - break; - case 16: - cmode = CMODE_16; - break; - case 8: - cmode = CMODE_8; - break; - default: - return -EINVAL; - } - - if (platinum_vram_reqd(mode->mode, cmode) > total_vram) - return -EINVAL; - - if (doit) { - video_mode = mode->mode; - color_mode = cmode; - platinum_init(); - } - return 0; -} - -void -platinum_set_palette(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors) -{ - int i; - - for (i = 0; i < ncolors; ++i) { - cmap_regs->addr = index + i; eieio(); - cmap_regs->lut = red[i]; eieio(); - cmap_regs->lut = green[i]; eieio(); - cmap_regs->lut = blue[i]; eieio(); - } -} - -void -platinum_set_blanking(int blank_mode) -{ -} diff --git a/drivers/macintosh/platinum.h b/drivers/macintosh/platinum.h deleted file mode 100644 index 530a89c4c..000000000 --- a/drivers/macintosh/platinum.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Exported procedures for the PowerMac "platinum" display adaptor. - * - * Copyright (C) 1996 Paul Mackerras and Mark Abene. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -extern void map_platinum(struct device_node *); -extern void platinum_init(void); -extern int platinum_setmode(struct vc_mode *mode, int doit); -extern void platinum_set_palette(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors); -extern void platinum_set_blanking(int blank_mode); diff --git a/drivers/macintosh/pmac-cons.c b/drivers/macintosh/pmac-cons.c deleted file mode 100644 index 731d19fe2..000000000 --- a/drivers/macintosh/pmac-cons.c +++ /dev/null @@ -1,1382 +0,0 @@ -/* - * pmac-cons.c: Console support for PowerMac (PCI-based). - * - * Copyright (C) 1996 Paul Mackerras. - * 7200/Platinum code hacked by Mark Abene. - */ -#include <linux/config.h> -#include <linux/kernel.h> -#include <linux/tty.h> -#include <linux/mm.h> -#include <linux/sched.h> -#include <linux/delay.h> -#include <linux/string.h> -#include <linux/vc_ioctl.h> -#include <linux/kd.h> -#include <linux/version.h> -#include <asm/processor.h> -#include <asm/prom.h> -#include <asm/pgtable.h> -#include <asm/io.h> -#include <asm/uaccess.h> -#include <asm/adb.h> -#include <asm/cuda.h> -#define INCLUDE_LINUX_LOGO_DATA -#include <asm/linux_logo.h> -#include <linux/selection.h> -#include <linux/console_struct.h> -#include <linux/vt_kern.h> -#include "../char/console_macros.h" -#include "pmac-cons.h" -#include "control.h" -#include "platinum.h" -#include "valkyrie.h" -#include "chips.h" -#ifdef CONFIG_ATY_VIDEO -#include "aty.h" -#endif -#ifdef CONFIG_IMSTT_VIDEO -#include "imstt.h" -#endif - -int video_mode = VMODE_NVRAM; -int color_mode = CMODE_NVRAM; - -/* - * The format of "screen_info" is strange, and due to early - * i386-setup code. This is just enough to make the console - * code think we're on a EGA+ colour display. - */ -struct screen_info screen_info = { - 0, 0, /* orig-x, orig-y */ - {0, 0}, /* unused1 */ - 0, /* orig-video-page */ - 0, /* orig-video-mode */ - 80, /* orig-video-cols */ - 0, /* unused [short] */ - 0, /* ega_bx */ - 0, /* unused [short] */ - 25, /* orig-video-lines */ - 0, /* isVGA */ - 16 /* video points */ -}; - -/* - * We allocate enough character+attribute memory for the largest - * screen resolution supported. - */ -#define MAX_TEXT_COLS (1280/8) -#define MAX_TEXT_ROWS (1024/16) - -/* - * We get a sense value from the monitor and use it to choose - * what resolution to use. This structure maps sense values - * to display mode values (which determine the resolution and - * frequencies). - */ -struct mon_map { - int sense; - int vmode; -} monitor_map [] = { - {0x000, VMODE_1280_1024_75}, /* 21" RGB */ - {0x114, VMODE_640_870_75P}, /* Portrait Monochrome */ - {0x221, VMODE_512_384_60}, /* 12" RGB*/ - {0x331, VMODE_1280_1024_75}, /* 21" RGB (Radius) */ - {0x334, VMODE_1280_1024_75}, /* 21" mono (Radius) */ - {0x335, VMODE_1280_1024_75}, /* 21" mono */ - {0x40A, VMODE_640_480_60I}, /* NTSC */ - {0x51E, VMODE_640_870_75P}, /* Portrait RGB */ - {0x603, VMODE_832_624_75}, /* 12"-16" multiscan */ - {0x60b, VMODE_1024_768_70}, /* 13"-19" multiscan */ - {0x623, VMODE_1152_870_75}, /* 13"-21" multiscan */ - {0x62b, VMODE_640_480_67}, /* 13"/14" RGB */ - {0x700, VMODE_640_480_50I}, /* PAL */ - {0x714, VMODE_640_480_60I}, /* NTSC */ - {0x717, VMODE_800_600_75}, /* VGA */ - {0x72d, VMODE_832_624_75}, /* 16" RGB (Goldfish) */ - {0x730, VMODE_768_576_50I}, /* PAL (Alternate) */ - {0x73a, VMODE_1152_870_75}, /* 3rd party 19" */ - {0x73f, VMODE_640_480_67}, /* no sense lines connected at all */ - {-1, VMODE_640_480_60}, /* catch-all, must be last */ -}; - -int -map_monitor_sense(int sense) -{ - struct mon_map *map; - - for (map = monitor_map; map->sense >= 0; ++map) - if (map->sense == sense) - break; - return map->vmode; -} - -/* - * Horizontal and vertical resolution for each mode. - */ -struct vmode_attr vmode_attrs[VMODE_MAX] = { - {512, 384, 60, 1}, - {512, 384, 60}, - {640, 480, 50, 1}, - {640, 480, 60, 1}, - {640, 480, 60}, - {640, 480, 67}, - {640, 870, 75}, - {768, 576, 50, 1}, - {800, 600, 56}, - {800, 600, 60}, - {800, 600, 72}, - {800, 600, 75}, - {832, 624, 75}, - {1024, 768, 60}, - {1024, 768, 72}, - {1024, 768, 75}, - {1024, 768, 75}, - {1152, 870, 75}, - {1280, 960, 75}, - {1280, 1024, 75} -}; - -static void invert_cursor(int); -static int map_unknown(struct device_node *); -static void unknown_init(void); -static void unknown_set_palette(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors); - -struct display_interface { - char *name; - void (*map_interface)(struct device_node *); - void (*init_interface)(void); - int (*setmode)(struct vc_mode *, int); - void (*set_palette)(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors); - void (*set_blanking)(int blank_mode); -} displays[] = { -#ifdef CONFIG_CONTROL_VIDEO - { "control", map_control_display, control_init, - control_setmode, control_set_palette, control_set_blanking }, -#endif -#ifdef CONFIG_PLATINUM_VIDEO - { "platinum", map_platinum, platinum_init, - platinum_setmode, platinum_set_palette, platinum_set_blanking }, -#endif -#ifdef CONFIG_VALKYRIE_VIDEO - { "valkyrie", map_valkyrie_display, valkyrie_init, - valkyrie_setmode, valkyrie_set_palette, valkyrie_set_blanking }, -#endif -#ifdef CONFIG_CHIPS_VIDEO - { "chips65550", map_chips_display, chips_init, - chips_setmode, chips_set_palette, chips_set_blanking }, -#endif -#ifdef CONFIG_ATY_VIDEO - { "ATY,mach64", map_aty_display, aty_init, - aty_setmode, aty_set_palette, aty_set_blanking }, - { "ATY,XCLAIM", map_aty_display, aty_init, - aty_setmode, aty_set_palette, aty_set_blanking }, - { "ATY,264VT", map_aty_display, aty_init, - aty_setmode, aty_set_palette, aty_set_blanking }, - { "ATY,mach64ii", map_aty_display, aty_init, - aty_setmode, aty_set_palette, aty_set_blanking }, - { "ATY,264GT-B", map_aty_display, aty_init, - aty_setmode, aty_set_palette, aty_set_blanking }, - { "ATY,mach64_3D_pcc", map_aty_display, aty_init, - aty_setmode, aty_set_palette, aty_set_blanking }, - { "ATY,XCLAIM3D", map_aty_display, aty_init, - aty_setmode, aty_set_palette, aty_set_blanking }, - { "ATY,XCLAIMVR", map_aty_display, aty_init, - aty_setmode, aty_set_palette, aty_set_blanking }, -#if 0 /* problematic */ - { "ATY,RAGEII_M", map_aty_display, aty_init, - aty_setmode, aty_set_palette, aty_set_blanking }, -#endif - { "ATY,XCLAIMVRPro", map_aty_display, aty_init, - aty_setmode, aty_set_palette, aty_set_blanking }, - { "ATY,mach64_3DU", map_aty_display, aty_init, - aty_setmode, aty_set_palette, aty_set_blanking }, -#endif -#ifdef CONFIG_IMSTT_VIDEO - { "IMS,tt128mb", map_imstt_display_ibm, imstt_init, - imstt_setmode, imstt_set_palette_ibm, imstt_set_blanking }, - { "IMS,tt128mb8", map_imstt_display_tvp, imstt_init, - imstt_setmode, imstt_set_palette_tvp, imstt_set_blanking }, - { "IMS,tt128mb8A", map_imstt_display_tvp, imstt_init, - imstt_setmode, imstt_set_palette_tvp, imstt_set_blanking }, -#endif - { NULL } -}; - -struct display_interface unknown_display = { - "unknown", NULL, unknown_init, NULL, unknown_set_palette, NULL -}; - -static struct display_interface *current_display; - -static int cursor_pos = -1; -static unsigned *cursor_fb; /* address of cursor pos in frame buffer */ -static unsigned cursor_bits; /* bits changed to turn cursor on */ - -int pixel_size; /* in bytes */ -int n_scanlines; /* # of scan lines */ -int line_pitch; /* # bytes in 1 scan line */ -int row_pitch; /* # bytes in 1 row of characters */ -unsigned char *fb_start; /* addr of top left pixel of top left char */ -struct vc_mode display_info; - -#define cmapsz (16*256) -extern unsigned char vga_font[cmapsz]; - -static inline unsigned pixel32(int currcons, int cidx) -{ - cidx *= 3; - return (palette[cidx] << 16) | (palette[cidx + 1] << 8) - | palette[cidx + 2]; -} - -static inline unsigned pixel16(int currcons, int cidx) -{ - unsigned p; - - p = ((cidx << 10) & 0x7c00) + ((cidx << 5) & 0x03e0) - + (cidx & 0x1f); - return (p << 16) | p; -} - -void -__set_origin(unsigned short offset) -{ -} - -static void -invert_cursor(int cpos) -{ - int row, col; - int l, c, nw; - unsigned *fb, mask; - int currcons = fg_console; /* for `color', which is a macro */ - - if (cpos == -1) { - /* turning cursor off */ - fb = cursor_fb; - mask = cursor_bits; - } else { - row = cpos / video_num_columns; - col = cpos - row * video_num_columns; - fb = (unsigned *) (fb_start + row * row_pitch - + col * pixel_size * 8); - switch (color_mode) { - case CMODE_16: - mask = pixel16(currcons, foreground) - ^ pixel16(currcons, background >> 4); - break; - default: - mask = (color ^ (color >> 4)) & 0xf; - mask |= mask << 8; - mask |= mask << 16; - break; - } - cursor_fb = fb; - cursor_bits = mask; - } - nw = pixel_size * 2; /* pixel_size * 8 (char width) / 4 */ - for (l = 0; l < 16; ++l) { - for (c = 0; c < nw; ++c) - fb[c] ^= mask; - fb = (unsigned *) ((char *)fb + line_pitch); - } -} - -void -hide_cursor() -{ - unsigned long flags; - - save_flags(flags); - cli(); - if (cursor_pos != -1) { - invert_cursor(-1); - cursor_pos = -1; - } - restore_flags(flags); -} - -void -set_cursor(int currcons) -{ - unsigned long flags; - int old_cursor; - - if (currcons != fg_console || console_blanked) - return; - - save_flags(flags); - cli(); - if (!deccm) { - hide_cursor(); - } else { - old_cursor = cursor_pos; - cursor_pos = (pos - video_mem_base) >> 1; - if (old_cursor != -1) - invert_cursor(-1); - invert_cursor(cursor_pos); - } - restore_flags(flags); -} - -/* - * NOTE: get_scrmem() and set_scrmem() are here only because - * the VGA version of set_scrmem() has some direct VGA references. - */ -void -get_scrmem(int currcons) -{ - memcpyw((unsigned short *)vc_scrbuf[currcons], - (unsigned short *)origin, video_screen_size); - origin = video_mem_start = (unsigned long)vc_scrbuf[currcons]; - scr_end = video_mem_end = video_mem_start + video_screen_size; - pos = origin + y*video_size_row + (x<<1); -} - -void -set_scrmem(int currcons, long offset) -{ - if (video_mem_term - video_mem_base < offset + video_screen_size) - offset = 0; - memcpyw((unsigned short *)(video_mem_base + offset), - (unsigned short *) origin, video_screen_size); - video_mem_start = video_mem_base; - video_mem_end = video_mem_term; - origin = video_mem_base + offset; - scr_end = origin + video_screen_size; - pos = origin + y*video_size_row + (x<<1); -} - -int -set_get_cmap(unsigned char *p, int set) -{ - int i, j, err; - - err = verify_area(set? VERIFY_READ: VERIFY_WRITE, p, 48); - if (err) - return err; - - for (i = 0; i < 16; ++i) { - if (set) { - get_user(default_red[i], p++); - get_user(default_grn[i], p++); - get_user(default_blu[i], p++); - } else { - put_user(default_red[i], p++); - put_user(default_grn[i], p++); - put_user(default_blu[i], p++); - } - } - - if (set) { - for (j = 0; j < MAX_NR_CONSOLES; ++j) { - if (!vc_cons_allocated(j)) - continue; - for (i = 0; i < 16; ++i) { - vc_cons[j].d->vc_palette[3*i+0] = default_red[i]; - vc_cons[j].d->vc_palette[3*i+1] = default_grn[i]; - vc_cons[j].d->vc_palette[3*i+2] = default_blu[i]; - } - } - set_palette(); - } - - return 0; -} - -int -set_get_font(char *p, int set, int ch512) -{ - return 0; -} - -void -set_palette() -{ - int i, j, n; - unsigned char red[16], green[16], blue[16]; - - if (console_blanked || current_display == NULL - || current_display->set_palette == NULL - || vt_cons[fg_console]->vc_mode == KD_GRAPHICS) - return; - - for (i = j = 0; i < 16; ++i) { - n = color_table[i] & 0xf; - red[n] = vc_cons[fg_console].d->vc_palette[j++]; - green[n] = vc_cons[fg_console].d->vc_palette[j++]; - blue[n] = vc_cons[fg_console].d->vc_palette[j++]; - } - (*current_display->set_palette)(red, green, blue, 0, 16); -} - -void -pmac_init_palette() -{ - int i, n; - unsigned char red[16], green[16], blue[16]; - - for (i = 0; i < 16; ++i) { - n = color_table[i] & 0xf; - red[n] = default_red[i]; - green[n] = default_grn[i]; - blue[n] = default_blu[i]; - } - (*current_display->set_palette)(red, green, blue, 0, 16); -} - -static int vesa_blanking_mode; -static int vesa_blanked; - -void -vesa_blank() -{ - if (vesa_blanking_mode == 0 || vesa_blanked - || current_display == NULL - || current_display->set_blanking == NULL) - return; - (*current_display->set_blanking)(vesa_blanking_mode); - vesa_blanked = vesa_blanking_mode; -} - -void -vesa_unblank() -{ - if (vesa_blanked == 0 - || current_display == NULL - || current_display->set_blanking == NULL) - return; - (*current_display->set_blanking)(VESA_NO_BLANKING); - vesa_blanked = VESA_NO_BLANKING; -} - -void -set_vesa_blanking(const unsigned long arg) -{ - unsigned char *argp = (unsigned char *)(arg + 1); - unsigned int mode; - - if (verify_area(VERIFY_READ, argp, 1)) - return; - - get_user(mode, argp); - vesa_blanking_mode = (mode <= VESA_POWERDOWN)? mode: \ - DEFAULT_VESA_BLANKING_MODE; -} - -void -vesa_powerdown() -{ - if (vesa_blanked == 0 || vesa_blanked == VESA_POWERDOWN - || current_display == NULL - || current_display->set_blanking == NULL) - return; - (*current_display->set_blanking)(VESA_POWERDOWN); - vesa_blanked = VESA_POWERDOWN; -} - -void -memsetw(unsigned short *p, unsigned short c, unsigned count) -{ - count /= 2; - if ((unsigned long)(p + count) > video_mem_base - && (unsigned long)p < video_mem_term) { - for (; p < (unsigned short *) video_mem_base && count != 0; --count) - *p++ = c; - for (; p < (unsigned short *) video_mem_term && count != 0; --count) { - if (*p != c) { - *p = c; - pmac_blitc(c, (unsigned long)p); - } - ++p; - } - } - for (; count != 0; --count) - *p++ = c; -} - -void -memcpyw(unsigned short *to, unsigned short *from, unsigned count) -{ - unsigned short c; - - count /= 2; - if ((unsigned long)(to + count) > video_mem_base - && (unsigned long)to < video_mem_term) { - for (; to < (unsigned short *) video_mem_base && count != 0; --count) - *to++ = *from++; - for (; to < (unsigned short *) video_mem_term && count != 0; --count) { - c = *from++; - if (*to != c) { - *to = c; - pmac_blitc(c, (unsigned long)to); - } - ++to; - } - } - for (; count != 0; --count) - *to++ = *from++; -} - -void -pmac_find_display() -{ - struct display_interface *disp; - struct device_node *dp; - struct vmode_attr *ap; - - current_display = NULL; - for (disp = displays; disp->name != NULL; ++disp) { - dp = find_devices(disp->name); - if (dp == 0) - continue; - current_display = disp; - disp->map_interface(dp); - break; - } - - if (current_display == NULL) { - /* - * We haven't found a display that we know about, - * but if there is a display with sufficient prom support, - * we may be able to use it in a limited fashion. - * If there is, it has already been opened in prom_init(). - */ - int i; - for (i = 0; i < prom_num_displays; ++i) { - dp = find_path_device(prom_display_paths[i]); - if (dp != 0 && map_unknown(dp)) { - current_display = &unknown_display; - break; - } else { - printk(KERN_INFO "Can't use %s for display\n", - prom_display_paths[i]); - } - } - } - - if (current_display == NULL - || video_mode <= 0 || video_mode > VMODE_MAX) { - printk(KERN_INFO "No usable display device found\n"); - current_display = NULL; - return; - } - ap = &vmode_attrs[video_mode - 1]; - screen_info.orig_video_cols = ap->hres / 8; - screen_info.orig_video_lines = ap->vres / 16; - printk("using video mode %d (%dx%d at %dHz%s), %d bits/pixel\n", - video_mode, ap->hres, ap->vres, ap->vfreq, - ap->interlaced? " interlaced": "", - (color_mode + 1) * 8); -} - -int -pmac_display_supported(const char *name) -{ - struct display_interface *disp; - - for (disp = displays; disp->name != NULL; ++disp) - if (strcmp(name, disp->name) == 0) - return 1; - return 0; -} - -int -console_getmode(struct vc_mode *mode) -{ - *mode = display_info; - return 0; -} - -int -console_setmode(struct vc_mode *mode, int doit) -{ - int err; - - if (current_display == NULL || current_display->setmode == NULL) - return -EINVAL; - err = (*current_display->setmode)(mode, doit); - if (doit && err == 0) - memset((void *)video_mem_base, 0, video_screen_size); - return err; -} - -int -console_setcmap(int n_entries, unsigned char *red, - unsigned char *green, unsigned char *blue) -{ - if (current_display == NULL || current_display->set_palette == NULL) - return -EOPNOTSUPP; - (*current_display->set_palette)(red, green, blue, 0, n_entries); - return 0; -} - -int -console_powermode(int mode) -{ - if (mode == VC_POWERMODE_INQUIRY) - return vesa_blanked; - if (mode < VESA_NO_BLANKING || mode > VESA_POWERDOWN) - return -EINVAL; - if (current_display == NULL || current_display->set_blanking == NULL) - return mode == VESA_NO_BLANKING? 0: -ENXIO; - (*current_display->set_blanking)(mode); - vesa_blanked = mode; - return 0; -} - -void -pmac_vmode_setup(char *str, int *ints) -{ - if (ints[0] >= 1) - video_mode = ints[1]; - if (ints[0] >= 2) - color_mode = ints[2]; -} - -unsigned long -con_type_init(unsigned long mem_start, const char **type_p) -{ - if (current_display == NULL) - return mem_start; - current_display->init_interface(); - can_do_color = 1; - video_type = VIDEO_TYPE_PMAC; - *type_p = display_info.name; - video_mem_base = mem_start; - mem_start += MAX_TEXT_COLS * MAX_TEXT_ROWS * 2; - video_mem_term = mem_start; - memset((char *) video_mem_base, 0, video_screen_size); - return mem_start; -} - -int -con_is_present(void) -{ - return current_display != NULL; -} - -static __inline__ void -draw_logo_8(void) -{ - unsigned char *fb = fb_start; - unsigned char *p = linux_logo; - int yy; - - (*current_display->set_palette) - (linux_logo_red, linux_logo_green, linux_logo_blue, - 32, LINUX_LOGO_COLORS); - - for (yy = 0; yy < LINUX_LOGO_HEIGHT; ++yy) { - memcpy(fb, p, LINUX_LOGO_WIDTH); - fb += line_pitch; - p += LINUX_LOGO_WIDTH; - } -} - -static __inline__ void -draw_logo_15(void) -{ - unsigned short *fb; - unsigned char *row = fb_start; - unsigned char *p = linux_logo; - int i, xx, yy; - unsigned char grey[16]; - - /* - * For 15-bit mode, treat the screen as a 4/4/4 TrueColor. - */ - for (i = 0; i < 16; ++i) - grey[i] = i << 4; - (*current_display->set_palette)(grey, grey, grey, 16, 16); - - for (yy = 0; yy < LINUX_LOGO_HEIGHT; ++yy) { - fb = (unsigned short *) row; - for (xx = 0; xx < LINUX_LOGO_WIDTH; ++xx) { - i = *p++ - 32; - *fb++ = 0x4210 - + ((linux_logo_red[i] & 0xf0) << 6) - + ((linux_logo_green[i] & 0xf0) << 1) - + (linux_logo_blue[i] >> 4); - } - row += line_pitch; - } -} - -static __inline__ void -draw_logo_24(void) -{ - unsigned long *fb; - unsigned char *row = fb_start; - unsigned char *p = linux_logo; - int xx, yy, v; - - (*current_display->set_palette) - (linux_logo_red, linux_logo_green, linux_logo_blue, - 32, LINUX_LOGO_COLORS); - - for (yy = 0; yy < LINUX_LOGO_HEIGHT; ++yy) { - fb = (unsigned long *) row; - for (xx = 0; xx < LINUX_LOGO_WIDTH; ++xx) { - v = *p++; - v |= v << 8; - v |= v << 16; - *fb++ = v; - } - row += line_pitch; - } -} - -void -con_type_init_finish(void) -{ - char *p; - int c; - unsigned short *addr; - char xy[2]; - int currcons = 0; /* for `attr', which is a macro */ - - if (current_display == NULL - || current_display->set_palette == NULL) - return; - - switch (color_mode) { - case CMODE_8: - draw_logo_8(); - break; - - case CMODE_16: - draw_logo_15(); - break; - - case CMODE_32: - draw_logo_24(); - break; - } - xy[0] = 0; - xy[1] = (LINUX_LOGO_HEIGHT + 16) / 16; - putconsxy(0, xy); - - switch (_machine) { - case _MACH_Pmac: - p = "PowerMac/Linux " UTS_RELEASE; - break; - default: - p = "Linux/PPC " UTS_RELEASE; - break; - } - addr = (unsigned short *) video_mem_base + 2 * video_num_columns - + LINUX_LOGO_WIDTH / 8 + 8; - for (; *p; ++p) { - c = (attr << 8) + *p; - scr_writew(c, addr); - ++addr; - } -} - -int -con_adjust_height(unsigned long height) -{ - return -EINVAL; -} - -static unsigned long expand_bits_8[16] = { - 0x00000000, - 0x000000ff, - 0x0000ff00, - 0x0000ffff, - 0x00ff0000, - 0x00ff00ff, - 0x00ffff00, - 0x00ffffff, - 0xff000000, - 0xff0000ff, - 0xff00ff00, - 0xff00ffff, - 0xffff0000, - 0xffff00ff, - 0xffffff00, - 0xffffffff -}; - -static unsigned long expand_bits_16[4] = { - 0x00000000, - 0x0000ffff, - 0xffff0000, - 0xffffffff -}; - -void -pmac_blitc(unsigned charattr, unsigned long addr) -{ - int col, row, fg, bg, l, bits; - unsigned char *fp; - unsigned long *fb; - static int cached_row_start, cached_row_end = -1; - static unsigned char *cached_fb; - static int cached_attr = -1; - static unsigned long cached_fg, cached_bg; - - col = (addr - video_mem_base) / 2; - if (cursor_pos == col) - cursor_pos = -1; - if (!(col >= cached_row_start && col < cached_row_end)) { - row = col / video_num_columns; - cached_row_start = row * video_num_columns; - cached_row_end = cached_row_start + video_num_columns; - cached_fb = fb_start + row * row_pitch; - } - fb = (unsigned long *) - (cached_fb + (col - cached_row_start) * pixel_size * 8); - - if ((charattr & 0xff00) != cached_attr) { - fg = (charattr >> 8) & 0xf; - bg = (charattr >> 12) & 0xf; - switch (color_mode) { - case CMODE_16: - fg = pixel16(fg_console, fg); - bg = pixel16(fg_console, bg); - break; - default: - fg += fg << 8; - fg += fg << 16; - bg += bg << 8; - bg += bg << 16; - } - fg ^= bg; - cached_fg = fg; - cached_bg = bg; - } else { - fg = cached_fg; - bg = cached_bg; - } - - fp = &vga_font[(charattr & 0xff) * 16]; - switch (color_mode) { - case CMODE_32: - for (l = 0; l < 16; ++l) { - bits = *fp++; - fb[0] = (-(bits >> 7) & fg) ^ bg; - fb[1] = (-((bits >> 6) & 1) & fg) ^ bg; - fb[2] = (-((bits >> 5) & 1) & fg) ^ bg; - fb[3] = (-((bits >> 4) & 1) & fg) ^ bg; - fb[4] = (-((bits >> 3) & 1) & fg) ^ bg; - fb[5] = (-((bits >> 2) & 1) & fg) ^ bg; - fb[6] = (-((bits >> 1) & 1) & fg) ^ bg; - fb[7] = (-(bits & 1) & fg) ^ bg; - fb = (unsigned long *) ((char *)fb + line_pitch); - } - break; - case CMODE_16: - for (l = 0; l < 16; ++l) { - bits = *fp++; - fb[0] = (expand_bits_16[bits >> 6] & fg) ^ bg; - fb[1] = (expand_bits_16[(bits >> 4) & 3] & fg) ^ bg; - fb[2] = (expand_bits_16[(bits >> 2) & 3] & fg) ^ bg; - fb[3] = (expand_bits_16[bits & 3] & fg) ^ bg; - fb = (unsigned long *) ((char *)fb + line_pitch); - } - break; - default: - for (l = 0; l < 16; ++l) { - bits = *fp++; - fb[0] = (expand_bits_8[bits >> 4] & fg) ^ bg; - fb[1] = (expand_bits_8[bits & 0xf] & fg) ^ bg; - fb = (unsigned long *) ((char *)fb + line_pitch); - } - } -} - - -/* - * The following provides a very basic screen driver for displays - * that we basically don't know anything about, but which we can - * initialize by using their Open Firmware "open" method. - */ - -static int unknown_modes[] = { - VMODE_512_384_60, - VMODE_640_480_60, - VMODE_800_600_60, - VMODE_832_624_75, - VMODE_1024_768_60, - VMODE_1152_870_75, - VMODE_1280_960_75, - VMODE_1280_1024_75, - 0 -}; - -static unsigned char *frame_buffer; -static unsigned char *unknown_cmap_adr; -static volatile unsigned char *unknown_cmap_data; -static unsigned long frame_buffer_phys; - -static int map_unknown(struct device_node *dp) -{ - int i, mode; - int width; - int *pp, len; - unsigned *up, address; - - printk("map_unknown(%p), name = %s\n", dp, dp->full_name); - - /* check the depth */ - if ((pp = (int *) get_property(dp, "depth", &len)) != NULL - && len == sizeof(int) && *pp != 8) { - printk("%s: can't use depth = %d\n", dp->full_name, *pp); - return 0; - } - - width = 640; /* default values */ - n_scanlines = 480; - if ((pp = (int *) get_property(dp, "width", &len)) != NULL - && len == sizeof(int)) - width = *pp; - if ((pp = (int *) get_property(dp, "height", &len)) != NULL - && len == sizeof(int)) - n_scanlines = *pp; - line_pitch = width; - if ((pp = (int *) get_property(dp, "linebytes", &len)) != NULL - && len == sizeof(int)) - line_pitch = *pp; - printk(KERN_INFO "width=%d height=%d pitch=%d\n", - width, n_scanlines, line_pitch); - - len = n_scanlines * line_pitch; - if ((up = (unsigned *) get_property(dp, "address", &len)) != NULL - && len == sizeof(unsigned)) { - address = *up; - } else { - for (i = 0; i < dp->n_addrs; ++i) - if (dp->addrs[i].size >= len) - break; - if (i >= dp->n_addrs) { - printk("no framebuffer address found for %s\n", - dp->full_name); - return 0; - } - address = dp->addrs[i].address; - } - printk(KERN_INFO "%s: using address %x\n", dp->full_name, address); - frame_buffer_phys = address; - frame_buffer = __ioremap(frame_buffer_phys, len, _PAGE_WRITETHRU); - - video_mode = 0; - color_mode = CMODE_8; - pixel_size = 1; - - for (i = 0; (mode = unknown_modes[i]) != 0; ++i) { - if (vmode_attrs[mode-1].hres <= width - && vmode_attrs[mode-1].vres <= n_scanlines) - video_mode = mode; - } - if (video_mode == 0) { - printk(KERN_INFO "%s: no mode found for %d x %d\n", - dp->full_name, width, n_scanlines); - return 0; - } - - display_info.height = n_scanlines; - display_info.width = width; - display_info.depth = 8; - display_info.pitch = line_pitch; - display_info.mode = video_mode; - strncpy(display_info.name, dp->name, sizeof(display_info.name)); - display_info.fb_address = frame_buffer_phys; - display_info.cmap_adr_address = 0; - display_info.cmap_data_address = 0; - unknown_cmap_adr = 0; - /* XXX kludge for ati */ - if (strncmp(dp->name, "ATY,", 4) == 0) { - display_info.disp_reg_address = frame_buffer_phys + 0x7ffc00; - display_info.cmap_adr_address = frame_buffer_phys + 0x7ffcc0; - display_info.cmap_data_address = frame_buffer_phys + 0x7ffcc1; - unknown_cmap_adr = ioremap(address + 0x7ff000, 0x1000) + 0xcc0; - unknown_cmap_data = unknown_cmap_adr + 1; - } - - return 1; -} - -static void -unknown_init() -{ - unsigned *p; - int i; - - row_pitch = line_pitch * 16; - fb_start = frame_buffer; - - /* Clear screen */ - p = (unsigned *) frame_buffer; - for (i = n_scanlines * line_pitch / sizeof(unsigned); i != 0; --i) - *p++ = 0; -} - -static void -unknown_set_palette(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors) -{ - volatile unsigned char *a, *d; - int i; - - if (unknown_cmap_adr == 0) - return; - a = unknown_cmap_adr; - d = unknown_cmap_data; - for (i = 0; i < ncolors; ++i) { - *a = index + i; eieio(); - *d = red[i]; eieio(); - *d = green[i]; eieio(); - *d = blue[i]; eieio(); - } -} - - -unsigned char vga_font[cmapsz] = { -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x81, 0xa5, 0x81, 0x81, 0xbd, -0x99, 0x81, 0x81, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0xff, -0xdb, 0xff, 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PowerMacs. - * - * Copyright (C) 1997 Paul Mackerras. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -/* - * Video mode values. - * These are supposed to be the same as the values that - * Apple uses in MacOS. - */ -#define VMODE_NVRAM 0 /* use value stored in nvram */ -#define VMODE_512_384_60I 1 /* 512x384, 60Hz interlaced (NTSC) */ -#define VMODE_512_384_60 2 /* 512x384, 60Hz */ -#define VMODE_640_480_50I 3 /* 640x480, 50Hz interlaced (PAL) */ -#define VMODE_640_480_60I 4 /* 640x480, 60Hz interlaced (NTSC) */ -#define VMODE_640_480_60 5 /* 640x480, 60Hz (VGA) */ -#define VMODE_640_480_67 6 /* 640x480, 67Hz */ -#define VMODE_640_870_75P 7 /* 640x870, 75Hz (portrait) */ -#define VMODE_768_576_50I 8 /* 768x576, 50Hz (PAL full frame) */ -#define VMODE_800_600_56 9 /* 800x600, 56Hz */ -#define VMODE_800_600_60 10 /* 800x600, 60Hz */ -#define VMODE_800_600_72 11 /* 800x600, 72Hz */ -#define VMODE_800_600_75 12 /* 800x600, 75Hz */ -#define VMODE_832_624_75 13 /* 832x624, 75Hz */ -#define VMODE_1024_768_60 14 /* 1024x768, 60Hz */ -#define VMODE_1024_768_70 15 /* 1024x768, 70Hz (or 72Hz?) */ -#define VMODE_1024_768_75V 16 /* 1024x768, 75Hz (VESA) */ -#define VMODE_1024_768_75 17 /* 1024x768, 75Hz */ -#define VMODE_1152_870_75 18 /* 1152x870, 75Hz */ -#define VMODE_1280_960_75 19 /* 1280x960, 75Hz */ -#define VMODE_1280_1024_75 20 /* 1280x1024, 75Hz */ -#define VMODE_MAX 20 -#define VMODE_CHOOSE 99 /* choose based on monitor sense */ - -/* - * Color mode values, used to select number of bits/pixel. - */ -#define CMODE_NVRAM -1 /* use value stored in nvram */ -#define CMODE_8 0 /* 8 bits/pixel */ -#define CMODE_16 1 /* 16 (actually 15) bits/pixel */ -#define CMODE_32 2 /* 32 (actually 24) bits/pixel */ - -extern int video_mode; -extern int color_mode; - -/* - * Addresses in NVRAM where video mode and pixel size are stored. - */ -#define NV_VMODE 0x140f -#define NV_CMODE 0x1410 - -/* - * Horizontal and vertical resolution information. - */ -extern struct vmode_attr { - int hres; - int vres; - int vfreq; - int interlaced; -} vmode_attrs[VMODE_MAX]; - -extern struct vc_mode display_info; - -#define DEFAULT_VESA_BLANKING_MODE VESA_NO_BLANKING - -extern int pixel_size; /* in bytes */ -extern int n_scanlines; /* # of scan lines */ -extern int line_pitch; /* # bytes in 1 scan line */ -extern int row_pitch; /* # bytes in 1 row of characters */ -extern unsigned char *fb_start; /* addr of top left pixel of top left char */ - -/* map monitor sense value to video mode */ -extern int map_monitor_sense(int sense); - -void set_palette(void); -void pmac_find_display(void); -void vesa_blank(void); -void vesa_unblank(void); -void set_vesa_blanking(const unsigned long); -void vesa_powerdown(void); -void hide_cursor(void); -void pmac_init_palette(void); diff --git a/drivers/macintosh/valkyrie.c b/drivers/macintosh/valkyrie.c deleted file mode 100644 index 02b81ea72..000000000 --- a/drivers/macintosh/valkyrie.c +++ /dev/null @@ -1,330 +0,0 @@ -/* - * valkyrie.c: Console support for PowerMac "valkyrie" display adaptor. - * - * Copyright (C) 1997 Paul Mackerras. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include <linux/kernel.h> -#include <linux/sched.h> -#include <linux/delay.h> -#include <linux/string.h> -#include <linux/vc_ioctl.h> -#include <linux/nvram.h> -#include <asm/prom.h> -#include <asm/io.h> -#include <asm/adb.h> -#include <asm/cuda.h> -#include <asm/pgtable.h> -#include <linux/selection.h> -#include "pmac-cons.h" -#include "valkyrie.h" - -/* - * Structure of the registers for the Valkyrie colormap registers. - */ -struct cmap_regs { - unsigned char addr; - char pad1[7]; - unsigned char lut; -}; - -/* - * Structure of the registers for the "valkyrie" display adaptor. - */ -#define PAD(x) char x[7] - -struct valkyrie_regs { - unsigned char mode; - PAD(pad0); - unsigned char depth; - PAD(pad1); - unsigned char status; - PAD(pad2); - unsigned char reg3; - PAD(pad3); - unsigned char intr; - PAD(pad4); - unsigned char reg5; - PAD(pad5); - unsigned char intr_enb; - PAD(pad6); - unsigned char msense; - PAD(pad7); -}; - -static void set_valkyrie_clock(unsigned char *params); -static int read_valkyrie_sense(void); - -static unsigned char *frame_buffer; -static struct cmap_regs *cmap_regs; -static struct valkyrie_regs *disp_regs; - -static unsigned long frame_buffer_phys; -static unsigned long disp_regs_phys; -static unsigned long cmap_regs_phys; - -/* - * Register initialization tables for the valkyrie display. - * - * Dot clock rate is - * 3.9064MHz * 2**clock_params[2] * clock_params[1] / clock_params[0]. - */ -struct valkyrie_regvals { - unsigned char mode; - unsigned char clock_params[3]; - int pitch[2]; /* bytes/line, indexed by color_mode */ -}; - -/* Register values for 1024x768, 72Hz mode (15) */ -static struct valkyrie_regvals valkyrie_reg_init_15 = { - 15, - { 12, 30, 3 }, /* pixel clock = 78.12MHz for V=72.12Hz */ - { 1024, 0 } -}; - -/* Register values for 1024x768, 60Hz mode (14) */ -static struct valkyrie_regvals valkyrie_reg_init_14 = { - 14, - { 15, 31, 3 }, /* pixel clock = 64.58MHz for V=59.62Hz */ - { 1024, 0 } -}; - -/* Register values for 832x624, 75Hz mode (13) */ -static struct valkyrie_regvals valkyrie_reg_init_13 = { - 9, - { 23, 42, 3 }, /* pixel clock = 57.07MHz for V=74.27Hz */ - { 832, 0 } -}; - -/* Register values for 800x600, 72Hz mode (11) */ -static struct valkyrie_regvals valkyrie_reg_init_11 = { - 13, - { 17, 27, 3 }, /* pixel clock = 49.63MHz for V=71.66Hz */ - { 800, 0 } -}; - -/* Register values for 800x600, 60Hz mode (10) */ -static struct valkyrie_regvals valkyrie_reg_init_10 = { - 12, - { 20, 53, 2 }, /* pixel clock = 41.41MHz for V=59.78Hz */ - { 800, 0 } -}; - -/* Register values for 640x480, 67Hz mode (6) */ -static struct valkyrie_regvals valkyrie_reg_init_6 = { - 6, - { 14, 27, 2 }, /* pixel clock = 30.13MHz for V=66.43Hz */ - { 640, 1280 } -}; - -/* Register values for 640x480, 60Hz mode (5) */ -static struct valkyrie_regvals valkyrie_reg_init_5 = { - 11, - { 23, 37, 2 }, /* pixel clock = 25.14MHz for V=59.85Hz */ - { 640, 1280 } -}; - -static struct valkyrie_regvals *valkyrie_reg_init[20] = { - NULL, NULL, NULL, NULL, - &valkyrie_reg_init_5, - &valkyrie_reg_init_6, - NULL, NULL, NULL, - &valkyrie_reg_init_10, - &valkyrie_reg_init_11, - NULL, - &valkyrie_reg_init_13, - &valkyrie_reg_init_14, - &valkyrie_reg_init_15, - NULL, NULL, NULL, NULL, NULL -}; - -/* - * Get the monitor sense value. - */ -static int -read_valkyrie_sense() -{ - int sense; - - out_8(&disp_regs->msense, 0); /* release all lines */ - __delay(20000); - sense = (in_8(&disp_regs->msense) & 0x70) << 4; - - /* drive each sense line low in turn and collect the other 2 */ - out_8(&disp_regs->msense, 4); /* drive A low */ - __delay(20000); - sense |= in_8(&disp_regs->msense) & 0x30; - out_8(&disp_regs->msense, 2); /* drive B low */ - __delay(20000); - sense |= ((in_8(&disp_regs->msense) & 0x40) >> 3) - | ((in_8(&disp_regs->msense) & 0x10) >> 2); - out_8(&disp_regs->msense, 1); /* drive C low */ - __delay(20000); - sense |= (in_8(&disp_regs->msense) & 0x60) >> 5; - - out_8(&disp_regs->msense, 0); - return sense; -} - -void -map_valkyrie_display(struct device_node *dp) -{ - int sense; - unsigned long addr; - - if (dp->next != 0) - printk("Warning: only using first valkyrie display device\n"); - if (dp->n_addrs != 1) - panic("expecting 1 address for valkyrie (got %d)", dp->n_addrs); - - /* Map in frame buffer and registers */ - addr = dp->addrs[0].address; - frame_buffer_phys = addr; - frame_buffer = __ioremap(addr, 0x100000, _PAGE_WRITETHRU); - disp_regs_phys = addr + 0x30a000; - disp_regs = ioremap(disp_regs_phys, 4096); - cmap_regs_phys = addr + 0x304000; - cmap_regs = ioremap(cmap_regs_phys, 4096); - - /* Read the monitor sense value and choose the video mode */ - sense = read_valkyrie_sense(); - if (video_mode == VMODE_NVRAM) { - video_mode = nvram_read_byte(NV_VMODE); - if (video_mode <= 0 || video_mode > VMODE_MAX - || valkyrie_reg_init[video_mode-1] == 0) - video_mode = VMODE_CHOOSE; - } - if (video_mode == VMODE_CHOOSE) - video_mode = map_monitor_sense(sense); - if (valkyrie_reg_init[video_mode-1] == 0) - video_mode = VMODE_640_480_60; - - /* - * Reduce the pixel size if we don't have enough VRAM. - */ - if (color_mode == CMODE_NVRAM) - color_mode = nvram_read_byte(NV_CMODE); - if (color_mode < CMODE_8 || color_mode > CMODE_16 - || valkyrie_reg_init[video_mode-1]->pitch[color_mode] == 0) - color_mode = CMODE_8; - - printk("Monitor sense value = 0x%x, ", sense); -} - -static void -set_valkyrie_clock(unsigned char *params) -{ - struct adb_request req; - int i; - - for (i = 0; i < 3; ++i) { - cuda_request(&req, NULL, 5, CUDA_PACKET, CUDA_GET_SET_IIC, - 0x50, i + 1, params[i]); - while (!req.complete) - cuda_poll(); - } -} - -void -valkyrie_init() -{ - int i, yoff, hres; - unsigned *p; - struct valkyrie_regvals *init; - - if (video_mode <= 0 || video_mode > VMODE_MAX - || (init = valkyrie_reg_init[video_mode-1]) == 0) - panic("valkyrie: display mode %d not supported", video_mode); - n_scanlines = vmode_attrs[video_mode-1].vres; - hres = vmode_attrs[video_mode-1].hres; - pixel_size = 1 << color_mode; - line_pitch = init->pitch[color_mode]; - row_pitch = line_pitch * 16; - - /* Reset the valkyrie */ - out_8(&disp_regs->status, 0); - udelay(100); - - /* Initialize display timing registers */ - out_8(&disp_regs->mode, init->mode | 0x80); - out_8(&disp_regs->depth, color_mode + 3); - set_valkyrie_clock(init->clock_params); - udelay(100); - - pmac_init_palette(); /* Initialize colormap */ - - /* Turn on display */ - out_8(&disp_regs->mode, init->mode); - - yoff = (n_scanlines % 16) / 2; - fb_start = frame_buffer + yoff * line_pitch + 0x1000; - - /* Clear screen */ - p = (unsigned *) (frame_buffer + 0x1000); - for (i = n_scanlines * line_pitch / sizeof(unsigned); i != 0; --i) - *p++ = 0; - - display_info.height = n_scanlines; - display_info.width = hres; - display_info.depth = pixel_size * 8; - display_info.pitch = line_pitch; - display_info.mode = video_mode; - strncpy(display_info.name, "valkyrie", sizeof(display_info.name)); - display_info.fb_address = frame_buffer_phys + 0x1000; - display_info.cmap_adr_address = cmap_regs_phys; - display_info.cmap_data_address = cmap_regs_phys + 8; - display_info.disp_reg_address = disp_regs_phys; -} - -int -valkyrie_setmode(struct vc_mode *mode, int doit) -{ - int cmode; - - switch (mode->depth) { - case 16: - cmode = CMODE_16; - break; - case 8: - case 0: /* (default) */ - cmode = CMODE_8; - break; - default: - return -EINVAL; - } - if (mode->mode <= 0 || mode->mode > VMODE_MAX - || valkyrie_reg_init[mode->mode-1] == 0 - || valkyrie_reg_init[mode->mode-1]->pitch[cmode] == 0) - return -EINVAL; - if (doit) { - video_mode = mode->mode; - color_mode = cmode; - valkyrie_init(); - } - return 0; -} - -void -valkyrie_set_palette(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors) -{ - int i; - - for (i = 0; i < ncolors; ++i) { - out_8(&cmap_regs->addr, index + i); - udelay(1); - out_8(&cmap_regs->lut, red[i]); - out_8(&cmap_regs->lut, green[i]); - out_8(&cmap_regs->lut, blue[i]); - } -} - -void -valkyrie_set_blanking(int blank_mode) -{ - /* don't know how to do this yet */ -} diff --git a/drivers/macintosh/valkyrie.h b/drivers/macintosh/valkyrie.h deleted file mode 100644 index 90521eb3e..000000000 --- a/drivers/macintosh/valkyrie.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Exported procedures for the "valkyrie" display driver on PowerMacs. - * - * Copyright (C) 1997 Paul Mackerras. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -extern void map_valkyrie_display(struct device_node *); -extern void valkyrie_init(void); -extern int valkyrie_setmode(struct vc_mode *mode, int doit); -extern void valkyrie_set_palette(unsigned char red[], unsigned char green[], - unsigned char blue[], int index, int ncolors); -extern void valkyrie_set_blanking(int blank_mode); diff --git a/drivers/macintosh/via-cuda.c b/drivers/macintosh/via-cuda.c index 55fd8ea92..986cdd7b5 100644 --- a/drivers/macintosh/via-cuda.c +++ b/drivers/macintosh/via-cuda.c @@ -20,6 +20,7 @@ #include <asm/io.h> #include <asm/pgtable.h> #include <asm/system.h> +#include <asm/init.h> static volatile unsigned char *via; @@ -72,6 +73,7 @@ static unsigned char cuda_rbuf[16]; static unsigned char *reply_ptr; static int reading_reply; static int data_index; +static struct device_node *vias; static int init_via(void); static void cuda_start(void); @@ -80,11 +82,11 @@ static void cuda_input(unsigned char *buf, int nb, struct pt_regs *regs); static int cuda_adb_send_request(struct adb_request *req, int sync); static int cuda_adb_autopoll(int on); +__openfirmware + void -via_cuda_init() +find_via_cuda() { - struct device_node *vias; - vias = find_devices("via-cuda"); if (vias == 0) return; @@ -111,12 +113,21 @@ via_cuda_init() } via = (volatile unsigned char *) ioremap(vias->addrs->address, 0x2000); + cuda_state = idle; + if (!init_via()) { printk(KERN_ERR "init_via failed\n"); - return; + via = NULL; } - cuda_state = idle; + adb_hardware = ADB_VIACUDA; +} + +void +via_cuda_init(void) +{ + if (via == NULL) + return; if (request_irq(vias->intrs[0].line, via_interrupt, 0, "VIA", (void *)0)) { printk(KERN_ERR "VIA: can't get irq %d\n", vias->intrs[0].line); @@ -128,7 +139,6 @@ via_cuda_init() via[IER] = IER_SET|SR_INT; eieio(); /* enable interrupt from SR */ /* Set function pointers */ - adb_hardware = ADB_VIACUDA; adb_send_request = cuda_adb_send_request; adb_autopoll = cuda_adb_autopoll; } @@ -158,7 +168,7 @@ init_via() eieio(); /* delay 4ms and then clear any pending interrupt */ - udelay(4000); + mdelay(4); x = via[SR]; eieio(); /* sync with the CUDA - assert TACK without TIP */ diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c index 922aed06b..ee6b014bd 100644 --- a/drivers/macintosh/via-pmu.c +++ b/drivers/macintosh/via-pmu.c @@ -11,11 +11,16 @@ * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi. */ #include <stdarg.h> +#include <linux/config.h> #include <linux/types.h> #include <linux/errno.h> #include <linux/kernel.h> #include <linux/delay.h> #include <linux/sched.h> +#include <linux/miscdevice.h> +#include <linux/blkdev.h> +#include <linux/pci.h> +#include <linux/malloc.h> #include <asm/prom.h> #include <asm/adb.h> #include <asm/pmu.h> @@ -23,6 +28,11 @@ #include <asm/io.h> #include <asm/pgtable.h> #include <asm/system.h> +#include <asm/init.h> +#include <asm/irq.h> + +/* Misc minor number allocated for /dev/pmu */ +#define PMU_MINOR 154 static volatile unsigned char *via; @@ -79,6 +89,10 @@ static int adb_int_pending; static int pmu_adb_flags; static int adb_dev_map = 0; static struct adb_request bright_req_1, bright_req_2; +static struct device_node *vias; + +int asleep; +struct notifier_block *sleep_notifier_list; static int init_pmu(void); static int pmu_queue_request(struct adb_request *req); @@ -138,11 +152,11 @@ static s8 pmu_data_len[256][2] = { /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, }; +__openfirmware + void -via_pmu_init() +find_via_pmu() { - struct device_node *vias; - vias = find_devices("via-pmu"); if (vias == 0) return; @@ -174,8 +188,20 @@ via_pmu_init() pmu_state = idle; if (!init_pmu()) + via = NULL; + + adb_hardware = ADB_VIAPMU; +} + +void +via_pmu_init(void) +{ + if (vias == NULL) return; + bright_req_1.complete = 1; + bright_req_2.complete = 1; + if (request_irq(vias->intrs[0].line, via_pmu_interrupt, 0, "VIA-PMU", (void *)0)) { printk(KERN_ERR "VIA-PMU: can't get irq %d\n", @@ -187,12 +213,8 @@ via_pmu_init() out_8(&via[IER], IER_SET | SR_INT | CB1_INT); /* Set function pointers */ - adb_hardware = ADB_VIAPMU; adb_send_request = pmu_adb_send_request; adb_autopoll = pmu_adb_autopoll; - - bright_req_1.complete = 1; - bright_req_2.complete = 1; } static int @@ -583,6 +605,7 @@ pmu_handle_data(unsigned char *data, int len, struct pt_regs *regs) { static int show_pmu_ints = 1; + asleep = 0; if (len < 1) { adb_int_pending = 0; return; @@ -653,17 +676,243 @@ static void set_brightness(int level) { backlight_bright = LEVEL_TO_BRIGHT(level); + if (!backlight_enabled) + return; if (bright_req_1.complete) pmu_request(&bright_req_1, NULL, 2, PMU_BACKLIGHT_BRIGHT, backlight_bright); - if (bright_req_2.complete) { - backlight_enabled = backlight_bright < 0x7f; + if (bright_req_2.complete) pmu_request(&bright_req_2, NULL, 2, PMU_BACKLIGHT_CTRL, - backlight_enabled? 0x81: 1); - } + backlight_bright < 0x7f? 0x81: 1); } static void set_volume(int level) { } + +#ifdef CONFIG_PMAC_PBOOK + +/* + * This struct is used to store config register values for + * PCI devices which may get powered off when we sleep. + */ +static struct pci_save { + u16 command; + u16 cache_lat; + u16 intr; +} *pbook_pci_saves; +static int n_pbook_pci_saves; + +static inline void +pbook_pci_save(void) +{ + int npci; + struct pci_dev *pd; + struct pci_save *ps; + + npci = 0; + for (pd = pci_devices; pd != NULL; pd = pd->next) + ++npci; + n_pbook_pci_saves = npci; + if (npci == 0) + return; + ps = (struct pci_save *) kmalloc(npci * sizeof(*ps), GFP_KERNEL); + pbook_pci_saves = ps; + if (ps == NULL) + return; + + for (pd = pci_devices; pd != NULL && npci != 0; pd = pd->next) { + pci_read_config_word(pd, PCI_COMMAND, &ps->command); + pci_read_config_word(pd, PCI_CACHE_LINE_SIZE, &ps->cache_lat); + pci_read_config_word(pd, PCI_INTERRUPT_LINE, &ps->intr); + ++ps; + --npci; + } +} + +static inline void +pbook_pci_restore(void) +{ + u16 cmd; + struct pci_save *ps = pbook_pci_saves; + struct pci_dev *pd; + int j; + + for (pd = pci_devices; pd != NULL; pd = pd->next, ++ps) { + if (ps->command == 0) + continue; + pci_read_config_word(pd, PCI_COMMAND, &cmd); + if ((ps->command & ~cmd) == 0) + continue; + switch (pd->hdr_type) { + case PCI_HEADER_TYPE_NORMAL: + for (j = 0; j < 6; ++j) + pci_write_config_dword(pd, + PCI_BASE_ADDRESS_0 + j*4, + pd->base_address[j]); + pci_write_config_dword(pd, PCI_ROM_ADDRESS, + pd->rom_address); + pci_write_config_word(pd, PCI_CACHE_LINE_SIZE, + ps->cache_lat); + pci_write_config_word(pd, PCI_INTERRUPT_LINE, + ps->intr); + pci_write_config_word(pd, PCI_COMMAND, ps->command); + break; + /* other header types not restored at present */ + } + } +} + +/* + * Put the powerbook to sleep. + */ +#define IRQ_ENABLE ((unsigned int *)0xf3000024) +#define MEM_CTRL ((unsigned int *)0xf8000070) + +int powerbook_sleep(void) +{ + int ret, i, x; + static int save_backlight; + static unsigned int save_irqen; + unsigned long msr; + unsigned int hid0; + unsigned long p, wait; + struct adb_request sleep_req; + + /* Notify device drivers */ + ret = notifier_call_chain(&sleep_notifier_list, PBOOK_SLEEP, NULL); + if (ret & NOTIFY_STOP_MASK) + return -EBUSY; + + /* Sync the disks. */ + /* XXX It would be nice to have some way to ensure that + * nobody is dirtying any new buffers while we wait. */ + fsync_dev(0); + + /* Turn off the display backlight */ + save_backlight = backlight_enabled; + if (save_backlight) + pmu_enable_backlight(0); + + /* Give the disks a little time to actually finish writing */ + for (wait = jiffies + (HZ/4); jiffies < wait; ) + mb(); + + /* Disable all interrupts except pmu */ + save_irqen = in_le32(IRQ_ENABLE); + for (i = 0; i < 32; ++i) + if (i != vias->intrs[0].line && (save_irqen & (1 << i))) + disable_irq(i); + asm volatile("mtdec %0" : : "r" (0x7fffffff)); + + /* Save the state of PCI config space for some slots */ + pbook_pci_save(); + + /* Set the memory controller to keep the memory refreshed + while we're asleep */ + for (i = 0x403f; i >= 0x4000; --i) { + out_be32(MEM_CTRL, i); + do { + x = (in_be32(MEM_CTRL) >> 16) & 0x3ff; + } while (x == 0); + if (x >= 0x100) + break; + } + + /* Ask the PMU to put us to sleep */ + pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); + while (!sleep_req.complete) + mb(); + /* displacement-flush the L2 cache - necessary? */ + for (p = KERNELBASE; p < KERNELBASE + 0x100000; p += 0x1000) + i = *(volatile int *)p; + asleep = 1; + + /* Put the CPU into sleep mode */ + asm volatile("mfspr %0,1008" : "=r" (hid0) :); + hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP; + asm volatile("mtspr 1008,%0" : : "r" (hid0)); + save_flags(msr); + msr |= MSR_POW | MSR_EE; + restore_flags(msr); + udelay(10); + + /* OK, we're awake again, start restoring things */ + out_be32(MEM_CTRL, 0x3f); + pbook_pci_restore(); + + /* wait for the PMU interrupt sequence to complete */ + while (asleep) + mb(); + + /* reenable interrupts */ + for (i = 0; i < 32; ++i) + if (i != vias->intrs[0].line && (save_irqen & (1 << i))) + enable_irq(i); + + /* Notify drivers */ + notifier_call_chain(&sleep_notifier_list, PBOOK_WAKE, NULL); + + /* reenable ADB autopoll */ + pmu_adb_autopoll(1); + + /* Turn on the screen backlight, if it was on before */ + if (save_backlight) + pmu_enable_backlight(1); + + return 0; +} + +/* + * Support for /dev/pmu device + */ +static int pmu_open(struct inode *inode, struct file *file) +{ + return 0; +} + +static ssize_t pmu_read(struct file *file, char *buf, + size_t count, loff_t *ppos) +{ + return 0; +} + +static ssize_t pmu_write(struct file *file, const char *buf, + size_t count, loff_t *ppos) +{ + return 0; +} + +static int pmu_ioctl(struct inode * inode, struct file *filp, + u_int cmd, u_long arg) +{ + switch (cmd) { + case PMU_IOC_SLEEP: + return powerbook_sleep(); + } + return -EINVAL; +} + +static struct file_operations pmu_device_fops = { + NULL, /* no seek */ + pmu_read, + pmu_write, + NULL, /* no readdir */ + NULL, /* no poll yet */ + pmu_ioctl, + NULL, /* no mmap */ + pmu_open, + NULL /* no release */ +}; + +static struct miscdevice pmu_device = { + PMU_MINOR, "pmu", &pmu_device_fops +}; + +void pmu_device_init(void) +{ + if (via) + misc_register(&pmu_device); +} +#endif /* CONFIG_PMAC_PBOOK */ |