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authorRalf Baechle <ralf@linux-mips.org>2000-10-05 01:18:40 +0000
committerRalf Baechle <ralf@linux-mips.org>2000-10-05 01:18:40 +0000
commit012bb3e61e5eced6c610f9e036372bf0c8def2d1 (patch)
tree87efc733f9b164e8c85c0336f92c8fb7eff6d183 /drivers/pci
parent625a1589d3d6464b5d90b8a0918789e3afffd220 (diff)
Merge with Linux 2.4.0-test9. Please check DECstation, I had a number
of rejects to fixup while integrating Linus patches. I also found that this kernel will only boot SMP on Origin; the UP kernel freeze soon after bootup with SCSI timeout messages. I commit this anyway since I found that the last CVS versions had the same problem.
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/names.c3
-rw-r--r--drivers/pci/pci.c182
-rw-r--r--drivers/pci/pci.ids13
-rw-r--r--drivers/pci/proc.c4
-rw-r--r--drivers/pci/quirks.c4
5 files changed, 81 insertions, 125 deletions
diff --git a/drivers/pci/names.c b/drivers/pci/names.c
index a6114e789..4e047d691 100644
--- a/drivers/pci/names.c
+++ b/drivers/pci/names.c
@@ -131,4 +131,5 @@ pci_class_name(u32 class)
return NULL;
}
-#endif
+#endif /* CONFIG_PCI_NAMES */
+
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 0b59ec0b6..c0541c115 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -657,134 +657,89 @@ static struct pci_bus * __init pci_add_new_bus(struct pci_bus *parent, struct pc
return child;
}
-/*
- * A CardBus bridge is basically the same as a regular PCI bridge,
- * except we don't scan behind it because it will be changing.
- */
-static int __init pci_scan_cardbus(struct pci_bus *bus, struct pci_dev *dev, int busnr)
-{
- int i;
- unsigned short cr;
- unsigned int buses;
- struct pci_bus *child;
-
- /*
- * Insert it into the tree of buses.
- */
- DBG("Scanning CardBus bridge %s\n", dev->slot_name);
- child = pci_add_new_bus(bus, dev, ++busnr);
-
- for (i = 0; i < 4; i++)
- child->resource[i] = &dev->resource[PCI_BRIDGE_RESOURCES+i];
-
- /*
- * Maybe we'll have another bus behind this one?
- */
- child->subordinate = ++busnr;
- sprintf(child->name, "PCI CardBus #%02x", child->number);
-
- /*
- * Clear all status bits and turn off memory,
- * I/O and master enables.
- */
- pci_read_config_word(dev, PCI_COMMAND, &cr);
- pci_write_config_word(dev, PCI_COMMAND, 0x0000);
- pci_write_config_word(dev, PCI_STATUS, 0xffff);
-
- /*
- * Read the existing primary/secondary/subordinate bus
- * number configuration to determine if the bridge
- * has already been configured by the system. If so,
- * do not modify the configuration, merely note it.
- */
- pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
- if ((buses & 0xFFFFFF) != 0 && ! pcibios_assign_all_busses()) {
- child->primary = buses & 0xFF;
- child->secondary = (buses >> 8) & 0xFF;
- child->subordinate = (buses >> 16) & 0xFF;
- child->number = child->secondary;
- if (child->subordinate > busnr)
- busnr = child->subordinate;
- } else {
- /*
- * Configure the bus numbers for this bridge:
- */
- buses &= 0xff000000;
- buses |=
- (((unsigned int)(child->primary) << 0) |
- ((unsigned int)(child->secondary) << 8) |
- ((unsigned int)(child->subordinate) << 16));
- pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses);
- }
- pci_write_config_word(dev, PCI_COMMAND, cr);
- return busnr;
-}
-
static unsigned int __init pci_do_scan_bus(struct pci_bus *bus);
/*
- * If it's a bridge, scan the bus behind it.
+ * If it's a bridge, configure it and scan the bus behind it.
+ * For CardBus bridges, we don't scan behind as the devices will
+ * be handled by the bridge driver itself.
+ *
+ * We need to process bridges in two passes -- first we scan those
+ * already configured by the BIOS and after we are done with all of
+ * them, we proceed to assigning numbers to the remaining buses in
+ * order to avoid overlaps between old and new bus numbers.
*/
-static int __init pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max)
+static int __init pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass)
{
unsigned int buses;
unsigned short cr;
struct pci_bus *child;
+ int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
- /*
- * Insert it into the tree of buses.
- */
- DBG("Scanning behind PCI bridge %s\n", dev->slot_name);
- child = pci_add_new_bus(bus, dev, ++max);
- sprintf(child->name, "PCI Bus #%02x", child->number);
-
- /*
- * Clear all status bits and turn off memory,
- * I/O and master enables.
- */
- pci_read_config_word(dev, PCI_COMMAND, &cr);
- pci_write_config_word(dev, PCI_COMMAND, 0x0000);
- pci_write_config_word(dev, PCI_STATUS, 0xffff);
-
- /*
- * Read the existing primary/secondary/subordinate bus
- * number configuration to determine if the PCI bridge
- * has already been configured by the system. If so,
- * do not modify the configuration, merely note it.
- */
pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
- if ((buses & 0xFFFFFF) != 0 && ! pcibios_assign_all_busses()) {
- unsigned int cmax;
+ DBG("Scanning behind PCI bridge %s, config %06x, pass %d\n", dev->slot_name, buses & 0xffffff, pass);
+ if ((buses & 0xffffff) && !pcibios_assign_all_busses()) {
+ /*
+ * Bus already configured by firmware, process it in the first
+ * pass and just note the configuration.
+ */
+ if (pass)
+ return max;
+ child = pci_add_new_bus(bus, dev, 0);
child->primary = buses & 0xFF;
child->secondary = (buses >> 8) & 0xFF;
child->subordinate = (buses >> 16) & 0xFF;
child->number = child->secondary;
- cmax = pci_do_scan_bus(child);
- if (cmax > max) max = cmax;
+ if (!is_cardbus) {
+ unsigned int cmax = pci_do_scan_bus(child);
+ if (cmax > max) max = cmax;
+ } else {
+ int i;
+ for (i = 0; i < 4; i++)
+ child->resource[i] = &dev->resource[PCI_BRIDGE_RESOURCES+i];
+ }
} else {
/*
- * Configure the bus numbers for this bridge:
+ * We need to assign a number to this bus which we always
+ * do in the second pass. We also keep all address decoders
+ * on the bridge disabled during scanning. FIXME: Why?
*/
- buses &= 0xff000000;
- buses |=
- (((unsigned int)(child->primary) << 0) |
- ((unsigned int)(child->secondary) << 8) |
- ((unsigned int)(child->subordinate) << 16));
- pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses);
+ if (!pass)
+ return max;
+ pci_read_config_word(dev, PCI_COMMAND, &cr);
+ pci_write_config_word(dev, PCI_COMMAND, 0x0000);
+ pci_write_config_word(dev, PCI_STATUS, 0xffff);
+ child = pci_add_new_bus(bus, dev, ++max);
+ buses = (buses & 0xff000000)
+ | ((unsigned int)(child->primary) << 0)
+ | ((unsigned int)(child->secondary) << 8)
+ | ((unsigned int)(child->subordinate) << 16);
/*
- * Now we can scan all subordinate buses:
+ * We need to blast all three values with a single write.
*/
- max = pci_do_scan_bus(child);
+ pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses);
+ if (!is_cardbus) {
+ /* Now we can scan all subordinate buses... */
+ max = pci_do_scan_bus(child);
+ } else {
+ int i;
+ /*
+ * For CardBus bridges, we leave 4 bus numbers
+ * as cards with a PCI-to-PCI bridge can be
+ * inserted later.
+ */
+ max += 3;
+ for (i = 0; i < 4; i++)
+ child->resource[i] = &dev->resource[PCI_BRIDGE_RESOURCES+i];
+ }
/*
- * Set the subordinate bus number to its real
- * value:
+ * Set the subordinate bus number to its real value.
*/
child->subordinate = max;
- buses = (buses & 0xff00ffff)
- | ((unsigned int)(child->subordinate) << 16);
- pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses);
+ pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
+ pci_write_config_word(dev, PCI_COMMAND, cr);
}
- pci_write_config_word(dev, PCI_COMMAND, cr);
+ sprintf(child->name, (is_cardbus ? "PCI CardBus #%02x" : "PCI Bus #%02x"), child->number);
return max;
}
@@ -933,7 +888,7 @@ struct pci_dev * __init pci_scan_slot(struct pci_dev *temp)
static unsigned int __init pci_do_scan_bus(struct pci_bus *bus)
{
- unsigned int devfn, max;
+ unsigned int devfn, max, pass;
struct list_head *ln;
struct pci_dev *dev, dev0;
@@ -957,17 +912,12 @@ static unsigned int __init pci_do_scan_bus(struct pci_bus *bus)
*/
DBG("Fixups for bus %02x\n", bus->number);
pcibios_fixup_bus(bus);
- for (ln=bus->devices.next; ln != &bus->devices; ln=ln->next) {
- dev = pci_dev_b(ln);
- switch (dev->class >> 8) {
- case PCI_CLASS_BRIDGE_PCI:
- max = pci_scan_bridge(bus, dev, max);
- break;
- case PCI_CLASS_BRIDGE_CARDBUS:
- max = pci_scan_cardbus(bus, dev, max);
- break;
+ for (pass=0; pass < 2; pass++)
+ for (ln=bus->devices.next; ln != &bus->devices; ln=ln->next) {
+ dev = pci_dev_b(ln);
+ if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
+ max = pci_scan_bridge(bus, dev, max, pass);
}
- }
/*
* We've scanned the bus and so we know all about what's on
diff --git a/drivers/pci/pci.ids b/drivers/pci/pci.ids
index bda378365..7723913ba 100644
--- a/drivers/pci/pci.ids
+++ b/drivers/pci/pci.ids
@@ -1471,9 +1471,9 @@
6055 3c556 Laptop Hurricane
5057 3c575 [Megahertz] 10/100 LAN CardBus
10b7 5a57 3C575 Megahertz 10/100 LAN Cardbus PC Card
- 5157 3c575 [Megahertz] 10/100 LAN CardBus
+ 5157 3CCFE575BT Cyclone CardBus
10b7 5b57 3C575 Megahertz 10/100 LAN Cardbus PC Card
- 5257 3CCFE575CT Cyclone CardBus
+ 5257 3CCFE575CT Tornado CardBus
5900 3c590 10BaseT [Vortex]
5920 3c592 EISA 10mbps Demon/Vortex
5950 3c595 100BaseTX [Vortex]
@@ -1483,8 +1483,8 @@
5b57 3c595 [Megahertz] 10/100 LAN CardBus
10b7 5b57 3C575 Megahertz 10/100 LAN Cardbus PC Card
6560 3CCFE656 Cyclone CardBus
- 6562 3CCFEM656 [id 6562] Cyclone CardBus
- 6564 3CCFEM656 [id 6564] Cyclone CardBus
+ 6562 3CCFEM656B Cyclone CardBus
+ 6564 3CXFEM656C Tornado CardBus
7646 3cSOHO100-TX Hurricane
8811 Token ring
9000 3c900 10BaseT [Boomerang]
@@ -2694,6 +2694,10 @@
0105 Cyclom_8Y above first megabyte
0200 Cyclom_Z below first megabyte
0201 Cyclom_Z above first megabyte
+ 0300 PC300 RX 2
+ 0301 PC300 RX 1
+ 0310 PC300 TE 2
+ 0311 PC300 TE 1
120f Essential Communications
0001 Roadrunner serial HIPPI
1210 Hyperparallel Technologies
@@ -2752,6 +2756,7 @@
121a 0060 Voodoo3 3500 TV (NTSC)
121a 0061 Voodoo3 3500 TV (PAL)
121a 0062 Voodoo3 3500 TV (SECAM)
+ 0009 Voodoo 4
121b Advanced Telecommunications Modules
121c Nippon Texaco., Ltd
121d Lippert Automationstechnik GmbH
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c
index 2a517f7d6..81902c572 100644
--- a/drivers/pci/proc.c
+++ b/drivers/pci/proc.c
@@ -46,8 +46,8 @@ proc_bus_pci_read(struct file *file, char *buf, size_t nbytes, loff_t *ppos)
const struct inode *ino = file->f_dentry->d_inode;
const struct proc_dir_entry *dp = ino->u.generic_ip;
struct pci_dev *dev = dp->data;
- int pos = *ppos;
- int cnt, size;
+ unsigned int pos = *ppos;
+ unsigned int cnt, size;
/*
* Normal users can read only the standardized portion of the
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index fd36f06c4..83a4da2d8 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -46,7 +46,7 @@ static void __init quirk_passive_release(struct pci_dev *dev)
chipset level fix */
-int isa_dma_bridge_buggy = 0; /* Exported */
+int isa_dma_bridge_buggy; /* Exported */
static void __init quirk_isa_dma_hangs(struct pci_dev *dev)
{
@@ -56,7 +56,7 @@ static void __init quirk_isa_dma_hangs(struct pci_dev *dev)
}
}
-int pci_pci_problems = 0;
+int pci_pci_problems;
/*
* Chipsets where PCI->PCI transfers vanish or hang