The rest of 2.3.6.

3 files changed, 2891 insertions, 0 deletions

diff --git a/drivers/sbus/char/aurora.c b/drivers/sbus/char/aurora.c
new file mode 100644
index 000000000..607b0f230
--- /dev/null
+++ b/drivers/sbus/char/aurora.c
@@ -0,0 +1,2373 @@
+/*
+ *	linux/drivers/sbus/char/aurora.c -- Aurora multiport driver
+ *
+ *	Copyright (c) 1999 by Oliver Aldulea (oli@bv.ro)
+ *
+ *	This code is based on the RISCom/8 multiport serial driver written
+ *	by Dmitry Gorodchanin (pgmdsg@ibi.com), based on the Linux serial
+ *	driver, written by Linus Torvalds, Theodore T'so and others.
+ *	The Aurora multiport programming info was obtained mainly from the
+ *	Cirrus Logic CD180 documentation (available on the web), and by
+ *	doing heavy tests on the board. Many thanks to Eddie C. Dost for the
+ *	help on the sbus interface.
+ *
+ *	This program is free software; you can redistribute it and/or modify
+ *	it under the terms of the GNU General Public License as published by
+ *	the Free Software Foundation; either version 2 of the License, or
+ *	(at your option) any later version.
+ *
+ *	This program is distributed in the hope that it will be useful,
+ *	but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *	GNU General Public License for more details.
+ *
+ *	You should have received a copy of the GNU General Public License
+ *	along with this program; if not, write to the Free Software
+ *	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *	Revision 1.0
+ *
+ *	This is the first public release.
+ *
+ *	Most of the information you need is in the aurora.h file. Please
+ *	read that file before reading this one.
+ *
+ *	Several parts of the code do not have comments yet.
+ */
+
+#include <linux/module.h>
+
+#include <linux/errno.h>
+#include <linux/sched.h>
+#ifdef AURORA_INT_DEBUG
+#include <linux/timer.h>
+#endif
+#include <linux/interrupt.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/config.h>
+#include <linux/major.h>
+#include <linux/string.h>
+#include <linux/fcntl.h>
+#include <linux/mm.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/tqueue.h>
+#include <linux/delay.h>
+
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/oplib.h>
+#include <asm/system.h>
+#include <asm/segment.h>
+#include <asm/bitops.h>
+#include <asm/kdebug.h>
+#include <asm/sbus.h>
+#include <asm/uaccess.h>
+
+#include "aurora.h"
+#include "cd180.h"
+
+unsigned char irqs[4] = {
+	0, 0, 0, 0
+	};
+
+#ifdef AURORA_INT_DEBUG
+int irqhit=0;
+#endif
+
+#ifndef MIN
+#define MIN(a,b) ((a) < (b) ? (a) : (b))
+#endif
+
+#define AURORA_TYPE_NORMAL	1
+
+static struct tty_driver aurora_driver;
+static struct Aurora_board aurora_board[AURORA_NBOARD] = {
+	{0,},
+};
+
+static struct Aurora_port aurora_port[AURORA_TNPORTS] =  {
+	{ 0, },
+};
+
+/* no longer used. static struct Aurora_board * IRQ_to_board[16] = { NULL, } ;*/
+static unsigned char * tmp_buf = NULL;
+static DECLARE_MUTEX(tmp_buf_sem);
+static int    aurora_refcount = 0;
+static struct tty_struct * aurora_table[AURORA_TNPORTS] = { NULL, };
+static struct termios * aurora_termios[AURORA_TNPORTS] = { NULL, };
+static struct termios * aurora_termios_locked[AURORA_TNPORTS] = { NULL, };
+
+DECLARE_TASK_QUEUE(tq_aurora);
+
+/* Yes, the board can support 115.2 bit rates, but only on a few ports. The
+ * total badwidth of one chip (ports 0-7 or 8-15) is equal to OSC_FREQ div
+ * 16. In case of my board, each chip can take 6 channels of 115.2 kbaud.
+ * This information is not well-tested.
+ */
+static unsigned long baud_table[] =  {
+        0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
+        9600, 19200, 38400, 57600, 115200, 0,
+        };
+
+static inline int aurora_paranoia_check(struct Aurora_port const * port,
+				    kdev_t device, const char *routine)
+{
+#ifdef AURORA_PARANOIA_CHECK
+	static const char *badmagic =
+		KERN_DEBUG "aurora: Warning: bad aurora port magic number for device %s in %s\n";
+	static const char *badinfo =
+		KERN_DEBUG "aurora: Warning: null aurora port for device %s in %s\n";
+
+	if (!port) {
+		printk(badinfo, kdevname(device), routine);
+		return 1;
+	}
+	if (port->magic != AURORA_MAGIC) {
+		printk(badmagic, kdevname(device), routine);
+		return 1;
+	}
+#endif
+	return 0;
+}
+
+/*
+ * 
+ *  Service functions for aurora driver.
+ * 
+ */
+
+/* Get board number from pointer */
+extern inline int board_No (struct Aurora_board const * bp)
+{
+	return bp - aurora_board;
+}
+
+/* Get port number from pointer */
+extern inline int port_No (struct Aurora_port const * port)
+{
+	return AURORA_PORT(port - aurora_port); 
+}
+
+/* Get pointer to board from pointer to port */
+extern inline struct Aurora_board * port_Board(struct Aurora_port const * port)
+{
+	return &aurora_board[AURORA_BOARD(port - aurora_port)];
+}
+
+/* Wait for Channel Command Register ready */
+extern inline void aurora_wait_CCR(struct aurora_reg128 * r)
+{
+	unsigned long delay;
+
+#ifdef AURORA_DEBUG
+printk("aurora_wait_CCR\n");
+#endif
+	/* FIXME: need something more descriptive than 100000 :) */
+	for (delay = 100000; delay; delay--) 
+		if (!r->r[CD180_CCR])
+			return;
+	printk(KERN_DEBUG "aurora: Timeout waiting for CCR.\n");
+}
+
+/*
+ *  aurora probe functions.
+ */
+
+/* Must be called with enabled interrupts */
+extern inline void aurora_long_delay(unsigned long delay)
+{
+	unsigned long i;
+#ifdef AURORA_DEBUG
+printk("aurora_long_delay: start\n");
+#endif
+	for (i = jiffies + delay; i > jiffies; ) ;
+#ifdef AURORA_DEBUG
+printk("aurora_long_delay: end\n");
+#endif
+}
+
+/* Reset and setup CD180 chip */
+static int aurora_init_CD180(struct Aurora_board * bp, int chip)
+{
+	unsigned long flags;
+	int id;
+	
+#ifdef AURORA_DEBUG
+printk("aurora_init_CD180: start %d:%d\n",board_No(bp),chip);
+#endif
+	save_flags(flags); cli();
+	bp->r[chip]->r[CD180_CAR]=0;
+	bp->r[chip]->r[CD180_GSVR]=0;
+	aurora_wait_CCR(bp->r[chip]);			/* Wait for CCR ready        */
+	bp->r[chip]->r[CD180_CCR]=CCR_HARDRESET;      /* Reset CD180 chip          */
+	udelay(1);
+	sti();
+	id=1000;
+	while((--id)&&(bp->r[chip]->r[CD180_GSVR]!=0xff))udelay(100);
+	if(!id) {
+		printk(KERN_ERR "aurora%d: Chip %d failed init.\n",board_No(bp),chip);
+		restore_flags(flags);
+		return(-1);
+		}
+	cli();
+	bp->r[chip]->r[CD180_GSVR]=(board_No(bp)<<5)|((chip+1)<<3); /* Set ID for this chip      */
+	bp->r[chip]->r[CD180_MSMR]=0x80|bp->ACK_MINT;      /* Prio for modem intr       */
+	bp->r[chip]->r[CD180_TSMR]=0x80|bp->ACK_TINT;      /* Prio for transmitter intr */
+	bp->r[chip]->r[CD180_RSMR]=0x80|bp->ACK_RINT;      /* Prio for receiver intr    */
+	/* Setting up prescaler. We need 4 tick per 1 ms */
+	bp->r[chip]->r[CD180_PPRH]=(bp->oscfreq/(1000000/AURORA_TPS)) >> 8;
+	bp->r[chip]->r[CD180_PPRL]=(bp->oscfreq/(1000000/AURORA_TPS)) & 0xff;
+
+	bp->r[chip]->r[CD180_SRCR]=SRCR_AUTOPRI|SRCR_GLOBPRI;
+
+	id=bp->r[chip]->r[CD180_GFRCR];
+	printk(KERN_INFO "aurora%d: Chip %d id %02x: ",board_No(bp),chip,id);
+	if(bp->r[chip]->r[CD180_SRCR]&128)
+		switch(id){
+			case 0x82:printk("CL-CD1864 rev A\n");break;
+			case 0x83:printk("CL-CD1865 rev A\n");break;
+			case 0x84:printk("CL-CD1865 rev B\n");break;
+			case 0x85:printk("CL-CD1865 rev C\n");break;
+			default:printk("Unknown.\n");
+		}else
+		switch(id){
+			case 0x81:printk("CL-CD180 rev B\n");break;
+			case 0x82:printk("CL-CD180 rev C\n");break;
+			default:printk("Unknown.\n");
+		};
+	restore_flags(flags);
+#ifdef AURORA_DEBUG
+printk("aurora_init_CD180: end\n");
+#endif
+	return 0;
+}
+
+static int valid_irq(unsigned char irq)
+{
+int i;
+for(i=0;i<TYPE_1_IRQS;i++)
+	if (type_1_irq[i]==irq) return 1;
+return 0;
+}
+
+static void aurora_interrupt(int irq, void * dev_id, struct pt_regs * regs);
+
+/* Main probing routine, also sets irq. */
+static int aurora_probe(void) {
+	struct linux_sbus *sbus;
+	struct linux_sbus_device *sdev;
+	int grrr;
+	char buf[30];
+	int bn=0;
+	struct Aurora_board *bp;
+
+	for_each_sbus(sbus) {
+		for_each_sbusdev(sdev, sbus) {
+/*			printk("Try: %x %s\n",sdev,sdev->prom_name);*/
+			if (!strcmp(sdev->prom_name, "sio16")) {
+				#ifdef AURORA_DEBUG
+				printk(KERN_INFO "aurora: sio16 at %p\n",sdev);
+				#endif
+				prom_apply_sbus_ranges(sdev->my_bus, sdev->reg_addrs, sdev->num_registers, sdev);
+				if((sdev->reg_addrs[0].reg_size!=1)&&(sdev->reg_addrs[1].reg_size!=128)&&
+				   (sdev->reg_addrs[2].reg_size!=128)&&(sdev->reg_addrs[3].reg_size!=4)){
+				   	printk(KERN_ERR "aurora%d: registers' sizes do not match.\n",bn);
+				   	break;
+				   	}
+				bp=&aurora_board[bn];
+				bp->r0 = (struct aurora_reg1 *) sparc_alloc_io(sdev->reg_addrs[0].phys_addr, 0,
+					sdev->reg_addrs[0].reg_size, "sio16",sdev->reg_addrs[0].which_io, 0x0);
+				if (!bp->r0) {
+					printk(KERN_ERR "aurora%d: can't map reg_addrs[0]\n",bn);
+					break;
+				}
+				#ifdef AURORA_DEBUG
+				printk("Map reg 0: %x\n",bp->r0);
+				#endif
+				bp->r[0] = (struct aurora_reg128 *) sparc_alloc_io(sdev->reg_addrs[1].phys_addr, 0,
+					sdev->reg_addrs[1].reg_size, "sio16", sdev->reg_addrs[1].which_io, 0x0);
+				if (!bp->r[0]) {
+					printk(KERN_ERR "aurora%d: can't map reg_addrs[1]\n",bn);
+					break;
+				}
+				#ifdef AURORA_DEBUG
+				printk("Map reg 1: %x\n",bp->r[0]);
+				#endif
+				bp->r[1] = (struct aurora_reg128 *) sparc_alloc_io(sdev->reg_addrs[2].phys_addr, 0,
+					sdev->reg_addrs[2].reg_size, "sio16", sdev->reg_addrs[2].which_io, 0x0);
+				if (!bp->r[1]) {
+					printk(KERN_ERR "aurora%d: can't map reg_addrs[2]\n",bn);
+					break;
+				}
+				#ifdef AURORA_DEBUG
+				printk("Map reg 2: %x\n",bp->r[1]);
+				#endif
+				bp->r3 = (struct aurora_reg4 *) sparc_alloc_io(sdev->reg_addrs[3].phys_addr, 0,
+					sdev->reg_addrs[3].reg_size, "sio16", sdev->reg_addrs[3].which_io, 0x0);
+				if (!bp->r3) {
+					printk(KERN_ERR "aurora%d: can't map reg_addrs[3]\n",bn);
+					break;
+				}
+				#ifdef AURORA_DEBUG
+				printk("Map reg 3: %x\n",bp->r3);
+				#endif
+				/* Variables setup */
+				bp->flags = 0;
+				#ifdef AURORA_DEBUG
+				grrr=prom_getint(sdev->prom_node,"intr");
+				printk("intr pri %d\n",grrr);
+				#endif
+				if ((bp->irq=irqs[bn]) && valid_irq(bp->irq) &&
+				    !request_irq(bp->irq|0x30, aurora_interrupt, SA_SHIRQ, "sio16", bp)) {
+					free_irq(bp->irq|0x30, bp);
+				} else
+				if ((bp->irq=prom_getint(sdev->prom_node, "bintr")) && valid_irq(bp->irq) &&
+				    !request_irq(bp->irq|0x30, aurora_interrupt, SA_SHIRQ, "sio16", bp)) {
+					free_irq(bp->irq|0x30, bp);
+				} else
+				if ((bp->irq=prom_getint(sdev->prom_node, "intr")) && valid_irq(bp->irq) &&
+				    !request_irq(bp->irq|0x30, aurora_interrupt, SA_SHIRQ, "sio16", bp)) {
+					free_irq(bp->irq|0x30, bp);
+				} else
+				for(grrr=0;grrr<TYPE_1_IRQS;grrr++) {
+					if ((bp->irq=type_1_irq[grrr])&&!request_irq(bp->irq|0x30, aurora_interrupt, SA_SHIRQ, "sio16", bp)) {
+						free_irq(bp->irq|0x30, bp);
+						break;
+					} else {
+					printk(KERN_ERR "aurora%d: Could not get an irq for this board !!!\n",bn);
+					bp->flags=0xff;
+					}
+				}
+				if(bp->flags==0xff)break;
+				printk(KERN_INFO "aurora%d: irq %d\n",bn,bp->irq&0x0f);
+				buf[0]=0;
+				grrr=prom_getproperty(sdev->prom_node,"dtr_rts",buf,sizeof(buf));
+				if(!strcmp(buf,"swapped")){
+					printk(KERN_INFO "aurora%d: Swapped DTR and RTS\n",bn);
+					bp->DTR=MSVR_RTS;
+					bp->RTS=MSVR_DTR;
+					bp->MSVDTR=CD180_MSVRTS;
+					bp->MSVRTS=CD180_MSVDTR;
+					bp->flags|=AURORA_BOARD_DTR_FLOW_OK;
+					}else{
+					#ifdef AURORA_FORCE_DTR_FLOW
+					printk(KERN_INFO "aurora%d: Forcing swapped DTR-RTS\n",bn);
+					bp->DTR=MSVR_RTS;
+					bp->RTS=MSVR_DTR;
+					bp->MSVDTR=CD180_MSVRTS;
+					bp->MSVRTS=CD180_MSVDTR;
+					bp->flags|=AURORA_BOARD_DTR_FLOW_OK;
+					#else
+					printk(KERN_INFO "aurora%d: Normal DTR and RTS\n",bn);
+					bp->DTR=MSVR_DTR;
+					bp->RTS=MSVR_RTS;
+					bp->MSVDTR=CD180_MSVDTR;
+					bp->MSVRTS=CD180_MSVRTS;
+					#endif
+				}
+				bp->oscfreq=prom_getint(sdev->prom_node,"clk")*100;
+				printk(KERN_INFO "aurora%d: Oscillator: %d Hz\n",bn,bp->oscfreq);
+				grrr=prom_getproperty(sdev->prom_node,"chip",buf,sizeof(buf));
+				printk(KERN_INFO "aurora%d: Chips: %s\n",bn,buf);
+				grrr=prom_getproperty(sdev->prom_node,"manu",buf,sizeof(buf));
+				printk(KERN_INFO "aurora%d: Manufacturer: %s\n",bn,buf);
+				grrr=prom_getproperty(sdev->prom_node,"model",buf,sizeof(buf));
+				printk(KERN_INFO "aurora%d: Model: %s\n",bn,buf);
+				grrr=prom_getproperty(sdev->prom_node,"rev",buf,sizeof(buf));
+				printk(KERN_INFO "aurora%d: Revision: %s\n",bn,buf);
+				grrr=prom_getproperty(sdev->prom_node,"mode",buf,sizeof(buf));
+				printk(KERN_INFO "aurora%d: Mode: %s\n",bn,buf);
+				#ifdef MODULE
+				bp->count=0;
+				#endif
+				bp->flags = AURORA_BOARD_PRESENT;
+				/* hardware ack */
+				bp->ACK_MINT=1;
+				bp->ACK_TINT=2;
+				bp->ACK_RINT=3;
+				bn++;
+			}
+		}
+	}
+	return bn;
+}
+
+static void aurora_release_io_range(struct Aurora_board *bp)
+{
+sparc_free_io(bp->r0,1);
+sparc_free_io(bp->r[0],128);
+sparc_free_io(bp->r[1],128);
+sparc_free_io(bp->r3,4);
+}
+
+extern inline void aurora_mark_event(struct Aurora_port * port, int event)
+{
+#ifdef AURORA_DEBUG
+printk("aurora_mark_event: start\n");
+#endif
+	set_bit(event, &port->event);
+	queue_task(&port->tqueue, &tq_aurora);
+	mark_bh(AURORA_BH);
+#ifdef AURORA_DEBUG
+printk("aurora_mark_event: end\n");
+#endif
+}
+
+extern inline struct Aurora_port * aurora_get_port(struct Aurora_board const * bp,
+					int chip, unsigned char const * what)
+{
+	unsigned char channel;
+	struct Aurora_port * port;
+
+	channel = (chip<<3)|((bp->r[chip]->r[CD180_GSCR]&GSCR_CHAN)>>GSCR_CHAN_OFF);
+	port = &aurora_port[board_No(bp) * AURORA_NPORT * AURORA_NCD180 + channel];
+	if (port->flags & ASYNC_INITIALIZED)  {
+		return port;
+	}
+	printk(KERN_DEBUG "aurora%d: %s interrupt from invalid port %d\n",
+	       board_No(bp), what, channel);
+	return NULL;
+}
+
+extern inline void aurora_receive_exc(struct Aurora_board const * bp, int chip)
+{
+	struct Aurora_port *port;
+	struct tty_struct *tty;
+	unsigned char status;
+	unsigned char ch;
+	
+	if (!(port = aurora_get_port(bp, chip, "Receive_x")))
+		return;
+
+	tty = port->tty;
+	if (tty->flip.count >= TTY_FLIPBUF_SIZE)  {
+	#ifdef AURORA_INTNORM
+		printk("aurora%d: port %d: Working around flip buffer overflow.\n",
+		       board_No(bp), port_No(port));
+	#endif
+		return;
+	}
+	
+#ifdef AURORA_REPORT_OVERRUN	
+	status = bp->r[chip]->r[CD180_RCSR];
+	if (status & RCSR_OE)  {
+		port->overrun++;
+#if 1
+		printk("aurora%d: port %d: Overrun. Total %ld overruns.\n",
+		       board_No(bp), port_No(port), port->overrun);
+#endif		
+	}
+	status &= port->mark_mask;
+#else	
+	status = bp->r[chip]->r[CD180_RCSR] & port->mark_mask;
+#endif	
+	ch = bp->r[chip]->r[CD180_RDR];
+	if (!status)  {
+		return;
+	}
+	if (status & RCSR_TOUT)  {
+/*		printk("aurora%d: port %d: Receiver timeout. Hardware problems ?\n",
+		       board_No(bp), port_No(port));*/
+		return;
+		
+	} else if (status & RCSR_BREAK)  {
+		printk(KERN_DEBUG "aurora%d: port %d: Handling break...\n",
+		       board_No(bp), port_No(port));
+		*tty->flip.flag_buf_ptr++ = TTY_BREAK;
+		if (port->flags & ASYNC_SAK)
+			do_SAK(tty);
+		
+	} else if (status & RCSR_PE) 
+		*tty->flip.flag_buf_ptr++ = TTY_PARITY;
+	
+	else if (status & RCSR_FE) 
+		*tty->flip.flag_buf_ptr++ = TTY_FRAME;
+	
+        else if (status & RCSR_OE)
+		*tty->flip.flag_buf_ptr++ = TTY_OVERRUN;
+	
+	else
+		*tty->flip.flag_buf_ptr++ = 0;
+	
+	*tty->flip.char_buf_ptr++ = ch;
+	tty->flip.count++;
+	queue_task(&tty->flip.tqueue, &tq_timer);
+}
+
+extern inline void aurora_receive(struct Aurora_board const * bp, int chip)
+{
+	struct Aurora_port *port;
+	struct tty_struct *tty;
+	unsigned char count,cnt;
+
+	if (!(port = aurora_get_port(bp, chip, "Receive")))
+		return;
+	
+	tty = port->tty;
+	
+	count = bp->r[chip]->r[CD180_RDCR];
+
+#ifdef AURORA_REPORT_FIFO
+	port->hits[count > 8 ? 9 : count]++;
+#endif
+
+	while (count--)  {
+		if (tty->flip.count >= TTY_FLIPBUF_SIZE)  {
+		#ifdef AURORA_INTNORM
+			printk("aurora%d: port %d: Working around flip buffer overflow.\n",
+			       board_No(bp), port_No(port));
+		#endif
+			break;
+		}
+		cnt=bp->r[chip]->r[CD180_RDR];
+		*tty->flip.char_buf_ptr++ = cnt;
+		*tty->flip.flag_buf_ptr++ = 0;
+		tty->flip.count++;
+	}
+	queue_task(&tty->flip.tqueue, &tq_timer);
+}
+
+extern inline void aurora_transmit(struct Aurora_board const * bp, int chip)
+{
+	struct Aurora_port *port;
+	struct tty_struct *tty;
+	unsigned char count;
+	
+	
+	if (!(port = aurora_get_port(bp, chip, "Transmit")))
+		return;
+		
+	tty = port->tty;
+	
+	if (port->SRER & SRER_TXEMPTY)  {
+		/* FIFO drained */
+		bp->r[chip]->r[CD180_CAR]=port_No(port)&7;
+		udelay(1);
+		port->SRER &= ~SRER_TXEMPTY;
+		bp->r[chip]->r[CD180_SRER]=port->SRER;
+		return;
+	}
+	
+	if ((port->xmit_cnt <= 0 && !port->break_length)
+	    || tty->stopped || tty->hw_stopped)  {
+		bp->r[chip]->r[CD180_CAR]=port_No(port)&7;
+		udelay(1);
+		port->SRER &= ~SRER_TXRDY;
+		bp->r[chip]->r[CD180_SRER]=port->SRER;
+		return;
+	}
+	
+	if (port->break_length)  {
+		if (port->break_length > 0)  {
+			if (port->COR2 & COR2_ETC)  {
+				bp->r[chip]->r[CD180_TDR]=CD180_C_ESC;
+				bp->r[chip]->r[CD180_TDR]=CD180_C_SBRK;
+				port->COR2 &= ~COR2_ETC;
+			}
+			count = MIN(port->break_length, 0xff);
+			bp->r[chip]->r[CD180_TDR]=CD180_C_ESC;
+			bp->r[chip]->r[CD180_TDR]=CD180_C_DELAY;
+			bp->r[chip]->r[CD180_TDR]=count;
+			if (!(port->break_length -= count))
+				port->break_length--;
+		} else  {
+			bp->r[chip]->r[CD180_TDR]=CD180_C_ESC;
+			bp->r[chip]->r[CD180_TDR]=CD180_C_EBRK;
+			bp->r[chip]->r[CD180_COR2]=port->COR2;
+			aurora_wait_CCR(bp->r[chip]);
+			bp->r[chip]->r[CD180_CCR]=CCR_CORCHG2;
+			port->break_length = 0;
+		}
+		return;
+	}
+	
+	count = CD180_NFIFO;
+	do {
+		bp->r[chip]->r[CD180_TDR]=port->xmit_buf[port->xmit_tail++];
+		port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE-1);
+		if (--port->xmit_cnt <= 0)
+			break;
+	} while (--count > 0);
+	
+	if (port->xmit_cnt <= 0)  {
+		bp->r[chip]->r[CD180_CAR]=port_No(port)&7;
+		udelay(1);
+		port->SRER &= ~SRER_TXRDY;
+		bp->r[chip]->r[CD180_SRER]=port->SRER;
+	}
+	if (port->xmit_cnt <= port->wakeup_chars)
+		aurora_mark_event(port, RS_EVENT_WRITE_WAKEUP);
+}
+
+extern inline void aurora_check_modem(struct Aurora_board const * bp, int chip)
+{
+	struct Aurora_port *port;
+	struct tty_struct *tty;
+	unsigned char mcr;
+	
+	if (!(port = aurora_get_port(bp, chip, "Modem")))
+		return;
+		
+	tty = port->tty;
+	
+	mcr = bp->r[chip]->r[CD180_MCR];
+	if (mcr & MCR_CDCHG)  {
+		if (bp->r[chip]->r[CD180_MSVR] & MSVR_CD) 
+			wake_up_interruptible(&port->open_wait);
+		else if (!((port->flags & ASYNC_CALLOUT_ACTIVE) &&
+			   (port->flags & ASYNC_CALLOUT_NOHUP)))
+			queue_task(&port->tqueue_hangup,  
+					   &tq_scheduler);      
+	}
+	
+/* We don't have such things yet. My aurora board has DTR and RTS swapped, but that doesn't count in this driver. Let's hope
+ * Aurora didn't made any boards with CTS or DSR broken...
+ */
+/* #ifdef AURORA_BRAIN_DAMAGED_CTS
+	if (mcr & MCR_CTSCHG)  {
+		if (aurora_in(bp, CD180_MSVR) & MSVR_CTS)  {
+			tty->hw_stopped = 0;
+			port->SRER |= SRER_TXRDY;
+			if (port->xmit_cnt <= port->wakeup_chars)
+				aurora_mark_event(port, RS_EVENT_WRITE_WAKEUP);
+		} else  {
+			tty->hw_stopped = 1;
+			port->SRER &= ~SRER_TXRDY;
+		}
+		bp->r[chip]->r[CD180_SRER, port->SRER);
+	}
+	if (mcr & MCR_DSRCHG)  {
+		if (aurora_in(bp, CD180_MSVR) & MSVR_DSR)  {
+			tty->hw_stopped = 0;
+			port->SRER |= SRER_TXRDY;
+			if (port->xmit_cnt <= port->wakeup_chars)
+				aurora_mark_event(port, RS_EVENT_WRITE_WAKEUP);
+		} else  {
+			tty->hw_stopped = 1;
+			port->SRER &= ~SRER_TXRDY;
+		}
+		bp->r[chip]->r[CD180_SRER, port->SRER);
+	}
+#endif AURORA_BRAIN_DAMAGED_CTS */
+	
+	/* Clear change bits */
+	bp->r[chip]->r[CD180_MCR]=0;
+}
+
+/* The main interrupt processing routine */
+static void aurora_interrupt(int irq, void * dev_id, struct pt_regs * regs)
+{
+	unsigned char status;
+	unsigned char ack,chip/*,chip_id*/;
+	struct Aurora_board * bp = (struct Aurora_board *) dev_id;
+	unsigned long loop=0;
+
+	#ifdef AURORA_INT_DEBUG
+	printk("IRQ%d %d\n",irq,++irqhit);
+	#ifdef AURORA_FLOODPRO
+	if (irqhit>=AURORA_FLOODPRO)
+		bp->r0->r=8;
+	#endif
+	#endif
+	
+/* old	bp = IRQ_to_board[irq&0x0f];*/
+	
+	if (!bp || !(bp->flags & AURORA_BOARD_ACTIVE))  {
+		return;
+	}
+
+/*	The while() below takes care of this.
+	status=bp->r[0]->r[CD180_SRSR];
+	#ifdef AURORA_INT_DEBUG
+	printk("mumu: %02x\n",status);
+	#endif
+	if (!(status&SRSR_ANYINT)) return; * Nobody has anything to say, so exit *
+*/
+	while ((loop++ < 48)&&(status=bp->r[0]->r[CD180_SRSR]&SRSR_ANYINT)){
+		#ifdef AURORA_INT_DEBUG
+		printk("SRSR: %02x\n",status);
+		#endif
+		if (status&SRSR_REXT) {
+			ack=bp->r3->r[bp->ACK_RINT];
+			#ifdef AURORA_INT_DEBUG
+			printk("R-ACK %02x\n",ack);
+			#endif
+			if ((ack>>5)==board_No(bp)) {
+				if ((chip=((ack>>3)&3)-1) < AURORA_NCD180) {
+					if ((ack&GSVR_ITMASK)==GSVR_IT_RGD) {
+						aurora_receive(bp,chip);
+						bp->r[chip]->r[CD180_EOSRR]=0;
+					} else
+					if ((ack&GSVR_ITMASK)==GSVR_IT_REXC) {
+						aurora_receive_exc(bp,chip);
+						bp->r[chip]->r[CD180_EOSRR]=0;
+					}
+				}
+			}
+		} else
+		if (status&SRSR_TEXT) {
+			ack=bp->r3->r[bp->ACK_TINT];
+			#ifdef AURORA_INT_DEBUG
+			printk("T-ACK %02x\n",ack);
+			#endif
+			if ((ack>>5)==board_No(bp)) {
+				if ((chip=((ack>>3)&3)-1) < AURORA_NCD180) {
+					if ((ack&GSVR_ITMASK)==GSVR_IT_TX) {
+						aurora_transmit(bp,chip);
+						bp->r[chip]->r[CD180_EOSRR]=0;
+					}
+				}
+			}
+		} else
+		if (status&SRSR_MEXT) {
+			ack=bp->r3->r[bp->ACK_MINT];
+			#ifdef AURORA_INT_DEBUG
+			printk("M-ACK %02x\n",ack);
+			#endif
+			if ((ack>>5)==board_No(bp)) {
+				if ((chip=((ack>>3)&3)-1) < AURORA_NCD180) {
+					if ((ack&GSVR_ITMASK)==GSVR_IT_MDM) {
+						aurora_check_modem(bp,chip);
+						bp->r[chip]->r[CD180_EOSRR]=0;
+					}
+				}
+			}
+		}
+	}
+/* I guess this faster code can be used with CD1865, using AUROPRI and GLOBPRI.
+	while ((loop++ < 48)&&(status=bp->r[0]->r[CD180_SRSR]&SRSR_ANYINT)){
+		#ifdef AURORA_INT_DEBUG
+		printk("SRSR: %02x\n",status);
+		#endif
+		ack=bp->r3->r[0];
+		#ifdef AURORA_INT_DEBUG
+		printk("ACK: %02x\n",ack);
+		#endif
+		if ((ack>>5)==board_No(bp)) {
+			if ((chip=((ack>>3)&3)-1) < AURORA_NCD180) {
+				ack&=GSVR_ITMASK;
+				if (ack==GSVR_IT_RGD) {
+					aurora_receive(bp,chip);
+					bp->r[chip]->r[CD180_EOSRR]=0;
+				} else
+				if (ack==GSVR_IT_REXC) {
+					aurora_receive_exc(bp,chip);
+					bp->r[chip]->r[CD180_EOSRR]=0;
+				} else
+				if (ack==GSVR_IT_TX) {
+					aurora_transmit(bp,chip);
+					bp->r[chip]->r[CD180_EOSRR]=0;
+				} else
+				if (ack==GSVR_IT_MDM) {
+					aurora_check_modem(bp,chip);
+					bp->r[chip]->r[CD180_EOSRR]=0;
+				}
+			}
+		}
+	}
+*/
+/* This is the old handling routine, used in riscom8 for only one CD180. I keep it here for reference.
+for(chip=0;chip<AURORA_NCD180;chip++){
+	chip_id=(board_No(bp)<<5)|((chip+1)<<3);
+	loop=0;
+	while ((loop++ < 1) && ((status = bp->r[chip]->r[CD180_SRSR]) &
+			 (SRSR_TEXT | SRSR_MEXT | SRSR_REXT))) {
+
+		if (status & SRSR_REXT) {
+			ack = bp->r3->r[bp->ACK_RINT];
+			if (ack == (chip_id | GSVR_IT_RGD)){
+				#ifdef AURORA_INTMSG
+				printk("RX ACK\n");
+				#endif
+				aurora_receive(bp,chip);
+				}
+			else if (ack == (chip_id | GSVR_IT_REXC)){
+				#ifdef AURORA_INTMSG
+				printk("RXC ACK\n");
+				#endif
+				aurora_receive_exc(bp,chip);
+				}
+			else
+				#ifdef AURORA_INTNORM
+				printk("aurora%d-%d: Bad receive ack 0x%02x.\n",
+				       board_No(bp), chip, ack)
+				#endif
+				;
+
+		} else if (status & SRSR_TEXT) {
+			ack = bp->r3->r[bp->ACK_TINT];
+			if (ack == (chip_id | GSVR_IT_TX)){
+				#ifdef AURORA_INTMSG
+				printk("TX ACK\n");
+				#endif
+				aurora_transmit(bp,chip);
+				}
+			else{
+				#ifdef AURORA_INTNORM
+				printk("aurora%d-%d: Bad transmit ack 0x%02x.\n",
+				       board_No(bp), chip, ack);
+				#endif
+				       }
+
+		} else  if (status & SRSR_MEXT)  {
+			ack = bp->r3->r[bp->ACK_MINT];
+			if (ack == (chip_id | GSVR_IT_MDM)){
+				#ifdef AURORA_INTMSG
+				printk("MDM ACK\n");
+				#endif
+				aurora_check_modem(bp,chip);
+				}
+			else
+				#ifdef AURORA_INTNORM
+				printk("aurora%d-%d: Bad modem ack 0x%02x.\n",
+				       board_No(bp), chip, ack)
+				#endif
+				;
+		
+		}
+		bp->r[chip]->r[CD180_EOSRR]=0;
+	}
+    }
+*/
+}
+
+
+#ifdef AURORA_INT_DEBUG
+static void aurora_timer (unsigned long ignored);
+
+static struct timer_list
+aurora_poll_timer = { NULL, NULL, 0, 0, aurora_timer };
+
+static void
+aurora_timer (unsigned long ignored)
+{
+	unsigned long flags;
+	int i;
+
+	save_flags(flags); cli();
+
+printk("SRSR: %02x,%02x - ",aurora_board[0].r[0]->r[CD180_SRSR],aurora_board[0].r[1]->r[CD180_SRSR]);
+for(i=0;i<4;i++){
+	udelay(1);
+	printk("%02x ",aurora_board[0].r3->r[i]);
+	}
+printk("\n");
+
+	aurora_poll_timer.expires = jiffies + 300;
+	add_timer (&aurora_poll_timer);
+
+	restore_flags(flags);
+}
+#endif
+
+/*
+ *  Routines for open & close processing.
+ */
+
+/* Called with disabled interrupts */
+extern inline int aurora_setup_board(struct Aurora_board * bp)
+{
+	int error;
+	
+#ifdef AURORA_ALLIRQ
+	int i;
+	for(i=0;i<AURORA_ALLIRQ;i++){
+		error = request_irq(allirq[i]|0x30, aurora_interrupt, SA_SHIRQ, "sio16", bp);
+		if (error){
+			printk(KERN_ERR "IRQ%d request error %d\n",allirq[i],error);
+		}
+	}
+#else
+	error = request_irq(bp->irq|0x30, aurora_interrupt, SA_SHIRQ, "sio16", bp);
+	if (error){
+		printk(KERN_ERR "IRQ request error %d\n",error);
+		return error;
+	}
+#endif
+	/* Board reset */
+	bp->r0->r=0;
+	udelay(1);
+	if(bp->flags&AURORA_BOARD_TYPE_2){
+		/* unknown yet */
+	} else {
+		bp->r0->r=AURORA_CFG_ENABLE_IO|AURORA_CFG_ENABLE_IRQ|(((bp->irq)&0x0f)>>2);
+	}
+	udelay(10000);
+
+	if (aurora_init_CD180(bp,0))error=1;error=0;
+	if (aurora_init_CD180(bp,1))error++;
+	if (error==AURORA_NCD180) {
+		printk(KERN_ERR "Both chips failed initialisation.\n");
+		return -EIO;
+		}
+
+#ifdef AURORA_INT_DEBUG
+	aurora_poll_timer.expires=jiffies+1;
+	add_timer(&aurora_poll_timer);
+#endif
+#ifdef AURORA_DEBUG
+printk("aurora_setup_board: end\n");
+#endif
+	return 0;
+}
+
+/* Called with disabled interrupts */
+extern inline void aurora_shutdown_board(struct Aurora_board *bp)
+{
+	int i;
+
+#ifdef AURORA_DEBUG
+printk("aurora_shutdown_board: start\n");
+#endif
+
+#ifdef AURORA_INT_DEBUG
+	del_timer(&aurora_poll_timer);
+#endif
+
+#ifdef AURORA_ALLIRQ
+for(i=0;i<AURORA_ALLIRQ;i++){
+	free_irq(allirq[i]|0x30, bp);
+/*	IRQ_to_board[allirq[i]&0xf] = NULL;*/
+	}
+#else
+	free_irq(bp->irq|0x30, bp);
+/*	IRQ_to_board[bp->irq&0xf] = NULL;*/
+#endif	
+	/* Drop all DTR's */
+	for(i=0;i<16;i++){
+		bp->r[i>>3]->r[CD180_CAR]=i&7;
+		udelay(1);
+		bp->r[i>>3]->r[CD180_MSVR]=0;
+		udelay(1);
+		}
+	/* Board shutdown */
+	bp->r0->r=0;
+
+#ifdef AURORA_DEBUG
+printk("aurora_shutdown_board: end\n");
+#endif
+}
+
+/*
+ * Setting up port characteristics. 
+ * Must be called with disabled interrupts
+ */
+static void aurora_change_speed(struct Aurora_board *bp, struct Aurora_port *port)
+{
+	struct tty_struct *tty;
+	unsigned long baud;
+	long tmp;
+	unsigned char cor1 = 0, cor3 = 0;
+	unsigned char mcor1 = 0, mcor2 = 0,chip;
+	
+#ifdef AURORA_DEBUG
+printk("aurora_change_speed: start\n");
+#endif
+	if (!(tty = port->tty) || !tty->termios)
+		return;
+		
+	chip=AURORA_CD180(port_No(port));
+
+	port->SRER  = 0;
+	port->COR2 = 0;
+	port->MSVR = MSVR_RTS|MSVR_DTR;
+	
+	baud = C_BAUD(tty);
+	
+	if (baud & CBAUDEX) {
+		baud &= ~CBAUDEX;
+		if (baud < 1 || baud > 2) 
+			port->tty->termios->c_cflag &= ~CBAUDEX;
+		else
+			baud += 15;
+	}
+	if (baud == 15)  {
+		if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
+			baud ++;
+		if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
+			baud += 2;
+	}
+	
+	/* Select port on the board */
+	bp->r[chip]->r[CD180_CAR]=port_No(port)&7;
+	udelay(1);
+	
+	if (!baud_table[baud])  {
+		/* Drop DTR & exit */
+		port->MSVR &= ~(bp->DTR|bp->RTS);
+		bp->r[chip]->r[CD180_MSVR]=port->MSVR;
+		return;
+	} else  {
+		/* Set DTR on */
+		port->MSVR |= bp->DTR;
+		bp->r[chip]->r[CD180_MSVR]=port->MSVR;
+	}
+	
+	/*
+	 * Now we must calculate some speed depended things 
+	 */
+	
+	/* Set baud rate for port */
+	tmp = (((bp->oscfreq + baud_table[baud]/2) / baud_table[baud] +
+		CD180_TPC/2) / CD180_TPC);
+
+/*	tmp = (bp->oscfreq/7)/baud_table[baud];
+	if((tmp%10)>4)tmp=tmp/10+1;else tmp=tmp/10;*/
+/*	printk("Prescaler period: %d\n",tmp);*/
+
+	bp->r[chip]->r[CD180_RBPRH]=(tmp >> 8) & 0xff;
+	bp->r[chip]->r[CD180_TBPRH]=(tmp >> 8) & 0xff;
+	bp->r[chip]->r[CD180_RBPRL]=tmp & 0xff;
+	bp->r[chip]->r[CD180_TBPRL]=tmp & 0xff;
+	
+	baud = (baud_table[baud] + 5) / 10;   /* Estimated CPS */
+	
+	/* Two timer ticks seems enough to wakeup something like SLIP driver */
+	tmp = ((baud + HZ/2) / HZ) * 2 - CD180_NFIFO;		
+	port->wakeup_chars = (tmp < 0) ? 0 : ((tmp >= SERIAL_XMIT_SIZE) ?
+					      SERIAL_XMIT_SIZE - 1 : tmp);
+	
+	/* Receiver timeout will be transmission time for 1.5 chars */
+	tmp = (AURORA_TPS + AURORA_TPS/2 + baud/2) / baud;
+	tmp = (tmp > 0xff) ? 0xff : tmp;
+	bp->r[chip]->r[CD180_RTPR]=tmp;
+	
+	switch (C_CSIZE(tty))  {
+	 case CS5:
+		cor1 |= COR1_5BITS;
+		break;
+	 case CS6:
+		cor1 |= COR1_6BITS;
+		break;
+	 case CS7:
+		cor1 |= COR1_7BITS;
+		break;
+	 case CS8:
+		cor1 |= COR1_8BITS;
+		break;
+	}
+	
+	if (C_CSTOPB(tty)) 
+		cor1 |= COR1_2SB;
+	
+	cor1 |= COR1_IGNORE;
+	if (C_PARENB(tty))  {
+		cor1 |= COR1_NORMPAR;
+		if (C_PARODD(tty)) 
+			cor1 |= COR1_ODDP;
+		if (I_INPCK(tty)) 
+			cor1 &= ~COR1_IGNORE;
+	}
+	/* Set marking of some errors */
+	port->mark_mask = RCSR_OE | RCSR_TOUT;
+	if (I_INPCK(tty)) 
+		port->mark_mask |= RCSR_FE | RCSR_PE;
+	if (I_BRKINT(tty) || I_PARMRK(tty)) 
+		port->mark_mask |= RCSR_BREAK;
+	if (I_IGNPAR(tty)) 
+		port->mark_mask &= ~(RCSR_FE | RCSR_PE);
+	if (I_IGNBRK(tty))  {
+		port->mark_mask &= ~RCSR_BREAK;
+		if (I_IGNPAR(tty)) 
+			/* Real raw mode. Ignore all */
+			port->mark_mask &= ~RCSR_OE;
+	}
+	/* Enable Hardware Flow Control */
+	if (C_CRTSCTS(tty))  {
+/*#ifdef AURORA_BRAIN_DAMAGED_CTS
+		port->SRER |= SRER_DSR | SRER_CTS;
+		mcor1 |= MCOR1_DSRZD | MCOR1_CTSZD;
+		mcor2 |= MCOR2_DSROD | MCOR2_CTSOD;
+		tty->hw_stopped = !(aurora_in(bp, CD180_MSVR) & (MSVR_CTS|MSVR_DSR));
+#else*/
+		port->COR2 |= COR2_CTSAE;
+/*#endif*/
+		if (bp->flags&AURORA_BOARD_DTR_FLOW_OK) {
+			mcor1 |= AURORA_RXTH;
+		}
+	}
+	/* Enable Software Flow Control. FIXME: I'm not sure about this */
+	/* Some people reported that it works, but I still doubt */
+	if (I_IXON(tty))  {
+		port->COR2 |= COR2_TXIBE;
+		cor3 |= (COR3_FCT | COR3_SCDE);
+		if (I_IXANY(tty))
+			port->COR2 |= COR2_IXM;
+		bp->r[chip]->r[CD180_SCHR1]=START_CHAR(tty);
+		bp->r[chip]->r[CD180_SCHR2]=STOP_CHAR(tty);
+		bp->r[chip]->r[CD180_SCHR3]=START_CHAR(tty);
+		bp->r[chip]->r[CD180_SCHR4]=STOP_CHAR(tty);
+	}
+	if (!C_CLOCAL(tty))  {
+		/* Enable CD check */
+		port->SRER |= SRER_CD;
+		mcor1 |= MCOR1_CDZD;
+		mcor2 |= MCOR2_CDOD;
+	}
+	
+	if (C_CREAD(tty)) 
+		/* Enable receiver */
+		port->SRER |= SRER_RXD;
+	
+	/* Set input FIFO size (1-8 bytes) */
+	cor3 |= AURORA_RXFIFO; 
+	/* Setting up CD180 channel registers */
+	bp->r[chip]->r[CD180_COR1]=cor1;
+	bp->r[chip]->r[CD180_COR2]=port->COR2;
+	bp->r[chip]->r[CD180_COR3]=cor3;
+	/* Make CD180 know about registers change */
+	aurora_wait_CCR(bp->r[chip]);
+	bp->r[chip]->r[CD180_CCR]=CCR_CORCHG1 | CCR_CORCHG2 | CCR_CORCHG3;
+	/* Setting up modem option registers */
+	bp->r[chip]->r[CD180_MCOR1]=mcor1;
+	bp->r[chip]->r[CD180_MCOR2]=mcor2;
+	/* Enable CD180 transmitter & receiver */
+	aurora_wait_CCR(bp->r[chip]);
+	bp->r[chip]->r[CD180_CCR]=CCR_TXEN | CCR_RXEN;
+	/* Enable interrupts */
+	bp->r[chip]->r[CD180_SRER]=port->SRER;
+	/* And finally set RTS on */
+	bp->r[chip]->r[CD180_MSVR]=port->MSVR;
+#ifdef AURORA_DEBUG
+printk("aurora_change_speed: end\n");
+#endif
+}
+
+/* Must be called with interrupts enabled */
+static int aurora_setup_port(struct Aurora_board *bp, struct Aurora_port *port)
+{
+	unsigned long flags;
+	
+#ifdef AURORA_DEBUG
+printk("aurora_setup_port: start %d\n",port_No(port));
+#endif
+	if (port->flags & ASYNC_INITIALIZED)
+		return 0;
+		
+	if (!port->xmit_buf) {
+		/* We may sleep in get_free_page() */
+		unsigned long tmp;
+		
+		if (!(tmp = get_free_page(GFP_KERNEL)))
+			return -ENOMEM;
+		    
+		if (port->xmit_buf) {
+			free_page(tmp);
+			return -ERESTARTSYS;
+		}
+		port->xmit_buf = (unsigned char *) tmp;
+	}
+		
+	save_flags(flags); cli();
+		
+	if (port->tty) 
+		clear_bit(TTY_IO_ERROR, &port->tty->flags);
+		
+#ifdef MODULE
+	if (port->count == 1) {
+		MOD_INC_USE_COUNT;
+		if((++bp->count)==1)
+			bp->flags|=AURORA_BOARD_ACTIVE;
+	}
+#endif
+
+	port->xmit_cnt = port->xmit_head = port->xmit_tail = 0;
+	aurora_change_speed(bp, port);
+	port->flags |= ASYNC_INITIALIZED;
+		
+	restore_flags(flags);
+#ifdef AURORA_DEBUG
+printk("aurora_setup_port: end\n");
+#endif
+	return 0;
+}
+
+/* Must be called with interrupts disabled */
+static void aurora_shutdown_port(struct Aurora_board *bp, struct Aurora_port *port)
+{
+	struct tty_struct *tty;
+	unsigned char chip;
+
+#ifdef AURORA_DEBUG
+printk("aurora_shutdown_port: start\n");
+#endif
+	if (!(port->flags & ASYNC_INITIALIZED)) 
+		return;
+	
+	chip=AURORA_CD180(port_No(port));
+	
+#ifdef AURORA_REPORT_OVERRUN
+	printk("aurora%d: port %d: Total %ld overruns were detected.\n",
+	       board_No(bp), port_No(port), port->overrun);
+#endif	
+#ifdef AURORA_REPORT_FIFO
+	{
+		int i;
+		
+		printk("aurora%d: port %d: FIFO hits [ ",
+		       board_No(bp), port_No(port));
+		for (i = 0; i < 10; i++)  {
+			printk("%ld ", port->hits[i]);
+		}
+		printk("].\n");
+	}
+#endif	
+	if (port->xmit_buf)  {
+		free_page((unsigned long) port->xmit_buf);
+		port->xmit_buf = NULL;
+	}
+
+	if (!(tty = port->tty) || C_HUPCL(tty))  {
+		/* Drop DTR */
+		port->MSVR &= ~(bp->DTR|bp->RTS);
+		bp->r[chip]->r[CD180_MSVR]=port->MSVR;
+	}
+	
+        /* Select port */
+	bp->r[chip]->r[CD180_CAR]=port_No(port)&7;
+	udelay(1);
+	/* Reset port */
+	aurora_wait_CCR(bp->r[chip]);
+	bp->r[chip]->r[CD180_CCR]=CCR_SOFTRESET;
+	/* Disable all interrupts from this port */
+	port->SRER = 0;
+	bp->r[chip]->r[CD180_SRER]=port->SRER;
+	
+	if (tty)  
+		set_bit(TTY_IO_ERROR, &tty->flags);
+	port->flags &= ~ASYNC_INITIALIZED;
+
+#ifdef MODULE
+	if (--bp->count < 0)  {
+		printk(KERN_DEBUG "aurora%d: aurora_shutdown_port: bad board count: %d\n",
+		       board_No(bp), bp->count);
+		bp->count = 0;
+	}
+	
+	MOD_DEC_USE_COUNT;
+	if (!bp->count)
+		bp->flags&=~AURORA_BOARD_ACTIVE;
+#endif
+
+#ifdef AURORA_DEBUG
+printk("aurora_shutdown_port: end\n");
+#endif
+}
+
+	
+static int block_til_ready(struct tty_struct *tty, struct file * filp,
+			   struct Aurora_port *port)
+{
+	DECLARE_WAITQUEUE(wait, current);
+	struct Aurora_board *bp = port_Board(port);
+	int    retval;
+	int    do_clocal = 0;
+	int    CD;
+	unsigned char chip;
+	
+#ifdef AURORA_DEBUG
+printk("block_til_ready: start\n");
+#endif
+	chip=AURORA_CD180(port_No(port));
+
+	/*
+	 * If the device is in the middle of being closed, then block
+	 * until it's done, and then try again.
+	 */
+	if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING) {
+		interruptible_sleep_on(&port->close_wait);
+		if (port->flags & ASYNC_HUP_NOTIFY)
+			return -EAGAIN;
+		else
+			return -ERESTARTSYS;
+	}
+
+	/*
+	 * If non-blocking mode is set, or the port is not enabled,
+	 * then make the check up front and then exit.
+	 */
+	if ((filp->f_flags & O_NONBLOCK) ||
+	    (tty->flags & (1 << TTY_IO_ERROR))) {
+		if (port->flags & ASYNC_CALLOUT_ACTIVE)
+			return -EBUSY;
+		port->flags |= ASYNC_NORMAL_ACTIVE;
+		return 0;
+	}
+
+	if (port->flags & ASYNC_CALLOUT_ACTIVE) {
+		if (port->normal_termios.c_cflag & CLOCAL) 
+			do_clocal = 1;
+	} else {
+		if (C_CLOCAL(tty))  
+			do_clocal = 1;
+	}
+	
+	/*
+	 * Block waiting for the carrier detect and the line to become
+	 * free (i.e., not in use by the callout).  While we are in
+	 * this loop, info->count is dropped by one, so that
+	 * rs_close() knows when to free things.  We restore it upon
+	 * exit, either normal or abnormal.
+	 */
+	retval = 0;
+	add_wait_queue(&port->open_wait, &wait);
+	cli();
+	if (!tty_hung_up_p(filp))
+		port->count--;
+	sti();
+	port->blocked_open++;
+	while (1) {
+		cli();
+		bp->r[chip]->r[CD180_CAR]=port_No(port)&7;
+		udelay(1);
+		CD = bp->r[chip]->r[CD180_MSVR] & MSVR_CD;
+		if (!(port->flags & ASYNC_CALLOUT_ACTIVE))  {
+			port->MSVR=bp->RTS;
+			bp->r[chip]->r[CD180_MSVR]=port->MSVR;/* auto drops DTR */
+		}
+		sti();
+		current->state = TASK_INTERRUPTIBLE;
+		if (tty_hung_up_p(filp) ||
+		    !(port->flags & ASYNC_INITIALIZED)) {
+			if (port->flags & ASYNC_HUP_NOTIFY)
+				retval = -EAGAIN;
+			else
+				retval = -ERESTARTSYS;	
+			break;
+		}
+		if (/*!(port->flags & ASYNC_CALLOUT_ACTIVE) &&*/
+		    !(port->flags & ASYNC_CLOSING) &&
+		    (do_clocal || CD))
+			break;
+		if (signal_pending(current)) {
+			retval = -ERESTARTSYS;
+			break;
+		}
+		schedule();
+	}
+	current->state = TASK_RUNNING;
+	remove_wait_queue(&port->open_wait, &wait);
+	if (!tty_hung_up_p(filp))
+		port->count++;
+	port->blocked_open--;
+	if (retval)
+		return retval;
+	
+	port->flags |= ASYNC_NORMAL_ACTIVE;
+#ifdef AURORA_DEBUG
+printk("block_til_ready: end\n");
+#endif
+	return 0;
+}	
+
+static int aurora_open(struct tty_struct * tty, struct file * filp)
+{
+	int board;
+	int error;
+	struct Aurora_port * port;
+	struct Aurora_board * bp;
+	unsigned long flags;
+	
+	#ifdef AURORA_DEBUG
+	printk("aurora_open: start\n");
+	#endif
+	
+	board = AURORA_BOARD(MINOR(tty->device));
+	if (board > AURORA_NBOARD || !(aurora_board[board].flags & AURORA_BOARD_PRESENT)){
+		#ifdef AURORA_DEBUG
+		printk("aurora_open: error board %d present %d\n",board,aurora_board[board].flags &AURORA_BOARD_PRESENT);
+		#endif
+		return -ENODEV;
+		}
+	
+	bp = &aurora_board[board];
+	port = aurora_port + board * AURORA_NPORT * AURORA_NCD180 + AURORA_PORT(MINOR(tty->device));
+	if (aurora_paranoia_check(port, tty->device, "aurora_open")){
+		#ifdef AURORA_DEBUG
+		printk("aurora_open: error paranoia check\n");
+		#endif
+		return -ENODEV;
+		}
+	
+	port->count++;
+	tty->driver_data = port;
+	port->tty = tty;
+	
+	if ((error = aurora_setup_port(bp, port))) {
+		#ifdef AURORA_DEBUG
+		printk("aurora_open: error aurora_setup_port ret %d\n",error);
+		#endif
+		return error;
+		}
+
+	if ((error = block_til_ready(tty, filp, port))){
+		#ifdef AURORA_DEBUG
+		printk("aurora_open: error block_til_ready ret %d\n",error);
+		#endif
+		return error;
+		}
+	
+	if ((port->count == 1) && (port->flags & ASYNC_SPLIT_TERMIOS)) {
+		*tty->termios = port->normal_termios;
+		save_flags(flags); cli();
+		aurora_change_speed(bp, port);
+		restore_flags(flags);
+	}
+
+	port->session = current->session;
+	port->pgrp = current->pgrp;
+	#ifdef AURORA_DEBUG
+	printk("aurora_open: end\n");
+	#endif
+	return 0;
+}
+
+static void aurora_close(struct tty_struct * tty, struct file * filp)
+{
+	struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
+	struct Aurora_board *bp;
+	unsigned long flags;
+	unsigned long timeout;
+	unsigned char chip;
+	
+	#ifdef AURORA_DEBUG
+	printk("aurora_close: start\n");
+	#endif
+	
+	if (!port || aurora_paranoia_check(port, tty->device, "close"))
+		return;
+	
+	chip=AURORA_CD180(port_No(port));
+
+	save_flags(flags); cli();
+	if (tty_hung_up_p(filp))  {
+		restore_flags(flags);
+		return;
+	}
+	
+	bp = port_Board(port);
+	if ((tty->count == 1) && (port->count != 1))  {
+		printk(KERN_DEBUG "aurora%d: aurora_close: bad port count; tty->count is 1, port count is %d\n",
+		       board_No(bp), port->count);
+		port->count = 1;
+	}
+	if (--port->count < 0)  {
+		printk(KERN_DEBUG "aurora%d: aurora_close: bad port count for tty%d: %d\n",
+		       board_No(bp), port_No(port), port->count);
+		port->count = 0;
+	}
+	if (port->count)  {
+		restore_flags(flags);
+		return;
+	}
+	port->flags |= ASYNC_CLOSING;
+	/*
+	 * Save the termios structure, since this port may have
+	 * separate termios for callout and dialin.
+	 */
+	if (port->flags & ASYNC_NORMAL_ACTIVE)
+		port->normal_termios = *tty->termios;
+/*	if (port->flags & ASYNC_CALLOUT_ACTIVE)
+		port->callout_termios = *tty->termios;*/
+	/*
+	 * Now we wait for the transmit buffer to clear; and we notify 
+	 * the line discipline to only process XON/XOFF characters.
+	 */
+	tty->closing = 1;
+	if (port->closing_wait != ASYNC_CLOSING_WAIT_NONE){
+		#ifdef AURORA_DEBUG
+		printk("aurora_close: waiting to flush...\n");
+		#endif
+		tty_wait_until_sent(tty, port->closing_wait);
+		}
+	/*
+	 * At this point we stop accepting input.  To do this, we
+	 * disable the receive line status interrupts, and tell the
+	 * interrupt driver to stop checking the data ready bit in the
+	 * line status register.
+	 */
+	port->SRER &= ~SRER_RXD;
+	if (port->flags & ASYNC_INITIALIZED) {
+		port->SRER &= ~SRER_TXRDY;
+		port->SRER |= SRER_TXEMPTY;
+		bp->r[chip]->r[CD180_CAR]=port_No(port)&7;
+		udelay(1);
+		bp->r[chip]->r[CD180_SRER]=port->SRER;
+		/*
+		 * Before we drop DTR, make sure the UART transmitter
+		 * has completely drained; this is especially
+		 * important if there is a transmit FIFO!
+		 */
+		timeout = jiffies+HZ;
+		while(port->SRER & SRER_TXEMPTY)  {
+			current->state = TASK_INTERRUPTIBLE;
+			schedule_timeout(port->timeout);
+			if (time_after(jiffies, timeout))
+				break;
+		}
+	}
+	#ifdef AURORA_DEBUG
+	printk("aurora_close: shutdown_port\n");
+	#endif
+	aurora_shutdown_port(bp, port);
+	if (tty->driver.flush_buffer)
+		tty->driver.flush_buffer(tty);
+	if (tty->ldisc.flush_buffer)
+		tty->ldisc.flush_buffer(tty);
+	tty->closing = 0;
+	port->event = 0;
+	port->tty = 0;
+	if (port->blocked_open) {
+		if (port->close_delay) {
+			current->state = TASK_INTERRUPTIBLE;
+			schedule_timeout(port->close_delay);
+		}
+		wake_up_interruptible(&port->open_wait);
+	}
+	port->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE|
+			 ASYNC_CLOSING);
+	wake_up_interruptible(&port->close_wait);
+	restore_flags(flags);
+	#ifdef AURORA_DEBUG
+	printk("aurora_close: end\n");
+	#endif
+}
+
+static int aurora_write(struct tty_struct * tty, int from_user, 
+		    const unsigned char *buf, int count)
+{
+	struct Aurora_port *port = (struct Aurora_port *)tty->driver_data;
+	struct Aurora_board *bp;
+	int c, total = 0;
+	unsigned long flags;
+	unsigned char chip;
+
+#ifdef AURORA_DEBUG
+printk("aurora_write: start %d\n",count);
+#endif
+	if (aurora_paranoia_check(port, tty->device, "aurora_write"))
+		return 0;
+		
+	chip=AURORA_CD180(port_No(port));
+	
+	bp = port_Board(port);
+
+	if (!tty || !port->xmit_buf || !tmp_buf)
+		return 0;
+
+	if (from_user)
+		down(&tmp_buf_sem);
+
+	save_flags(flags);
+	while (1) {
+		cli();		
+		c = MIN(count, MIN(SERIAL_XMIT_SIZE - port->xmit_cnt - 1,
+				   SERIAL_XMIT_SIZE - port->xmit_head));
+		if (c <= 0)
+			break;
+
+		if (from_user) {
+			copy_from_user(tmp_buf, buf, c);
+			c = MIN(c, MIN(SERIAL_XMIT_SIZE - port->xmit_cnt - 1,
+				       SERIAL_XMIT_SIZE - port->xmit_head));
+			memcpy(port->xmit_buf + port->xmit_head, tmp_buf, c);
+		} else
+			memcpy(port->xmit_buf + port->xmit_head, buf, c);
+		port->xmit_head = (port->xmit_head + c) & (SERIAL_XMIT_SIZE-1);
+		port->xmit_cnt += c;
+		restore_flags(flags);
+		buf += c;
+		count -= c;
+		total += c;
+	}
+	if (from_user)
+		up(&tmp_buf_sem);
+	if (port->xmit_cnt && !tty->stopped && !tty->hw_stopped &&
+	    !(port->SRER & SRER_TXRDY)) {
+		port->SRER |= SRER_TXRDY;
+		bp->r[chip]->r[CD180_CAR]=port_No(port)&7;
+		udelay(1);
+		bp->r[chip]->r[CD180_SRER]=port->SRER;
+	}
+	restore_flags(flags);
+#ifdef AURORA_DEBUG
+printk("aurora_write: end %d\n",total);
+#endif
+	return total;
+}
+
+static void aurora_put_char(struct tty_struct * tty, unsigned char ch)
+{
+	struct Aurora_port *port = (struct Aurora_port *)tty->driver_data;
+	unsigned long flags;
+
+#ifdef AURORA_DEBUG
+printk("aurora_put_char: start %c\n",ch);
+#endif
+	if (aurora_paranoia_check(port, tty->device, "aurora_put_char"))
+		return;
+
+	if (!tty || !port->xmit_buf)
+		return;
+
+	save_flags(flags); cli();
+	
+	if (port->xmit_cnt >= SERIAL_XMIT_SIZE - 1) {
+		restore_flags(flags);
+		return;
+	}
+
+	port->xmit_buf[port->xmit_head++] = ch;
+	port->xmit_head &= SERIAL_XMIT_SIZE - 1;
+	port->xmit_cnt++;
+	restore_flags(flags);
+#ifdef AURORA_DEBUG
+printk("aurora_put_char: end\n");
+#endif
+}
+
+static void aurora_flush_chars(struct tty_struct * tty)
+{
+	struct Aurora_port *port = (struct Aurora_port *)tty->driver_data;
+	unsigned long flags;
+	unsigned char chip;
+
+/*#ifdef AURORA_DEBUG
+printk("aurora_flush_chars: start\n");
+#endif*/
+	if (aurora_paranoia_check(port, tty->device, "aurora_flush_chars"))
+		return;
+		
+	chip=AURORA_CD180(port_No(port));
+	
+	if (port->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped ||
+	    !port->xmit_buf)
+		return;
+
+	save_flags(flags); cli();
+	port->SRER |= SRER_TXRDY;
+	port_Board(port)->r[chip]->r[CD180_CAR]=port_No(port)&7;
+	udelay(1);
+	port_Board(port)->r[chip]->r[CD180_SRER]=port->SRER;
+	restore_flags(flags);
+/*#ifdef AURORA_DEBUG
+printk("aurora_flush_chars: end\n");
+#endif*/
+}
+
+static int aurora_write_room(struct tty_struct * tty)
+{
+	struct Aurora_port *port = (struct Aurora_port *)tty->driver_data;
+	int	ret;
+
+#ifdef AURORA_DEBUG
+printk("aurora_write_room: start\n");
+#endif
+	if (aurora_paranoia_check(port, tty->device, "aurora_write_room"))
+		return 0;
+
+	ret = SERIAL_XMIT_SIZE - port->xmit_cnt - 1;
+	if (ret < 0)
+		ret = 0;
+#ifdef AURORA_DEBUG
+printk("aurora_write_room: end\n");
+#endif
+	return ret;
+}
+
+static int aurora_chars_in_buffer(struct tty_struct *tty)
+{
+	struct Aurora_port *port = (struct Aurora_port *)tty->driver_data;
+				
+	if (aurora_paranoia_check(port, tty->device, "aurora_chars_in_buffer"))
+		return 0;
+	
+	return port->xmit_cnt;
+}
+
+static void aurora_flush_buffer(struct tty_struct *tty)
+{
+	struct Aurora_port *port = (struct Aurora_port *)tty->driver_data;
+	unsigned long flags;
+
+#ifdef AURORA_DEBUG
+printk("aurora_flush_buffer: start\n");
+#endif
+	if (aurora_paranoia_check(port, tty->device, "aurora_flush_buffer"))
+		return;
+
+	save_flags(flags); cli();
+	port->xmit_cnt = port->xmit_head = port->xmit_tail = 0;
+	restore_flags(flags);
+	
+	wake_up_interruptible(&tty->write_wait);
+	if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
+	    tty->ldisc.write_wakeup)
+		(tty->ldisc.write_wakeup)(tty);
+#ifdef AURORA_DEBUG
+printk("aurora_flush_buffer: end\n");
+#endif
+}
+
+static int aurora_get_modem_info(struct Aurora_port * port, unsigned int *value)
+{
+	struct Aurora_board * bp;
+	unsigned char status,chip;
+	unsigned int result;
+	unsigned long flags;
+
+#ifdef AURORA_DEBUG
+printk("aurora_get_modem_info: start\n");
+#endif
+	chip=AURORA_CD180(port_No(port));
+
+	bp = port_Board(port);
+	save_flags(flags); cli();
+	bp->r[chip]->r[CD180_CAR]=port_No(port)&7;
+	udelay(1);
+	status = bp->r[chip]->r[CD180_MSVR];
+	result = 0/*bp->r[chip]->r[AURORA_RI] & (1u << port_No(port)) ? 0 : TIOCM_RNG*/;
+	restore_flags(flags);
+	result |= ((status & bp->RTS) ? TIOCM_RTS : 0)
+		| ((status & bp->DTR) ? TIOCM_DTR : 0)
+		| ((status & MSVR_CD)  ? TIOCM_CAR : 0)
+		| ((status & MSVR_DSR) ? TIOCM_DSR : 0)
+		| ((status & MSVR_CTS) ? TIOCM_CTS : 0);
+	put_user(result,(unsigned long *) value);
+#ifdef AURORA_DEBUG
+printk("aurora_get_modem_info: end\n");
+#endif
+	return 0;
+}
+
+static int aurora_set_modem_info(struct Aurora_port * port, unsigned int cmd,
+			     unsigned int *value)
+{
+	int error;
+	unsigned int arg;
+	unsigned long flags;
+	struct Aurora_board *bp = port_Board(port);
+	unsigned char chip;
+
+#ifdef AURORA_DEBUG
+printk("aurora_set_modem_info: start\n");
+#endif
+	error = get_user(arg, value);
+	if (error) 
+		return error;
+	chip=AURORA_CD180(port_No(port));
+	switch (cmd) {
+	 case TIOCMBIS: 
+		if (arg & TIOCM_RTS) 
+			port->MSVR |= bp->RTS;
+		if (arg & TIOCM_DTR)
+			port->MSVR |= bp->DTR;
+		break;
+	case TIOCMBIC:
+		if (arg & TIOCM_RTS)
+			port->MSVR &= ~bp->RTS;
+		if (arg & TIOCM_DTR)
+			port->MSVR &= ~bp->DTR;
+		break;
+	case TIOCMSET:
+		port->MSVR = (arg & TIOCM_RTS) ? (port->MSVR | bp->RTS) : 
+					         (port->MSVR & ~bp->RTS);
+		port->MSVR = (arg & TIOCM_DTR) ? (port->MSVR | bp->RTS) :
+						 (port->MSVR & ~bp->RTS);
+		break;
+	 default:
+		return -EINVAL;
+	}
+	save_flags(flags); cli();
+	bp->r[chip]->r[CD180_CAR]=port_No(port)&7;
+	udelay(1);
+	bp->r[chip]->r[CD180_MSVR]=port->MSVR;
+	restore_flags(flags);
+#ifdef AURORA_DEBUG
+printk("aurora_set_modem_info: end\n");
+#endif
+	return 0;
+}
+
+extern inline void aurora_send_break(struct Aurora_port * port, unsigned long length)
+{
+	struct Aurora_board *bp = port_Board(port);
+	unsigned long flags;
+	unsigned char chip;
+	
+#ifdef AURORA_DEBUG
+printk("aurora_send_break: start\n");
+#endif
+	chip=AURORA_CD180(port_No(port));
+	
+	save_flags(flags); cli();
+	port->break_length = AURORA_TPS / HZ * length;
+	port->COR2 |= COR2_ETC;
+	port->SRER  |= SRER_TXRDY;
+	bp->r[chip]->r[CD180_CAR]=port_No(port)&7;
+	udelay(1);
+	bp->r[chip]->r[CD180_COR2]=port->COR2;
+	bp->r[chip]->r[CD180_SRER]=port->SRER;
+	aurora_wait_CCR(bp->r[chip]);
+	bp->r[chip]->r[CD180_CCR]=CCR_CORCHG2;
+	aurora_wait_CCR(bp->r[chip]);
+	restore_flags(flags);
+#ifdef AURORA_DEBUG
+printk("aurora_send_break: end\n");
+#endif
+}
+
+extern inline int aurora_set_serial_info(struct Aurora_port * port,
+				     struct serial_struct * newinfo)
+{
+	struct serial_struct tmp;
+	struct Aurora_board *bp = port_Board(port);
+	int change_speed;
+	unsigned long flags;
+	int error;
+
+#ifdef AURORA_DEBUG
+printk("aurora_set_serial_info: start\n");
+#endif
+	error = verify_area(VERIFY_READ, (void *) newinfo, sizeof(tmp));
+	if (error)
+		return error;
+	copy_from_user(&tmp, newinfo, sizeof(tmp));
+	
+#if 0	
+	if ((tmp.irq != bp->irq) ||
+	    (tmp.port != bp->base) ||
+	    (tmp.type != PORT_CIRRUS) ||
+	    (tmp.baud_base != (bp->oscfreq + CD180_TPC/2) / CD180_TPC) ||
+	    (tmp.custom_divisor != 0) ||
+	    (tmp.xmit_fifo_size != CD180_NFIFO) ||
+	    (tmp.flags & ~AURORA_LEGAL_FLAGS))
+		return -EINVAL;
+#endif	
+	
+	change_speed = ((port->flags & ASYNC_SPD_MASK) !=
+			(tmp.flags & ASYNC_SPD_MASK));
+	
+	if (!suser()) {
+		if ((tmp.close_delay != port->close_delay) ||
+		    (tmp.closing_wait != port->closing_wait) ||
+		    ((tmp.flags & ~ASYNC_USR_MASK) !=
+		     (port->flags & ~ASYNC_USR_MASK)))  
+			return -EPERM;
+		port->flags = ((port->flags & ~ASYNC_USR_MASK) |
+			       (tmp.flags & ASYNC_USR_MASK));
+	} else  {
+		port->flags = ((port->flags & ~ASYNC_FLAGS) |
+			       (tmp.flags & ASYNC_FLAGS));
+		port->close_delay = tmp.close_delay;
+		port->closing_wait = tmp.closing_wait;
+	}
+	if (change_speed)  {
+		save_flags(flags); cli();
+		aurora_change_speed(bp, port);
+		restore_flags(flags);
+	}
+#ifdef AURORA_DEBUG
+printk("aurora_set_serial_info: end\n");
+#endif
+	return 0;
+}
+
+extern inline int aurora_get_serial_info(struct Aurora_port * port,
+				     struct serial_struct * retinfo)
+{
+	struct serial_struct tmp;
+	struct Aurora_board *bp = port_Board(port);
+	int error;
+	
+#ifdef AURORA_DEBUG
+printk("aurora_get_serial_info: start\n");
+#endif
+	error = verify_area(VERIFY_WRITE, (void *) retinfo, sizeof(tmp));
+	if (error)
+		return error;
+	
+	memset(&tmp, 0, sizeof(tmp));
+	tmp.type = PORT_CIRRUS;
+	tmp.line = port - aurora_port;
+	tmp.port = 0;
+	tmp.irq  = bp->irq;
+	tmp.flags = port->flags;
+	tmp.baud_base = (bp->oscfreq + CD180_TPC/2) / CD180_TPC;
+	tmp.close_delay = port->close_delay * HZ/100;
+	tmp.closing_wait = port->closing_wait * HZ/100;
+	tmp.xmit_fifo_size = CD180_NFIFO;
+	copy_to_user(retinfo, &tmp, sizeof(tmp));
+#ifdef AURORA_DEBUG
+printk("aurora_get_serial_info: end\n");
+#endif
+	return 0;
+}
+
+static int aurora_ioctl(struct tty_struct * tty, struct file * filp, 
+		    unsigned int cmd, unsigned long arg)
+		    
+{
+	struct Aurora_port *port = (struct Aurora_port *)tty->driver_data;
+	int error;
+	int retval;
+
+#ifdef AURORA_DEBUG
+printk("aurora_ioctl: start\n");
+#endif
+	if (aurora_paranoia_check(port, tty->device, "aurora_ioctl"))
+		return -ENODEV;
+	
+	switch (cmd) {
+	 case TCSBRK:	/* SVID version: non-zero arg --> no break */
+		retval = tty_check_change(tty);
+		if (retval)
+			return retval;
+		tty_wait_until_sent(tty, 0);
+		if (!arg)
+			aurora_send_break(port, HZ/4);	/* 1/4 second */
+		return 0;
+	 case TCSBRKP:	/* support for POSIX tcsendbreak() */
+		retval = tty_check_change(tty);
+		if (retval)
+			return retval;
+		tty_wait_until_sent(tty, 0);
+		aurora_send_break(port, arg ? arg*(HZ/10) : HZ/4);
+		return 0;
+	 case TIOCGSOFTCAR:
+		error = verify_area(VERIFY_WRITE, (void *) arg, sizeof(long));
+		if (error)
+			return error;
+		put_user(C_CLOCAL(tty) ? 1 : 0,
+			    (unsigned long *) arg);
+		return 0;
+	 case TIOCSSOFTCAR:
+		retval = get_user(arg,(unsigned long *) arg);
+		if (retval)
+			return retval;
+		tty->termios->c_cflag =
+			((tty->termios->c_cflag & ~CLOCAL) |
+			(arg ? CLOCAL : 0));
+		return 0;
+	 case TIOCMGET:
+		error = verify_area(VERIFY_WRITE, (void *) arg,
+				    sizeof(unsigned int));
+		if (error)
+			return error;
+		return aurora_get_modem_info(port, (unsigned int *) arg);
+	 case TIOCMBIS:
+	 case TIOCMBIC:
+	 case TIOCMSET:
+		return aurora_set_modem_info(port, cmd, (unsigned int *) arg);
+	 case TIOCGSERIAL:	
+		return aurora_get_serial_info(port, (struct serial_struct *) arg);
+	 case TIOCSSERIAL:	
+		return aurora_set_serial_info(port, (struct serial_struct *) arg);
+	 default:
+		return -ENOIOCTLCMD;
+	}
+#ifdef AURORA_DEBUG
+printk("aurora_ioctl: end\n");
+#endif
+	return 0;
+}
+
+static void aurora_throttle(struct tty_struct * tty)
+{
+	struct Aurora_port *port = (struct Aurora_port *)tty->driver_data;
+	struct Aurora_board *bp;
+	unsigned long flags;
+	unsigned char chip;
+
+#ifdef AURORA_DEBUG
+printk("aurora_throttle: start\n");
+#endif
+	if (aurora_paranoia_check(port, tty->device, "aurora_throttle"))
+		return;
+	
+	bp = port_Board(port);
+	chip=AURORA_CD180(port_No(port));
+	
+	save_flags(flags); cli();
+	port->MSVR &= ~bp->RTS;
+	bp->r[chip]->r[CD180_CAR]=port_No(port)&7;
+	udelay(1);
+	if (I_IXOFF(tty))  {
+		aurora_wait_CCR(bp->r[chip]);
+		bp->r[chip]->r[CD180_CCR]=CCR_SSCH2;
+		aurora_wait_CCR(bp->r[chip]);
+	}
+	bp->r[chip]->r[CD180_MSVR]=port->MSVR;
+	restore_flags(flags);
+#ifdef AURORA_DEBUG
+printk("aurora_throttle: end\n");
+#endif
+}
+
+static void aurora_unthrottle(struct tty_struct * tty)
+{
+	struct Aurora_port *port = (struct Aurora_port *)tty->driver_data;
+	struct Aurora_board *bp;
+	unsigned long flags;
+	unsigned char chip;
+
+#ifdef AURORA_DEBUG
+printk("aurora_unthrottle: start\n");
+#endif
+	if (aurora_paranoia_check(port, tty->device, "aurora_unthrottle"))
+		return;
+	
+	bp = port_Board(port);
+	
+	chip=AURORA_CD180(port_No(port));
+	
+	save_flags(flags); cli();
+	port->MSVR |= bp->RTS;
+	bp->r[chip]->r[CD180_CAR]=port_No(port)&7;
+	udelay(1);
+	if (I_IXOFF(tty))  {
+		aurora_wait_CCR(bp->r[chip]);
+		bp->r[chip]->r[CD180_CCR]=CCR_SSCH1;
+		aurora_wait_CCR(bp->r[chip]);
+	}
+	bp->r[chip]->r[CD180_MSVR]=port->MSVR;
+	restore_flags(flags);
+#ifdef AURORA_DEBUG
+printk("aurora_unthrottle: end\n");
+#endif
+}
+
+static void aurora_stop(struct tty_struct * tty)
+{
+	struct Aurora_port *port = (struct Aurora_port *)tty->driver_data;
+	struct Aurora_board *bp;
+	unsigned long flags;
+	unsigned char chip;
+
+#ifdef AURORA_DEBUG
+printk("aurora_stop: start\n");
+#endif
+	if (aurora_paranoia_check(port, tty->device, "aurora_stop"))
+		return;
+	
+	bp = port_Board(port);
+	
+	chip=AURORA_CD180(port_No(port));
+	
+	save_flags(flags); cli();
+	port->SRER &= ~SRER_TXRDY;
+	bp->r[chip]->r[CD180_CAR]=port_No(port)&7;
+	udelay(1);
+	bp->r[chip]->r[CD180_SRER]=port->SRER;
+	restore_flags(flags);
+#ifdef AURORA_DEBUG
+printk("aurora_stop: end\n");
+#endif
+}
+
+static void aurora_start(struct tty_struct * tty)
+{
+	struct Aurora_port *port = (struct Aurora_port *)tty->driver_data;
+	struct Aurora_board *bp;
+	unsigned long flags;
+	unsigned char chip;
+
+#ifdef AURORA_DEBUG
+printk("aurora_start: start\n");
+#endif
+	if (aurora_paranoia_check(port, tty->device, "aurora_start"))
+		return;
+	
+	bp = port_Board(port);
+	
+	chip=AURORA_CD180(port_No(port));
+	
+	save_flags(flags); cli();
+	if (port->xmit_cnt && port->xmit_buf && !(port->SRER & SRER_TXRDY))  {
+		port->SRER |= SRER_TXRDY;
+		bp->r[chip]->r[CD180_CAR]=port_No(port)&7;
+		udelay(1);
+		bp->r[chip]->r[CD180_SRER]=port->SRER;
+	}
+	restore_flags(flags);
+#ifdef AURORA_DEBUG
+printk("aurora_start: end\n");
+#endif
+}
+
+/*
+ * This routine is called from the scheduler tqueue when the interrupt
+ * routine has signalled that a hangup has occurred.  The path of
+ * hangup processing is:
+ *
+ * 	serial interrupt routine -> (scheduler tqueue) ->
+ * 	do_aurora_hangup() -> tty->hangup() -> aurora_hangup()
+ * 
+ */
+static void do_aurora_hangup(void *private_)
+{
+	struct Aurora_port	*port = (struct Aurora_port *) private_;
+	struct tty_struct	*tty;
+
+#ifdef AURORA_DEBUG
+printk("do_aurora_hangup: start\n");
+#endif
+	tty = port->tty;
+	if (!tty)
+		return;
+
+	tty_hangup(tty);
+#ifdef AURORA_DEBUG
+printk("do_aurora_hangup: end\n");
+#endif
+}
+
+static void aurora_hangup(struct tty_struct * tty)
+{
+	struct Aurora_port *port = (struct Aurora_port *)tty->driver_data;
+	struct Aurora_board *bp;
+				
+#ifdef AURORA_DEBUG
+printk("aurora_hangup: start\n");
+#endif
+	if (aurora_paranoia_check(port, tty->device, "aurora_hangup"))
+		return;
+	
+	bp = port_Board(port);
+	
+	aurora_shutdown_port(bp, port);
+	port->event = 0;
+	port->count = 0;
+	port->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE);
+	port->tty = 0;
+	wake_up_interruptible(&port->open_wait);
+#ifdef AURORA_DEBUG
+printk("aurora_hangup: end\n");
+#endif
+}
+
+static void aurora_set_termios(struct tty_struct * tty, struct termios * old_termios)
+{
+	struct Aurora_port *port = (struct Aurora_port *)tty->driver_data;
+	unsigned long flags;
+
+#ifdef AURORA_DEBUG
+printk("aurora_set_termios: start\n");
+#endif
+	if (aurora_paranoia_check(port, tty->device, "aurora_set_termios"))
+		return;
+	
+	if (tty->termios->c_cflag == old_termios->c_cflag &&
+	    tty->termios->c_iflag == old_termios->c_iflag)
+		return;
+
+	save_flags(flags); cli();
+	aurora_change_speed(port_Board(port), port);
+	restore_flags(flags);
+
+	if ((old_termios->c_cflag & CRTSCTS) &&
+	    !(tty->termios->c_cflag & CRTSCTS)) {
+		tty->hw_stopped = 0;
+		aurora_start(tty);
+	}
+#ifdef AURORA_DEBUG
+printk("aurora_set_termios: end\n");
+#endif
+}
+
+static void do_aurora_bh(void)
+{
+	 run_task_queue(&tq_aurora);
+}
+
+static void do_softint(void *private_)
+{
+	struct Aurora_port	*port = (struct Aurora_port *) private_;
+	struct tty_struct	*tty;
+
+#ifdef AURORA_DEBUG
+printk("do_softint: start\n");
+#endif
+	if(!(tty = port->tty)) 
+		return;
+
+	if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &port->event)) {
+		if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
+		    tty->ldisc.write_wakeup)
+			(tty->ldisc.write_wakeup)(tty);
+		wake_up_interruptible(&tty->write_wait);
+	}
+#ifdef AURORA_DEBUG
+printk("do_softint: end\n");
+#endif
+}
+
+static int aurora_init_drivers(void)
+{
+	int error;
+	int i;
+
+#ifdef AURORA_DEBUG
+printk("aurora_init_drivers: start\n");
+#endif
+	if (!(tmp_buf = (unsigned char *) get_free_page(GFP_KERNEL))) {
+		printk(KERN_ERR "aurora: Couldn't get free page.\n");
+		return 1;
+	}
+	init_bh(AURORA_BH, do_aurora_bh);
+/*	memset(IRQ_to_board, 0, sizeof(IRQ_to_board));*/
+	memset(&aurora_driver, 0, sizeof(aurora_driver));
+	aurora_driver.magic = TTY_DRIVER_MAGIC;
+	aurora_driver.name = "ttyA";
+	aurora_driver.major = AURORA_MAJOR;
+	aurora_driver.num = AURORA_TNPORTS;
+	aurora_driver.type = TTY_DRIVER_TYPE_SERIAL;
+	aurora_driver.subtype = AURORA_TYPE_NORMAL;
+	aurora_driver.init_termios = tty_std_termios;
+	aurora_driver.init_termios.c_cflag =
+		B9600 | CS8 | CREAD | HUPCL | CLOCAL;
+	aurora_driver.flags = TTY_DRIVER_REAL_RAW;
+	aurora_driver.refcount = &aurora_refcount;
+	aurora_driver.table = aurora_table;
+	aurora_driver.termios = aurora_termios;
+	aurora_driver.termios_locked = aurora_termios_locked;
+
+	aurora_driver.open  = aurora_open;
+	aurora_driver.close = aurora_close;
+	aurora_driver.write = aurora_write;
+	aurora_driver.put_char = aurora_put_char;
+	aurora_driver.flush_chars = aurora_flush_chars;
+	aurora_driver.write_room = aurora_write_room;
+	aurora_driver.chars_in_buffer = aurora_chars_in_buffer;
+	aurora_driver.flush_buffer = aurora_flush_buffer;
+	aurora_driver.ioctl = aurora_ioctl;
+	aurora_driver.throttle = aurora_throttle;
+	aurora_driver.unthrottle = aurora_unthrottle;
+	aurora_driver.set_termios = aurora_set_termios;
+	aurora_driver.stop = aurora_stop;
+	aurora_driver.start = aurora_start;
+	aurora_driver.hangup = aurora_hangup;
+
+	if ((error = tty_register_driver(&aurora_driver)))  {
+		free_page((unsigned long)tmp_buf);
+		printk(KERN_ERR "aurora: Couldn't register aurora driver, error = %d\n",
+		       error);
+		return 1;
+	}
+	
+	memset(aurora_port, 0, sizeof(aurora_port));
+	for (i = 0; i < AURORA_TNPORTS; i++)  {
+		aurora_port[i].normal_termios  = aurora_driver.init_termios;
+		aurora_port[i].magic = AURORA_MAGIC;
+		aurora_port[i].tqueue.routine = do_softint;
+		aurora_port[i].tqueue.data = &aurora_port[i];
+		aurora_port[i].tqueue_hangup.routine = do_aurora_hangup;
+		aurora_port[i].tqueue_hangup.data = &aurora_port[i];
+		aurora_port[i].close_delay = 50 * HZ/100;
+		aurora_port[i].closing_wait = 3000 * HZ/100;
+		init_waitqueue_head(&aurora_port[i].open_wait);
+		init_waitqueue_head(&aurora_port[i].close_wait);
+	}
+#ifdef AURORA_DEBUG
+printk("aurora_init_drivers: end\n");
+#endif
+	return 0;
+}
+
+static void aurora_release_drivers(void)
+{
+#ifdef AURORA_DEBUG
+printk("aurora_release_drivers: start\n");
+#endif
+	free_page((unsigned long)tmp_buf);
+	tty_unregister_driver(&aurora_driver);
+#ifdef AURORA_DEBUG
+printk("aurora_release_drivers: end\n");
+#endif
+}
+
+#ifndef MODULE
+/*
+ * Called at boot time.
+ *
+ * You can specify IO base for up to RC_NBOARD cards,
+ * using line "riscom8=0xiobase1,0xiobase2,.." at LILO prompt.
+ * Note that there will be no probing at default
+ * addresses in this case.
+ *
+ */
+__init_func(void aurora_setup(char *str, int *ints))
+{
+	int i;
+
+	for(i=0;(i<ints[0])&&(i<4);i++) {
+		if (ints[i+1]) irqs[i]=ints[i+1];
+		}
+}
+
+__init_func(int aurora_init(void))
+#else
+int aurora_init(void)
+#endif
+{
+int found;
+int grrr,i;
+
+printk(KERN_INFO "aurora: Driver starting.\n");
+if(aurora_init_drivers())return -EIO;
+found=aurora_probe();
+if(!found){
+  aurora_release_drivers();
+  printk(KERN_INFO "aurora: No Aurora Multiport boards detected.\n");
+  return -EIO;
+  } else {
+  printk(KERN_INFO "aurora: %d boards found.\n",found);
+  }
+for(i=0;i<found;i++){
+	if ((grrr = aurora_setup_board(&aurora_board[i]))) {
+		#ifdef AURORA_DEBUG
+		printk(KERN_ERR "aurora_init: error aurora_setup_board ret %d\n",grrr);
+		#endif
+		return grrr;
+	}
+}
+return 0;
+}
+
+#ifdef MODULE
+int irq  = 0;
+int irq1 = 0;
+int irq2 = 0;
+int irq3 = 0;
+MODULE_PARM(irq , "i");
+MODULE_PARM(irq1, "i");
+MODULE_PARM(irq2, "i");
+MODULE_PARM(irq3, "i");
+
+int init_module(void) 
+{
+	if (irq ) irqs[0]=irq ;
+	if (irq1) irqs[1]=irq1;
+	if (irq2) irqs[2]=irq2;
+	if (irq3) irqs[3]=irq3;
+	return aurora_init();
+}
+	
+void cleanup_module(void)
+{
+	int i;
+	
+#ifdef AURORA_DEBUG
+printk("cleanup_module: aurora_release_drivers\n");
+#endif;
+
+	aurora_release_drivers();
+	for (i = 0; i < AURORA_NBOARD; i++)
+		if (aurora_board[i].flags & AURORA_BOARD_PRESENT) {
+			aurora_shutdown_board(&aurora_board[i]);
+			aurora_release_io_range(&aurora_board[i]);
+		}
+}
+#endif /* MODULE */
diff --git a/drivers/sbus/char/aurora.h b/drivers/sbus/char/aurora.h
new file mode 100644
index 000000000..e8250ead4
--- /dev/null
+++ b/drivers/sbus/char/aurora.h
@@ -0,0 +1,278 @@
+/*
+ *	linux/drivers/sbus/char/aurora.h -- Aurora multiport driver
+ *
+ *	Copyright (c) 1999 by Oliver Aldulea (oli@bv.ro)
+ *
+ *	This code is based on the RISCom/8 multiport serial driver written
+ *	by Dmitry Gorodchanin (pgmdsg@ibi.com), based on the Linux serial
+ *	driver, written by Linus Torvalds, Theodore T'so and others.
+ *	The Aurora multiport programming info was obtained mainly from the
+ *	Cirrus Logic CD180 documentation (available on the web), and by
+ *	doing heavy tests on the board. Many thanks to Eddie C. Dost for the
+ *	help on the sbus interface.
+ *
+ *	This program is free software; you can redistribute it and/or modify
+ *	it under the terms of the GNU General Public License as published by
+ *	the Free Software Foundation; either version 2 of the License, or
+ *	(at your option) any later version.
+ *
+ *	This program is distributed in the hope that it will be useful,
+ *	but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *	GNU General Public License for more details.
+ *
+ *	You should have received a copy of the GNU General Public License
+ *	along with this program; if not, write to the Free Software
+ *	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *	Revision 1.0
+ *
+ *	This is the first public release.
+ *
+ *	This version needs a lot of feedback. This is the version that works
+ *	with _my_ board. My board is model 1600se, revision '@(#)1600se.fth
+ *	1.2 3/28/95 1'. The driver might work with your board, but I do not
+ *	guarantee it. If you have _any_ type of board, I need to know if the
+ *	driver works or not, I need to know exactly your board parameters
+ *	(get them with 'cd /proc/openprom/iommu/sbus/sio16/; ls *; cat *')
+ *	Also, I need your board revision code, which is written on the board.
+ *	Send me the output of my driver too (it outputs through klogd).
+ *
+ *	If the driver does not work, you can try enabling the debug options
+ *	to see what's wrong or what should be done.
+ *
+ *	I'm sorry about the alignment of the code. It was written in a
+ *	128x48 environment.
+ *
+ *	I must say that I do not like Aurora Technologies' policy. I asked
+ *	them to help me do this driver faster, but they ended by something
+ *	like "don't call us, we'll call you", and I never heard anything
+ *	from them. They told me "knowing the way the board works, I don't
+ *	doubt you and others on the net will make the driver."
+ *	The truth about this board is that it has nothing intelligent on it.
+ *	If you want to say to somebody what kind of board you have, say that
+ *	it uses Cirrus Logic processors (CD180). The power of the board is
+ *	in those two chips. The rest of the board is the interface to the
+ *	sbus and to the peripherals. Still, they did something smart: they
+ *	reversed DTR and RTS to make on-board automatic hardware flow
+ *	control usable.
+ *	Thanks to Aurora Technologies for wasting my time, nerves and money.
+ */
+
+#ifndef __LINUX_AURORA_H
+#define __LINUX_AURORA_H
+
+#include <linux/serial.h>
+
+#ifdef __KERNEL__
+
+/* This is the number of boards to support. I've only tested this driver with
+ * one board, so it might not work.
+ */
+#define AURORA_NBOARD 1
+
+/* Useful ? Yes. But you can safely comment the warnings if they annoy you
+ * (let me say that again: the warnings in the code, not this define). 
+ */
+#define AURORA_PARANOIA_CHECK
+
+/* Well, after many lost nights, I found that the IRQ for this board is
+ * selected from four built-in values by writing some bits in the
+ * configuration register. This causes a little problem to occur: which
+ * IRQ to select ? Which one is the best for the user ? Well, I finally
+ * decided for the following algorithm: if the "bintr" value is not acceptable
+ * (not within type_1_irq[], then test the "intr" value, if that fails too,
+ * try each value from type_1_irq until succeded. Hope it's ok.
+ * You can safely reorder the irq's.
+ */
+#define TYPE_1_IRQS 4
+unsigned char type_1_irq[TYPE_1_IRQS] = {
+	3, 5, 9, 13
+	};
+/* I know something about another method of interrupt setting, but not enough.
+ * Also, this is for another type of board, so I first have to learn how to
+ * detect it.
+#define TYPE_2_IRQS 3
+unsigned char type_2_irq[TYPE_2_IRQS] = {
+	0, 0, 0 ** could anyone find these for me ? (see AURORA_ALLIRQ below) **
+	};
+unsigned char type_2_mask[TYPE_2_IRQS] = {
+	32, 64, 128
+	};
+*/
+
+/* The following section should only be modified by those who know what
+ * they're doing (or don't, but want to help with some feedback). Modifying
+ * anything raises a _big_ probability for your system to hang, but the
+ * sacrifice worths. (I sacrificed my ext2fs many, many times...)
+ */
+
+/* This one tries to dump to console the name of almost every function called,
+ * and many other debugging info.
+ */
+#undef AURORA_DEBUG
+
+/* These are the most dangerous and useful defines. They do printk() during
+ * the interrupt processing routine(s), so if you manage to get "flooded" by
+ * irq's, start thinking about the "Power off/on" button...
+ */
+#undef AURORA_INTNORM	/* This one enables the "normal" messages, but some
+			 * of them cause flood, so I preffered putting
+			 * them under a define */
+#undef AURORA_INT_DEBUG /* This one is really bad. */
+
+/* Here's something helpful: after n irq's, the board will be disabled. This
+ * prevents irq flooding during debug (no need to think about power
+ * off/on anymore...)
+ */
+#define AURORA_FLOODPRO	10
+
+/* This one helps finding which irq the board calls, in case of a strange/
+ * unsupported board. AURORA_INT_DEBUG should be enabled, because I don't
+ * think /proc/interrupts or any command will be available in case of an irq
+ * flood... "allirq" is the list of all free irq's.
+ */
+/*
+#define AURORA_ALLIRQ 6
+int allirq[AURORA_ALLIRQ]={
+	2,3,5,7,9,13
+	};
+*/
+
+/* These must not be modified. These values are assumed during the code for
+ * performance optimisations.
+ */
+#define AURORA_NCD180 2 /* two chips per board */
+#define AURORA_NPORT 8  /* 8 ports per chip */
+
+/* several utilities */
+#define AURORA_BOARD(line)	(((line) >> 4) & 0x01)
+#define AURORA_CD180(line)	(((line) >> 3) & 0x01)
+#define AURORA_PORT(line)	((line) & 15)
+
+#define AURORA_TNPORTS (AURORA_NBOARD*AURORA_NCD180*AURORA_NPORT)
+
+/* Ticks per sec. Used for setting receiver timeout and break length */
+#define AURORA_TPS		4000
+
+#define AURORA_MAGIC	0x0A18
+
+/* Yeah, after heavy testing I decided it must be 6.
+ * Sure, You can change it if needed.
+ */
+#define AURORA_RXFIFO		6	/* Max. receiver FIFO size (1-8) */
+
+#define AURORA_RXTH		7
+
+struct aurora_reg1 {
+	__volatile__ unsigned char r;
+	};
+
+struct aurora_reg128 {
+	__volatile__ unsigned char r[128];
+	};
+	
+struct aurora_reg4 {
+	__volatile__ unsigned char r[4];
+	};
+
+struct Aurora_board {
+	unsigned long		flags;
+	struct aurora_reg1	* r0;	/* This is the board configuration
+					 * register (write-only). */
+	struct aurora_reg128	* r[2];	/* These are the registers for the
+					 * two chips. */
+	struct aurora_reg4	* r3;	/* These are used for hardware-based
+					 * acknowledge. Software-based ack is
+					 * not supported by CD180. */
+	unsigned int		oscfreq; /* The on-board oscillator
+					  * frequency, in Hz. */
+	unsigned char		irq;
+#ifdef MODULE
+	signed char		count;	/* counts the use of the board */
+#endif
+	/* Values for the dtr_rts swapped mode. */
+	unsigned char		DTR;
+	unsigned char		RTS;
+	unsigned char		MSVDTR;
+	unsigned char		MSVRTS;
+	/* Values for hardware acknowledge. */
+	unsigned char		ACK_MINT,ACK_TINT,ACK_RINT;
+};
+
+/* Board configuration register */
+#define AURORA_CFG_ENABLE_IO	8
+#define AURORA_CFG_ENABLE_IRQ	4
+
+/* Board flags */
+#define AURORA_BOARD_PRESENT		0x00000001
+#define AURORA_BOARD_ACTIVE		0x00000002
+#define AURORA_BOARD_TYPE_2		0x00000004	/* don't know how to
+							 * detect this yet */
+#define AURORA_BOARD_DTR_FLOW_OK	0x00000008
+
+/* The story goes like this: Cirrus programmed the CD-180 chip to do automatic
+ * hardware flow control, and do it using CTS and DTR. CTS is ok, but, if you
+ * have a modem and the chip drops DTR, then the modem will drop the carrier
+ * (ain't that cute...). Luckily, the guys at Aurora decided to swap DTR and
+ * RTS, which makes the flow control usable. I hope that all the boards made
+ * by Aurora have these two signals swapped. If your's doesn't but you have a
+ * breakout box, you can try to reverse them yourself, then set the following
+ * flag.
+ */
+#undef AURORA_FORCE_DTR_FLOW
+
+/* In fact, a few more words have to be said about hardware flow control.
+ * This driver handles "output" flow control through the on-board facility
+ * CTS Auto Enable. For the "input" flow control there are two cases when
+ * the flow should be controlled. The first case is when the kernel is so
+ * busy that it cannot process IRQ's in time; this flow control can only be
+ * activated by the on-board chip, and if the board has RTS and DTR swapped,
+ * this facility is usable. The second case is when the application is so
+ * busy that it cannot receive bytes from the kernel, and this flow must be
+ * activated by software. This second case is not yet implemented in this
+ * driver. Unfortunately, I estimate that the second case is the one that
+ * occurs the most.
+ */
+
+
+struct Aurora_port {
+	int			magic;
+	int			baud_base;
+	int			flags;
+	struct tty_struct 	* tty;
+	int			count;
+	int			blocked_open;
+	int			event;
+	int			timeout;
+	int			close_delay;
+	long			session;
+	long			pgrp;
+	unsigned char 		* xmit_buf;
+	int			custom_divisor;
+	int			xmit_head;
+	int			xmit_tail;
+	int			xmit_cnt;
+	struct termios          normal_termios;
+	wait_queue_head_t	open_wait;
+	wait_queue_head_t	close_wait;
+	struct tq_struct	tqueue;
+	struct tq_struct	tqueue_hangup;
+	short			wakeup_chars;
+	short			break_length;
+	unsigned short		closing_wait;
+	unsigned char		mark_mask;
+	unsigned char		SRER;
+	unsigned char		MSVR;
+	unsigned char		COR2;
+#ifdef AURORA_REPORT_OVERRUN
+	unsigned long		overrun;
+#endif	
+#ifdef AURORA_REPORT_FIFO
+	unsigned long		hits[10];
+#endif
+};
+
+#endif
+#endif /*__LINUX_AURORA_H*/
+
diff --git a/drivers/sbus/char/cd180.h b/drivers/sbus/char/cd180.h
new file mode 100644
index 000000000..445b86cc6
--- /dev/null
+++ b/drivers/sbus/char/cd180.h
@@ -0,0 +1,240 @@
+
+/* Definitions for Cirrus Logic CL-CD180 8-port async mux chip */
+#define CD180_NCH       8       /* Total number of channels                */
+#define CD180_TPC       16      /* Ticks per character                     */
+#define CD180_NFIFO	8	/* TX FIFO size                            */
+
+/* Global registers */
+#define CD180_GFRCR	0x6b	/* Global Firmware Revision Code Register  */
+#define CD180_SRCR	0x66	/* Service Request Configuration Register  */
+#define CD180_PPRH	0x70	/* Prescaler Period Register High	   */
+#define CD180_PPRL	0x71	/* Prescaler Period Register Low	   */
+#define CD180_MSMR	0x61	/* Modem Service Match Register		   */
+#define CD180_TSMR	0x62	/* Transmit Service Match Register	   */
+#define CD180_RSMR	0x63	/* Receive Service Match Register	   */
+#define CD180_GSVR	0x40	/* Global Service Vector Register	   */
+#define CD180_SRSR	0x65	/* Service Request Status Register	   */
+#define CD180_GSCR	0x41	/* Global Service Channel Register	   */
+#define CD180_CAR	0x64	/* Channel Access Register		   */
+
+/* Indexed registers */
+#define CD180_RDCR	0x07	/* Receive Data Count Register		   */
+#define CD180_RDR	0x78	/* Receiver Data Register		   */
+#define CD180_RCSR	0x7a	/* Receiver Character Status Register	   */
+#define CD180_TDR	0x7b	/* Transmit Data Register		   */
+#define CD180_EOSRR	0x7f	/* End of Service Request Register	   */
+
+/* Channel Registers */
+#define CD180_SRER      0x02    /* Service Request Enable Register         */
+#define CD180_CCR       0x01    /* Channel Command Register                */
+#define CD180_COR1      0x03    /* Channel Option Register 1               */
+#define CD180_COR2      0x04    /* Channel Option Register 2               */
+#define CD180_COR3      0x05    /* Channel Option Register 3               */
+#define CD180_CCSR      0x06    /* Channel Control Status Register         */
+#define CD180_RTPR      0x18    /* Receive Timeout Period Register         */
+#define CD180_RBPRH     0x31    /* Receive Bit Rate Period Register High  */
+#define CD180_RBPRL     0x32    /* Receive Bit Rate Period Register Low   */
+#define CD180_TBPRH     0x39    /* Transmit Bit Rate Period Register High */
+#define CD180_TBPRL     0x3a    /* Transmit Bit Rate Period Register Low  */
+#define CD180_SCHR1     0x09    /* Special Character Register 1            */
+#define CD180_SCHR2     0x0a    /* Special Character Register 2            */
+#define CD180_SCHR3     0x0b    /* Special Character Register 3            */
+#define CD180_SCHR4     0x0c    /* Special Character Register 4            */
+#define CD180_MCR       0x12    /* Modem Change Register                   */
+#define CD180_MCOR1     0x10    /* Modem Change Option 1 Register          */
+#define CD180_MCOR2     0x11    /* Modem Change Option 2 Register          */
+#define CD180_MSVR      0x28    /* Modem Signal Value Register             */
+#define CD180_MSVRTS    0x29    /* Modem Signal Value RTS                  */
+#define CD180_MSVDTR    0x2a    /* Modem Signal Value DTR                  */
+
+/* Global Interrupt Vector Register (R/W) */
+
+#define GSVR_ITMASK     0x07     /* Interrupt type mask                     */
+#define  GSVR_IT_MDM     0x01    /* Modem Signal Change Interrupt           */
+#define  GSVR_IT_TX      0x02    /* Transmit Data Interrupt                 */
+#define  GSVR_IT_RGD     0x03    /* Receive Good Data Interrupt             */
+#define  GSVR_IT_REXC    0x07    /* Receive Exception Interrupt             */
+
+
+/* Global Interrupt Channel Register (R/W) */
+ 
+#define GSCR_CHAN       0x1c    /* Channel Number Mask                     */
+#define GSCR_CHAN_OFF   2       /* Channel Number Offset                   */
+
+
+/* Channel Address Register (R/W) */
+
+#define CAR_CHAN        0x07    /* Channel Number Mask                     */
+
+
+/* Receive Character Status Register (R/O) */
+
+#define RCSR_TOUT       0x80    /* Rx Timeout                              */
+#define RCSR_SCDET      0x70    /* Special Character Detected Mask         */
+#define  RCSR_NO_SC      0x00   /* No Special Characters Detected          */
+#define  RCSR_SC_1       0x10   /* Special Char 1 (or 1 & 3) Detected      */
+#define  RCSR_SC_2       0x20   /* Special Char 2 (or 2 & 4) Detected      */
+#define  RCSR_SC_3       0x30   /* Special Char 3 Detected                 */
+#define  RCSR_SC_4       0x40   /* Special Char 4 Detected                 */
+#define RCSR_BREAK      0x08    /* Break has been detected                 */
+#define RCSR_PE         0x04    /* Parity Error                            */
+#define RCSR_FE         0x02    /* Frame Error                             */
+#define RCSR_OE         0x01    /* Overrun Error                           */
+
+
+/* Channel Command Register (R/W) (commands in groups can be OR-ed) */
+
+#define CCR_HARDRESET   0x81    /* Reset the chip                          */
+
+#define CCR_SOFTRESET   0x80    /* Soft Channel Reset                      */
+
+#define CCR_CORCHG1     0x42    /* Channel Option Register 1 Changed       */
+#define CCR_CORCHG2     0x44    /* Channel Option Register 2 Changed       */
+#define CCR_CORCHG3     0x48    /* Channel Option Register 3 Changed       */
+
+#define CCR_SSCH1       0x21    /* Send Special Character 1                */
+
+#define CCR_SSCH2       0x22    /* Send Special Character 2                */
+
+#define CCR_SSCH3       0x23    /* Send Special Character 3                */
+
+#define CCR_SSCH4       0x24    /* Send Special Character 4                */
+
+#define CCR_TXEN        0x18    /* Enable Transmitter                      */
+#define CCR_RXEN        0x12    /* Enable Receiver                         */
+
+#define CCR_TXDIS       0x14    /* Disable Transmitter                     */
+#define CCR_RXDIS       0x11    /* Disable Receiver                        */
+
+
+/* Service Request Enable Register (R/W) */
+
+#define SRER_DSR         0x80    /* Enable interrupt on DSR change          */
+#define SRER_CD          0x40    /* Enable interrupt on CD change           */
+#define SRER_CTS         0x20    /* Enable interrupt on CTS change          */
+#define SRER_RXD         0x10    /* Enable interrupt on Receive Data        */
+#define SRER_RXSC        0x08    /* Enable interrupt on Receive Spec. Char  */
+#define SRER_TXRDY       0x04    /* Enable interrupt on TX FIFO empty       */
+#define SRER_TXEMPTY     0x02    /* Enable interrupt on TX completely empty */
+#define SRER_RET         0x01    /* Enable interrupt on RX Exc. Timeout     */
+
+
+/* Channel Option Register 1 (R/W) */
+
+#define COR1_ODDP       0x80    /* Odd Parity                              */
+#define COR1_PARMODE    0x60    /* Parity Mode mask                        */
+#define  COR1_NOPAR      0x00   /* No Parity                               */
+#define  COR1_FORCEPAR   0x20   /* Force Parity                            */
+#define  COR1_NORMPAR    0x40   /* Normal Parity                           */
+#define COR1_IGNORE     0x10    /* Ignore Parity on RX                     */
+#define COR1_STOPBITS   0x0c    /* Number of Stop Bits                     */
+#define  COR1_1SB        0x00   /* 1 Stop Bit                              */
+#define  COR1_15SB       0x04   /* 1.5 Stop Bits                           */
+#define  COR1_2SB        0x08   /* 2 Stop Bits                             */
+#define COR1_CHARLEN    0x03    /* Character Length                        */
+#define  COR1_5BITS      0x00   /* 5 bits                                  */
+#define  COR1_6BITS      0x01   /* 6 bits                                  */
+#define  COR1_7BITS      0x02   /* 7 bits                                  */
+#define  COR1_8BITS      0x03   /* 8 bits                                  */
+
+
+/* Channel Option Register 2 (R/W) */
+
+#define COR2_IXM        0x80    /* Implied XON mode                        */
+#define COR2_TXIBE      0x40    /* Enable In-Band (XON/XOFF) Flow Control  */
+#define COR2_ETC        0x20    /* Embedded Tx Commands Enable             */
+#define COR2_LLM        0x10    /* Local Loopback Mode                     */
+#define COR2_RLM        0x08    /* Remote Loopback Mode                    */
+#define COR2_RTSAO      0x04    /* RTS Automatic Output Enable             */
+#define COR2_CTSAE      0x02    /* CTS Automatic Enable                    */
+#define COR2_DSRAE      0x01    /* DSR Automatic Enable                    */
+
+
+/* Channel Option Register 3 (R/W) */
+
+#define COR3_XONCH      0x80    /* XON is a pair of characters (1 & 3)     */
+#define COR3_XOFFCH     0x40    /* XOFF is a pair of characters (2 & 4)    */
+#define COR3_FCT        0x20    /* Flow-Control Transparency Mode          */
+#define COR3_SCDE       0x10    /* Special Character Detection Enable      */
+#define COR3_RXTH       0x0f    /* RX FIFO Threshold value (1-8)           */
+
+
+/* Channel Control Status Register (R/O) */
+
+#define CCSR_RXEN       0x80    /* Receiver Enabled                        */
+#define CCSR_RXFLOFF    0x40    /* Receive Flow Off (XOFF was sent)        */
+#define CCSR_RXFLON     0x20    /* Receive Flow On (XON was sent)          */
+#define CCSR_TXEN       0x08    /* Transmitter Enabled                     */
+#define CCSR_TXFLOFF    0x04    /* Transmit Flow Off (got XOFF)            */
+#define CCSR_TXFLON     0x02    /* Transmit Flow On (got XON)              */
+
+
+/* Modem Change Option Register 1 (R/W) */
+
+#define MCOR1_DSRZD     0x80    /* Detect 0->1 transition of DSR           */
+#define MCOR1_CDZD      0x40    /* Detect 0->1 transition of CD            */
+#define MCOR1_CTSZD     0x20    /* Detect 0->1 transition of CTS           */
+#define MCOR1_DTRTH     0x0f    /* Auto DTR flow control Threshold (1-8)   */
+#define  MCOR1_NODTRFC   0x0     /* Automatic DTR flow control disabled     */
+
+
+/* Modem Change Option Register 2 (R/W) */
+
+#define MCOR2_DSROD     0x80    /* Detect 1->0 transition of DSR           */
+#define MCOR2_CDOD      0x40    /* Detect 1->0 transition of CD            */
+#define MCOR2_CTSOD     0x20    /* Detect 1->0 transition of CTS           */
+
+
+/* Modem Change Register (R/W) */
+
+#define MCR_DSRCHG      0x80    /* DSR Changed                             */
+#define MCR_CDCHG       0x40    /* CD Changed                              */
+#define MCR_CTSCHG      0x20    /* CTS Changed                             */
+
+
+/* Modem Signal Value Register (R/W) */
+
+#define MSVR_DSR        0x80    /* Current state of DSR input              */
+#define MSVR_CD         0x40    /* Current state of CD input               */
+#define MSVR_CTS        0x20    /* Current state of CTS input              */
+#define MSVR_DTR        0x02    /* Current state of DTR output             */
+#define MSVR_RTS        0x01    /* Current state of RTS output             */
+
+
+/* Service Request Status Register */
+
+#define SRSR_CMASK	0xC0	/* Current Service Context Mask            */
+#define  SRSR_CNONE	0x00	/* Not in a service context		   */
+#define  SRSR_CRX	0x40	/* Rx Context				   */
+#define  SRSR_CTX	0x80	/* Tx Context				   */
+#define  SRSR_CMDM	0xC0	/* Modem Context			   */
+#define SRSR_ANYINT	0x6F	/* Any interrupt flag			   */
+#define SRSR_RINT	0x10	/* Receive Interrupt			   */
+#define SRSR_TINT	0x04	/* Transmit Interrupt			   */
+#define SRSR_MINT	0x01	/* Modem Interrupt			   */
+#define SRSR_REXT	0x20	/* Receive External Interrupt		   */
+#define SRSR_TEXT	0x08	/* Transmit External Interrupt		   */
+#define SRSR_MEXT	0x02	/* Modem External Interrupt		   */
+
+
+/* Service Request Configuration Register */
+
+#define SRCR_PKGTYPE    0x80
+#define SRCR_REGACKEN   0x40
+#define SRCR_DAISYEN    0x20
+#define SRCR_GLOBPRI    0x10
+#define SRCR_UNFAIR     0x08
+#define SRCR_AUTOPRI    0x02
+#define SRCR_PRISEL     0x01
+
+/* Values for register-based Interrupt ACKs */
+#define CD180_ACK_MINT	0x75	/* goes to MSMR				   */
+#define CD180_ACK_TINT	0x76	/* goes to TSMR				   */
+#define CD180_ACK_RINT	0x77	/* goes to RSMR				   */
+
+/* Escape characters */
+
+#define CD180_C_ESC     0x00    /* Escape character                        */
+#define CD180_C_SBRK    0x81    /* Start sending BREAK                     */
+#define CD180_C_DELAY   0x82    /* Delay output                            */
+#define CD180_C_EBRK    0x83    /* Stop sending BREAK                      */