Merge with 2.3.99-pre6.

14 files changed, 447 insertions, 444 deletions

diff --git a/drivers/video/Config.in b/drivers/video/Config.in
index 4c8aa7dd8..c0482cd40 100644
--- a/drivers/video/Config.in
+++ b/drivers/video/Config.in
@@ -118,7 +118,7 @@ if [ "$CONFIG_FB" = "y" ]; then
 	    bool '    Multihead support' CONFIG_FB_MATROX_MULTIHEAD
 	 fi
 	 tristate '  ATI Mach64 display support (EXPERIMENTAL)' CONFIG_FB_ATY
-	 bool '  ATI Rage 128 display support (EXPERIMENTAL)' CONFIG_FB_ATY128
+	 tristate '  ATI Rage 128 display support (EXPERIMENTAL)' CONFIG_FB_ATY128
 	 bool '  3Dfx Banshee/Voodoo3 display support (EXPERIMENTAL)' CONFIG_FB_3DFX
       fi
    fi
diff --git a/drivers/video/acornfb.c b/drivers/video/acornfb.c
index 35efd479b..6d4c91409 100644
--- a/drivers/video/acornfb.c
+++ b/drivers/video/acornfb.c
@@ -1599,7 +1599,7 @@ acornfb_init(void)
 	}
 
 	current_par.currcon	   = -1;
-	current_par.screen_base	   = SCREEN2_BASE;
+	current_par.screen_base	   = SCREEN_BASE;
 	current_par.screen_base_p  = SCREEN_START;
 	current_par.using_vram     = 0;
 
@@ -1696,7 +1696,8 @@ acornfb_init(void)
 	v_sync = h_sync / (init_var.yres + init_var.upper_margin +
 		 init_var.lower_margin + init_var.vsync_len);
 
-	printk("Acornfb: %ldkB %cRAM, %s, using %dx%d, %d.%03dkHz, %dHz\n",
+	printk(KERN_INFO "Acornfb: %ldkB %cRAM, %s, using %dx%d, "
+		"%d.%03dkHz, %dHz\n",
 		current_par.screen_size / 1024,
 		current_par.using_vram ? 'V' : 'D',
 		VIDC_NAME, init_var.xres, init_var.yres,
diff --git a/drivers/video/aty128fb.c b/drivers/video/aty128fb.c
index 496363a6b..0952d0689 100644
--- a/drivers/video/aty128fb.c
+++ b/drivers/video/aty128fb.c
@@ -180,7 +180,7 @@ static unsigned int initdepth __initdata = 8;
 #ifndef MODULE
 static const char *mode_option __initdata = NULL;
 #endif
-#ifndef CONFIG_PPC
+#if !defined(CONFIG_PPC) && !defined(__sparc__)
 static void *bios_seg = NULL;
 #endif
 
@@ -244,12 +244,13 @@ struct fb_info_aty128 {
     struct fb_info fb_info;
     struct fb_info_aty128 *next;
     struct aty128_constants constants;  /* PLL and others      */
-    unsigned long regbase_phys;         /* physical mmio       */
+    u32 regbase_phys;                   /* physical mmio       */
     void *regbase;                      /* remapped mmio       */
-    unsigned long frame_buffer_phys;    /* physical fb memory  */
-    unsigned long frame_buffer;         /* remaped framebuffer */
-    const struct aty128_meminfo *mem;   /* onboard mem info    */
+    u32 frame_buffer_phys;              /* physical fb memory  */
+    u32 frame_buffer;                   /* remaped framebuffer */
+    u32 io_base;                        /* unmapped io         */
     u32 vram_size;                      /* onboard video ram   */
+    const struct aty128_meminfo *mem;   /* onboard mem info    */
     struct aty128fb_par default_par, current_par;
     struct display disp;
     struct display_switch dispsw;       /* for cursor and font */
@@ -301,6 +302,7 @@ static int aty128fb_pan_display(struct fb_var_screeninfo *var, int con,
 			   struct fb_info *fb);
 static int aty128fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
 		     u_long arg, int con, struct fb_info *info);
+static int aty128fb_rasterimg(struct fb_info *info, int start);
 
 
     /*
@@ -308,8 +310,8 @@ static int aty128fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
      */
 
 int aty128fb_init(void);
-static int aty128fbcon_switch(int con, struct fb_info *info);
-static void aty128fbcon_blank(int blank, struct fb_info *info);
+static int aty128fbcon_switch(int con, struct fb_info *fb);
+static void aty128fbcon_blank(int blank, struct fb_info *fb);
 
     /*
      *  Internal routines
@@ -335,9 +337,9 @@ static int aty128_pci_register(struct pci_dev *pdev,
                                const struct aty128_chip_info *aci);
 static struct fb_info_aty128 *aty128_board_list_add(struct fb_info_aty128
 				*board_list, struct fb_info_aty128 *new_node);
-static int aty128find_ROM(struct fb_info_aty128 *info);
-#ifndef CONFIG_PPC
+#if !defined(CONFIG_PPC) && !defined(__sparc__)
 static void aty128_get_pllinfo(struct fb_info_aty128 *info);
+static int aty128find_ROM(struct fb_info_aty128 *info);
 #endif
 static void aty128_timings(struct fb_info_aty128 *info);
 static void aty128_init_engine(const struct aty128fb_par *par, 
@@ -385,29 +387,26 @@ static void fbcon_aty32_putcs(struct vc_data *conp, struct display *p,
 static struct fb_ops aty128fb_ops = {
     aty128fb_open, aty128fb_release, aty128fb_get_fix,
     aty128fb_get_var, aty128fb_set_var, aty128fb_get_cmap,
-    aty128fb_set_cmap, aty128fb_pan_display, aty128fb_ioctl
+    aty128fb_set_cmap, aty128fb_pan_display, aty128fb_ioctl,
+    NULL, aty128fb_rasterimg
 };
 
 
     /*
      * Functions to read from/write to the mmio registers
-     *	- endian conversions may possibly be avoided by flipping CONFIG_CNTL
-     *  or using the other register aperture? TODO.
+     *	- endian conversions may possibly be avoided by
+     *    using the other register aperture. TODO.
      */
 static inline u32
 _aty_ld_le32(volatile unsigned int regindex, 
                               const struct fb_info_aty128 *info)
 {
-    unsigned long *temp;
     u32 val;
 
 #if defined(__powerpc__)
-    eieio();
-    temp = info->regbase;
-    asm("lwbrx %0,%1,%2" : "=b"(val) : "b" (regindex), "b" (temp));
+    asm("lwbrx %0,%1,%2;eieio" : "=r"(val) : "b"(regindex), "r"(info->regbase));
 #else
-    temp = info->regbase+regindex;
-    val = readl (temp);
+    val = readl (info->regbase + regindex);
 #endif
 
     return val;
@@ -417,35 +416,23 @@ static inline void
 _aty_st_le32(volatile unsigned int regindex, u32 val, 
                                const struct fb_info_aty128 *info)
 {
-    unsigned long *temp;
-
 #if defined(__powerpc__)
-    temp = info->regbase;
-    asm("stwbrx %0,%1,%2" : : "r" (val), "b" (regindex), "r" (temp) :
-        "memory");
-#elif defined(__mc68000__)
-    *((volatile u32 *)(info->regbase+regindex)) = cpu_to_le32(val);
+    asm("stwbrx %0,%1,%2;eieio" : : "r"(val), "b"(regindex),
+                "r"(info->regbase) : "memory");
 #else
-    temp = info->regbase+regindex;
-    writel (val, temp);
+    writel (val, info->regbase + regindex);
 #endif
 }
 
 static inline u8
 _aty_ld_8(unsigned int regindex, const struct fb_info_aty128 *info)
 {
-#if defined(__powerpc__)
-    eieio();
-#endif
     return readb (info->regbase + regindex);
 }
 
 static inline void
 _aty_st_8(unsigned int regindex, u8 val, const struct fb_info_aty128 *info)
 {
-#if defined(__powerpc__)
-    eieio();
-#endif
     writeb (val, info->regbase + regindex);
 }
 
@@ -466,9 +453,6 @@ static u32
 _aty_ld_pll(unsigned int pll_index,
 			const struct fb_info_aty128 *info)
 {       
-#if defined(__powerpc__)
-    eieio();
-#endif
     aty_st_8(CLOCK_CNTL_INDEX, pll_index & 0x1F);
     return aty_ld_le32(CLOCK_CNTL_DATA);
 }
@@ -478,9 +462,6 @@ static void
 _aty_st_pll(unsigned int pll_index, u32 val,
 			const struct fb_info_aty128 *info)
 {
-#if defined(__powerpc__)
-    eieio();
-#endif
     aty_st_8(CLOCK_CNTL_INDEX, (pll_index & 0x1F) | PLL_WR_EN);
     aty_st_le32(CLOCK_CNTL_DATA, val);
 }
@@ -528,7 +509,8 @@ aty_pll_writeupdate(const struct fb_info_aty128 *info)
 static int __init
 register_test(const struct fb_info_aty128 *info)
 {
-    u32 val, flag = 0;
+    u32 val;
+    int flag = 0;
 
     val = aty_ld_le32(BIOS_0_SCRATCH);
 
@@ -648,35 +630,34 @@ aty128_init_engine(const struct aty128fb_par *par,
     u32 pitch_value;
 
     /* 3D scaler not spoken here */
+    wait_for_fifo(1, info);
     aty_st_le32(SCALE_3D_CNTL, 0x00000000);
 
     aty128_reset_engine(info);
 
-    pitch_value = par->crtc.pitch;	/* fix this up */
+    pitch_value = par->crtc.pitch;
     if (par->crtc.bpp == 24) {
         pitch_value = pitch_value * 3;
     }
 
+    wait_for_fifo(4, info);
     /* setup engine offset registers */
-    wait_for_fifo(1, info);
     aty_st_le32(DEFAULT_OFFSET, 0x00000000);
 
     /* setup engine pitch registers */
     aty_st_le32(DEFAULT_PITCH, pitch_value);
 
     /* set the default scissor register to max dimensions */
-    wait_for_fifo(1, info);
     aty_st_le32(DEFAULT_SC_BOTTOM_RIGHT, (0x1FFF << 16) | 0x1FFF);
 
     /* set the drawing controls registers */
-    wait_for_fifo(1, info);
     aty_st_le32(DP_GUI_MASTER_CNTL,
 		GMC_SRC_PITCH_OFFSET_DEFAULT		|
 		GMC_DST_PITCH_OFFSET_DEFAULT		|
 		GMC_SRC_CLIP_DEFAULT			|
 		GMC_DST_CLIP_DEFAULT			|
 		GMC_BRUSH_SOLIDCOLOR			|
-		(bpp_to_depth(par->crtc.bpp << 8))	|
+		(bpp_to_depth(par->crtc.bpp) << 8)	|
 		GMC_SRC_DSTCOLOR			|
 		GMC_BYTE_ORDER_MSB_TO_LSB		|
 		GMC_DP_CONVERSION_TEMP_6500		|
@@ -688,7 +669,6 @@ aty128_init_engine(const struct aty128fb_par *par,
 		GMC_WRITE_MASK_SET);
 
     wait_for_fifo(8, info);
-
     /* clear the line drawing registers */
     aty_st_le32(DST_BRES_ERR, 0);
     aty_st_le32(DST_BRES_INC, 0);
@@ -766,23 +746,22 @@ aty128_var_to_crtc(const struct fb_var_screeninfo *var,
     /* input */
     xres = var->xres;
     yres = var->yres;
-    vxres = var->xres_virtual;
-    vyres = var->yres_virtual;
+    vxres   = var->xres_virtual;
+    vyres   = var->yres_virtual;
     xoffset = var->xoffset;
     yoffset = var->yoffset;
-    bpp = var->bits_per_pixel;
-    left = var->left_margin;
+    bpp   = var->bits_per_pixel;
+    left  = var->left_margin;
     right = var->right_margin;
     upper = var->upper_margin;
     lower = var->lower_margin;
     hslen = var->hsync_len;
     vslen = var->vsync_len;
-    sync = var->sync;
+    sync  = var->sync;
     vmode = var->vmode;
 
-    /* check for mode eligibility */
-
-    /* accept only non interlaced modes */
+    /* check for mode eligibility
+     * accept only non interlaced modes */
     if ((vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
 	return -EINVAL;
 
@@ -796,6 +775,7 @@ aty128_var_to_crtc(const struct fb_var_screeninfo *var,
     if (vyres < yres + yoffset)
 	vyres = yres + yoffset;
 
+    /* convert bpp into ATI register depth */
     depth = bpp_to_depth(bpp);
 
     /* make sure we didn't get an invalid depth */
@@ -804,7 +784,8 @@ aty128_var_to_crtc(const struct fb_var_screeninfo *var,
         return -EINVAL;
     }
 
-   bytpp = mode_bytpp[depth];
+    /* convert depth to bpp */
+    bytpp = mode_bytpp[depth];
 
     /* make sure there is enough video ram for the mode */
     if ((u32)(vxres * vyres * bytpp) > info->vram_size) {
@@ -813,24 +794,24 @@ aty128_var_to_crtc(const struct fb_var_screeninfo *var,
     }
 
     h_disp = (xres >> 3) - 1;
-    h_total = (((xres + right + hslen + left) / 8) - 1) & 0xFFFFL;
+    h_total = (((xres + right + hslen + left) >> 3) - 1) & 0xFFFFL;
 
     v_disp = yres - 1;
     v_total = (yres + upper + vslen + lower - 1) & 0xFFFFL;
 
     /* check to make sure h_total and v_total are in range */
-    if ((h_total/8 - 1) > 0x1ff || (v_total - 1) > 0x7FF) {
+    if (((h_total >> 3) - 1) > 0x1ff || (v_total - 1) > 0x7FF) {
         printk(KERN_ERR "aty128fb: invalid width ranges\n");
         return -EINVAL;
     }
 
-    h_sync_wid = (hslen+7)/8;
+    h_sync_wid = (hslen + 7) >> 3;
     if (h_sync_wid == 0)
 	h_sync_wid = 1;
     else if (h_sync_wid > 0x3f)        /* 0x3f = max hwidth */
 	h_sync_wid = 0x3f;
 
-    h_sync_strt = h_disp + (right/8);
+    h_sync_strt = h_disp + (right >> 3);
 
     v_sync_wid = vslen;
     if (v_sync_wid == 0)
@@ -855,7 +836,7 @@ aty128_var_to_crtc(const struct fb_var_screeninfo *var,
     crtc->v_sync_strt_wid = v_sync_strt | (v_sync_wid << 16) |
                 (v_sync_pol << 23);
 
-    crtc->pitch = xres >> 3;
+    crtc->pitch = vxres >> 3;
 
     crtc->offset = 0;
     crtc->offset_cntl = 0;
@@ -922,7 +903,7 @@ aty128_bpp_to_var(int pix_width, struct fb_var_screeninfo *var)
 	var->transp.length = 8;
 	break;
     default:
-        printk(KERN_ERR "Invalid pixel width\n");
+        printk(KERN_ERR "aty128fb: Invalid pixel width\n");
         return -EINVAL;
     }
 
@@ -941,26 +922,27 @@ aty128_crtc_to_var(const struct aty128_crtc *crtc,
 
     /* fun with masking */
     h_total     = crtc->h_total & 0x1ff;
-    h_disp      = (crtc->h_total>>16) & 0xff;
-    h_sync_strt = (crtc->h_sync_strt_wid>>3) & 0x1ff;
+    h_disp      = (crtc->h_total >> 16) & 0xff;
+    h_sync_strt = (crtc->h_sync_strt_wid >> 3) & 0x1ff;
     h_sync_dly  = crtc->h_sync_strt_wid & 0x7;
-    h_sync_wid  = (crtc->h_sync_strt_wid>>16) & 0x3f;
-    h_sync_pol  = (crtc->h_sync_strt_wid>>23) & 0x1;
+    h_sync_wid  = (crtc->h_sync_strt_wid >> 16) & 0x3f;
+    h_sync_pol  = (crtc->h_sync_strt_wid >> 23) & 0x1;
     v_total     = crtc->v_total & 0x7ff;
-    v_disp      = (crtc->v_total>>16) & 0x7ff;
+    v_disp      = (crtc->v_total >> 16) & 0x7ff;
     v_sync_strt = crtc->v_sync_strt_wid & 0x7ff;
-    v_sync_wid  = (crtc->v_sync_strt_wid>>16) & 0x1f;
-    v_sync_pol  = (crtc->v_sync_strt_wid>>23) & 0x1;
+    v_sync_wid  = (crtc->v_sync_strt_wid >> 16) & 0x1f;
+    v_sync_pol  = (crtc->v_sync_strt_wid >> 23) & 0x1;
     c_sync      = crtc->gen_cntl & CRTC_CSYNC_EN ? 1 : 0;
     pix_width   = crtc->gen_cntl & CRTC_PIX_WIDTH_MASK;
 
-    xres  = (h_disp+1) << 3;
-    yres  = v_disp+1;
-    left  = (h_total-h_sync_strt-h_sync_wid)*8-h_sync_dly;
-    right = (h_sync_strt-h_disp)*8+h_sync_dly;
-    hslen = h_sync_wid*8;
-    upper = v_total-v_sync_strt-v_sync_wid;
-    lower = v_sync_strt-v_disp;
+    /* do conversions */
+    xres  = (h_disp + 1) << 3;
+    yres  = v_disp + 1;
+    left  = ((h_total - h_sync_strt - h_sync_wid) << 3) - h_sync_dly;
+    right = ((h_sync_strt - h_disp) << 3) + h_sync_dly;
+    hslen = h_sync_wid << 3;
+    upper = v_total - v_sync_strt - v_sync_wid;
+    lower = v_sync_strt - v_disp;
     vslen = v_sync_wid;
     sync  = (h_sync_pol ? 0 : FB_SYNC_HOR_HIGH_ACT) |
             (v_sync_pol ? 0 : FB_SYNC_VERT_HIGH_ACT) |
@@ -974,13 +956,13 @@ aty128_crtc_to_var(const struct aty128_crtc *crtc,
     var->yres_virtual = crtc->vyres;
     var->xoffset = crtc->xoffset;
     var->yoffset = crtc->yoffset;
-    var->left_margin = left;
+    var->left_margin  = left;
     var->right_margin = right;
     var->upper_margin = upper;
     var->lower_margin = lower;
     var->hsync_len = hslen;
     var->vsync_len = vslen;
-    var->sync = sync;
+    var->sync  = sync;
     var->vmode = FB_VMODE_NONINTERLACED;
 
     return 0;
@@ -990,7 +972,7 @@ aty128_crtc_to_var(const struct aty128_crtc *crtc,
 static void
 aty128_set_pll(struct aty128_pll *pll, const struct fb_info_aty128 *info)
 {
-    int div3;
+    u32 div3;
 
     unsigned char post_conv[] =	/* register values for post dividers */
         { 2, 0, 1, 4, 2, 2, 6, 2, 3, 2, 2, 2, 7 };
@@ -1003,25 +985,23 @@ aty128_set_pll(struct aty128_pll *pll, const struct fb_info_aty128 *info)
 		aty_ld_pll(PPLL_CNTL) | PPLL_RESET | PPLL_ATOMIC_UPDATE_EN);
 
     /* write the reference divider */
+    aty_pll_wait_readupdate(info);
     aty_st_pll(PPLL_REF_DIV, info->constants.ref_divider & 0x3ff);
     aty_pll_writeupdate(info);
-    aty_pll_wait_readupdate(info);
 
     div3 = aty_ld_pll(PPLL_DIV_3);
-
     div3 &= ~PPLL_FB3_DIV_MASK;
     div3 |= pll->feedback_divider;
-
     div3 &= ~PPLL_POST3_DIV_MASK;
     div3 |= post_conv[pll->post_divider] << 16;
 
     /* write feedback and post dividers */
+    aty_pll_wait_readupdate(info);
     aty_st_pll(PPLL_DIV_3, div3);
     aty_pll_writeupdate(info);
-    aty_pll_wait_readupdate(info);
 
+    aty_pll_wait_readupdate(info);
     aty_st_pll(HTOTAL_CNTL, 0);	/* no horiz crtc adjustment */
-
     aty_pll_writeupdate(info);
 
     /* clear the reset, just in case */
@@ -1111,7 +1091,7 @@ aty128_ddafifo(struct aty128_ddafifo *dsp,
 	bpp = 16;
 
     n = xclk * fifo_width;
-    d = pll->vclk*bpp;
+    d = pll->vclk * bpp;
     x = round_div(n, d);
 
     ron = 4 * m->MB +
@@ -1162,13 +1142,6 @@ aty128_set_par(struct aty128fb_par *par,
 			struct fb_info_aty128 *info)
 { 
     u32 config;
-#ifdef CONFIG_FB_COMPAT_XPMAC
-#if 0 /* enable this when macmodes gets updated */
-    struct vc_mode disp_info;
-#endif
-    struct fb_var_screeninfo var;
-    int cmode, vmode;
-#endif
 
     info->current_par = *par;
     
@@ -1210,31 +1183,15 @@ aty128_set_par(struct aty128fb_par *par,
     if (par->accel_flags & FB_ACCELF_TEXT)
         aty128_init_engine(par, info);
 
-#if 0/*def CONFIG_FB_COMPAT_XPMAC*/
-#if 0 /* use this when macmodes gets updated */
-    if (!console_fb_info || console_fb_info == &info->fb_info) {
-	disp_info.width = ((par->crtc.v_total >> 16) & 0x7ff)+1;
-	disp_info.height = (((par->crtc.h_total >> 16) & 0xff)+1) << 3;
-	disp_info.depth = par->crtc.bpp;
-	disp_info.pitch = par->crtc.vxres*par->crtc.bpp >> 3;
-        aty128_encode_var(&var, par, info);
-	if (mac_var_to_vmode(&var, &vmode, &cmode))
-	    disp_info.mode = 0;
-	else
-	    disp_info.mode = vmode;
-	strcpy(disp_info.name, aty128fb_name);
-	disp_info.fb_address = info->frame_buffer_phys;
-	disp_info.cmap_adr_address = 0;
-	disp_info.cmap_data_address = 0;
-	disp_info.disp_reg_address = info->regbase_phys;
-        register_compat_xpmac(disp_info);
-    }
-#else
+#ifdef CONFIG_FB_COMPAT_XPMAC
     if (!console_fb_info || console_fb_info == &info->fb_info) {
-	display_info.width = ((par->crtc.v_total >> 16) & 0x7ff)+1;
-	display_info.height = (((par->crtc.h_total >> 16) & 0xff)+1) << 3;
+        struct fb_var_screeninfo var;
+        int cmode, vmode;
+
+	display_info.height = ((par->crtc.v_total >> 16) & 0x7ff) + 1;
+	display_info.width = (((par->crtc.h_total >> 16) & 0xff) + 1) << 3;
 	display_info.depth = par->crtc.bpp;
-	display_info.pitch = par->crtc.vxres*par->crtc.bpp >> 3;
+	display_info.pitch = (par->crtc.vxres * par->crtc.bpp) >> 3;
         aty128_encode_var(&var, par, info);
 	if (mac_var_to_vmode(&var, &vmode, &cmode))
 	    display_info.mode = 0;
@@ -1245,9 +1202,7 @@ aty128_set_par(struct aty128fb_par *par,
 	display_info.cmap_adr_address = 0;
 	display_info.cmap_data_address = 0;
 	display_info.disp_reg_address = info->regbase_phys;
-        register_compat_xpmac(display_info);
     }
-#endif
 #endif /* CONFIG_FB_COMPAT_XPMAC */
 }
 
@@ -1491,15 +1446,15 @@ aty128_encode_fix(struct fb_fix_screeninfo *fix,
     
     strcpy(fix->id, aty128fb_name);
 
-    fix->smem_start = (long)info->frame_buffer_phys;
-    fix->mmio_start = (long)info->regbase_phys;
+    fix->smem_start = (unsigned long)info->frame_buffer_phys;
+    fix->mmio_start = (unsigned long)info->regbase_phys;
 
-    fix->smem_len = (u32)info->vram_size;
+    fix->smem_len = info->vram_size;
     fix->mmio_len = 0x1fff;
 
     fix->type        = FB_TYPE_PACKED_PIXELS;
     fix->type_aux    = 0;
-    fix->line_length = par->crtc.vxres*par->crtc.bpp >> 3;
+    fix->line_length = (par->crtc.vxres * par->crtc.bpp) >> 3;
     fix->visual      = par->crtc.bpp <= 8 ? FB_VISUAL_PSEUDOCOLOR
                                           : FB_VISUAL_DIRECTCOLOR;
     fix->ywrapstep = 0;
@@ -1547,7 +1502,7 @@ aty128fb_pan_display(struct fb_var_screeninfo *var, int con,
     u32 offset;
     u32 xres, yres;
 
-    xres = (((par->crtc.h_total >> 16) & 0xff) + 1) * 8;
+    xres = (((par->crtc.h_total >> 16) & 0xff) + 1) << 3;
     yres = ((par->crtc.v_total >> 16) & 0x7ff) + 1;
 
     xoffset = (var->xoffset +7) & ~7;
@@ -1617,7 +1572,6 @@ aty128fb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
     return 0;                
 }
 
-
     /*
      *  Frame Buffer Specific ioctls
      */
@@ -1630,6 +1584,18 @@ aty128fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
 }
 
 
+static int
+aty128fb_rasterimg(struct fb_info *info, int start)
+{
+    struct fb_info_aty128 *fb = (struct fb_info_aty128 *)info;
+
+    if (fb->blitter_may_be_busy)
+        wait_for_idle(fb);
+
+    return 0;
+}
+
+
 #ifndef MODULE
 int __init
 aty128fb_setup(char *options)
@@ -1742,12 +1708,13 @@ aty128_init(struct fb_info_aty128 *info, const char *name)
 
     /* fill in info */
     strcpy(info->fb_info.modename, aty128fb_name);
-    info->fb_info.node = -1;
+    info->fb_info.node  = -1;
     info->fb_info.fbops = &aty128fb_ops;
-    info->fb_info.disp = &info->disp;
+    info->fb_info.disp  = &info->disp;
     strcpy(info->fb_info.fontname, fontname);
-    info->fb_info.changevar = NULL;
+    info->fb_info.changevar  = NULL;
     info->fb_info.switch_con = &aty128fbcon_switch;
+    info->fb_info.updatevar  = NULL;
     info->fb_info.blank = &aty128fbcon_blank;
     info->fb_info.flags = FBINFO_FLAG_DEFAULT;
 
@@ -1755,7 +1722,7 @@ aty128_init(struct fb_info_aty128 *info, const char *name)
     var = default_var;
 #else
     memset(&var, 0, sizeof(var));
-#ifdef CONFIG_FB_COMPAT_XPMAC       /* CONFIG_PPC implied */
+#ifdef CONFIG_PPC
     if (_machine == _MACH_Pmac) {
         if (mode_option) {
             if (!mac_find_mode(&var, &info->fb_info, mode_option, 8))
@@ -1777,12 +1744,14 @@ aty128_init(struct fb_info_aty128 *info, const char *name)
             if (mac_vmode_to_var(default_vmode, default_cmode, &var))
                 var = default_var;
         }
+    } else {
+#endif /* CONFIG_PPC */
+        if (fb_find_mode(&var, &info->fb_info, mode_option, NULL, 0,
+                          &defaultmode, initdepth) == 0)
+            var = default_var;
+#ifdef CONFIG_PPC
     }
-#else
-    if (fb_find_mode(&var, &info->fb_info, mode_option, NULL, 0,
-                      &defaultmode, initdepth) == 0)
-        var = default_var;
-#endif /* CONFIG_FB_COMPAT_XPMAC */
+#endif
 #endif /* MODULE */
 
     if (noaccel)
@@ -1873,35 +1842,36 @@ aty128_pci_register(struct pci_dev *pdev,
                                const struct aty128_chip_info *aci)
 {
     struct fb_info_aty128 *info = NULL;
-    unsigned long fb_addr, reg_addr = 0;
-    u16 tmp;
-
-    struct resource *rp;
+    u32 fb_addr, reg_addr, io_addr = 0;
+    int err;
 
-    rp = &pdev->resource[0];
-    fb_addr = rp->start;
-    fb_addr &= PCI_BASE_ADDRESS_MEM_MASK;
+    /* Request resources we're going to use */
+    io_addr = pci_resource_start(pdev, 1);
+    if (!request_region(io_addr, pci_resource_len(pdev, 1),
+                        "aty128fb IO")) {
+        printk(KERN_ERR "aty128fb: cannot reserve I/O ports\n");
+        goto err_out_none;
+    }
 
-    if (!request_mem_region(rp->start, rp->end - rp->start + 1,
+    fb_addr = pci_resource_start(pdev, 0);
+    if (!request_mem_region(fb_addr, pci_resource_len(pdev, 0),
                             "aty128fb FB")) {
-        release_mem_region(pdev->resource[0].start,
-                           pdev->resource[0].end -
-                           pdev->resource[0].start + 1);
-        return -1;
+        printk(KERN_ERR "aty128fb: cannot reserve frame buffer memory\n");
+        goto err_free_fb;
     }
 
-    rp = &pdev->resource[2];
-    reg_addr = rp->start;
-    reg_addr &= PCI_BASE_ADDRESS_MEM_MASK;
-
-    if (!request_mem_region(rp->start, rp->end - rp->start + 1,
-                            "aty128fb MMIO"))
-        goto unmap_out;
+    reg_addr = pci_resource_start(pdev, 2);
+    if (!request_mem_region(reg_addr, pci_resource_len(pdev, 2),
+                            "aty128fb MMIO")) {
+        printk(KERN_ERR "aty128fb: cannot reserve MMIO region\n");
+        goto err_free_mmio;
+    }
 
+    /* We have the resources. Now virtualize them */
     info = kmalloc(sizeof(struct fb_info_aty128), GFP_ATOMIC);
     if(!info) {
         printk(KERN_ERR "aty128fb: can't alloc fb_info_aty128\n");
-	goto unmap_out;
+	goto err_unmap_out;
     }
     memset(info, 0, sizeof(struct fb_info_aty128));
 
@@ -1913,22 +1883,29 @@ aty128_pci_register(struct pci_dev *pdev,
     info->regbase = ioremap(reg_addr, 0x1FFF);
 
     if (!info->regbase)
-        goto err_out;
+        goto err_free_info;
 
-    info->vram_size = aty_ld_le32(CONFIG_MEMSIZE) & 0x03FFFFFF;
+    /* Store io_base */
+    info->io_base = io_addr;
 
-    pci_read_config_word(pdev, PCI_COMMAND, &tmp);
-    if (!(tmp & PCI_COMMAND_MEMORY)) {
-        tmp |= PCI_COMMAND_MEMORY;
-        pci_write_config_word(pdev, PCI_COMMAND, tmp);
-    }
+    /* Grab memory size from the card */
+    info->vram_size = aty_ld_le32(CONFIG_MEMSIZE) & 0x03FFFFFF;
 
     /* Virtualize the framebuffer */
     info->frame_buffer_phys = fb_addr;
-    info->frame_buffer = (unsigned long)ioremap(fb_addr, info->vram_size);
+    info->frame_buffer = (u32)ioremap(fb_addr, info->vram_size);
+
+    if (!info->frame_buffer) {
+        iounmap((void *)info->regbase);
+        goto err_free_info;
+    }
 
-    if (!info->frame_buffer)
+    /* Enable device in PCI config */
+    err = pci_enable_device(pdev);
+    if (err) {
+        printk(KERN_ERR "aty128fb: Cannot enable PCI device: %d\n", err);
         goto err_out;
+    }
 
     /* If we can't test scratch registers, something is seriously wrong */
     if (!register_test(info)) {
@@ -1936,21 +1913,17 @@ aty128_pci_register(struct pci_dev *pdev,
         goto err_out;
     }
 
-    if (!aty128find_ROM(info)) {
+#if !defined(CONFIG_PPC) && !defined(__sparc__)
+    if (!aty128find_ROM(info))
         printk(KERN_INFO "aty128fb: Rage128 BIOS not located. Guessing...\n");
-        aty128_timings(info);
-    }
-#ifndef CONFIG_PPC
- else
+    else
         aty128_get_pllinfo(info);
-
-        /* free up to-be unused resources. bios_seg is mapped by
-         * aty128find_ROM() and used by aty128_get_pllinfo()
-         *
-         * TODO: make more elegant. doesn't need to be global */
-        if (bios_seg)
-            iounmap(bios_seg);
 #endif
+    aty128_timings(info);
+
+    if (!aty128_init(info, "PCI"))
+        goto err_out;
+
 #ifdef CONFIG_MTRR
     if (mtrr) {
         info->mtrr.vram = mtrr_add(info->frame_buffer_phys, info->vram_size,
@@ -1961,32 +1934,34 @@ aty128_pci_register(struct pci_dev *pdev,
     }
 #endif /* CONFIG_MTRR */
 
-    if (!aty128_init(info, "PCI"))
-        goto err_out;
-
     return 0;
 
 err_out:
+    iounmap((void *)info->frame_buffer);
+    iounmap((void *)info->regbase);
+err_free_info:
     kfree(info);
-unmap_out:
-    release_mem_region(pdev->resource[0].start,
-			pdev->resource[0].end -
-			pdev->resource[0].start + 1);
-    release_mem_region(pdev->resource[2].start,
-			pdev->resource[2].end -
-			pdev->resource[2].start + 1);
-
-    return -1;
+err_unmap_out:
+    release_mem_region(pci_resource_start(pdev, 2),
+			pci_resource_len(pdev, 2));
+err_free_mmio:
+    release_mem_region(pci_resource_start(pdev, 0),
+			pci_resource_len(pdev, 0));
+err_free_fb:
+    release_mem_region(pci_resource_start(pdev, 1),
+			pci_resource_len(pdev, 1));
+err_out_none:
+    return -ENODEV;
 }
 #endif /* CONFIG_PCI */
 
 
-/* PPC cannot read video ROM, so we fail by default */
+/* PPC and Sparc cannot read video ROM */
+#if !defined(CONFIG_PPC) && !defined(__sparc__)
 static int __init
 aty128find_ROM(struct fb_info_aty128 *info)
 {
     int  flag = 0;
-#ifndef CONFIG_PPC
     u32  segstart;
     char *rom_base;
     char *rom;
@@ -2043,12 +2018,10 @@ aty128find_ROM(struct fb_info_aty128 *info)
         flag = 1;
         break;
     }
-#endif /* !CONFIG_PPC */
     return (flag);
 }
 
 
-#ifndef CONFIG_PPC
 static void __init
 aty128_get_pllinfo(struct fb_info_aty128 *info)
 {   
@@ -2076,11 +2049,12 @@ aty128_get_pllinfo(struct fb_info_aty128 *info)
     info->constants.ref_divider = (u32)pll.PCLK_ref_divider;
     info->constants.dotclock = (u32)pll.PCLK_ref_freq;
 
-    aty_st_pll(PPLL_REF_DIV, info->constants.ref_divider);
-    aty_pll_writeupdate(info);
-
-    info->constants.fifo_width = 128;
-    info->constants.fifo_depth = 32;
+    /* free up to be un-used resources. bios_seg is mapped by
+     * aty128find_ROM() and used by aty128_get_pllinfo()
+     *
+     * TODO: make more elegant. doesn't need to be global */
+    if (bios_seg)
+        iounmap(bios_seg);
 
 #ifdef DEBUG
     printk(KERN_DEBUG "get_pllinfo: ppll_max %d ppll_min %d xclk %d "
@@ -2089,56 +2063,59 @@ aty128_get_pllinfo(struct fb_info_aty128 *info)
                    info->constants.xclk, info->constants.ref_divider,
                    info->constants.dotclock);
 #endif
-
-    switch(aty_ld_le32(MEM_CNTL) & 0x03) {
-    case 0:
-        info->mem = &sdr_128; 
-        break;
-    case 1:
-        info->mem = &sdr_sgram;
-        break;  
-    case 2: 
-        info->mem = &ddr_sgram;
-        break;  
-    default:        
-        info->mem = &sdr_sgram;
-    }       
-
     return;
 }           
-#endif /* ! CONFIG_PPC */
+#endif /* !CONFIG_PPC */
 
 
 /* fill in known card constants if pll_block is not available */
 static void __init
 aty128_timings(struct fb_info_aty128 *info)
 {
-    /* TODO make an attempt at probing */
+#ifdef CONFIG_PPC
+    /* instead of a table lookup, assume OF has properly
+     * setup the PLL registers and use their values
+     * to set the XCLK values and reference divider values */
+
+    u32 x_mpll_ref_fb_div;
+    u32 xclk_cntl;
+    u32 Nx, M;
+    unsigned PostDivSet[] =
+        { 0, 1, 2, 4, 8, 3, 6, 12 };
+#endif
+
     if (!info->constants.dotclock)
         info->constants.dotclock = 2950;
 
-    /* from documentation */
-    if (!info->constants.ppll_min)
-        info->constants.ppll_min = 12500;
-    if (!info->constants.ppll_max)
-        info->constants.ppll_max = 25000;    /* 23000 on some cards? */
+#ifdef CONFIG_PPC
+    x_mpll_ref_fb_div = aty_ld_pll(X_MPLL_REF_FB_DIV);
+    xclk_cntl = aty_ld_pll(XCLK_CNTL) & 0x7;
+    Nx = (x_mpll_ref_fb_div & 0x00ff00) >> 8;
+    M  = x_mpll_ref_fb_div & 0x0000ff;
+
+    info->constants.xclk = round_div((2 * Nx *
+        info->constants.dotclock), (M * PostDivSet[xclk_cntl]));
 
-#if 1
-    /* XXX TODO. Calculuate properly. */
-    if (!info->constants.ref_divider)
+    info->constants.ref_divider =
+        aty_ld_pll(PPLL_REF_DIV) & PPLL_REF_DIV_MASK;
+#endif
+
+    if (!info->constants.ref_divider) {
         info->constants.ref_divider = 0x3b;
-    aty_st_pll(PPLL_REF_DIV, info->constants.ref_divider);
-    aty_pll_writeupdate(info);
 
-    aty_st_pll(X_MPLL_REF_FB_DIV, 0x004c4c1e);
+        aty_st_pll(X_MPLL_REF_FB_DIV, 0x004c4c1e);
+        aty_pll_writeupdate(info);
+    }
+    aty_st_pll(PPLL_REF_DIV, info->constants.ref_divider);
     aty_pll_writeupdate(info);
-#else
-    info->constants.ref_divider = aty_ld_pll(PPLL_REF_DIV) & PPLL_REF_DIV_MASK;
-#endif
 
-    /* TODO. Calculate */
+    /* from documentation */
+    if (!info->constants.ppll_min)
+        info->constants.ppll_min = 12500;
+    if (!info->constants.ppll_max)
+        info->constants.ppll_max = 25000;    /* 23000 on some cards? */
     if (!info->constants.xclk)
-        info->constants.xclk = 0x1d4d;	  /* same as mclk */
+        info->constants.xclk = 0x1d4d;	     /* same as mclk */
 
     info->constants.fifo_width = 128;
     info->constants.fifo_depth = 32;
@@ -2225,7 +2202,6 @@ aty128_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue,
     return 0;
 }
 
-
     /*
      *  Set a single color register. The values supplied are already
      *  rounded down to the hardware's capabilities (according to the
@@ -2314,22 +2290,36 @@ do_install_cmap(int con, struct fb_info *info)
      *  Accelerated functions
      */
 
-static void
+static inline void
 aty128_rectcopy(int srcx, int srcy, int dstx, int dsty,
 		u_int width, u_int height,
 		struct fb_info_aty128 *info)
 {
-    u32 save_dp_datatype, save_dp_cntl;
+    u32 save_dp_datatype, save_dp_cntl, bppval;
+
+    if (!width || !height)
+        return;
+
+    bppval = bpp_to_depth(info->current_par.crtc.bpp);
+    if (bppval == DST_24BPP) {
+        srcx *= 3;
+        dstx *= 3;
+        width *= 3;
+    } else if (bppval == -EINVAL) {
+        printk("aty128fb: invalid depth\n");
+        return;
+    }
 
     wait_for_fifo(2, info);
     save_dp_datatype = aty_ld_le32(DP_DATATYPE);
     save_dp_cntl     = aty_ld_le32(DP_CNTL);
 
     wait_for_fifo(6, info);
-    aty_st_le32(DP_DATATYPE, (BRUSH_SOLIDCOLOR << 16) | SRC_DSTCOLOR);
+    aty_st_le32(SRC_Y_X, (srcy << 16) | srcx);
     aty_st_le32(DP_MIX, ROP3_SRCCOPY | DP_SRC_RECT);
     aty_st_le32(DP_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM);
-    aty_st_le32(SRC_Y_X, (srcy << 16) | srcx);
+    aty_st_le32(DP_DATATYPE, save_dp_datatype | bppval | SRC_DSTCOLOR);
+
     aty_st_le32(DST_Y_X, (dsty << 16) | dstx);
     aty_st_le32(DST_HEIGHT_WIDTH, (height << 16) | width);
 
@@ -2338,8 +2328,6 @@ aty128_rectcopy(int srcx, int srcy, int dstx, int dsty,
     wait_for_fifo(2, info);
     aty_st_le32(DP_DATATYPE, save_dp_datatype);
     aty_st_le32(DP_CNTL, save_dp_cntl); 
-
-    wait_for_idle(info);
 }
 
 
@@ -2569,12 +2557,12 @@ cleanup_module(void)
         iounmap(info->regbase);
         iounmap(&info->frame_buffer);
 
-        release_mem_region(info->pdev->resource[0].start,
-                           info->pdev->resource[0].end -
-                           info->pdev->resource[0].start + 1);
-        release_mem_region(info->pdev->resource[2].start,
-                           info->pdev->resource[2].end -
-                           info->pdev->resource[2].start + 1);
+        release_mem_region(pci_resource_start(info->pdev, 0),
+                           pci_resource_len(info->pdev, 0));
+        release_mem_region(pci_resource_start(info->pdev, 1),
+                           pci_resource_len(info->pdev, 1));
+        release_mem_region(pci_resource_start(info->pdev, 2),
+                           pci_resource_len(info->pdev, 2));
 
         kfree(info);
     }
diff --git a/drivers/video/cyber2000fb.c b/drivers/video/cyber2000fb.c
index 3a8ccbc83..d43884936 100644
--- a/drivers/video/cyber2000fb.c
+++ b/drivers/video/cyber2000fb.c
@@ -616,8 +616,8 @@ static int cyber2000fb_decode_crtc(struct par_info *hw, struct fb_var_screeninfo
  *   mult = reg0xb0.7:0
  *   div1 = (reg0xb1.5:0 + 1)
  *   div2 =  2^(reg0xb1.7:6)
- *   fpll should be between 115 and 257 MHz
- *  (8696ps and 3891ps)
+ *   fpll should be between 115 and 260 MHz
+ *  (8696ps and 3846ps)
  */
 static int
 cyber2000fb_decode_clock(struct par_info *hw, struct fb_var_screeninfo *var)
@@ -631,7 +631,7 @@ cyber2000fb_decode_clock(struct par_info *hw, struct fb_var_screeninfo *var)
 
 	/*
 	 * Step 1:
-	 *   find div2 such that 115MHz < fpll < 257MHz
+	 *   find div2 such that 115MHz < fpll < 260MHz
 	 *   and 0 <= div2 < 4
 	 */
 	if (current_par.dev_id == PCI_DEVICE_ID_INTERG_2010)
@@ -643,7 +643,7 @@ cyber2000fb_decode_clock(struct par_info *hw, struct fb_var_screeninfo *var)
 		unsigned long new_pll;
 
 		new_pll = pll_ps / divisors[div2];
-		if (8696 > new_pll && new_pll > 3891) {
+		if (8696 > new_pll && new_pll > 3846) {
 			pll_ps = new_pll;
 			break;
 		}
@@ -655,8 +655,10 @@ cyber2000fb_decode_clock(struct par_info *hw, struct fb_var_screeninfo *var)
 #if 0
 	/*
 	 * Step 2:
-	 *  Find fpll
-	 *    fpll = fref * mult / div1
+	 *  Given pll_ps and ref_ps, find:
+	 *    pll_ps * 0.995 < pll_ps_calc < pll_ps * 1.005
+	 *  where { 0 < div1 < 32, 0 < mult < 256 }
+	 *    pll_ps_calc = div1 / (ref_ps * mult)
 	 *
 	 * Note!  This just picks any old values at the moment,
 	 * and as such I don't trust it.  It certainly doesn't
@@ -1172,13 +1174,42 @@ static struct fb_ops cyber2000fb_ops =
 	cyber2000fb_ioctl
 };
 
+/*
+ * Enable access to the extended registers
+ *  Bug: this should track the usage of these registers
+ */
+static void cyber2000fb_enable_extregs(void)
+{
+	int old;
+
+	old = cyber2000_grphr(FUNC_CTL);
+	cyber2000_grphw(FUNC_CTL, old | FUNC_CTL_EXTREGENBL);
+}
+
+/*
+ * Disable access to the extended registers
+ *  Bug: this should track the usage of these registers
+ */
+static void cyber2000fb_disable_extregs(void)
+{
+	int old;
+
+	old = cyber2000_grphr(FUNC_CTL);
+	cyber2000_grphw(FUNC_CTL, old & ~FUNC_CTL_EXTREGENBL);
+}
+
+/*
+ * Attach a capture/tv driver to the core CyberX0X0 driver.
+ */
 int cyber2000fb_attach(struct cyberpro_info *info)
 {
 	if (current_par.initialised) {
-		info->dev     = current_par.dev;
-		info->regs    = CyberRegs;
-		info->fb      = current_par.screen_base;
-		info->fb_size = current_par.screen_size;
+		info->dev	      = current_par.dev;
+		info->regs	      = CyberRegs;
+		info->fb	      = current_par.screen_base;
+		info->fb_size	      = current_par.screen_size;
+		info->enable_extregs  = cyber2000fb_enable_extregs;
+		info->disable_extregs = cyber2000fb_disable_extregs;
 
 		strncpy(info->dev_name, current_par.dev_name, sizeof(info->dev_name));
 
@@ -1188,6 +1219,9 @@ int cyber2000fb_attach(struct cyberpro_info *info)
 	return current_par.initialised;
 }
 
+/*
+ * Detach a capture/tv driver from the core CyberX0X0 driver.
+ */
 void cyber2000fb_detach(void)
 {
 	MOD_DEC_USE_COUNT;
@@ -1496,7 +1530,7 @@ int __init cyber2000fb_init(void)
 	v_sync = h_sync / (init_var.yres + init_var.upper_margin +
 		 init_var.lower_margin + init_var.vsync_len);
 
-	printk("%s: %ldkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
+	printk(KERN_INFO "%s: %ldkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
 		current_par.dev_name,
 		current_par.screen_size >> 10,
 		init_var.xres, init_var.yres,
diff --git a/drivers/video/cyber2000fb.h b/drivers/video/cyber2000fb.h
index 019747df7..734e7e7af 100644
--- a/drivers/video/cyber2000fb.h
+++ b/drivers/video/cyber2000fb.h
@@ -26,6 +26,12 @@ static inline void cyber2000_grphw(int reg, int val)
 	cyber2000_outb(val, 0x3cf);
 }
 
+static inline unsigned int cyber2000_grphr(int reg)
+{
+	cyber2000_outb(reg, 0x3ce);
+	return cyber2000_inb(0x3cf);
+}
+
 static inline void cyber2000_attrw(int reg, int val)
 {
 	cyber2000_inb(0x3da);
@@ -145,6 +151,9 @@ struct cyber2000fb_par {
 
 #define CAP_NEW_CTL2		0x89
 
+#define BM_CTRL0		0x9c
+#define BM_CTRL1		0x9d
+
 #define CAP_MODE1		0xa4
 #define CAP_MODE1_8BIT			0x01	/* enable 8bit capture mode		*/
 #define CAP_MODE1_CCIR656		0x02	/* CCIR656 mode				*/
@@ -244,11 +253,14 @@ struct cyber2000fb_par {
 /*
  * Bus-master
  */
+#define BM_VID_ADDR_LOW		0xbc040
+#define BM_VID_ADDR_HIGH	0xbc044
 #define BM_ADDRESS_LOW		0xbc080
 #define BM_ADDRESS_HIGH		0xbc084
 #define BM_LENGTH		0xbc088
 #define BM_CONTROL		0xbc08c
 #define BM_CONTROL_ENABLE		0x01	/* enable transfer			*/
+#define BM_CONTROL_IRQEN		0x02	/* enable IRQ at end of transfer	*/
 #define BM_CONTROL_INIT			0x04	/* initialise status & count		*/
 #define BM_COUNT		0xbc090		/* read-only				*/
 
@@ -282,6 +294,12 @@ struct cyberpro_info {
 	char		*fb;
 	char		dev_name[32];
 	unsigned int	fb_size;
+
+	/*
+	 * Use these to enable the BM or TV registers.
+	 */
+	void (*enable_extregs)(void);
+	void (*disable_extregs)(void);
 };
 
 /*
diff --git a/drivers/video/fbcon-iplan2p2.c b/drivers/video/fbcon-iplan2p2.c
index 8be581507..1a7e21cfe 100644
--- a/drivers/video/fbcon-iplan2p2.c
+++ b/drivers/video/fbcon-iplan2p2.c
@@ -17,7 +17,10 @@
 #include <linux/fb.h>
 
 #include <asm/byteorder.h>
+
+#ifdef __mc68000__
 #include <asm/setup.h>
+#endif
 
 #include <video/fbcon.h>
 #include <video/fbcon-iplan2p2.h>
diff --git a/drivers/video/fbcon-iplan2p4.c b/drivers/video/fbcon-iplan2p4.c
index 8591783d9..069c7d406 100644
--- a/drivers/video/fbcon-iplan2p4.c
+++ b/drivers/video/fbcon-iplan2p4.c
@@ -17,7 +17,10 @@
 #include <linux/fb.h>
 
 #include <asm/byteorder.h>
+
+#ifdef __mc68000__
 #include <asm/setup.h>
+#endif
 
 #include <video/fbcon.h>
 #include <video/fbcon-iplan2p4.h>
diff --git a/drivers/video/fbcon-iplan2p8.c b/drivers/video/fbcon-iplan2p8.c
index 4ee366019..bc3730a1f 100644
--- a/drivers/video/fbcon-iplan2p8.c
+++ b/drivers/video/fbcon-iplan2p8.c
@@ -17,7 +17,10 @@
 #include <linux/fb.h>
 
 #include <asm/byteorder.h>
+
+#ifdef __mc68000__
 #include <asm/setup.h>
+#endif
 
 #include <video/fbcon.h>
 #include <video/fbcon-iplan2p8.h>
diff --git a/drivers/video/fbmem.c b/drivers/video/fbmem.c
index 556411670..034ff8c1f 100644
--- a/drivers/video/fbmem.c
+++ b/drivers/video/fbmem.c
@@ -160,6 +160,9 @@ static struct {
 #ifdef CONFIG_FB_ATY
 	{ "atyfb", atyfb_init, atyfb_setup },
 #endif
+#ifdef CONFIG_FB_ATY128
+	{ "aty128fb", aty128fb_init, aty128fb_setup },
+#endif
 #ifdef CONFIG_FB_OF
 	/*
 	 * Offb must be initialized _after_ all other frame buffer devices
@@ -167,9 +170,6 @@ static struct {
 	 */
 	{ "offb", offb_init, offb_setup },
 #endif
-#ifdef CONFIG_FB_ATY128
-	{ "aty128fb", aty128fb_init, aty128fb_setup },
-#endif
 #ifdef CONFIG_FB_IGA
         { "igafb", igafb_init, igafb_setup },
 #endif
diff --git a/drivers/video/mdacon.c b/drivers/video/mdacon.c
index 0c45722fe..f249071f2 100644
--- a/drivers/video/mdacon.c
+++ b/drivers/video/mdacon.c
@@ -5,6 +5,8 @@
  *
  *      including portions (c) 1995-1998 Patrick Caulfield.
  *
+ *      slight improvements (c) 2000 Edward Betts <edward@debian.org>
+ *
  *  This file is based on the VGA console driver (vgacon.c):
  *	
  *	Created 28 Sep 1997 by Geert Uytterhoeven
@@ -240,13 +242,18 @@ static int __init mda_detect(void)
 	/* Ok, there is definitely a card registering at the correct
 	 * memory location, so now we do an I/O port test.
 	 */
-	
-	if (! test_mda_b(0x66, 0x0f)) {	    /* cursor low register */
+
+	/* Edward: These two mess `tests' mess up my cursor on bootup */
+
+	/* cursor low register */
+	/* if (! test_mda_b(0x66, 0x0f)) {
 		return 0;
-	}
-	if (! test_mda_b(0x99, 0x0f)) {     /* cursor low register */
+	} */
+
+	/* cursor low register */
+	/* if (! test_mda_b(0x99, 0x0f)) {
 		return 0;
-	}
+	} */
 
 	/* See if the card is a Hercules, by checking whether the vsync
 	 * bit of the status register is changing.  This test lasts for
@@ -339,6 +346,9 @@ static const char __init *mdacon_startup(void)
 		mda_initialize();
 	}
 
+	/* cursor looks ugly during boot-up, so turn it off */
+	mda_set_cursor(mda_vram_len - 1);
+
 	printk("mdacon: %s with %ldK of memory detected.\n",
 		mda_type_name, mda_vram_len/1024);
 
@@ -494,13 +504,21 @@ static int mdacon_set_palette(struct vc_data *c, unsigned char *table)
 
 static int mdacon_blank(struct vc_data *c, int blank)
 {
-	if (blank) {
-		outb_p(0x00, mda_mode_port);	/* disable video */
+	if (mda_type == TYPE_MDA) {
+		if (blank) 
+			scr_memsetw((void *)mda_vram_base, 
+				mda_convert_attr(c->vc_video_erase_char),
+				c->vc_screenbuf_size);
+		/* Tell console.c that it has to restore the screen itself */
+		return 1;
 	} else {
-		outb_p(MDA_MODE_VIDEO_EN | MDA_MODE_BLINK_EN, mda_mode_port);
+		if (blank)
+			outb_p(0x00, mda_mode_port);	/* disable video */
+		else
+			outb_p(MDA_MODE_VIDEO_EN | MDA_MODE_BLINK_EN, 
+				mda_mode_port);
+		return 0;
 	}
-	
-	return 0;
 }
 
 static int mdacon_font_op(struct vc_data *c, struct console_font_op *op)
diff --git a/drivers/video/riva/fbdev.c b/drivers/video/riva/fbdev.c
index eef60b04e..4d214b025 100644
--- a/drivers/video/riva/fbdev.c
+++ b/drivers/video/riva/fbdev.c
@@ -20,7 +20,7 @@
  */
 
 /* version number of this driver */
-#define RIVAFB_VERSION "0.7.0"
+#define RIVAFB_VERSION "0.7.1"
 
 #include <linux/config.h>
 #include <linux/module.h>
@@ -99,6 +99,7 @@ enum riva_chips {
 	CH_RIVA_TNT2,
 	CH_RIVA_UTNT2,	/* UTNT2 */
 	CH_RIVA_VTNT2,	/* VTNT2 */
+	CH_RIVA_UVTNT2,	/* VTNT2 */
 	CH_RIVA_ITNT2,	/* ITNT2 */
 };
 
@@ -113,6 +114,7 @@ static struct riva_chip_info {
 	{ "RIVA-TNT2", 5 },
 	{ "RIVA-UTNT2", 5 },
 	{ "RIVA-VTNT2", 5 },
+	{ "RIVA-UVTNT2", 5 },
 	{ "RIVA-ITNT2", 5 },
 };
 
@@ -123,6 +125,7 @@ static struct pci_device_id rivafb_pci_tbl[] __devinitdata = {
 	{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_TNT2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_TNT2 },
 	{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_UTNT2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_UTNT2 },
 	{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_VTNT2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_VTNT2 },
+	{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_UVTNT2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_VTNT2 },
 	{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_ITNT2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_ITNT2 },
 	{ 0, }, /* terminate list */
 };
diff --git a/drivers/video/tdfxfb.c b/drivers/video/tdfxfb.c
index 7aa5e14b8..35dbad536 100644
--- a/drivers/video/tdfxfb.c
+++ b/drivers/video/tdfxfb.c
@@ -583,7 +583,9 @@ static int  noaccel = 0;
 static int  nopan   = 0;
 static int  nowrap  = 1;      // not implemented (yet)
 static int  inverse = 0;
+#ifdef CONFIG_MTRR
 static int  nomtrr = 0;
+#endif
 static int  nohwcursor = 0;
 static char __initdata fontname[40] = { 0 };
 static const char *mode_option __initdata = NULL;
@@ -1987,7 +1989,7 @@ int __init tdfxfb_init(void) {
       fb_info.regbase_phys = pdev->base_address[0] & PCI_BASE_ADDRESS_MEM_MASK;
       fb_info.regbase_size = 1 << 24;
       fb_info.regbase_virt = 
-	(u32)ioremap_nocache(fb_info.regbase_phys, 1 << 24);
+	(unsigned long)ioremap_nocache(fb_info.regbase_phys, 1 << 24);
       if(!fb_info.regbase_virt) {
 	printk("fb: Can't remap %s register area.\n", name);
 	return;
@@ -2000,7 +2002,7 @@ int __init tdfxfb_init(void) {
 	return;
       }
       fb_info.bufbase_virt    = 
-	(u32)ioremap_nocache(fb_info.bufbase_phys, fb_info.bufbase_size);
+	(unsigned long)ioremap_nocache(fb_info.bufbase_phys, fb_info.bufbase_size);
       if(!fb_info.regbase_virt) {
 	printk("fb: Can't remap %s framebuffer.\n", name);
 	iounmap((void*)fb_info.regbase_virt);
@@ -2012,7 +2014,7 @@ int __init tdfxfb_init(void) {
       fb_info.regbase_phys = pdev->resource[0].start;
       fb_info.regbase_size = 1 << 24;
       fb_info.regbase_virt = 
-	(u32)ioremap_nocache(fb_info.regbase_phys, 1 << 24);
+	(unsigned long)ioremap_nocache(fb_info.regbase_phys, 1 << 24);
       if(!fb_info.regbase_virt) {
 	printk("fb: Can't remap %s register area.\n", name);
 	return -ENXIO;
@@ -2025,7 +2027,7 @@ int __init tdfxfb_init(void) {
 	return -ENXIO;
       }
       fb_info.bufbase_virt    = 
-	(u32)ioremap_nocache(fb_info.bufbase_phys, fb_info.bufbase_size);
+	(unsigned long)ioremap_nocache(fb_info.bufbase_phys, fb_info.bufbase_size);
       if(!fb_info.regbase_virt) {
 	printk("fb: Can't remap %s framebuffer.\n", name);
 	iounmap((void*)fb_info.regbase_virt);
diff --git a/drivers/video/tgafb.c b/drivers/video/tgafb.c
index fcb6443ed..f39c0dfd4 100644
--- a/drivers/video/tgafb.c
+++ b/drivers/video/tgafb.c
@@ -1,9 +1,9 @@
 /*
  *  linux/drivers/video/tgafb.c -- DEC 21030 TGA frame buffer device
  *
- *	Copyright (C) 1999 Martin Lucina, Tom Zerucha
+ *	Copyright (C) 1999,2000 Martin Lucina, Tom Zerucha
  *  
- *  $Id: tgafb.c,v 1.12 1999/07/01 13:39:23 mato Exp $
+ *  $Id: tgafb.c,v 1.12.2.3 2000/04/04 06:44:56 mato Exp $
  *
  *  This driver is partly based on the original TGA framebuffer device, which 
  *  was partly based on the original TGA console driver, which are
@@ -42,6 +42,7 @@
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/selection.h>
+#include <linux/console.h>
 #include <asm/io.h>
 
 #include <video/fbcon.h>
@@ -59,7 +60,7 @@ static struct tgafb_par current_par;
 static int current_par_valid = 0;
 static struct display disp;
 
-static char __initdata default_fontname[40] = { 0 };
+static char default_fontname[40] = { 0 };
 static struct fb_var_screeninfo default_var;
 static int default_var_valid = 0;
 
@@ -112,10 +113,6 @@ static unsigned int base_addr_presets[4] = {
   0x00000001
 };
 
-const unsigned int bt463_cursor_source[4] = {
-  0xffff0000, 0x00000000, 0x00000000, 0x00000000
-};
-
 
     /*
      *  Predefined video modes
@@ -322,10 +319,11 @@ static int tgafb_encode_fix(struct fb_fix_screeninfo *fix, const void *fb_par,
 
     fix->type = FB_TYPE_PACKED_PIXELS;
     fix->type_aux = 0;
-    if (fb_info.tga_type == 0) /* 8-plane */
+    if (fb_info.tga_type == TGA_TYPE_8PLANE) {
 	fix->visual = FB_VISUAL_PSEUDOCOLOR;
-    else /* 24-plane or 24plusZ */
+    } else {
 	fix->visual = FB_VISUAL_TRUECOLOR;
+    }
 
     fix->line_length = par->xres * (par->bits_per_pixel >> 3);
     fix->smem_start = fb_info.tga_fb_base;
@@ -345,7 +343,7 @@ static int tgafb_decode_var(const struct fb_var_screeninfo *var, void *fb_par,
     struct tgafb_par *par = (struct tgafb_par *)fb_par;
 
     /* round up some */
-    if (fb_info.tga_type == 0) {
+    if (fb_info.tga_type == TGA_TYPE_8PLANE) {
 	if (var->bits_per_pixel > 8) {
 	    return -EINVAL;
 	}
@@ -384,7 +382,11 @@ static int tgafb_decode_var(const struct fb_var_screeninfo *var, void *fb_par,
 	par->htimings |= TGA_HORIZ_POLARITY;
     if (var->sync & FB_SYNC_VERT_HIGH_ACT)
 	par->vtimings |= TGA_VERT_POLARITY;
-    /* what about sync on green? */
+    if (var->sync & FB_SYNC_ON_GREEN) {
+	par->sync_on_green = 1;
+    } else {
+	par->sync_on_green = 0;
+    }
 
     /* store other useful values in par */
     par->xres = var->xres; 
@@ -415,18 +417,19 @@ static int tgafb_encode_var(struct fb_var_screeninfo *var, const void *fb_par,
     	var->sync |= FB_SYNC_HOR_HIGH_ACT;
     if (par->vtimings & TGA_VERT_POLARITY)
     	var->sync |= FB_SYNC_VERT_HIGH_ACT;
+    if (par->sync_on_green == 1)
+	var->sync |= FB_SYNC_ON_GREEN;
 
     var->xres_virtual = var->xres;
     var->yres_virtual = var->yres;
     var->xoffset = var->yoffset = 0;
 
     /* depth-related */
-    if (fb_info.tga_type == 0) {
+    if (fb_info.tga_type == TGA_TYPE_8PLANE) {
 	var->red.offset = 0;
 	var->green.offset = 0;
 	var->blue.offset = 0;
     } else {
-	/* XXX: is this correct? */
 	var->red.offset = 16;
 	var->green.offset = 8;
 	var->blue.offset = 0;
@@ -456,7 +459,7 @@ static void tgafb_get_par(void *fb_par, struct fb_info_gen *info)
     if (current_par_valid)
 	*par = current_par;
     else {
-	if (fb_info.tga_type == 0)
+	if (fb_info.tga_type == TGA_TYPE_8PLANE)
 	    default_var.bits_per_pixel = 8;
 	else
 	    default_var.bits_per_pixel = 32;
@@ -468,7 +471,7 @@ static void tgafb_get_par(void *fb_par, struct fb_info_gen *info)
 
 static void tgafb_set_par(const void *fb_par, struct fb_info_gen *info)
 {
-    int i, j, temp;
+    int i, j;
     struct tgafb_par *par = (struct tgafb_par *)fb_par;
 
 #if 0
@@ -483,8 +486,8 @@ static void tgafb_set_par(const void *fb_par, struct fb_info_gen *info)
     current_par = *par;
     current_par_valid = 1;
 
-    /* first, disable video timing */
-    TGA_WRITE_REG(0x03, TGA_VALID_REG); /* SCANNING and BLANK */
+    /* first, disable video */
+    TGA_WRITE_REG(TGA_VALID_VIDEO | TGA_VALID_BLANK, TGA_VALID_REG);
     
     /* write the DEEP register */
     while (TGA_READ_REG(TGA_CMD_STAT_REG) & 1) /* wait for not busy */
@@ -515,10 +518,10 @@ static void tgafb_set_par(const void *fb_par, struct fb_info_gen *info)
     TGA_WRITE_REG(par->vtimings, TGA_VERT_REG);
 
     /* initalise RAMDAC */
-    if (fb_info.tga_type == 0) { /* 8-plane */
+    if (fb_info.tga_type == TGA_TYPE_8PLANE) { 
 
 	/* init BT485 RAMDAC registers */
-	BT485_WRITE(0xa2, BT485_CMD_0);
+	BT485_WRITE(0xa2 | (par->sync_on_green ? 0x8 : 0x0), BT485_CMD_0);
 	BT485_WRITE(0x01, BT485_ADDR_PAL_WRITE);
 	BT485_WRITE(0x14, BT485_CMD_3); /* cursor 64x64 */
 	BT485_WRITE(0x40, BT485_CMD_1);
@@ -545,69 +548,13 @@ static void tgafb_set_par(const void *fb_par, struct fb_info_gen *info)
 	    TGA_WRITE_REG(0x00|(BT485_DATA_PAL<<8), TGA_RAMDAC_REG);
 	}	  
 
-#if 0
-	/* initialize RAMDAC cursor colors */
-	BT485_WRITE(0, BT485_ADDR_CUR_WRITE);
-
-	BT485_WRITE(0x00, BT485_DATA_CUR); /* overscan WHITE */
-	BT485_WRITE(0x00, BT485_DATA_CUR); /* overscan WHITE */
-	BT485_WRITE(0x00, BT485_DATA_CUR); /* overscan WHITE */
-
-	BT485_WRITE(0x00, BT485_DATA_CUR); /* color 1 BLACK */
-	BT485_WRITE(0x00, BT485_DATA_CUR); /* color 1 BLACK */
-	BT485_WRITE(0x00, BT485_DATA_CUR); /* color 1 BLACK */
-
-	BT485_WRITE(0x00, BT485_DATA_CUR); /* color 2 BLACK */
-	BT485_WRITE(0x00, BT485_DATA_CUR); /* color 2 BLACK */
-	BT485_WRITE(0x00, BT485_DATA_CUR); /* color 2 BLACK */
-
-	BT485_WRITE(0x00, BT485_DATA_CUR); /* color 3 BLACK */
-	BT485_WRITE(0x00, BT485_DATA_CUR); /* color 3 BLACK */
-	BT485_WRITE(0x00, BT485_DATA_CUR); /* color 3 BLACK */
-
-	/* initialize RAMDAC cursor RAM */
-	BT485_WRITE(0x00, BT485_ADDR_PAL_WRITE);
-
-	for (i = 0; i < tga_font_height_padded; i++)
-	    for (j = 7; j >= 0; j--) {
-#if 0
-		/* note that this is for a top-right alignment
-		 * - top left is commented out */
-		if( j > /*<*/ ((tga_font_width - 1) >> 3) ) {
-		    BT485_WRITE(0, BT485_CUR_RAM);
-		}
-		else if( j == ((tga_font_width - 1) >> 3) ) {
-		    BT485_WRITE((0xff >> /*<<*/
-				(7 - ((tga_font_width - 1)&7))) , BT485_CUR_RAM);
-		}
-		else {
-		    BT485_WRITE(0xff, BT485_CUR_RAM);
-		}
-#else
-		BT485_WRITE(0, BT485_CUR_RAM);
-#endif
-	    }
-	for (i = tga_font_height_padded; i < 64; i++)
-	    for (j = 0; j < 8; j++) {
-		BT485_WRITE(0, BT485_CUR_RAM);
-	    }
-	/* mask? */
-
-	for (i = 0; i < 512; i++) {
-	    BT485_WRITE(0xff, BT485_CUR_RAM);
-	}
-#endif
-
     } else { /* 24-plane or 24plusZ */
 
-	TGA_WRITE_REG(0x01, TGA_VALID_REG); /* SCANNING */
-
-	/*
-	 * init some registers
-	 */
+	/* init BT463 registers */
 	BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_0, 0x40);
 	BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_1, 0x08);
-	BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_2, 0x40);
+	BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_2, 
+		(par->sync_on_green ? 0x80 : 0x40));
 
 	BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_0, 0xff);
 	BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_1, 0xff);
@@ -619,9 +566,7 @@ static void tgafb_set_par(const void *fb_par, struct fb_info_gen *info)
 	BT463_WRITE(BT463_REG_ACC, BT463_BLINK_MASK_2, 0x00);
 	BT463_WRITE(BT463_REG_ACC, BT463_BLINK_MASK_3, 0x00);
 
-	/*
-	 * fill the palette
-	 */
+	/* fill the palette */
 	BT463_LOAD_ADDR(0x0000);
 	TGA_WRITE_REG((BT463_PALETTE<<2), TGA_RAMDAC_REG);
 
@@ -638,9 +583,7 @@ static void tgafb_set_par(const void *fb_par, struct fb_info_gen *info)
 	    TGA_WRITE_REG(0x00|(BT463_PALETTE<<10), TGA_RAMDAC_REG);
 	}	  
 
-	/*
-	 * fill window type table after start of vertical retrace
-	 */
+	/* fill window type table after start of vertical retrace */
 	while (!(TGA_READ_REG(TGA_INTR_STAT_REG) & 0x01))
 	    continue;
 	TGA_WRITE_REG(0x01, TGA_INTR_STAT_REG);
@@ -657,46 +600,12 @@ static void tgafb_set_par(const void *fb_par, struct fb_info_gen *info)
 	    TGA_WRITE_REG(0x01|(BT463_REG_ACC<<10), TGA_RAMDAC_REG);
 	    TGA_WRITE_REG(0x80|(BT463_REG_ACC<<10), TGA_RAMDAC_REG);
 	}
-
-#if 0
-	/*
-	 * init cursor colors
-	 */
-	BT463_LOAD_ADDR(BT463_CUR_CLR_0);
-
-	TGA_WRITE_REG(0x00|(BT463_REG_ACC<<10), TGA_RAMDAC_REG); /* background */
-	TGA_WRITE_REG(0x00|(BT463_REG_ACC<<10), TGA_RAMDAC_REG); /* background */
-	TGA_WRITE_REG(0x00|(BT463_REG_ACC<<10), TGA_RAMDAC_REG); /* background */
-
-	TGA_WRITE_REG(0xff|(BT463_REG_ACC<<10), TGA_RAMDAC_REG); /* foreground */
-	TGA_WRITE_REG(0xff|(BT463_REG_ACC<<10), TGA_RAMDAC_REG); /* foreground */
-	TGA_WRITE_REG(0xff|(BT463_REG_ACC<<10), TGA_RAMDAC_REG); /* foreground */
-
-	TGA_WRITE_REG(0x00|(BT463_REG_ACC<<10), TGA_RAMDAC_REG);
-	TGA_WRITE_REG(0x00|(BT463_REG_ACC<<10), TGA_RAMDAC_REG);
-	TGA_WRITE_REG(0x00|(BT463_REG_ACC<<10), TGA_RAMDAC_REG);
-
-	TGA_WRITE_REG(0x00|(BT463_REG_ACC<<10), TGA_RAMDAC_REG);
-	TGA_WRITE_REG(0x00|(BT463_REG_ACC<<10), TGA_RAMDAC_REG);
-	TGA_WRITE_REG(0x00|(BT463_REG_ACC<<10), TGA_RAMDAC_REG);
-
-	/*
-	 * finally, init the cursor shape
-	 */
-	temp = tga_fb_base - 1024; /* this assumes video starts at base
-				     and base is beyond memory start*/
-
-	for (i = 0; i < tga_font_height_padded*4; i++)
-	    writel(bt463_cursor_source[i&3], temp + i*4);
-	for (i = tga_font_height_padded*4; i < 256; i++)
-	    writel(0, temp + i*4);
-	TGA_WRITE_REG(temp & 0x000fffff, TGA_CURSOR_BASE_REG);
-#endif
+   
     }
 
     /* finally, enable video scan
 	(and pray for the monitor... :-) */
-    TGA_WRITE_REG(0x01, TGA_VALID_REG); /* SCANNING */
+    TGA_WRITE_REG(TGA_VALID_VIDEO, TGA_VALID_REG);
 }
 
 
@@ -814,11 +723,11 @@ static int tgafb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
     palette[regno].blue = blue;
 
 #ifdef FBCON_HAS_CFB32
-    if (regno < 16 && fb_info.tga_type != 0)
+    if (regno < 16 && fb_info.tga_type != TGA_TYPE_8PLANE)
 	fbcon_cfb32_cmap[regno] = (red << 16) | (green << 8) | blue;
 #endif
 
-    if (fb_info.tga_type == 0) { /* 8-plane */
+    if (fb_info.tga_type == TGA_TYPE_8PLANE) { 
         BT485_WRITE(regno, BT485_ADDR_PAL_WRITE);
         TGA_WRITE_REG(BT485_DATA_PAL, TGA_RAMDAC_SETUP_REG);
         TGA_WRITE_REG(red|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG);
@@ -848,7 +757,7 @@ static int tgafb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
     if (con == currcon) {		/* current console? */
 	err = fb_set_cmap(cmap, kspc, tgafb_setcolreg, info);
 #if 1
-	if (fb_info.tga_type != 0)
+	if (fb_info.tga_type != TGA_TYPE_8PLANE)
 		tgafb_update_palette();
 #endif
 	return err;
@@ -886,7 +795,7 @@ static int tgafb_pan_display(const struct fb_var_screeninfo *var,
 static int tgafb_blank(int blank, struct fb_info_gen *info)
 {
     static int tga_vesa_blanked = 0;
-    u32 vhcr, vvcr;
+    u32 vhcr, vvcr, vvvr;
     unsigned long flags;
     
     save_flags(flags);
@@ -894,6 +803,7 @@ static int tgafb_blank(int blank, struct fb_info_gen *info)
 
     vhcr = TGA_READ_REG(TGA_HORIZ_REG);
     vvcr = TGA_READ_REG(TGA_VERT_REG);
+    vvvr = TGA_READ_REG(TGA_VALID_REG) & ~(TGA_VALID_VIDEO | TGA_VALID_BLANK);
 
     switch (blank) {
     case 0: /* Unblanking */
@@ -902,29 +812,29 @@ static int tgafb_blank(int blank, struct fb_info_gen *info)
 	   TGA_WRITE_REG(vvcr & 0xbfffffff, TGA_VERT_REG);
 	   tga_vesa_blanked = 0;
 	}
- 	TGA_WRITE_REG(0x01, TGA_VALID_REG); /* SCANNING */
+ 	TGA_WRITE_REG(vvvr | TGA_VALID_VIDEO, TGA_VALID_REG);
 	break;
 
     case 1: /* Normal blanking */
-	TGA_WRITE_REG(0x03, TGA_VALID_REG); /* SCANNING and BLANK */
+	TGA_WRITE_REG(vvvr | TGA_VALID_VIDEO | TGA_VALID_BLANK, TGA_VALID_REG);
 	break;
 
     case 2: /* VESA blank (vsync off) */
 	TGA_WRITE_REG(vvcr | 0x40000000, TGA_VERT_REG);
-	TGA_WRITE_REG(0x02, TGA_VALID_REG); /* BLANK */
+	TGA_WRITE_REG(vvvr | TGA_VALID_BLANK, TGA_VALID_REG);
 	tga_vesa_blanked = 1;
 	break;
 
     case 3: /* VESA blank (hsync off) */
 	TGA_WRITE_REG(vhcr | 0x40000000, TGA_HORIZ_REG);
-	TGA_WRITE_REG(0x02, TGA_VALID_REG); /* BLANK */
+	TGA_WRITE_REG(vvvr | TGA_VALID_BLANK, TGA_VALID_REG);
 	tga_vesa_blanked = 1;
 	break;
 
     case 4: /* Poweroff */
 	TGA_WRITE_REG(vhcr | 0x40000000, TGA_HORIZ_REG);
 	TGA_WRITE_REG(vvcr | 0x40000000, TGA_VERT_REG);
-	TGA_WRITE_REG(0x02, TGA_VALID_REG); /* BLANK */
+	TGA_WRITE_REG(vvvr | TGA_VALID_BLANK, TGA_VALID_REG);
 	tga_vesa_blanked = 1;
 	break;
     }
@@ -937,17 +847,17 @@ static int tgafb_blank(int blank, struct fb_info_gen *info)
 static void tgafb_set_disp(const void *fb_par, struct display *disp,
 	struct fb_info_gen *info)
 {
-    disp->screen_base = fb_info.tga_fb_base;
+    disp->screen_base = (char *)fb_info.tga_fb_base;
     switch (fb_info.tga_type) {
 #ifdef FBCON_HAS_CFB8
-	case 0: /* 8-plane */
+	case TGA_TYPE_8PLANE:
 	    disp->dispsw = &fbcon_cfb8;
             break;
 #endif
 #ifdef FBCON_HAS_CFB32
-        case 1: /* 24-plane */
-        case 3: /* 24plusZ */
-            disp->dispsw = &fbcon_cfb32;
+        case TGA_TYPE_24PLANE:
+        case TGA_TYPE_24PLUSZ:
+	    disp->dispsw = &fbcon_cfb32; 
             disp->dispsw_data = &fbcon_cfb32_cmap;
             break;
 #endif
@@ -1003,22 +913,27 @@ int __init tgafb_setup(char *options) {
     char *this_opt;
     int i;
     
-    if (options && *options)
+    if (options && *options) {
     	for(this_opt=strtok(options,","); this_opt; this_opt=strtok(NULL,",")) {
-       	    if (!*this_opt) continue;
+       	    if (!*this_opt) { continue; }
         
-	    if (!strncmp(this_opt, "font:", 5))
+	    if (!strncmp(this_opt, "font:", 5)) {
 	     	strncpy(default_fontname, this_opt+5, sizeof default_fontname);
+	    }
+
 	    else if (!strncmp(this_opt, "mode:", 5)) {
     		for (i = 0; i < NUM_TOTAL_MODES; i++) {
     		    if (!strcmp(this_opt+5, tgafb_predefined[i].name))
     			default_var = tgafb_predefined[i].var;
 		    	default_var_valid = 1;
     		}
-    	    } else {
+    	    } 
+	    
+	    else {
       		printk(KERN_ERR "tgafb: unknown parameter %s\n", this_opt);
     	    }
       	}
+    }
     return 0;
 }
 
@@ -1034,33 +949,17 @@ int __init tgafb_init(void)
     pdev = pci_find_device(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TGA, NULL);
     if (!pdev)
 	return -ENXIO;
-    fb_info.tga_mem_base = ioremap(pdev->resource[0].start, 0);
 
-#ifdef DEBUG
-    printk(KERN_DEBUG "tgafb_init: mem_base 0x%x\n", fb_info.tga_mem_base);
-#endif /* DEBUG */
+    /* divine board type */
 
+    fb_info.tga_mem_base = (unsigned long)ioremap(pdev->resource[0].start, 0);
     fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f;
     fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
     fb_info.tga_fb_base = (fb_info.tga_mem_base
 			   + fb_offset_presets[fb_info.tga_type]);
+    pci_read_config_byte(pdev, PCI_REVISION_ID, &fb_info.tga_chip_rev);
 
-    /* XXX Why the fuck is it called modename if it identifies the board? */
-    strcpy (fb_info.gen.info.modename,"DEC 21030 TGA "); 
-    switch (fb_info.tga_type) 
-    { 
-	case 0: /* 8-plane */
-	    strcat (fb_info.gen.info.modename, "8-plane");
-	    break;
-
-	case 1:
-	    strcat (fb_info.gen.info.modename, "24-plane");
-	    break;
-
-	case 3:
-	    strcat (fb_info.gen.info.modename, "24plusZ");
-	    break;
-    }
+    /* setup framebuffer */
 
     fb_info.gen.info.node = -1;
     fb_info.gen.info.flags = FBINFO_FLAG_DEFAULT;
@@ -1075,9 +974,30 @@ int __init tgafb_init(void)
     fb_info.gen.fbhw = &tgafb_hwswitch;
     fb_info.gen.fbhw->detect();
 
+    printk (KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n", fb_info.tga_chip_rev);
+    printk (KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n", 
+	    pdev->bus->number, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
+	    
+    switch (fb_info.tga_type) 
+    { 
+	case TGA_TYPE_8PLANE:
+	    strcpy (fb_info.gen.info.modename,"Digital ZLXp-E1"); 
+	    break;
+
+	case TGA_TYPE_24PLANE:
+	    strcpy (fb_info.gen.info.modename,"Digital ZLXp-E2"); 
+	    break;
+
+	case TGA_TYPE_24PLUSZ:
+	    strcpy (fb_info.gen.info.modename,"Digital ZLXp-E3"); 
+	    break;
+    }
+
     /* This should give a reasonable default video mode */
-    if (!default_var_valid)
+
+    if (!default_var_valid) {
 	default_var = tgafb_predefined[0].var;
+    }
     fbgen_get_var(&disp.var, -1, &fb_info.gen.info);
     disp.var.activate = FB_ACTIVATE_NOW;
     fbgen_do_set_var(&disp.var, 1, &fb_info.gen);
@@ -1085,8 +1005,9 @@ int __init tgafb_init(void)
     fbgen_install_cmap(0, &fb_info.gen);
     if (register_framebuffer(&fb_info.gen.info) < 0)
 	return -EINVAL;
-    printk(KERN_INFO "fb%d: %s frame buffer device\n", GET_FB_IDX(fb_info.gen.info.node),
-	fb_info.gen.info.modename);
+    printk(KERN_INFO "fb%d: %s frame buffer device at 0x%lx\n", 
+	    GET_FB_IDX(fb_info.gen.info.node), fb_info.gen.info.modename, 
+	    pdev->resource[0].start);
     return 0;
 }
 
diff --git a/drivers/video/tgafb.h b/drivers/video/tgafb.h
index 349c04e65..748d53fbd 100644
--- a/drivers/video/tgafb.h
+++ b/drivers/video/tgafb.h
@@ -1,9 +1,9 @@
 /*
  *  linux/drivers/video/tgafb.h -- DEC 21030 TGA frame buffer device
  *
- *  	Copyright (C) 1999 Martin Lucina, Tom Zerucha
+ *  	Copyright (C) 1999,2000 Martin Lucina, Tom Zerucha
  *  
- *  $Id: tgafb.h,v 1.4 1999/05/15 08:44:31 mato Exp $
+ *  $Id: tgafb.h,v 1.4.2.3 2000/04/04 06:44:56 mato Exp $
  *
  *  This file is subject to the terms and conditions of the GNU General Public
  *  License. See the file COPYING in the main directory of this archive for
@@ -17,6 +17,9 @@
      * TGA hardware description (minimal)
      */
 
+#define TGA_TYPE_8PLANE			0
+#define TGA_TYPE_24PLANE		1
+#define TGA_TYPE_24PLUSZ		3
 
     /*
      * Offsets within Memory Space
@@ -50,7 +53,7 @@
 
 
     /* 
-     * useful defines for managing the video timing registers
+     * useful defines for managing the registers
      */
 
 #define TGA_HORIZ_ODD			0x80000000
@@ -69,6 +72,10 @@
 #define TGA_VERT_FP			0x0000f800
 #define TGA_VERT_ACTIVE			0x000007ff
 
+#define TGA_VALID_VIDEO			0x01
+#define TGA_VALID_BLANK			0x02
+#define TGA_VALID_CURSOR		0x04
+
 
     /*
      * useful defines for managing the ICS1562 PLL clock
@@ -167,10 +174,11 @@ struct tgafb_info {
     struct fb_info_gen gen;
 
     /* Device dependent information */
-    int tga_type;					/* TGA type: {8plane, 24plane, 24plusZ} */
-    unsigned long tga_mem_base;
-    unsigned long tga_fb_base;
-    unsigned long tga_regs_base;
+    u8 tga_type;					/* TGA_TYPE_XXX */
+    u8 tga_chip_rev;					/* dc21030 revision */
+    u64 tga_mem_base;
+    u64 tga_fb_base;
+    u64 tga_regs_base;
     struct fb_var_screeninfo default_var;		/* default video mode */
 };
 
@@ -180,11 +188,12 @@ struct tgafb_info {
      */
 
 struct tgafb_par {
-    int xres, yres;					/* resolution in pixels */
-    unsigned int htimings;				/* horizontal timing register */
-    unsigned int vtimings;				/* vertical timing register */
-    unsigned int pll_freq;				/* pixclock in mhz */
-    unsigned int bits_per_pixel;			/* bits per pixel */
+    u32 xres, yres;				/* resolution in pixels */
+    u32 htimings;				/* horizontal timing register */
+    u32 vtimings;				/* vertical timing register */
+    u32 pll_freq;				/* pixclock in mhz */
+    u32 bits_per_pixel;				/* bits per pixel */
+    u32 sync_on_green;				/* set if sync is on green */
 };
 
 #endif /* TGAFB_H */