Merge with 2.1.47. Some more cleanup and module fixes.

41 files changed, 6160 insertions, 2099 deletions

diff --git a/drivers/Makefile b/drivers/Makefile
index e7b86ed1e..df324c4bb 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -7,9 +7,9 @@
 #
 # Note 2! The CFLAGS definitions are now in the main makefile...
 
-SUB_DIRS     := block char net pnp #streams
+SUB_DIRS     := block char net misc #streams
 MOD_SUB_DIRS := $(SUB_DIRS) sbus
-ALL_SUB_DIRS := $(SUB_DIRS) pci sgi scsi sound cdrom isdn pnp
+ALL_SUB_DIRS := $(SUB_DIRS) pci sgi scsi sound cdrom isdn misc pnp
 
 ifdef CONFIG_PCI
 SUB_DIRS += pci
@@ -42,6 +42,15 @@ else
   endif
 endif
 
+ifeq ($(CONFIG_PNP),y)
+SUB_DIRS += pnp
+MOD_SUB_DIRS += pnp
+else
+  ifeq ($(CONFIG_PNP),m)
+  MOD_SUB_DIRS += pnp
+  endif
+endif
+
 ifneq ($(CONFIG_CD_NO_IDESCSI)$(CONFIG_BLK_DEV_IDECD)$(CONFIG_BLK_DEV_SR),)
 SUB_DIRS += cdrom
 MOD_SUB_DIRS += cdrom
diff --git a/drivers/char/Config.in b/drivers/char/Config.in
index c02b376e8..0ef43d101 100644
--- a/drivers/char/Config.in
+++ b/drivers/char/Config.in
@@ -19,6 +19,7 @@ if [ "$CONFIG_SERIAL_EXTENDED" = "y" ]; then
 fi
 bool 'Non-standard serial port support' CONFIG_SERIAL_NONSTANDARD
 if [ "$CONFIG_SERIAL_NONSTANDARD" = "y" ]; then
+   tristate 'Comtrol Rocketport support' CONFIG_ROCKETPORT
    tristate 'Digiboard Intelligent Async Support' CONFIG_DIGIEPCA
    if [ "$CONFIG_DIGIEPCA" = "n" ]; then
       tristate 'Digiboard PC/Xx Support' CONFIG_DIGI
@@ -36,8 +37,8 @@ if [ "$CONFIG_SERIAL_NONSTANDARD" = "y" ]; then
      int '  FIFO trigger level' CONFIG_ESPSERIAL_TRIGGER_LEVEL 768
    fi
 fi
-if [ "$CONFIG_PNP_PARPORT" != "n" ]; then
-  dep_tristate 'Parallel printer support' CONFIG_PRINTER $CONFIG_PNP_PARPORT
+if [ "$CONFIG_PARPORT" != "n" ]; then
+  dep_tristate 'Parallel printer support' CONFIG_PRINTER $CONFIG_PARPORT
   if [ "$CONFIG_PRINTER" != "n" ]; then
     bool '  Support IEEE1284 status readback' CONFIG_PRINTER_READBACK
   fi
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
index 73c1ac599..18d50bf74 100644
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -61,6 +61,14 @@ else
   endif
 endif
 
+ifeq ($(CONFIG_ROCKETPORT),y)
+L_OBJS += rocket.o
+else
+  ifeq ($(CONFIG_ROCKETPORT),m)
+  M_OBJS += rocket.o
+  endif
+endif
+
 ifeq ($(CONFIG_DIGI),y)
 L_OBJS += pcxx.o
 else
diff --git a/drivers/char/ftape/ecc.c b/drivers/char/ftape/ecc.c
index 5c7d86bd6..040ea0c85 100644
--- a/drivers/char/ftape/ecc.c
+++ b/drivers/char/ftape/ecc.c
@@ -21,38 +21,23 @@
  * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139,
  * USA.
  *
- * $Source: /home/bas/distr/ftape-2.03b/RCS/ecc.c,v $
- * $Author: bas $
+ * $Source: /src/cvs/linux/drivers/char/ftape/ecc.c,v $
+ * $Author: ralf $
  *
- * $Revision: 1.32 $
- * $Date: 1995/04/22 07:30:15 $
- * $State: Beta $
+ * $Revision: 1.1.1.1 $
+ * $Date: 1997/06/01 03:17:30 $
+ * $State: Exp $
  *
  *      This file contains the Reed-Solomon error correction code 
  *      for the QIC-40/80 floppy-tape driver for Linux.
  */
 
 #include <linux/ftape.h>
-#include <stdio.h>
-#include <sys/errno.h>
+#include <asm/byteorder.h>
 
 #include "tracing.h"
 #include "ecc.h"
 
-/*
- * Machines that are big-endian should define macro BIG_ENDIAN.
- * Unfortunately, there doesn't appear to be a standard include
- * file that works for all OSs.
- */
-
-#if defined(__sparc__) || defined(__hppa)
-#define BIG_ENDIAN
-#endif				/* __sparc__ || __hppa */
-
-#if defined(__mips__)
-#error Find a smart way to determine the Endianness of the MIPS CPU
-#endif
-
 #ifdef TEST
 
 #undef TRACE()
@@ -845,15 +830,17 @@ int ecc_correct_data(struct memory_segment *mseg)
 			s[1] = ss[1];
 			s[2] = ss[2];
 			if (s[0] | s[1] | s[2]) {
-#ifdef BIG_ENDIAN
+#ifdef __BIG_ENDIAN
 				result = correct_block(&mseg->data[col + sizeof(long) - 1 - i],
 						       mseg->blocks,
 					 nerasures, erasure_loc, Ainv, s,
 						       &mseg->corrected);
-#else
+#elif defined(__LITTLE_ENDIAN)
 				result = correct_block(&mseg->data[col + i], mseg->blocks,
 					 nerasures, erasure_loc, Ainv, s,
 						       &mseg->corrected);
+#else
+#error "Huh?  Neither __BIG_ENDIAN nor __LITTLE_ENDIAN?"
 #endif
 				if (result < 0) {
 					TRACE_EXIT;
diff --git a/drivers/char/lp.c b/drivers/char/lp.c
index 9f9e5a992..caf5b5ccf 100644
--- a/drivers/char/lp.c
+++ b/drivers/char/lp.c
@@ -10,8 +10,11 @@
  * "lp=" command line parameters added by Grant Guenther, grant@torque.net
  * lp_read (Status readback) support added by Carsten Gross,
  *                                             carsten@sol.wohnheim.uni-ulm.de
+ * Support for parport by Philip Blundell <Philip.Blundell@pobox.com>
  */
 
+/* This driver is about due for a rewrite. */
+
 #include <linux/module.h>
 
 #include <linux/config.h>
@@ -23,7 +26,6 @@
 #include <linux/ioport.h>
 #include <linux/fcntl.h>
 #include <linux/delay.h>
-#include <linux/init.h>
 
 #include <asm/io.h>
 #include <asm/uaccess.h>
@@ -31,12 +33,7 @@
 #include <linux/parport.h>
 #include <linux/lp.h>
 
-/* the BIOS manuals say there can be up to 4 lpt devices
- * but I have not seen a board where the 4th address is listed
- * if you have different hardware change the table below
- * please let me know if you have different equipment
- * if you have more than 3 printers, remember to increase LP_NO
- */
+/* if you have more than 3 printers, remember to increase LP_NO */
 struct lp_struct lp_table[] =
 {
  {NULL, 0, LP_INIT_CHAR, LP_INIT_TIME, LP_INIT_WAIT, NULL, NULL, 0, 0, 0,
@@ -164,7 +161,7 @@ static inline int lp_char_interrupt(char lpchar, int minor)
 static void lp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 {
 	struct parport *pb = (struct parport *) dev_id;
-	struct ppd *pd = pb->cad;
+	struct pardevice *pd = pb->cad;
 	struct lp_struct *lp_dev = (struct lp_struct *) pd->private;
 
 	if (lp_dev->lp_wait_q)
@@ -501,8 +498,9 @@ static int lp_open(struct inode * inode, struct file * file)
 static int lp_release(struct inode * inode, struct file * file)
 {
 	unsigned int minor = MINOR(inode->i_rdev);
+	unsigned int irq;
 
-	if (LP_IRQ(minor) > 0) {
+	if ((irq = LP_IRQ(minor))) {
 		kfree_s(lp_table[minor].lp_buffer, LP_BUFFER_SIZE);
 		lp_table[minor].lp_buffer = NULL;
 	}
@@ -630,7 +628,7 @@ MODULE_PARM(parport, "1-" __MODULE_STRING(LP_NO) "i");
 
 static int parport_ptr = 0;
 
-__initfunc(void lp_setup(char *str, int *ints))
+void lp_setup(char *str, int *ints)
 {
 	/* Ugh. */
 	if (!strncmp(str, "parport", 7)) {
@@ -678,23 +676,18 @@ static int inline lp_searchfor(int list[], int a)
 	return 0;
 }
 
-__initfunc(int lp_init(void))
+int lp_init(void)
 {
 	int count = 0;
 	struct parport *pb;
   
-	if (register_chrdev(LP_MAJOR, "lp", &lp_fops)) {
-  		printk("lp: unable to get major %d\n", LP_MAJOR);
-  		return -EIO;
-	}
-
 	if (parport[0] == -2) return 0;
 
 	pb = parport_enumerate();
 
 	while (pb) {
 		/* We only understand PC-style ports. */
-		if (pb->modes & PARPORT_MODE_SPP) {
+		if (pb->modes & PARPORT_MODE_PCSPP) {
 			if (parport[0] == -1 || lp_searchfor(parport, count) ||
 			    (parport[0] == -3 &&
 			     pb->probe_info.class == PARPORT_CLASS_PRINTER)) {
@@ -704,12 +697,8 @@ __initfunc(int lp_init(void))
 						lp_interrupt, PARPORT_DEV_TRAN,
 						(void *) &lp_table[count]);
 				lp_table[count].flags |= LP_EXIST;
-				printk(KERN_INFO "lp%d: using %s at 0x%x, ", 
-				       count, pb->name, pb->base);
-				if (pb->irq == PARPORT_IRQ_NONE)
-					printk("polling.\n");
-				else
-					printk("irq %d.\n", pb->irq);
+				printk(KERN_INFO "lp%d: using %s (%s).\n", 
+				       count, pb->name, (pb->irq == PARPORT_IRQ_NONE)?"polling":"interrupt-driven");
 			}
 			if (++count == LP_NO)
 				break;
@@ -720,9 +709,14 @@ __initfunc(int lp_init(void))
   	/* Successful specified devices increase count
   	 * Unsuccessful specified devices increase failed
   	 */
-  	if (count)
-  		return 0;
-  
+  	if (count) {
+		if (register_chrdev(LP_MAJOR, "lp", &lp_fops)) {
+			printk("lp: unable to get major %d\n", LP_MAJOR);
+			return -EIO;
+		}
+		return 0;
+	}
+
 	printk(KERN_INFO "lp: driver loaded but no devices found\n");
 #ifdef MODULE
 	return 0;
diff --git a/drivers/char/rocket.c b/drivers/char/rocket.c
new file mode 100644
index 000000000..59d2666ab
--- /dev/null
+++ b/drivers/char/rocket.c
@@ -0,0 +1,2978 @@
+/*
+ * Rocketport device driver for Linux
+ *
+ * Written by Theodore Ts'o, 1995, 1996, 1997.
+ * 
+ * Copyright (C) 1995, 1996, 1997 by Comtrol, Inc.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * Minor number schema:
+ *
+ * +-------------------------------+
+ * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
+ * +---+-------+-------+-----------+
+ * | C | Board |  AIOP | Port #    |
+ * +---+-------+-------+-----------+
+ *
+ * C=0 implements normal POSIX tty.
+ * C=1 is reserved for the callout device.
+ * 
+ * Normally, the user won't have to worry about the AIOP; as far as
+ * the user is concerned, the lower 5 bits of the minor number address
+ * the ports on a particular board (from 0 up to 32).
+ */
+
+/* Kernel includes */
+
+#include <linux/config.h>
+#include <linux/version.h>
+
+#if (defined(CONFIG_PCI) && (LINUX_VERSION_CODE >= 131072))
+#define ENABLE_PCI
+#endif
+
+#if (LINUX_VERSION_CODE > 66304)
+#define NEW_MODULES
+#endif
+
+#ifdef NEW_MODULES
+#ifdef MODVERSIONS
+#include <linux/modversions.h>
+#endif
+#include <linux/module.h>
+#include <linux/config.h>
+#else /* !NEW_MODULES */
+#ifdef MODVERSIONS
+#define MODULE
+#endif
+#include <linux/config.h>
+#include <linux/module.h>
+#endif /* NEW_MODULES */
+
+#include <linux/errno.h>
+#include <linux/major.h>
+#include <linux/kernel.h>
+#include <linux/signal.h>
+#include <linux/malloc.h>
+#include <linux/mm.h>
+
+#include <linux/sched.h>
+#include <linux/timer.h>
+#include <linux/interrupt.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/string.h>
+#include <linux/fcntl.h>
+#include <linux/ptrace.h>
+#include <linux/major.h>
+#include <linux/ioport.h>
+#ifdef ENABLE_PCI
+#include <linux/bios32.h>
+#include <linux/pci.h>
+#endif
+#if (LINUX_VERSION_CODE >= 131343) /* 2.1.15 -- XX get correct version */
+#include <linux/init.h>
+#else
+#define __initfunc(x)	x
+#endif
+	
+#include "rocket_int.h"
+#include <linux/rocket.h>
+
+#define ROCKET_VERSION "1.14a"
+#define ROCKET_DATE "19-Jul-97"
+
+#define ROCKET_PARANOIA_CHECK
+
+#undef ROCKET_DEBUG_OPEN
+#undef ROCKET_DEBUG_INTR
+#undef ROCKET_DEBUG_WRITE
+#undef ROCKET_DEBUG_FLOW
+#undef ROCKET_DEBUG_THROTTLE
+#undef ROCKET_DEBUG_WAIT_UNTIL_SENT
+#undef ROCKET_DEBUG_RECEIVE
+#undef ROCKET_DEBUG_HANGUP
+	
+
+/*   CAUTION!!!!!  The TIME_STAT Function relies on the Pentium 64 bit
+ *    register.  For various reasons related to 1.2.13, the test for this
+ *    register is omitted from this driver.  If you are going to enable
+ *    this option, make sure you are running a Pentium CPU and that a
+ *    cat of /proc/cpuinfo shows ability TS Counters as Yes.  Warning part
+ *    done, don't cry to me if you enable this options and things won't
+ *    work.  If it gives you any problems, then disable the option.  The code
+ *    in this function is pretty straight forward, if it breaks on your
+ *    CPU, there is probably something funny about your CPU.
+ */
+
+#undef TIME_STAT	/* For performing timing statistics on driver. */
+			/* Produces printks, one every TIME_COUNTER loops, eats */
+			/* some of your CPU time.  Good for testing or */
+			/* other checking, otherwise, leave it undefed */
+			/* Doug Ledford */
+#define TIME_STAT_CPU 100      /* This needs to be set to your processor speed */
+                               /* For example, 100Mhz CPU, set this to 100 */
+#define TIME_COUNTER 180000    /* This is how many iterations to run before */
+			      /* performing the printk statements.   */
+			      /* 6000 = 1 minute, 360000 = 1 hour, etc. */
+			      /* Since time_stat is long long, this */
+			      /* Can be really high if you want :)  */
+#undef TIME_STAT_VERBOSE   /* Undef this if you want a terse log message. */
+
+#define _INLINE_ inline
+
+/*
+ * Until we get a formal timer assignment
+ */
+#ifndef COMTROL_TIMER
+#define COMTROL_TIMER 26
+#endif
+
+#ifndef NEW_MODULES
+/*
+ * NB. we must include the kernel idenfication string in to install the module.
+ */
+#include <linux/version.h>
+/*static*/ char kernel_version[] = UTS_RELEASE;
+#endif
+
+static struct r_port *rp_table[MAX_RP_PORTS];
+static struct tty_struct *rocket_table[MAX_RP_PORTS];
+static unsigned int xmit_flags[NUM_BOARDS];
+static struct termios *rocket_termios[MAX_RP_PORTS];
+static struct termios *rocket_termios_locked[MAX_RP_PORTS];
+static void rp_wait_until_sent(struct tty_struct *tty, int timeout);
+static void rp_flush_buffer(struct tty_struct *tty);
+
+static struct tty_driver rocket_driver, callout_driver;
+static int rocket_refcount = 0;
+
+static int rp_num_ports_open = 0;
+
+unsigned long board1 = 0;
+unsigned long board2 = 0;
+unsigned long board3 = 0;
+unsigned long board4 = 0;
+unsigned long controller = 0;
+unsigned long support_low_speed = 0;
+int rp_baud_base = 460800;
+static unsigned long rcktpt_io_addr[NUM_BOARDS];
+static int max_board;
+#ifdef TIME_STAT
+static unsigned long long time_stat = 0;
+static unsigned long time_stat_short = 0;
+static unsigned long time_stat_long = 0;
+static unsigned long time_counter = 0;
+#endif
+
+/*
+ * Provide backwards compatibility for kernels prior to 2.1.8.
+ */
+#if (LINUX_VERSION_CODE < 131336)
+int copy_from_user(void *to, const void *from_user, unsigned long len)
+{
+	int	error;
+
+	error = verify_area(VERIFY_READ, from_user, len);
+	if (error)
+		return len;
+	memcpy_fromfs(to, from_user, len);
+	return 0;
+}
+
+int copy_to_user(void *to_user, const void *from, unsigned long len)
+{
+	int	error;
+	
+	error = verify_area(VERIFY_WRITE, to_user, len);
+	if (error)
+		return len;
+	memcpy_tofs(to_user, from, len);
+	return 0;
+}
+#else
+#include <asm/uaccess.h>
+#endif
+
+/*
+ * tmp_buf is used as a temporary buffer by rp_write.  We need to
+ * lock it in case the memcpy_fromfs blocks while swapping in a page,
+ * and some other program tries to do a serial write at the same time.
+ * Since the lock will only come under contention when the system is
+ * swapping and available memory is low, it makes sense to share one
+ * buffer across all the serial ports, since it significantly saves
+ * memory if large numbers of serial ports are open.
+ */
+static unsigned char *tmp_buf = 0;
+static struct semaphore tmp_buf_sem = MUTEX;
+
+static void rp_start(struct tty_struct *tty);
+
+static inline int rocket_paranoia_check(struct r_port *info,
+					dev_t device, const char *routine)
+{
+#ifdef ROCKET_PARANOIA_CHECK
+	static const char *badmagic =
+		"Warning: bad magic number for rocketport struct (%d, %d) in %s\n";
+	if (!info)
+		return 1;
+	if (info->magic != RPORT_MAGIC) {
+		printk(badmagic, MAJOR(device), MINOR(device), routine);
+		return 1;
+	}
+#endif
+	return 0;
+}
+
+/*
+ * Here begins the interrupt/polling routine for the Rocketport!
+ */
+static _INLINE_ void rp_do_receive(struct r_port *info, struct tty_struct *tty,
+				   CHANNEL_t *cp, unsigned int ChanStatus)
+{
+	unsigned int CharNStat;
+	int ToRecv, wRecv, space, count;
+	unsigned char	*cbuf;
+	char		*fbuf;
+	
+	ToRecv= sGetRxCnt(cp);
+	space = 2*TTY_FLIPBUF_SIZE;
+	cbuf = tty->flip.char_buf;
+	fbuf = tty->flip.flag_buf;
+	count = 0;
+#ifdef ROCKET_DEBUG_INTR
+	printk("rp_do_receive(%d, %d)...", ToRecv, space);
+#endif
+	if (ToRecv == 0 || (space <= 0))
+		return;
+	
+	/*
+	 * determine how many we can actually read in.  If we can't
+	 * read any in then we have a software overrun condition.
+	 */
+	if (ToRecv > space)
+		ToRecv = space;
+	
+	/*
+	 * if status indicates there are errored characters in the
+	 * FIFO, then enter status mode (a word in FIFO holds
+	 * character and status).
+	 */
+	if (ChanStatus & (RXFOVERFL | RXBREAK | RXFRAME | RXPARITY)) {
+		if (!(ChanStatus & STATMODE)) {
+#ifdef ROCKET_DEBUG_RECEIVE
+			printk("Entering STATMODE...");
+#endif
+			ChanStatus |= STATMODE;
+			sEnRxStatusMode(cp);
+		}
+	}
+
+	/* 
+	 * if we previously entered status mode, then read down the
+	 * FIFO one word at a time, pulling apart the character and
+	 * the status.  Update error counters depending on status
+	 */
+	if (ChanStatus & STATMODE) {
+#ifdef ROCKET_DEBUG_RECEIVE
+		printk("Ignore %x, read %x...", info->ignore_status_mask,
+		       info->read_status_mask);
+#endif
+		while (ToRecv) {
+			CharNStat= sInW(sGetTxRxDataIO(cp));
+
+#ifdef ROCKET_DEBUG_RECEIVE
+			printk("%x...", CharNStat);
+#endif
+
+			if (CharNStat & STMBREAKH)
+				CharNStat &= ~(STMFRAMEH | STMPARITYH);
+			if (CharNStat & info->ignore_status_mask) {
+				ToRecv--;
+				continue;
+			}
+			CharNStat &= info->read_status_mask;
+			if (CharNStat & STMBREAKH) {
+				*fbuf++ = TTY_BREAK;
+#if 0
+				if (info->flags & ROCKET_SAK)
+					do_SAK(tty);
+#endif
+			} else if (CharNStat & STMPARITYH)
+				*fbuf++ = TTY_PARITY;
+			else if (CharNStat & STMFRAMEH)
+				*fbuf++ = TTY_FRAME;
+			else if (CharNStat & STMRCVROVRH)
+				*fbuf++ =TTY_OVERRUN;
+			else
+				*fbuf++ = 0;
+			*cbuf++ = CharNStat & 0xff;
+			count++;
+			ToRecv--;
+		}
+
+		/*
+		 * after we've emptied the FIFO in status mode, turn
+		 * status mode back off
+		 */
+		if (sGetRxCnt(cp) == 0) {
+#ifdef ROCKET_DEBUG_RECEIVE
+			printk("Status mode off.\n");
+#endif
+			sDisRxStatusMode(cp);
+		}
+	} else {
+		/*
+		 * we aren't in status mode, so read down the FIFO two
+		 * characters at time by doing repeated word IO
+		 * transfer.
+		 */
+		wRecv= ToRecv >> 1;
+		if (wRecv)
+			sInStrW(sGetTxRxDataIO(cp), cbuf,
+				wRecv);
+		if (ToRecv & 1)
+			cbuf[ToRecv-1] = sInB(sGetTxRxDataIO(cp));
+		memset(fbuf, 0, ToRecv);
+		cbuf += ToRecv;
+		fbuf += ToRecv;
+		count += ToRecv;
+	}
+	tty->ldisc.receive_buf(tty, tty->flip.char_buf,
+			       tty->flip.flag_buf, count);
+}
+
+/*
+ * This routine is called when a transmit interrupt is found.  It's
+ * responsible for pushing data found in the transmit buffer out to
+ * the serial card.
+ */
+static _INLINE_ void rp_do_transmit(struct r_port *info)
+{
+	int	c;
+	CHANNEL_t *cp = &info->channel;
+	struct tty_struct *tty;
+	
+#ifdef ROCKET_DEBUG_INTR
+	printk("rp_do_transmit ");
+#endif
+	if (!info)
+		return;
+	if (!info->tty) {
+		printk("rp: WARNING rp_do_transmit called with info->tty==NULL\n");
+		xmit_flags[info->line >> 5] &= ~(1 << (info->line & 0x1f));
+		return;
+	}
+	tty = info->tty;
+	info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
+	while (1) {
+		if (tty->stopped || tty->hw_stopped)
+			break;
+		c = MIN(info->xmit_fifo_room,
+			MIN(info->xmit_cnt,
+			    XMIT_BUF_SIZE - info->xmit_tail));
+		if (c <= 0 || info->xmit_fifo_room <= 0)
+			break;
+		sOutStrW(sGetTxRxDataIO(cp),
+			 info->xmit_buf + info->xmit_tail, c/2);
+		if (c & 1)
+			sOutB(sGetTxRxDataIO(cp),
+			      info->xmit_buf[info->xmit_tail + c -
+					     1]);
+		info->xmit_tail += c;
+		info->xmit_tail &= XMIT_BUF_SIZE-1;
+		info->xmit_cnt -= c;
+		info->xmit_fifo_room -= c;
+#ifdef ROCKET_DEBUG_INTR
+		printk("tx %d chars...", c);
+#endif
+	}
+	if (info->xmit_cnt == 0)
+		xmit_flags[info->line >> 5] &= ~(1 << (info->line & 0x1f));
+	if (info->xmit_cnt < WAKEUP_CHARS) {
+		if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
+		    tty->ldisc.write_wakeup)
+			(tty->ldisc.write_wakeup)(tty);
+		wake_up_interruptible(&tty->write_wait);
+	}
+#ifdef ROCKET_DEBUG_INTR
+	printk("(%d,%d,%d,%d)...", info->xmit_cnt, info->xmit_head,
+	       info->xmit_tail, info->xmit_fifo_room);
+#endif
+}
+
+/*
+ * This function is called for each port which has signalled an
+ * interrupt.  It checks what interrupts are pending and services
+ * them. 
+ */
+static _INLINE_ void rp_handle_port(struct r_port *info)
+{
+	CHANNEL_t *cp;
+	struct tty_struct *tty;
+	unsigned int IntMask, ChanStatus;
+
+	if (!info)
+		return;
+	if ( (info->flags & ROCKET_INITIALIZED) == 0 ) {
+		printk("rp: WARNING: rp_handle_port called with info->flags & NOT_INIT\n");
+		return;
+	}
+	if (!info->tty) {
+		printk("rp: WARNING: rp_handle_port called with info->tty==NULL\n");
+		return;
+	}
+	cp = &info->channel;
+	tty = info->tty;
+
+	IntMask = sGetChanIntID(cp) & info->intmask;
+#ifdef ROCKET_DEBUG_INTR
+	printk("rp_interrupt %02x...", IntMask);
+#endif
+	ChanStatus= sGetChanStatus(cp);
+	if (IntMask & RXF_TRIG) {	/* Rx FIFO trigger level */
+		rp_do_receive(info, tty, cp, ChanStatus);
+	}
+#if 0
+	if (IntMask & SRC_INT) {	/* Special receive condition */
+	}
+#endif
+	if (IntMask & DELTA_CD) {	/* CD change  */
+#if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_INTR) || \
+     defined(ROCKET_DEBUG_HANGUP))
+		printk("ttyR%d CD now %s...", info->line,
+		       (ChanStatus & CD_ACT) ? "on" : "off");
+#endif
+		if (!(ChanStatus & CD_ACT) &&
+		    info->cd_status &&
+		    !((info->flags & ROCKET_CALLOUT_ACTIVE) &&
+		      (info->flags & ROCKET_CALLOUT_NOHUP))) {
+#ifdef ROCKET_DEBUG_HANGUP
+			printk("CD drop, calling hangup.\n");
+#endif
+			tty_hangup(tty);
+		}
+		info->cd_status = (ChanStatus & CD_ACT) ? 1 : 0;
+		wake_up_interruptible(&info->open_wait);
+	}
+#ifdef ROCKET_DEBUG_INTR
+	if (IntMask & DELTA_CTS) {	/* CTS change */
+		printk("CTS change...\n");
+	}
+	if (IntMask & DELTA_DSR) {	/* DSR change */
+		printk("DSR change...\n");
+	}
+#endif
+}
+
+/*
+ * The top level polling routine.
+ */
+static void rp_do_poll(void)
+{
+	CONTROLLER_t *ctlp;
+	int ctrl, aiop, ch, line;
+	unsigned int xmitmask;
+	unsigned char CtlMask, AiopMask;
+
+#ifdef TIME_STAT
+	unsigned long low=0, high=0, loop_time;
+	unsigned long long time_stat_tmp=0, time_stat_tmp2=0;
+
+	__asm__(".byte 0x0f,0x31"
+		:"=a" (low), "=d" (high));
+	time_stat_tmp = high;
+	time_stat_tmp <<= 32;
+	time_stat_tmp += low;
+#endif /* TIME_STAT */
+
+	for (ctrl=0; ctrl < max_board; ctrl++) {
+		if (rcktpt_io_addr[ctrl] <= 0)
+			continue;
+		ctlp= sCtlNumToCtlPtr(ctrl);
+
+#ifdef ENABLE_PCI
+		if(ctlp->BusType == isPCI)
+			CtlMask= sPCIGetControllerIntStatus(ctlp);
+		else
+#endif
+			CtlMask= sGetControllerIntStatus(ctlp);
+		for (aiop=0; CtlMask; CtlMask >>= 1, aiop++) {
+			if (CtlMask & 1) {
+				AiopMask= sGetAiopIntStatus(ctlp, aiop);
+				for (ch=0; AiopMask; AiopMask >>= 1, ch++) {
+					if (AiopMask & 1) {
+						line = (ctrl << 5) | 
+							(aiop << 3) | ch;
+						rp_handle_port(rp_table[line]);
+					}
+				}
+			}
+		}
+		xmitmask = xmit_flags[ctrl];
+		for (line = ctrl << 5; xmitmask; xmitmask >>= 1, line++) {
+			if (xmitmask & 1)
+				rp_do_transmit(rp_table[line]);
+		}
+	}
+
+	/*
+	 * Reset the timer so we get called at the next clock tick.
+	 */
+	if (rp_num_ports_open) {
+		timer_active |= 1 << COMTROL_TIMER;
+	}
+#ifdef TIME_STAT
+	__asm__(".byte 0x0f,0x31"
+		:"=a" (low), "=d" (high));
+	time_stat_tmp2 = high;
+	time_stat_tmp2 <<= 32;
+	time_stat_tmp2 += low;
+	time_stat_tmp2 -= time_stat_tmp;
+	time_stat += time_stat_tmp2;
+	if (time_counter == 0) 
+		time_stat_short = time_stat_long = time_stat_tmp2;
+	else {
+		if ( time_stat_tmp2 < time_stat_short )
+			time_stat_short = time_stat_tmp2;
+		else if ( time_stat_tmp2 > time_stat_long )
+			time_stat_long = time_stat_tmp2;
+	}
+	if ( ++time_counter == TIME_COUNTER ) {
+		loop_time = (unsigned long) ( ((unsigned long)(time_stat >> 32) * ( (unsigned long)(0xffffffff)/(TIME_STAT_CPU * TIME_COUNTER) ) ) + ((unsigned long)time_stat/(TIME_STAT_CPU*TIME_COUNTER)));
+#ifdef TIME_STAT_VERBOSE
+		printk("rp_do_poll: Interrupt Timings\n");
+		printk("     %5ld iterations; %ld us min,\n",
+		       (long)TIME_COUNTER, (time_stat_short/TIME_STAT_CPU));
+		printk("     %5ld us max, %ld us average per iteration.\n",
+		       (time_stat_long/TIME_STAT_CPU), loop_time);
+		printk("We want to use < 5,000 us for an iteration.\n");
+#else /* TIME_STAT_VERBOSE */
+		printk("rp: %ld loops: %ld min, %ld max, %ld us/loop.\n",
+		       (long)TIME_COUNTER, (time_stat_short/TIME_STAT_CPU),
+		       (time_stat_long/TIME_STAT_CPU), loop_time);
+#endif /* TIME_STAT_VERBOSE */
+		time_counter = time_stat = 0;
+		time_stat_short = time_stat_long = 0;
+	}
+#endif /* TIME_STAT */
+}
+/*
+ * Here ends the interrupt/polling routine.
+ */
+
+
+/*
+ * This function initializes the r_port structure, as well as enabling
+ * the port on the RocketPort board.
+ */
+static void init_r_port(int board, int aiop, int chan)
+{
+	struct r_port *info;
+	int line;
+	CONTROLLER_T *ctlp;
+	CHANNEL_t	*cp;
+	
+	line = (board << 5) | (aiop << 3) | chan;
+
+	ctlp= sCtlNumToCtlPtr(board);
+
+	info = kmalloc(sizeof(struct r_port), GFP_KERNEL);
+	if (!info) {
+		printk("Couldn't allocate info struct for line #%d\n", line);
+		return;
+	}
+	memset(info, 0, sizeof(struct r_port));
+	
+	info->magic = RPORT_MAGIC;
+	info->line = line;
+	info->ctlp = ctlp;
+	info->board = board;
+	info->aiop = aiop;
+	info->chan = chan;
+	info->closing_wait = 3000;
+	info->close_delay = 50;
+	info->callout_termios =callout_driver.init_termios;
+	info->normal_termios = rocket_driver.init_termios;
+
+	info->intmask = RXF_TRIG | TXFIFO_MT | SRC_INT | DELTA_CD |
+		DELTA_CTS | DELTA_DSR;
+	if (sInitChan(ctlp, &info->channel, aiop, chan) == 0) {
+		printk("Rocketport sInitChan(%d, %d, %d) failed!\n",
+		       board, aiop, chan);
+		kfree(info);
+		return;
+	}
+	cp = &info->channel;
+	rp_table[line] = info;
+}
+
+static int baud_table[] = {
+	0, 50, 75, 110, 134, 150, 200, 300,
+	600, 1200, 1800, 2400, 4800, 9600, 19200,
+	38400, 57600, 115200, 230400, 460800, 0 };
+
+/*
+ * This routine configures a rocketport port so according to its
+ * termio settings.
+ */
+static void configure_r_port(struct r_port *info)
+{
+	unsigned cflag;
+	unsigned long 	flags;
+	int	i, bits, baud;
+	CHANNEL_t	*cp;
+	
+	if (!info->tty || !info->tty->termios)
+		return;
+	cp = &info->channel;
+	cflag = info->tty->termios->c_cflag;
+
+	/* Byte size and parity */
+	if ((cflag & CSIZE) == CS8) {
+		sSetData8(cp);
+		bits = 10;
+	} else {
+		sSetData7(cp);
+		bits = 9;
+	}
+        if (cflag & CSTOPB) {
+		sSetStop2(cp);
+		bits++;
+	} else {
+		sSetStop1(cp);
+	}
+	
+	if (cflag & PARENB) {
+		sEnParity(cp);
+		bits++;
+		if (cflag & PARODD) {
+			sSetOddParity(cp);
+		} else {
+			sSetEvenParity(cp);
+		}
+	} else {
+		sDisParity(cp);
+	}
+	
+	/* baud rate */
+	i = cflag & CBAUD;
+	if (i & CBAUDEX) {
+		i &= ~CBAUDEX;
+		if (i < 1 || i > 4) 
+			info->tty->termios->c_cflag &= ~CBAUDEX;
+		else
+			i += 15;
+	}
+	if (i == 15) {
+		if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_HI)
+			i += 1;
+		if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_VHI)
+			i += 2;
+		if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_SHI)
+			i += 3;
+		if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_WARP)
+			i += 4;
+	}
+	baud = baud_table[i] ? baud_table[i] : 9600;
+	info->cps = baud / bits;
+	sSetBaud(cp, (rp_baud_base/baud) - 1);
+	
+	if (cflag & CRTSCTS) {
+		info->intmask |= DELTA_CTS;
+		sEnCTSFlowCtl(cp);
+	} else {
+		info->intmask &= ~DELTA_CTS;
+		sDisCTSFlowCtl(cp);
+	}
+	sSetRTS(&info->channel);
+	if (cflag & CLOCAL)
+		info->intmask &= ~DELTA_CD;
+	else {
+		save_flags(flags); cli();
+		if (sGetChanStatus(cp) & CD_ACT)
+			info->cd_status = 1;
+		else
+			info->cd_status = 0;
+		info->intmask |= DELTA_CD;
+		restore_flags(flags);
+	}
+	/*
+	 * Set up ignore/read mask words
+	 */
+	info->read_status_mask = STMRCVROVRH | 0xFF;
+	if (I_INPCK(info->tty))
+		info->read_status_mask |= STMFRAMEH | STMPARITYH;
+	if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
+		info->read_status_mask |= STMBREAKH;
+	
+	/*
+	 * Characters to ignore
+	 */
+	info->ignore_status_mask = 0;
+	if (I_IGNPAR(info->tty))
+		info->ignore_status_mask |= STMFRAMEH | STMPARITYH;
+	if (I_IGNBRK(info->tty)) {
+		info->ignore_status_mask |= STMBREAKH;
+		/*
+		 * If we're ignoring parity and break indicators,
+		 * ignore overruns too.  (For real raw support).
+		 */
+		if (I_IGNPAR(info->tty))
+			info->ignore_status_mask |= STMRCVROVRH;
+	}
+}
+
+static int block_til_ready(struct tty_struct *tty, struct file * filp,
+			   struct r_port *info)
+{
+	struct wait_queue wait = { current, NULL };
+	int		retval;
+	int		do_clocal = 0;
+	unsigned long	flags;
+
+	/*
+	 * If the device is in the middle of being closed, then block
+	 * until it's done, and then try again.
+	 */
+	if (tty_hung_up_p(filp))
+		return ((info->flags & ROCKET_HUP_NOTIFY) ? 
+			-EAGAIN : -ERESTARTSYS);
+	if (info->flags & ROCKET_CLOSING) {
+		interruptible_sleep_on(&info->close_wait);
+		return ((info->flags & ROCKET_HUP_NOTIFY) ? 
+			-EAGAIN : -ERESTARTSYS);
+	}
+
+	/*
+	 * If this is a callout device, then just make sure the normal
+	 * device isn't being used.
+	 */
+	if (tty->driver.subtype == SERIAL_TYPE_CALLOUT) {
+		if (info->flags & ROCKET_NORMAL_ACTIVE)
+			return -EBUSY;
+		if ((info->flags & ROCKET_CALLOUT_ACTIVE) &&
+		    (info->flags & ROCKET_SESSION_LOCKOUT) &&
+		    (info->session != current->session))
+		    return -EBUSY;
+		if ((info->flags & ROCKET_CALLOUT_ACTIVE) &&
+		    (info->flags & ROCKET_PGRP_LOCKOUT) &&
+		    (info->pgrp != current->pgrp))
+		    return -EBUSY;
+		info->flags |= ROCKET_CALLOUT_ACTIVE;
+		return 0;
+	}
+	
+	/*
+	 * If non-blocking mode is set, or the port is not enabled,
+	 * then make the check up front and then exit.
+	 */
+	if ((filp->f_flags & O_NONBLOCK) ||
+	    (tty->flags & (1 << TTY_IO_ERROR))) {
+		if (info->flags & ROCKET_CALLOUT_ACTIVE)
+			return -EBUSY;
+		info->flags |= ROCKET_NORMAL_ACTIVE;
+		return 0;
+	}
+
+	if (info->flags & ROCKET_CALLOUT_ACTIVE) {
+		if (info->normal_termios.c_cflag & CLOCAL)
+			do_clocal = 1;
+	} else {
+		if (tty->termios->c_cflag & CLOCAL)
+			do_clocal = 1;
+	}
+	
+	/*
+	 * Block waiting for the carrier detect and the line to become
+	 * free (i.e., not in use by the callout).  While we are in
+	 * this loop, info->count is dropped by one, so that
+	 * rp_close() knows when to free things.  We restore it upon
+	 * exit, either normal or abnormal.
+	 */
+	retval = 0;
+	add_wait_queue(&info->open_wait, &wait);
+#ifdef ROCKET_DEBUG_OPEN
+	printk("block_til_ready before block: ttyR%d, count = %d\n",
+	       info->line, info->count);
+#endif
+	save_flags(flags); cli();
+	if (!tty_hung_up_p(filp))
+		info->count--;
+	restore_flags(flags);
+	info->blocked_open++;
+	while (1) {
+		if (!(info->flags & ROCKET_CALLOUT_ACTIVE) &&
+		    (tty->termios->c_cflag & CBAUD)) {
+			sSetDTR(&info->channel);
+			sSetRTS(&info->channel);
+		}
+		current->state = TASK_INTERRUPTIBLE;
+		if (tty_hung_up_p(filp) ||
+		    !(info->flags & ROCKET_INITIALIZED)) {
+			if (info->flags & ROCKET_HUP_NOTIFY)
+				retval = -EAGAIN;
+			else
+				retval = -ERESTARTSYS;	
+			break;
+		}
+		if (!(info->flags & ROCKET_CALLOUT_ACTIVE) &&
+		    !(info->flags & ROCKET_CLOSING) &&
+		    (do_clocal || (sGetChanStatusLo(&info->channel) &
+				   CD_ACT)))
+			break;
+		if (current->signal & ~current->blocked) {
+			retval = -ERESTARTSYS;
+			break;
+		}
+#ifdef ROCKET_DEBUG_OPEN
+		printk("block_til_ready blocking: ttyR%d, count = %d, flags=0x%0x\n",
+		       info->line, info->count, info->flags);
+#endif
+		schedule();
+	}
+	current->state = TASK_RUNNING;
+	remove_wait_queue(&info->open_wait, &wait);
+	cli();
+	if (!tty_hung_up_p(filp))
+		info->count++;
+	restore_flags(flags);
+	info->blocked_open--;
+#ifdef ROCKET_DEBUG_OPEN
+	printk("block_til_ready after blocking: ttyR%d, count = %d\n",
+	       info->line, info->count);
+#endif
+	if (retval)
+		return retval;
+	info->flags |= ROCKET_NORMAL_ACTIVE;
+	return 0;
+}	
+
+/*
+ * This routine is called whenever a rocketport board is opened.
+ */
+static int rp_open(struct tty_struct *tty, struct file * filp)
+{
+	struct r_port *info;
+	int	line, retval;
+	CHANNEL_t	*cp;
+	unsigned long page;
+	
+	line = MINOR(tty->device) - tty->driver.minor_start;
+	if ((line < 0) || (line >= MAX_RP_PORTS))
+		return -ENODEV;
+	if (!tmp_buf) {
+		page = get_free_page(GFP_KERNEL);
+		if (!page)
+			return -ENOMEM;
+		if (tmp_buf)
+			free_page(page);
+		else
+			tmp_buf = (unsigned char *) page;
+	}
+	page = get_free_page(GFP_KERNEL);
+	if (!page)
+		return -ENOMEM;
+
+	tty->driver_data = info = rp_table[line];
+	
+	if (info->flags & ROCKET_CLOSING) {
+		interruptible_sleep_on(&info->close_wait);
+		free_page(page);
+		return ((info->flags & ROCKET_HUP_NOTIFY) ?
+			-EAGAIN : -ERESTARTSYS);
+	}
+	
+	/*
+	 * We must not sleep from here until the port is marked fully
+	 * in use.
+	 */
+	if (rp_table[line] == NULL) {
+		tty->flags = (1 << TTY_IO_ERROR);
+		free_page(page);
+		return 0;
+	}
+	if (!info) {
+		printk("rp_open: rp_table[%d] is NULL!\n", line);
+		free_page(page);
+		return -EIO;
+	}
+	if (info->xmit_buf)
+		free_page(page);
+	else
+		info->xmit_buf = (unsigned char *) page;
+	info->tty = tty;
+
+	if (info->flags & ROCKET_CLOSING) {
+		interruptible_sleep_on(&info->close_wait);
+		return ((info->flags & ROCKET_HUP_NOTIFY) ? 
+			-EAGAIN : -ERESTARTSYS);
+	}
+
+	if (info->count++ == 0) {
+#ifdef MODULE
+		MOD_INC_USE_COUNT;
+#endif
+		rp_num_ports_open++;
+#ifdef ROCKET_DEBUG_OPEN
+		printk("rocket mod++ = %d...", rp_num_ports_open);
+#endif
+	}
+#ifdef ROCKET_DEBUG_OPEN
+	printk("rp_open ttyR%d, count=%d\n", info->line, info->count);
+#endif
+	/*
+	 * Info->count is now 1; so it's safe to sleep now.
+	 */
+	info->session = current->session;
+	info->pgrp = current->pgrp;
+	
+	cp = &info->channel;
+	sSetRxTrigger(cp, TRIG_1);
+	if (sGetChanStatus(cp) & CD_ACT)
+		info->cd_status = 1;
+	else
+		info->cd_status = 0;
+	sDisRxStatusMode(cp);
+	sFlushRxFIFO(cp);	
+	sFlushTxFIFO(cp);	
+
+	sEnInterrupts(cp, (TXINT_EN|MCINT_EN|RXINT_EN|SRCINT_EN|CHANINT_EN));
+	sSetRxTrigger(cp, TRIG_1);
+
+	sGetChanStatus(cp);
+	sDisRxStatusMode(cp);
+	sClrTxXOFF(cp);
+
+	sDisCTSFlowCtl(cp);
+	sDisTxSoftFlowCtl(cp);
+
+	sEnRxFIFO(cp);
+	sEnTransmit(cp);
+
+	info->flags |= ROCKET_INITIALIZED;
+	
+	configure_r_port(info);
+	if (tty->termios->c_cflag & CBAUD) {
+		sSetDTR(cp);
+		sSetRTS(cp);
+	}
+	
+	timer_active |= 1 << COMTROL_TIMER;
+
+	retval = block_til_ready(tty, filp, info);
+	if (retval) {
+#ifdef ROCKET_DEBUG_OPEN
+		printk("rp_open returning after block_til_ready with %d\n",
+		       retval);
+#endif
+		return retval;
+	}
+
+	if ((info->count == 1) && (info->flags & ROCKET_SPLIT_TERMIOS)) {
+		if (tty->driver.subtype == SERIAL_TYPE_NORMAL)
+			*tty->termios = info->normal_termios;
+		else 
+			*tty->termios = info->callout_termios;
+		configure_r_port(info);
+	}
+
+	return 0;
+}
+
+static void rp_close(struct tty_struct *tty, struct file * filp)
+{
+	struct r_port * info = (struct r_port *)tty->driver_data;
+	unsigned long flags;
+	int timeout;
+	CHANNEL_t	*cp;
+
+	if (rocket_paranoia_check(info, tty->device, "rp_close"))
+		return;
+
+#ifdef ROCKET_DEBUG_OPEN
+	printk("rp_close ttyR%d, count = %d\n", info->line, info->count);
+#endif
+	
+	save_flags(flags); cli();
+	
+	if (tty_hung_up_p(filp)) {
+		restore_flags(flags);
+		return;
+	}
+	if ((tty->count == 1) && (info->count != 1)) {
+		/*
+		 * Uh, oh.  tty->count is 1, which means that the tty
+		 * structure will be freed.  Info->count should always
+		 * be one in these conditions.  If it's greater than
+		 * one, we've got real problems, since it means the
+		 * serial port won't be shutdown.
+		 */
+		printk("rp_close: bad serial port count; tty->count is 1, "
+		       "info->count is %d\n", info->count);
+		info->count = 1;
+	}
+	if (--info->count < 0) {
+		printk("rp_close: bad serial port count for ttyR%d: %d\n",
+		       info->line, info->count);
+		info->count = 0;
+	}
+	if (info->count) {
+		restore_flags(flags);
+		return;
+	}
+	info->flags |= ROCKET_CLOSING;
+	/*
+	 * Save the termios structure, since this port may have
+	 * separate termios for callout and dialin.
+	 */
+	if (info->flags & ROCKET_NORMAL_ACTIVE)
+		info->normal_termios = *tty->termios;
+	if (info->flags & ROCKET_CALLOUT_ACTIVE)
+		info->callout_termios = *tty->termios;
+	
+	cp = &info->channel;
+
+	/*
+	 * Notify the line discpline to only process XON/XOFF characters
+	 */
+	tty->closing = 1;
+
+	/*
+	 * If transmission was throttled by the application request,
+	 * just flush the xmit buffer.
+	 */
+#if (LINUX_VERSION_CODE >= 131343)
+	if (tty->flow_stopped)
+		rp_flush_buffer(tty);
+#endif
+
+	/*
+	 * Wait for the transmit buffer to clear
+	 */
+	if (info->closing_wait != ROCKET_CLOSING_WAIT_NONE)
+		tty_wait_until_sent(tty, info->closing_wait);
+	/*
+	 * Before we drop DTR, make sure the UART transmitter
+	 * has completely drained; this is especially
+	 * important if there is a transmit FIFO!
+	 */
+	timeout = (sGetTxCnt(cp)+1) * HZ / info->cps;
+	if (timeout == 0)
+		timeout = 1;
+	rp_wait_until_sent(tty, timeout);
+	
+	xmit_flags[info->line >> 5] &= ~(1 << (info->line & 0x1f));
+	sDisTransmit(cp);
+	sDisInterrupts(cp, (TXINT_EN|MCINT_EN|RXINT_EN|SRCINT_EN|CHANINT_EN));
+	sDisCTSFlowCtl(cp);
+	sDisTxSoftFlowCtl(cp);
+	sClrTxXOFF(cp);
+	sFlushRxFIFO(cp);	
+	sFlushTxFIFO(cp);
+	sClrRTS(cp);
+	if (C_HUPCL(tty)) {
+		sClrDTR(cp);
+	}
+	if (tty->driver.flush_buffer)
+		tty->driver.flush_buffer(tty);
+	if (tty->ldisc.flush_buffer)
+		tty->ldisc.flush_buffer(tty);
+
+	xmit_flags[info->line >> 5] &= ~(1 << (info->line & 0x1f));
+	if (info->blocked_open) {
+		if (info->close_delay) {
+			current->state = TASK_INTERRUPTIBLE;
+			current->timeout = jiffies + info->close_delay;
+			schedule();
+		}
+		wake_up_interruptible(&info->open_wait);
+	} else {
+		if (info->xmit_buf) {
+			free_page((unsigned long) info->xmit_buf);
+			info->xmit_buf = 0;
+		}
+	}
+	info->flags &= ~(ROCKET_INITIALIZED | ROCKET_CLOSING |
+			 ROCKET_CALLOUT_ACTIVE | ROCKET_NORMAL_ACTIVE);
+	tty->closing = 0;
+	wake_up_interruptible(&info->close_wait);
+	
+#ifdef MODULE
+	MOD_DEC_USE_COUNT;
+#endif
+	rp_num_ports_open--;
+#ifdef ROCKET_DEBUG_OPEN
+	printk("rocket mod-- = %d...", rp_num_ports_open);
+#endif
+	restore_flags(flags);
+	
+#ifdef ROCKET_DEBUG_OPEN
+	printk("rp_close ttyR%d complete shutdown\n", info->line);
+#endif
+	
+}
+
+static void rp_set_termios(struct tty_struct *tty, struct termios *old_termios)
+{
+	struct r_port * info = (struct r_port *)tty->driver_data;
+	CHANNEL_t *cp;
+	unsigned cflag;
+	
+
+	if (rocket_paranoia_check(info, tty->device, "rp_set_termios"))
+		return;
+
+	cflag = tty->termios->c_cflag;
+
+	if (cflag == old_termios->c_cflag)
+		return;
+
+	/*
+	 * This driver doesn't support CS5 or CS6
+	 */
+	if (((cflag & CSIZE) == CS5) ||
+	    ((cflag & CSIZE) == CS6))
+		tty->termios->c_cflag = ((cflag & ~CSIZE) |
+					 (old_termios->c_cflag & CSIZE));
+
+	configure_r_port(info);
+
+	cp = &info->channel;
+
+	/* Handle transition to B0 status */
+	if ((old_termios->c_cflag & CBAUD) &&
+	    !(tty->termios->c_cflag & CBAUD)) {
+		sClrDTR(cp);
+		sClrRTS(cp);
+	}
+	
+	/* Handle transition away from B0 status */
+	if (!(old_termios->c_cflag & CBAUD) &&
+	    (tty->termios->c_cflag & CBAUD)) {
+		if (!tty->hw_stopped ||
+		    !(tty->termios->c_cflag & CRTSCTS)) {
+			sSetRTS(cp);
+		}
+		sSetDTR(cp);
+	}
+	
+	if ((old_termios->c_cflag & CRTSCTS) &&
+	    !(tty->termios->c_cflag & CRTSCTS)) {
+		tty->hw_stopped = 0;
+		rp_start(tty);
+	}
+}
+
+/*
+ * Here are the routines used by rp_ioctl
+ */
+
+static void send_break(	struct r_port * info, int duration)
+{
+	current->state = TASK_INTERRUPTIBLE;
+	current->timeout = jiffies + duration;
+	cli();
+	sSendBreak(&info->channel);
+	schedule();
+	sClrBreak(&info->channel);
+	sti();
+}
+
+static int get_modem_info(struct r_port * info, unsigned int *value)
+{
+	unsigned int control, result, ChanStatus;
+
+	ChanStatus = sGetChanStatusLo(&info->channel);
+	
+	control = info->channel.TxControl[3];
+	result =  ((control & SET_RTS) ? TIOCM_RTS : 0)
+		| ((control & SET_DTR) ? TIOCM_DTR : 0)
+		| ((ChanStatus  & CD_ACT) ? TIOCM_CAR : 0)
+			/* TIOCM_RNG not supported */
+		| ((ChanStatus  & DSR_ACT) ? TIOCM_DSR : 0)
+		| ((ChanStatus  & CTS_ACT) ? TIOCM_CTS : 0);
+
+	if (copy_to_user(value, &result, sizeof(int)))
+		return -EFAULT;
+	return 0;
+}
+
+static int set_modem_info(struct r_port * info, unsigned int cmd,
+			  unsigned int *value)
+{
+	unsigned int arg;
+
+	if (copy_from_user(&arg, value, sizeof(int)))
+		return -EFAULT;
+
+	switch (cmd) {
+	case TIOCMBIS: 
+		if (arg & TIOCM_RTS)
+			info->channel.TxControl[3] |= SET_RTS;
+		if (arg & TIOCM_DTR)
+			info->channel.TxControl[3] |= SET_DTR;
+		break;
+	case TIOCMBIC:
+		if (arg & TIOCM_RTS)
+			info->channel.TxControl[3] &= ~SET_RTS;
+		if (arg & TIOCM_DTR)
+			info->channel.TxControl[3] &= ~SET_DTR;
+		break;
+	case TIOCMSET:
+		info->channel.TxControl[3] =
+			((info->channel.TxControl[3] & ~(SET_RTS | SET_DTR))
+			 | ((arg & TIOCM_RTS) ? SET_RTS : 0)
+			 | ((arg & TIOCM_DTR) ? SET_DTR : 0));
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	sOutDW(info->channel.IndexAddr,
+	       *(DWord_t *) &(info->channel.TxControl[0]));
+	
+	return 0;
+}
+
+static int get_config(struct r_port * info, struct rocket_config * retinfo)
+{
+	struct rocket_config tmp;
+  
+	if (!retinfo)
+		return -EFAULT;
+	memset(&tmp, 0, sizeof(tmp));
+	tmp.line = info->line;
+	tmp.flags = info->flags;
+	tmp.close_delay = info->close_delay;
+	tmp.closing_wait = info->closing_wait;
+	tmp.port = rcktpt_io_addr[(info->line >> 5) & 3];
+	
+	if (copy_to_user(retinfo,&tmp,sizeof(*retinfo)))
+		return -EFAULT;
+	return 0;
+}
+
+static int set_config(struct r_port * info, struct rocket_config * new_info)
+{
+	struct rocket_config new_serial;
+
+	if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
+		return -EFAULT;
+
+	if (!suser()) {
+		if ((new_serial.flags & ~ROCKET_USR_MASK) !=
+		    (info->flags & ~ROCKET_USR_MASK))
+			return -EPERM;
+		info->flags = ((info->flags & ~ROCKET_USR_MASK) |
+			       (new_serial.flags & ROCKET_USR_MASK));
+		configure_r_port(info);
+		return 0;
+	}
+	
+	info->flags = ((info->flags & ~ROCKET_FLAGS) |
+			(new_serial.flags & ROCKET_FLAGS));
+	info->close_delay = new_serial.close_delay;
+	info->closing_wait = new_serial.closing_wait;
+	configure_r_port(info);
+	
+	return 0;
+}
+
+static int get_ports(struct r_port * info, struct rocket_ports * retports)
+{
+	struct rocket_ports tmp;
+	int	board, port, index;
+  
+	if (!retports)
+		return -EFAULT;
+	memset(&tmp, 0, sizeof(tmp));
+	tmp.tty_major = rocket_driver.major;
+	tmp.callout_major = callout_driver.major;
+	for (board = 0; board < 4; board++) {
+		index = board << 5;
+		for (port = 0; port < 32; port++, index++) {
+			if (rp_table[index])
+				tmp.port_bitmap[board] |= 1 << port;
+		}
+	}
+	if (copy_to_user(retports,&tmp,sizeof(*retports)))
+		return -EFAULT;
+	return 0;
+}
+
+static int rp_ioctl(struct tty_struct *tty, struct file * file,
+		    unsigned int cmd, unsigned long arg)
+{
+	int tmp;
+	struct r_port * info = (struct r_port *)tty->driver_data;
+	int retval;
+
+	if (cmd != RCKP_GET_PORTS &&
+	    rocket_paranoia_check(info, tty->device, "rp_ioctl"))
+		return -ENODEV;
+
+	switch (cmd) {
+		case TCSBRK:	/* SVID version: non-zero arg --> no break */
+			retval = tty_check_change(tty);
+			if (retval)
+				return retval;
+			tty_wait_until_sent(tty, 0);
+			if (current->signal & ~current->blocked)
+				return -EINTR;
+			if (!arg) {
+				send_break(info, HZ/4);	/* 1/4 second */
+				if (current->signal & ~current->blocked)
+					return -EINTR;
+			}
+			return 0;
+		case TCSBRKP:	/* support for POSIX tcsendbreak() */
+			retval = tty_check_change(tty);
+			if (retval)
+				return retval;
+			tty_wait_until_sent(tty, 0);
+			if (current->signal & ~current->blocked)
+				return -EINTR;
+			send_break(info, arg ? arg*(HZ/10) : HZ/4);
+			if (current->signal & ~current->blocked)
+				return -EINTR;
+			return 0;
+		case TIOCGSOFTCAR:
+			tmp = C_CLOCAL(tty) ? 1 : 0;
+			if (copy_to_user((void *)arg, &tmp, sizeof(int)))
+				return -EFAULT;
+			return 0;
+		case TIOCSSOFTCAR:
+			if (copy_from_user(&tmp, (void *)arg, sizeof(int)))
+				return -EFAULT;
+
+			tty->termios->c_cflag =
+				((tty->termios->c_cflag & ~CLOCAL) |
+				 (tmp ? CLOCAL : 0));
+			return 0;
+		case TIOCMGET:
+			return get_modem_info(info, (unsigned int *) arg);
+		case TIOCMBIS:
+		case TIOCMBIC:
+		case TIOCMSET:
+			return set_modem_info(info, cmd, (unsigned int *) arg);
+		case RCKP_GET_STRUCT:
+			if (copy_to_user((void *) arg, info,
+					 sizeof(struct r_port)))
+				return -EFAULT;
+			return 0;
+
+		case RCKP_GET_CONFIG:
+			return get_config(info, (struct rocket_config *) arg);
+		case RCKP_SET_CONFIG:
+			return set_config(info, (struct rocket_config *) arg);
+			
+		case RCKP_GET_PORTS:
+			return get_ports(info, (struct rocket_ports *) arg);
+		default:
+			return -ENOIOCTLCMD;
+		}
+	return 0;
+}
+
+#if (defined(ROCKET_DEBUG_FLOW) || defined(ROCKET_DEBUG_THROTTLE))
+static char *rp_tty_name(struct tty_struct *tty, char *buf)
+{
+	if (tty)
+		sprintf(buf, "%s%d", tty->driver.name,
+			MINOR(tty->device) - tty->driver.minor_start +
+			tty->driver.name_base);
+	else
+		strcpy(buf, "NULL tty");
+	return buf;
+}
+#endif
+
+static void rp_send_xchar(struct tty_struct *tty, char ch)
+{
+	struct r_port *info = (struct r_port *)tty->driver_data;
+	CHANNEL_t *cp;
+
+	if (rocket_paranoia_check(info, tty->device, "rp_send_xchar"))
+		return;
+
+	cp = &info->channel;
+	if (sGetTxCnt(cp)) 
+		sWriteTxPrioByte(cp, ch);
+	else
+		sWriteTxByte(sGetTxRxDataIO(cp), ch);
+}
+
+static void rp_throttle(struct tty_struct * tty)
+{
+	struct r_port *info = (struct r_port *)tty->driver_data;
+	CHANNEL_t *cp;
+#ifdef ROCKET_DEBUG_THROTTLE
+	char	buf[64];
+	
+	printk("throttle %s: %d....\n", rp_tty_name(tty, buf),
+	       tty->ldisc.chars_in_buffer(tty));
+#endif
+
+	if (rocket_paranoia_check(info, tty->device, "rp_throttle"))
+		return;
+
+	cp = &info->channel;
+	if (I_IXOFF(tty))
+		rp_send_xchar(tty, STOP_CHAR(tty));
+	
+	sClrRTS(&info->channel);
+}
+
+static void rp_unthrottle(struct tty_struct * tty)
+{
+	struct r_port *info = (struct r_port *)tty->driver_data;
+	CHANNEL_t *cp;
+#ifdef ROCKET_DEBUG_THROTTLE
+	char	buf[64];
+	
+	printk("unthrottle %s: %d....\n", rp_tty_name(tty, buf),
+	       tty->ldisc.chars_in_buffer(tty));
+#endif
+
+	if (rocket_paranoia_check(info, tty->device, "rp_throttle"))
+		return;
+
+	cp = &info->channel;
+	if (I_IXOFF(tty))
+		rp_send_xchar(tty, START_CHAR(tty));
+
+	sSetRTS(&info->channel);
+}
+
+/*
+ * ------------------------------------------------------------
+ * rp_stop() and rp_start()
+ *
+ * This routines are called before setting or resetting tty->stopped.
+ * They enable or disable transmitter interrupts, as necessary.
+ * ------------------------------------------------------------
+ */
+static void rp_stop(struct tty_struct *tty)
+{
+	struct r_port * info = (struct r_port *)tty->driver_data;
+#ifdef ROCKET_DEBUG_FLOW
+	char	buf[64];
+	
+	printk("stop %s: %d %d....\n", rp_tty_name(tty, buf),
+	       info->xmit_cnt, info->xmit_fifo_room);
+#endif
+
+	if (rocket_paranoia_check(info, tty->device, "rp_stop"))
+		return;
+
+	if (sGetTxCnt(&info->channel))
+		sDisTransmit(&info->channel);
+}
+
+static void rp_start(struct tty_struct *tty)
+{
+	struct r_port * info = (struct r_port *)tty->driver_data;
+#ifdef ROCKET_DEBUG_FLOW
+	char	buf[64];
+	
+	printk("start %s: %d %d....\n", rp_tty_name(tty, buf),
+	       info->xmit_cnt, info->xmit_fifo_room);
+#endif
+
+	if (rocket_paranoia_check(info, tty->device, "rp_stop"))
+		return;
+
+	sEnTransmit(&info->channel);
+	xmit_flags[info->line >> 5] |= (1 << (info->line & 0x1f));
+}
+
+/*
+ * rp_wait_until_sent() --- wait until the transmitter is empty
+ */
+static void rp_wait_until_sent(struct tty_struct *tty, int timeout)
+{
+	struct r_port *info = (struct r_port *)tty->driver_data;
+	CHANNEL_t *cp;
+	unsigned long orig_jiffies;
+	int check_time, exit_time;
+	int txcnt;
+	
+	if (rocket_paranoia_check(info, tty->device, "rp_wait_until_sent"))
+		return;
+
+	cp = &info->channel;
+
+	orig_jiffies = jiffies;
+#ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
+	printk("In RP_wait_until_sent(%d) (jiff=%lu)...", timeout, jiffies);
+	printk("cps=%d...", info->cps);
+#endif
+	while (1) {
+		txcnt = sGetTxCnt(cp);
+		if (!txcnt) {
+			if (sGetChanStatusLo(cp) & TXSHRMT)
+				break;
+			check_time = (HZ / info->cps) / 5;
+		} else
+			check_time = HZ * txcnt / info->cps;
+		if (timeout) {
+			exit_time = orig_jiffies + timeout - jiffies;
+			if (exit_time <= 0)
+				break;
+			if (exit_time < check_time)
+				check_time = exit_time;
+		}
+		if (check_time == 0)
+			check_time = 1;
+#ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
+		printk("txcnt = %d (jiff=%lu,check=%d)...", txcnt,
+		       jiffies, check_time);
+#endif
+		current->state = TASK_INTERRUPTIBLE;
+		current->counter = 0;	/* make us low-priority */
+		current->timeout = jiffies + check_time;
+		schedule();
+		if (current->signal & ~current->blocked)
+			break;
+	}
+	current->state = TASK_RUNNING;
+#ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
+	printk("txcnt = %d (jiff=%lu)...done\n", txcnt, jiffies);
+#endif
+}
+
+/*
+ * rp_hangup() --- called by tty_hangup() when a hangup is signaled.
+ */
+static void rp_hangup(struct tty_struct *tty)
+{
+	CHANNEL_t	*cp;
+	struct r_port * info = (struct r_port *)tty->driver_data;
+	
+	if (rocket_paranoia_check(info, tty->device, "rp_hangup"))
+		return;
+
+#if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_HANGUP))
+	printk("rp_hangup of ttyR%d...", info->line);
+#endif
+	/*
+	 * If the port is in the process of being closed, just force
+	 * the transmit buffer to be empty, and let rp_close handle
+	 * the clean up.
+	 */
+	if (info->flags & ROCKET_CLOSING) {
+		cli();
+		info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
+		sti();
+		wake_up_interruptible(&tty->write_wait);
+		return;
+	}
+	if (info->count) {
+#ifdef MODULE
+		MOD_DEC_USE_COUNT;
+#endif
+		rp_num_ports_open--;
+	}
+	
+	xmit_flags[info->line >> 5] &= ~(1 << (info->line & 0x1f));
+	info->count = 0;
+	info->flags &= ~(ROCKET_NORMAL_ACTIVE|ROCKET_CALLOUT_ACTIVE);
+	info->tty = 0;
+
+	cp = &info->channel;
+	sDisRxFIFO(cp);
+	sDisTransmit(cp);
+	sDisInterrupts(cp, (TXINT_EN|MCINT_EN|RXINT_EN|SRCINT_EN|CHANINT_EN));
+	sDisCTSFlowCtl(cp);
+	sDisTxSoftFlowCtl(cp);
+	sClrTxXOFF(cp);
+	info->flags &= ~ROCKET_INITIALIZED;
+	
+	wake_up_interruptible(&info->open_wait);
+}
+
+/*
+ * The Rocketport write routines.  The Rocketport driver uses a
+ * double-buffering strategy, with the twist that if the in-memory CPU
+ * buffer is empty, and there's space in the transmit FIFO, the
+ * writing routines will write directly to transmit FIFO.
+ *
+ * This gets a little tricky, but I'm pretty sure I got it all right.
+ */
+static void rp_put_char(struct tty_struct *tty, unsigned char ch)
+{
+	struct r_port * info = (struct r_port *)tty->driver_data;
+	CHANNEL_t	*cp;
+
+	if (rocket_paranoia_check(info, tty->device, "rp_put_char"))
+		return;
+
+#ifdef ROCKET_DEBUG_WRITE
+	printk("rp_put_char %c...", ch);
+#endif
+	
+	cp = &info->channel;
+
+	if (!tty->stopped && !tty->hw_stopped && info->xmit_fifo_room == 0)
+		info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
+
+	if (tty->stopped || tty->hw_stopped ||
+	    info->xmit_fifo_room == 0 || info->xmit_cnt != 0) {
+		info->xmit_buf[info->xmit_head++] = ch;
+		info->xmit_head &= XMIT_BUF_SIZE-1;
+		info->xmit_cnt++;
+		xmit_flags[info->line >> 5] |= (1 << (info->line & 0x1f));
+	} else {
+		sOutB(sGetTxRxDataIO(cp), ch);
+		info->xmit_fifo_room--;
+	}
+}
+
+#if (LINUX_VERSION_CODE > 66304)
+static int rp_write(struct tty_struct * tty, int from_user,
+		    const unsigned char *buf, int count)
+#else
+static int rp_write(struct tty_struct * tty, int from_user,
+		    unsigned char *buf, int count)
+#endif	
+{
+	struct r_port * info = (struct r_port *)tty->driver_data;
+	CHANNEL_t	*cp;
+	const unsigned char	*b;
+	int		c, retval = 0;
+	unsigned long	flags;
+
+	if (count <= 0 || rocket_paranoia_check(info, tty->device, "rp_write"))
+		return 0;
+
+#ifdef ROCKET_DEBUG_WRITE
+	printk("rp_write %d chars...", count);
+#endif
+	cp = &info->channel;
+
+	if (!tty->stopped && !tty->hw_stopped && info->xmit_fifo_room == 0)
+		info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
+
+	if (!tty->stopped && !tty->hw_stopped && info->xmit_cnt == 0
+	    && info->xmit_fifo_room >= 0) {
+		c = MIN(count, info->xmit_fifo_room);
+		b = buf;
+		if (from_user) {
+			down(&tmp_buf_sem);
+			c -= copy_from_user(tmp_buf, buf, c);
+			b = tmp_buf;
+			up(&tmp_buf_sem);
+			/* In case we got pre-empted */
+			if (!c) {
+				retval = -EFAULT;
+				goto end;
+			}
+			if (info->tty == 0)
+				goto end;
+			c = MIN(c, info->xmit_fifo_room);
+		}
+		sOutStrW(sGetTxRxDataIO(cp), b, c/2);
+		if (c & 1)
+			sOutB(sGetTxRxDataIO(cp), b[c-1]);
+		retval += c;
+		buf += c;
+		count -= c;
+		info->xmit_fifo_room -= c;
+	}
+	if (!count)
+		goto end;
+	
+	save_flags(flags);
+	while (1) {
+		cli();
+		if (info->tty == 0) {
+			restore_flags(flags);
+			goto end;
+		}
+		c = MIN(count, MIN(XMIT_BUF_SIZE - info->xmit_cnt - 1,
+				   XMIT_BUF_SIZE - info->xmit_head));
+		if (c <= 0)
+			break;
+
+		b = buf;
+		if (from_user) {
+			down(&tmp_buf_sem);
+			c -= copy_from_user(tmp_buf, buf, c);
+			b = tmp_buf;
+			up(&tmp_buf_sem);
+			if (!c) {
+				if (retval == 0)
+					retval = -EFAULT;
+				goto end_intr;
+			}
+			/* In case we got pre-empted */
+			if (info->tty == 0)
+				goto end_intr;
+			c = MIN(c, MIN(XMIT_BUF_SIZE - info->xmit_cnt - 1,
+				       XMIT_BUF_SIZE - info->xmit_head));
+				
+		}
+		memcpy(info->xmit_buf + info->xmit_head, b, c);
+		info->xmit_head = (info->xmit_head + c) & (XMIT_BUF_SIZE-1);
+		info->xmit_cnt += c;
+		restore_flags(flags);
+		buf += c;
+		count -= c;
+		retval += c;
+	}
+end_intr:
+	if ((retval > 0) && !tty->stopped && !tty->hw_stopped)
+		xmit_flags[info->line >> 5] |= (1 << (info->line & 0x1f));
+	restore_flags(flags);
+end:
+	if (info->xmit_cnt < WAKEUP_CHARS) {
+		if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
+		    tty->ldisc.write_wakeup)
+			(tty->ldisc.write_wakeup)(tty);
+		wake_up_interruptible(&tty->write_wait);
+	}
+	return retval;
+}
+
+/*
+ * Return the number of characters that can be sent.  We estimate
+ * only using the in-memory transmit buffer only, and ignore the
+ * potential space in the transmit FIFO.
+ */
+static int rp_write_room(struct tty_struct *tty)
+{
+	struct r_port * info = (struct r_port *)tty->driver_data;
+	int	ret;
+
+	if (rocket_paranoia_check(info, tty->device, "rp_write_room"))
+		return 0;
+
+	ret = XMIT_BUF_SIZE - info->xmit_cnt - 1;
+	if (ret < 0)
+		ret = 0;
+#ifdef ROCKET_DEBUG_WRITE
+	printk("rp_write_room returns %d...", ret);
+#endif
+	return ret;
+}
+
+/*
+ * Return the number of characters in the buffer.  Again, this only
+ * counts those characters in the in-memory transmit buffer.
+ */
+static int rp_chars_in_buffer(struct tty_struct *tty)
+{
+	struct r_port * info = (struct r_port *)tty->driver_data;
+	CHANNEL_t	*cp;
+
+	if (rocket_paranoia_check(info, tty->device, "rp_chars_in_buffer"))
+		return 0;
+
+	cp = &info->channel;
+
+#ifdef ROCKET_DEBUG_WRITE
+	printk("rp_chars_in_buffer returns %d...", info->xmit_cnt);
+#endif
+	return info->xmit_cnt;
+}
+
+static void rp_flush_buffer(struct tty_struct *tty)
+{
+	struct r_port * info = (struct r_port *)tty->driver_data;
+	CHANNEL_t	*cp;
+
+	if (rocket_paranoia_check(info, tty->device, "rp_flush_buffer"))
+		return;
+
+	cli();
+	info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
+	sti();
+	wake_up_interruptible(&tty->write_wait);
+	if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
+	    tty->ldisc.write_wakeup)
+		(tty->ldisc.write_wakeup)(tty);
+	
+	cp = &info->channel;
+	
+	sFlushTxFIFO(cp);
+}
+
+#ifdef ENABLE_PCI
+__initfunc(int register_PCI(int i, char bus, char device_fn))
+{
+	int	num_aiops, aiop, max_num_aiops, num_chan, chan;
+	unsigned int	aiopio[MAX_AIOPS_PER_BOARD];
+	char *str;
+	CONTROLLER_t	*ctlp;
+	unsigned short	vendor_id, device_id;
+	int	ret, error;
+	unsigned int port;
+
+	error = pcibios_read_config_word(bus, device_fn, PCI_VENDOR_ID,
+		&vendor_id);
+	ret = pcibios_read_config_word(bus, device_fn, PCI_DEVICE_ID,
+		&device_id);
+	if (error == 0)
+		error = ret;
+	ret = pcibios_read_config_dword(bus, device_fn, PCI_BASE_ADDRESS_0,
+		&port);
+	rcktpt_io_addr[i] = (unsigned long) port;
+	if (error == 0)
+		error = ret;
+
+	if (error) {
+		printk("PCI RocketPort error: %s not initializing due to error"
+		       "reading configuration space\n",
+		       pcibios_strerror(error));
+		return(0);
+	}
+
+	--rcktpt_io_addr[i];
+	switch(device_id) {
+	case PCI_DEVICE_ID_RP4QUAD:
+		str = "Quadcable";
+		max_num_aiops = 1;
+		break;
+	case PCI_DEVICE_ID_RP8OCTA:
+		str = "Octacable";
+		max_num_aiops = 1;
+		break;
+	case PCI_DEVICE_ID_RP8INTF:
+		str = "8";
+		max_num_aiops = 1;
+		break;
+	case PCI_DEVICE_ID_RP8J:
+		str = "8J";
+		max_num_aiops = 1;
+		break;
+	case PCI_DEVICE_ID_RP16INTF:
+		str = "16";
+		max_num_aiops = 2;
+		break;
+	case PCI_DEVICE_ID_RP32INTF:
+		str = "32";
+		max_num_aiops = 4;
+		break;
+	default:
+		str = "(unknown/unsupported)";
+		max_num_aiops = 0;
+		break;
+	}
+	for(aiop=0;aiop < max_num_aiops;aiop++)
+		aiopio[aiop] = rcktpt_io_addr[i] + (aiop * 0x40);
+	ctlp = sCtlNumToCtlPtr(i);
+	num_aiops = sPCIInitController(ctlp, i,
+					aiopio, max_num_aiops, 0,
+					FREQ_DIS, 0);
+	printk("Rocketport controller #%d found at %d:%d, "
+	       "%d AIOP(s) (PCI Rocketport %s)\n", i, bus, device_fn,
+	       num_aiops, str);
+	if(num_aiops <= 0) {
+		rcktpt_io_addr[i] = 0;
+		return(0);
+	}
+	for(aiop = 0;aiop < num_aiops; aiop++) {
+		sResetAiopByNum(ctlp, aiop);
+		sEnAiop(ctlp, aiop);
+		num_chan = sGetAiopNumChan(ctlp, aiop);
+		for(chan=0;chan < num_chan; chan++)
+			init_r_port(i, aiop, chan);
+	}
+	return(1);
+}
+
+__initfunc(static int init_PCI(int boards_found))
+{
+	unsigned char	bus, device_fn;
+	int	i, count = 0;
+
+	for(i=0; i < (NUM_BOARDS - boards_found); i++) {
+		if(!pcibios_find_device(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP8OCTA,
+			i, &bus, &device_fn)) 
+			if(register_PCI(count+boards_found, bus, device_fn))
+				count++;
+		if(!pcibios_find_device(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP8INTF,
+			i, &bus, &device_fn)) 
+			if(register_PCI(count+boards_found, bus, device_fn))
+				count++;
+		if(!pcibios_find_device(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP16INTF,
+			i, &bus, &device_fn)) 
+			if(register_PCI(count+boards_found, bus, device_fn))
+				count++;
+		if(!pcibios_find_device(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP32INTF,
+			i, &bus, &device_fn)) 
+			if(register_PCI(count+boards_found, bus, device_fn))
+				count++;
+	}
+	return(count);
+}
+#endif
+
+__initfunc(static int init_ISA(int i, int *reserved_controller))
+{
+	int	num_aiops, num_chan;
+	int	aiop, chan;
+	unsigned int	aiopio[MAX_AIOPS_PER_BOARD];	
+	CONTROLLER_t	*ctlp;
+
+	if (rcktpt_io_addr[i] == 0)
+		return(0);
+
+	if (check_region(rcktpt_io_addr[i],64)) {
+		printk("RocketPort board address 0x%lx in use...\n",
+			rcktpt_io_addr[i]);
+		rcktpt_io_addr[i] = 0;
+		return(0);
+	}
+	
+	for (aiop=0; aiop<MAX_AIOPS_PER_BOARD; aiop++)
+		aiopio[aiop]= rcktpt_io_addr[i] + (aiop * 0x400);
+	ctlp= sCtlNumToCtlPtr(i);
+	num_aiops = sInitController(ctlp, i, controller + (i*0x400),
+				    aiopio, MAX_AIOPS_PER_BOARD, 0,
+				    FREQ_DIS, 0);
+	if (num_aiops <= 0) {
+		rcktpt_io_addr[i] = 0;
+		return(0);
+	}
+	for (aiop = 0; aiop < num_aiops; aiop++) {
+		sResetAiopByNum(ctlp, aiop);
+		sEnAiop(ctlp, aiop);
+		num_chan = sGetAiopNumChan(ctlp,aiop);
+		for (chan=0; chan < num_chan; chan++)
+			init_r_port(i, aiop, chan);
+	}
+	printk("Rocketport controller #%d found at 0x%lx, "
+	       "%d AIOPs\n", i, rcktpt_io_addr[i],
+	       num_aiops);
+	if (rcktpt_io_addr[i] + 0x40 == controller) {
+		*reserved_controller = 1;
+		request_region(rcktpt_io_addr[i], 68,
+				       "Comtrol Rocketport");
+	} else {
+		request_region(rcktpt_io_addr[i], 64,
+			       "Comtrol Rocketport");
+	}
+	return(1);
+}
+
+
+/*
+ * The module "startup" routine; it's run when the module is loaded.
+ */
+__initfunc(int rp_init(void))
+{
+	int i, retval, pci_boards_found, isa_boards_found;
+	int	reserved_controller = 0;
+
+	printk("Rocketport device driver module, version %s, %s\n",
+	       ROCKET_VERSION, ROCKET_DATE);
+
+	/*
+	 * Set up the timer channel.  If it is already in use by
+	 * some other driver, give up.
+	 */
+	if (timer_table[COMTROL_TIMER].fn) {
+		printk("rocket.o: Timer channel %d already in use!\n",
+		       COMTROL_TIMER);
+		return -EBUSY;
+	}
+	timer_table[COMTROL_TIMER].fn = rp_do_poll;
+	timer_table[COMTROL_TIMER].expires = 0;
+	
+	/*
+	 * Initialize the array of pointers to our own internal state
+	 * structures.
+	 */
+	memset(rp_table, 0, sizeof(rp_table));
+	memset(xmit_flags, 0, sizeof(xmit_flags));
+
+	if (board1 == 0)
+		board1 = 0x180;
+	if (controller == 0)
+		controller = board1 + 0x40;
+
+	if (check_region(controller, 4)) {
+		printk("Controller IO addresses in use, unloading driver.\n");
+		return -EBUSY;
+	}
+	
+	rcktpt_io_addr[0] = board1;
+	rcktpt_io_addr[1] = board2;
+	rcktpt_io_addr[2] = board3;
+	rcktpt_io_addr[3] = board4;
+
+	/*
+	 * If support_low_speed is set, use the slow clock prescale,
+	 * which supports 50 bps
+	 */
+	if (support_low_speed) {
+		sClockPrescale = 0x19;	/* mod 9 (divide by 10) prescale */
+		rp_baud_base = 230400;
+	} else {
+		sClockPrescale = 0x14; /* mod 4 (devide by 5) prescale */
+		rp_baud_base = 460800;
+	}
+	
+	/*
+	 * OK, let's probe each of the controllers looking for boards.
+	 */
+	isa_boards_found = 0;
+	pci_boards_found = 0;
+	for (i=0; i < NUM_BOARDS; i++) {
+		if(init_ISA(i, &reserved_controller))
+			isa_boards_found++;
+	}
+#ifdef ENABLE_PCI
+	if (pcibios_present()) {
+		if(isa_boards_found < NUM_BOARDS)
+			pci_boards_found = init_PCI(isa_boards_found);
+	} else {
+		printk("No PCI BIOS found\n");
+	}
+#endif
+	max_board = pci_boards_found + isa_boards_found;
+	
+	if (max_board == 0) {
+		printk("No rocketport ports found; unloading driver.\n");
+		timer_table[COMTROL_TIMER].fn = 0;
+		return -ENODEV;
+	}
+
+	if (reserved_controller == 0)
+		request_region(controller, 4, "Comtrol Rocketport");
+
+	/*
+	 * Set up the tty driver structure and then register this
+	 * driver with the tty layer.
+	 */
+	memset(&rocket_driver, 0, sizeof(struct tty_driver));
+	rocket_driver.magic = TTY_DRIVER_MAGIC;
+	rocket_driver.name = "ttyR";
+	rocket_driver.major = TTY_ROCKET_MAJOR;
+	rocket_driver.minor_start = 0;
+	rocket_driver.num = MAX_RP_PORTS;
+	rocket_driver.type = TTY_DRIVER_TYPE_SERIAL;
+	rocket_driver.subtype = SERIAL_TYPE_NORMAL;
+	rocket_driver.init_termios = tty_std_termios;
+	rocket_driver.init_termios.c_cflag =
+		B9600 | CS8 | CREAD | HUPCL | CLOCAL;
+	rocket_driver.flags = TTY_DRIVER_REAL_RAW;
+	rocket_driver.refcount = &rocket_refcount;
+	rocket_driver.table = rocket_table;
+	rocket_driver.termios = rocket_termios;
+	rocket_driver.termios_locked = rocket_termios_locked;
+
+	rocket_driver.open = rp_open;
+	rocket_driver.close = rp_close;
+	rocket_driver.write = rp_write;
+	rocket_driver.put_char = rp_put_char;
+	rocket_driver.write_room = rp_write_room;
+	rocket_driver.chars_in_buffer = rp_chars_in_buffer;
+	rocket_driver.flush_buffer = rp_flush_buffer;
+	rocket_driver.ioctl = rp_ioctl;
+	rocket_driver.throttle = rp_throttle;
+	rocket_driver.unthrottle = rp_unthrottle;
+	rocket_driver.set_termios = rp_set_termios;
+	rocket_driver.stop = rp_stop;
+	rocket_driver.start = rp_start;
+	rocket_driver.hangup = rp_hangup;
+#if (LINUX_VERSION_CODE >= 131343)
+	rocket_driver.send_xchar = rp_send_xchar;
+	rocket_driver.wait_until_sent = rp_wait_until_sent;
+#endif
+
+	/*
+	 * The callout device is just like normal device except for
+	 * the minor number and the subtype code.
+	 */
+	callout_driver = rocket_driver;
+	callout_driver.name = "cur";
+	callout_driver.major = CUA_ROCKET_MAJOR;
+	callout_driver.minor_start = 0;
+	callout_driver.subtype = SERIAL_TYPE_CALLOUT;
+	
+	retval = tty_register_driver(&callout_driver);
+	if (retval < 0) {
+		printk("Couldn't install Rocketport callout driver "
+		       "(error %d)\n", -retval);
+		return -1;
+	}
+
+	retval = tty_register_driver(&rocket_driver);
+	if (retval < 0) {
+		printk("Couldn't install tty Rocketport driver "
+		       "(error %d)\n", -retval);
+		return -1;
+	}
+#ifdef ROCKET_DEBUG_OPEN
+	printk("Rocketport driver is major %d, callout is %d\n",
+	       rocket_driver.major, callout_driver.major);
+#endif
+
+	return 0;
+}
+
+#ifdef MODULE
+int init_module(void)
+{
+	return rp_init();
+}
+
+void
+cleanup_module( void) {
+	int	retval;
+	int	i;
+	int	released_controller = 0;
+	
+	retval = tty_unregister_driver(&callout_driver);
+	if (retval) {
+		printk("Error %d while trying to unregister "
+		       "rocketport callout driver\n", -retval);
+	}
+	retval = tty_unregister_driver(&rocket_driver);
+	if (retval) {
+		printk("Error %d while trying to unregister "
+		       "rocketport driver\n", -retval);
+	}
+	for (i = 0; i < MAX_RP_PORTS; i++) {
+		if (rp_table[i])
+			kfree(rp_table[i]);
+	}
+	for (i=0; i < NUM_BOARDS; i++) {
+		if (rcktpt_io_addr[i] <= 0)
+			continue;
+		if (rcktpt_io_addr[i] + 0x40 == controller) {
+			released_controller++;
+			release_region(rcktpt_io_addr[i], 68);
+		} else
+			release_region(rcktpt_io_addr[i], 64);
+		if (released_controller == 0)
+			release_region(controller, 4);
+	}
+	if (tmp_buf)
+		free_page((unsigned long) tmp_buf);
+	timer_table[COMTROL_TIMER].fn = 0;
+}
+#endif
+
+/***********************************************************************
+		Copyright 1994 Comtrol Corporation.
+			All Rights Reserved.
+
+The following source code is subject to Comtrol Corporation's
+Developer's License Agreement.
+
+This source code is protected by United States copyright law and 
+international copyright treaties.
+
+This source code may only be used to develop software products that
+will operate with Comtrol brand hardware.
+
+You may not reproduce nor distribute this source code in its original
+form but must produce a derivative work which includes portions of
+this source code only.
+
+The portions of this source code which you use in your derivative
+work must bear Comtrol's copyright notice:
+
+		Copyright 1994 Comtrol Corporation.
+
+***********************************************************************/
+
+#ifndef TRUE
+#define TRUE 1
+#endif
+
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+static Byte_t RData[RDATASIZE] =
+{
+   0x00, 0x09, 0xf6, 0x82,
+   0x02, 0x09, 0x86, 0xfb,
+   0x04, 0x09, 0x00, 0x0a,
+   0x06, 0x09, 0x01, 0x0a,
+   0x08, 0x09, 0x8a, 0x13,
+   0x0a, 0x09, 0xc5, 0x11,
+   0x0c, 0x09, 0x86, 0x85,
+   0x0e, 0x09, 0x20, 0x0a,
+   0x10, 0x09, 0x21, 0x0a,
+   0x12, 0x09, 0x41, 0xff,
+   0x14, 0x09, 0x82, 0x00,
+   0x16, 0x09, 0x82, 0x7b,
+   0x18, 0x09, 0x8a, 0x7d,
+   0x1a, 0x09, 0x88, 0x81,
+   0x1c, 0x09, 0x86, 0x7a,
+   0x1e, 0x09, 0x84, 0x81,
+   0x20, 0x09, 0x82, 0x7c,
+   0x22, 0x09, 0x0a, 0x0a 
+};
+
+static Byte_t RRegData[RREGDATASIZE]=
+{
+   0x00, 0x09, 0xf6, 0x82,             /* 00: Stop Rx processor */
+   0x08, 0x09, 0x8a, 0x13,             /* 04: Tx software flow control */
+   0x0a, 0x09, 0xc5, 0x11,             /* 08: XON char */
+   0x0c, 0x09, 0x86, 0x85,             /* 0c: XANY */
+   0x12, 0x09, 0x41, 0xff,             /* 10: Rx mask char */
+   0x14, 0x09, 0x82, 0x00,             /* 14: Compare/Ignore #0 */
+   0x16, 0x09, 0x82, 0x7b,             /* 18: Compare #1 */
+   0x18, 0x09, 0x8a, 0x7d,             /* 1c: Compare #2 */
+   0x1a, 0x09, 0x88, 0x81,             /* 20: Interrupt #1 */
+   0x1c, 0x09, 0x86, 0x7a,             /* 24: Ignore/Replace #1 */
+   0x1e, 0x09, 0x84, 0x81,             /* 28: Interrupt #2 */
+   0x20, 0x09, 0x82, 0x7c,             /* 2c: Ignore/Replace #2 */
+   0x22, 0x09, 0x0a, 0x0a              /* 30: Rx FIFO Enable */
+};
+
+CONTROLLER_T sController[CTL_SIZE] =
+{
+   {-1,-1,0,0,0,0,0,0,0,0,0,{0,0,0,0},{0,0,0,0},{-1,-1,-1,-1},{0,0,0,0}},
+   {-1,-1,0,0,0,0,0,0,0,0,0,{0,0,0,0},{0,0,0,0},{-1,-1,-1,-1},{0,0,0,0}},
+   {-1,-1,0,0,0,0,0,0,0,0,0,{0,0,0,0},{0,0,0,0},{-1,-1,-1,-1},{0,0,0,0}},
+   {-1,-1,0,0,0,0,0,0,0,0,0,{0,0,0,0},{0,0,0,0},{-1,-1,-1,-1},{0,0,0,0}}
+};
+
+#if 0
+/* IRQ number to MUDBAC register 2 mapping */
+Byte_t sIRQMap[16] =
+{
+   0,0,0,0x10,0x20,0x30,0,0,0,0x40,0x50,0x60,0x70,0,0,0x80
+};
+#endif
+
+Byte_t sBitMapClrTbl[8] =
+{
+   0xfe,0xfd,0xfb,0xf7,0xef,0xdf,0xbf,0x7f
+};
+
+Byte_t sBitMapSetTbl[8] =
+{
+   0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80
+};
+
+int sClockPrescale = 0x14;
+
+/***************************************************************************
+Function: sInitController
+Purpose:  Initialization of controller global registers and controller
+          structure.
+Call:     sInitController(CtlP,CtlNum,MudbacIO,AiopIOList,AiopIOListSize,
+                          IRQNum,Frequency,PeriodicOnly)
+          CONTROLLER_T *CtlP; Ptr to controller structure
+          int CtlNum; Controller number
+          ByteIO_t MudbacIO; Mudbac base I/O address.
+          ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
+             This list must be in the order the AIOPs will be found on the
+             controller.  Once an AIOP in the list is not found, it is
+             assumed that there are no more AIOPs on the controller.
+          int AiopIOListSize; Number of addresses in AiopIOList
+          int IRQNum; Interrupt Request number.  Can be any of the following:
+                         0: Disable global interrupts
+                         3: IRQ 3
+                         4: IRQ 4
+                         5: IRQ 5
+                         9: IRQ 9
+                         10: IRQ 10
+                         11: IRQ 11
+                         12: IRQ 12
+                         15: IRQ 15
+          Byte_t Frequency: A flag identifying the frequency
+                   of the periodic interrupt, can be any one of the following:
+                      FREQ_DIS - periodic interrupt disabled
+                      FREQ_137HZ - 137 Hertz
+                      FREQ_69HZ - 69 Hertz
+                      FREQ_34HZ - 34 Hertz
+                      FREQ_17HZ - 17 Hertz
+                      FREQ_9HZ - 9 Hertz
+                      FREQ_4HZ - 4 Hertz
+                   If IRQNum is set to 0 the Frequency parameter is
+                   overidden, it is forced to a value of FREQ_DIS.
+          int PeriodicOnly: TRUE if all interrupts except the periodic
+                               interrupt are to be blocked.
+                            FALSE is both the periodic interrupt and
+                               other channel interrupts are allowed.
+                            If IRQNum is set to 0 the PeriodicOnly parameter is
+                               overidden, it is forced to a value of FALSE.
+Return:   int: Number of AIOPs on the controller, or CTLID_NULL if controller
+               initialization failed.
+
+Comments:
+          If periodic interrupts are to be disabled but AIOP interrupts
+          are allowed, set Frequency to FREQ_DIS and PeriodicOnly to FALSE.
+
+          If interrupts are to be completely disabled set IRQNum to 0.
+
+          Setting Frequency to FREQ_DIS and PeriodicOnly to TRUE is an
+          invalid combination.
+
+          This function performs initialization of global interrupt modes,
+          but it does not actually enable global interrupts.  To enable
+          and disable global interrupts use functions sEnGlobalInt() and
+          sDisGlobalInt().  Enabling of global interrupts is normally not
+          done until all other initializations are complete.
+
+          Even if interrupts are globally enabled, they must also be
+          individually enabled for each channel that is to generate
+          interrupts.
+
+Warnings: No range checking on any of the parameters is done.
+
+          No context switches are allowed while executing this function.
+
+          After this function all AIOPs on the controller are disabled,
+          they can be enabled with sEnAiop().
+*/
+int sInitController(	CONTROLLER_T *CtlP,
+			int CtlNum,
+			ByteIO_t MudbacIO,
+			ByteIO_t *AiopIOList,
+			int AiopIOListSize,
+			int IRQNum,
+			Byte_t Frequency,
+			int PeriodicOnly)
+{
+	int		i;
+	ByteIO_t	io;
+
+   CtlP->CtlNum = CtlNum;
+   CtlP->CtlID = CTLID_0001;        /* controller release 1 */
+   CtlP->BusType = isISA;     
+   CtlP->MBaseIO = MudbacIO;
+   CtlP->MReg1IO = MudbacIO + 1;
+   CtlP->MReg2IO = MudbacIO + 2;
+   CtlP->MReg3IO = MudbacIO + 3;
+#if 1
+   CtlP->MReg2 = 0;                 /* interrupt disable */
+   CtlP->MReg3 = 0;                 /* no periodic interrupts */
+#else
+   if(sIRQMap[IRQNum] == 0)            /* interrupts globally disabled */
+   {
+      CtlP->MReg2 = 0;                 /* interrupt disable */
+      CtlP->MReg3 = 0;                 /* no periodic interrupts */
+   }
+   else
+   {
+      CtlP->MReg2 = sIRQMap[IRQNum];   /* set IRQ number */
+      CtlP->MReg3 = Frequency;         /* set frequency */
+      if(PeriodicOnly)                 /* periodic interrupt only */
+      {
+         CtlP->MReg3 |= PERIODIC_ONLY;
+      }
+   }
+#endif
+   sOutB(CtlP->MReg2IO,CtlP->MReg2);
+   sOutB(CtlP->MReg3IO,CtlP->MReg3);
+   sControllerEOI(CtlP);               /* clear EOI if warm init */
+   /* Init AIOPs */
+   CtlP->NumAiop = 0;
+   for(i=0; i < AiopIOListSize; i++)
+   {
+      io = AiopIOList[i];
+      CtlP->AiopIO[i] = (WordIO_t)io;
+      CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
+      sOutB(CtlP->MReg2IO,CtlP->MReg2 | (i & 0x03)); /* AIOP index */
+      sOutB(MudbacIO,(Byte_t)(io >> 6));	/* set up AIOP I/O in MUDBAC */
+      sEnAiop(CtlP,i);                         /* enable the AIOP */
+
+      CtlP->AiopID[i] = sReadAiopID(io);       /* read AIOP ID */
+      if(CtlP->AiopID[i] == AIOPID_NULL)       /* if AIOP does not exist */
+      {
+         sDisAiop(CtlP,i);                     /* disable AIOP */
+         break;                                /* done looking for AIOPs */
+      }
+
+      CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t)io); /* num channels in AIOP */
+      sOutW((WordIO_t)io + _INDX_ADDR,_CLK_PRE);      /* clock prescaler */
+      sOutB(io + _INDX_DATA,sClockPrescale);
+      CtlP->NumAiop++;                         /* bump count of AIOPs */
+      sDisAiop(CtlP,i);                        /* disable AIOP */
+   }
+
+   if(CtlP->NumAiop == 0)
+      return(-1);
+   else
+      return(CtlP->NumAiop);
+}
+
+/***************************************************************************
+Function: sPCIInitController
+Purpose:  Initialization of controller global registers and controller
+          structure.
+Call:     sPCIInitController(CtlP,CtlNum,AiopIOList,AiopIOListSize,
+                          IRQNum,Frequency,PeriodicOnly)
+          CONTROLLER_T *CtlP; Ptr to controller structure
+          int CtlNum; Controller number
+          ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
+             This list must be in the order the AIOPs will be found on the
+             controller.  Once an AIOP in the list is not found, it is
+             assumed that there are no more AIOPs on the controller.
+          int AiopIOListSize; Number of addresses in AiopIOList
+          int IRQNum; Interrupt Request number.  Can be any of the following:
+                         0: Disable global interrupts
+                         3: IRQ 3
+                         4: IRQ 4
+                         5: IRQ 5
+                         9: IRQ 9
+                         10: IRQ 10
+                         11: IRQ 11
+                         12: IRQ 12
+                         15: IRQ 15
+          Byte_t Frequency: A flag identifying the frequency
+                   of the periodic interrupt, can be any one of the following:
+                      FREQ_DIS - periodic interrupt disabled
+                      FREQ_137HZ - 137 Hertz
+                      FREQ_69HZ - 69 Hertz
+                      FREQ_34HZ - 34 Hertz
+                      FREQ_17HZ - 17 Hertz
+                      FREQ_9HZ - 9 Hertz
+                      FREQ_4HZ - 4 Hertz
+                   If IRQNum is set to 0 the Frequency parameter is
+                   overidden, it is forced to a value of FREQ_DIS.
+          int PeriodicOnly: TRUE if all interrupts except the periodic
+                               interrupt are to be blocked.
+                            FALSE is both the periodic interrupt and
+                               other channel interrupts are allowed.
+                            If IRQNum is set to 0 the PeriodicOnly parameter is
+                               overidden, it is forced to a value of FALSE.
+Return:   int: Number of AIOPs on the controller, or CTLID_NULL if controller
+               initialization failed.
+
+Comments:
+          If periodic interrupts are to be disabled but AIOP interrupts
+          are allowed, set Frequency to FREQ_DIS and PeriodicOnly to FALSE.
+
+          If interrupts are to be completely disabled set IRQNum to 0.
+
+          Setting Frequency to FREQ_DIS and PeriodicOnly to TRUE is an
+          invalid combination.
+
+          This function performs initialization of global interrupt modes,
+          but it does not actually enable global interrupts.  To enable
+          and disable global interrupts use functions sEnGlobalInt() and
+          sDisGlobalInt().  Enabling of global interrupts is normally not
+          done until all other initializations are complete.
+
+          Even if interrupts are globally enabled, they must also be
+          individually enabled for each channel that is to generate
+          interrupts.
+
+Warnings: No range checking on any of the parameters is done.
+
+          No context switches are allowed while executing this function.
+
+          After this function all AIOPs on the controller are disabled,
+          they can be enabled with sEnAiop().
+*/
+int sPCIInitController(	CONTROLLER_T *CtlP,
+			int CtlNum,
+			ByteIO_t *AiopIOList,
+			int AiopIOListSize,
+			int IRQNum,
+			Byte_t Frequency,
+			int PeriodicOnly)
+{
+	int		i;
+	ByteIO_t	io;
+
+   CtlP->CtlNum = CtlNum;
+   CtlP->CtlID = CTLID_0001;        /* controller release 1 */
+   CtlP->BusType = isPCI;        /* controller release 1 */
+
+   CtlP->PCIIO = (WordIO_t)((ByteIO_t)AiopIOList[0] + _PCI_INT_FUNC);
+
+   sPCIControllerEOI(CtlP);               /* clear EOI if warm init */
+   /* Init AIOPs */
+   CtlP->NumAiop = 0;
+   for(i=0; i < AiopIOListSize; i++)
+   {
+      io = AiopIOList[i];
+      CtlP->AiopIO[i] = (WordIO_t)io;
+      CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
+
+      CtlP->AiopID[i] = sReadAiopID(io);       /* read AIOP ID */
+      if(CtlP->AiopID[i] == AIOPID_NULL)       /* if AIOP does not exist */
+         break;                                /* done looking for AIOPs */
+
+      CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t)io); /* num channels in AIOP */
+      sOutW((WordIO_t)io + _INDX_ADDR,_CLK_PRE);      /* clock prescaler */
+      sOutB(io + _INDX_DATA,sClockPrescale);
+      CtlP->NumAiop++;                         /* bump count of AIOPs */
+   }
+
+   if(CtlP->NumAiop == 0)
+      return(-1);
+   else
+      return(CtlP->NumAiop);
+}
+
+/***************************************************************************
+Function: sReadAiopID
+Purpose:  Read the AIOP idenfication number directly from an AIOP.
+Call:     sReadAiopID(io)
+          ByteIO_t io: AIOP base I/O address
+Return:   int: Flag AIOPID_XXXX if a valid AIOP is found, where X
+                 is replace by an identifying number.
+          Flag AIOPID_NULL if no valid AIOP is found
+Warnings: No context switches are allowed while executing this function.
+
+*/
+int sReadAiopID(ByteIO_t io)
+{
+   Byte_t AiopID;               /* ID byte from AIOP */
+
+   sOutB(io + _CMD_REG,RESET_ALL);     /* reset AIOP */
+   sOutB(io + _CMD_REG,0x0);
+   AiopID = sInB(io + _CHN_STAT0) & 0x07;
+   if(AiopID == 0x06)
+      return(1);
+   else                                /* AIOP does not exist */
+      return(-1);
+}
+
+/***************************************************************************
+Function: sReadAiopNumChan
+Purpose:  Read the number of channels available in an AIOP directly from
+          an AIOP.
+Call:     sReadAiopNumChan(io)
+          WordIO_t io: AIOP base I/O address
+Return:   int: The number of channels available
+Comments: The number of channels is determined by write/reads from identical
+          offsets within the SRAM address spaces for channels 0 and 4.
+          If the channel 4 space is mirrored to channel 0 it is a 4 channel
+          AIOP, otherwise it is an 8 channel.
+Warnings: No context switches are allowed while executing this function.
+*/
+int sReadAiopNumChan(WordIO_t io)
+{
+   Word_t x;
+
+   sOutDW((DWordIO_t)io + _INDX_ADDR,0x12340000L); /* write to chan 0 SRAM */
+   sOutW(io + _INDX_ADDR,0);       /* read from SRAM, chan 0 */
+   x = sInW(io + _INDX_DATA);
+   sOutW(io + _INDX_ADDR,0x4000);  /* read from SRAM, chan 4 */
+   if(x != sInW(io + _INDX_DATA))  /* if different must be 8 chan */
+      return(8);
+   else
+      return(4);
+}
+
+/***************************************************************************
+Function: sInitChan
+Purpose:  Initialization of a channel and channel structure
+Call:     sInitChan(CtlP,ChP,AiopNum,ChanNum)
+          CONTROLLER_T *CtlP; Ptr to controller structure
+          CHANNEL_T *ChP; Ptr to channel structure
+          int AiopNum; AIOP number within controller
+          int ChanNum; Channel number within AIOP
+Return:   int: TRUE if initialization succeeded, FALSE if it fails because channel
+               number exceeds number of channels available in AIOP.
+Comments: This function must be called before a channel can be used.
+Warnings: No range checking on any of the parameters is done.
+
+          No context switches are allowed while executing this function.
+*/
+int sInitChan(	CONTROLLER_T *CtlP,
+		CHANNEL_T *ChP,
+		int AiopNum,
+		int ChanNum)
+{
+   int i;
+   WordIO_t AiopIO;
+   WordIO_t ChIOOff;
+   Byte_t *ChR;
+   Word_t ChOff;
+   static Byte_t R[4];
+   int brd9600;
+
+   if(ChanNum >= CtlP->AiopNumChan[AiopNum])
+      return(FALSE);                   /* exceeds num chans in AIOP */
+
+   /* Channel, AIOP, and controller identifiers */
+   ChP->CtlP = CtlP;
+   ChP->ChanID = CtlP->AiopID[AiopNum];
+   ChP->AiopNum = AiopNum;
+   ChP->ChanNum = ChanNum;
+
+   /* Global direct addresses */
+   AiopIO = CtlP->AiopIO[AiopNum];
+   ChP->Cmd = (ByteIO_t)AiopIO + _CMD_REG;
+   ChP->IntChan = (ByteIO_t)AiopIO + _INT_CHAN;
+   ChP->IntMask = (ByteIO_t)AiopIO + _INT_MASK;
+   ChP->IndexAddr = (DWordIO_t)AiopIO + _INDX_ADDR;
+   ChP->IndexData = AiopIO + _INDX_DATA;
+
+   /* Channel direct addresses */
+   ChIOOff = AiopIO + ChP->ChanNum * 2;
+   ChP->TxRxData = ChIOOff + _TD0;
+   ChP->ChanStat = ChIOOff + _CHN_STAT0;
+   ChP->TxRxCount = ChIOOff + _FIFO_CNT0;
+   ChP->IntID = (ByteIO_t)AiopIO + ChP->ChanNum + _INT_ID0;
+
+   /* Initialize the channel from the RData array */
+   for(i=0; i < RDATASIZE; i+=4)
+   {
+      R[0] = RData[i];
+      R[1] = RData[i+1] + 0x10 * ChanNum;
+      R[2] = RData[i+2];
+      R[3] = RData[i+3];
+      sOutDW(ChP->IndexAddr,*((DWord_t *)&R[0]));
+   }
+
+   ChR = ChP->R;
+   for(i=0; i < RREGDATASIZE; i+=4)
+   {
+      ChR[i] = RRegData[i];
+      ChR[i+1] = RRegData[i+1] + 0x10 * ChanNum;
+      ChR[i+2] = RRegData[i+2];
+      ChR[i+3] = RRegData[i+3];
+   }
+
+   /* Indexed registers */
+   ChOff = (Word_t)ChanNum * 0x1000;
+
+   if (sClockPrescale == 0x14)
+	   brd9600 = 47;
+   else
+	   brd9600 = 23;
+
+   ChP->BaudDiv[0] = (Byte_t)(ChOff + _BAUD);
+   ChP->BaudDiv[1] = (Byte_t)((ChOff + _BAUD) >> 8);
+   ChP->BaudDiv[2] = (Byte_t)brd9600;
+   ChP->BaudDiv[3] = (Byte_t)(brd9600 >> 8);
+   sOutDW(ChP->IndexAddr,*(DWord_t *)&ChP->BaudDiv[0]);
+
+   ChP->TxControl[0] = (Byte_t)(ChOff + _TX_CTRL);
+   ChP->TxControl[1] = (Byte_t)((ChOff + _TX_CTRL) >> 8);
+   ChP->TxControl[2] = 0;
+   ChP->TxControl[3] = 0;
+   sOutDW(ChP->IndexAddr,*(DWord_t *)&ChP->TxControl[0]);
+
+   ChP->RxControl[0] = (Byte_t)(ChOff + _RX_CTRL);
+   ChP->RxControl[1] = (Byte_t)((ChOff + _RX_CTRL) >> 8);
+   ChP->RxControl[2] = 0;
+   ChP->RxControl[3] = 0;
+   sOutDW(ChP->IndexAddr,*(DWord_t *)&ChP->RxControl[0]);
+
+   ChP->TxEnables[0] = (Byte_t)(ChOff + _TX_ENBLS);
+   ChP->TxEnables[1] = (Byte_t)((ChOff + _TX_ENBLS) >> 8);
+   ChP->TxEnables[2] = 0;
+   ChP->TxEnables[3] = 0;
+   sOutDW(ChP->IndexAddr,*(DWord_t *)&ChP->TxEnables[0]);
+
+   ChP->TxCompare[0] = (Byte_t)(ChOff + _TXCMP1);
+   ChP->TxCompare[1] = (Byte_t)((ChOff + _TXCMP1) >> 8);
+   ChP->TxCompare[2] = 0;
+   ChP->TxCompare[3] = 0;
+   sOutDW(ChP->IndexAddr,*(DWord_t *)&ChP->TxCompare[0]);
+
+   ChP->TxReplace1[0] = (Byte_t)(ChOff + _TXREP1B1);
+   ChP->TxReplace1[1] = (Byte_t)((ChOff + _TXREP1B1) >> 8);
+   ChP->TxReplace1[2] = 0;
+   ChP->TxReplace1[3] = 0;
+   sOutDW(ChP->IndexAddr,*(DWord_t *)&ChP->TxReplace1[0]);
+
+   ChP->TxReplace2[0] = (Byte_t)(ChOff + _TXREP2);
+   ChP->TxReplace2[1] = (Byte_t)((ChOff + _TXREP2) >> 8);
+   ChP->TxReplace2[2] = 0;
+   ChP->TxReplace2[3] = 0;
+   sOutDW(ChP->IndexAddr,*(DWord_t *)&ChP->TxReplace2[0]);
+
+   ChP->TxFIFOPtrs = ChOff + _TXF_OUTP;
+   ChP->TxFIFO = ChOff + _TX_FIFO;
+
+   sOutB(ChP->Cmd,(Byte_t)ChanNum | RESTXFCNT); /* apply reset Tx FIFO count */
+   sOutB(ChP->Cmd,(Byte_t)ChanNum);  /* remove reset Tx FIFO count */
+   sOutW((WordIO_t)ChP->IndexAddr,ChP->TxFIFOPtrs); /* clear Tx in/out ptrs */
+   sOutW(ChP->IndexData,0);
+   ChP->RxFIFOPtrs = ChOff + _RXF_OUTP;
+   ChP->RxFIFO = ChOff + _RX_FIFO;
+
+   sOutB(ChP->Cmd,(Byte_t)ChanNum | RESRXFCNT); /* apply reset Rx FIFO count */
+   sOutB(ChP->Cmd,(Byte_t)ChanNum);  /* remove reset Rx FIFO count */
+   sOutW((WordIO_t)ChP->IndexAddr,ChP->RxFIFOPtrs); /* clear Rx out ptr */
+   sOutW(ChP->IndexData,0);
+   sOutW((WordIO_t)ChP->IndexAddr,ChP->RxFIFOPtrs + 2); /* clear Rx in ptr */
+   sOutW(ChP->IndexData,0);
+   ChP->TxPrioCnt = ChOff + _TXP_CNT;
+   sOutW((WordIO_t)ChP->IndexAddr,ChP->TxPrioCnt);
+   sOutB(ChP->IndexData,0);
+   ChP->TxPrioPtr = ChOff + _TXP_PNTR;
+   sOutW((WordIO_t)ChP->IndexAddr,ChP->TxPrioPtr);
+   sOutB(ChP->IndexData,0);
+   ChP->TxPrioBuf = ChOff + _TXP_BUF;
+   sEnRxProcessor(ChP);                /* start the Rx processor */
+
+   return(TRUE);
+}
+
+/***************************************************************************
+Function: sStopRxProcessor
+Purpose:  Stop the receive processor from processing a channel.
+Call:     sStopRxProcessor(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+
+Comments: The receive processor can be started again with sStartRxProcessor().
+          This function causes the receive processor to skip over the
+          stopped channel.  It does not stop it from processing other channels.
+
+Warnings: No context switches are allowed while executing this function.
+
+          Do not leave the receive processor stopped for more than one
+          character time.
+
+          After calling this function a delay of 4 uS is required to ensure
+          that the receive processor is no longer processing this channel.
+*/
+void sStopRxProcessor(CHANNEL_T *ChP)
+{
+   Byte_t R[4];
+
+   R[0] = ChP->R[0];
+   R[1] = ChP->R[1];
+   R[2] = 0x0a;
+   R[3] = ChP->R[3];
+   sOutDW(ChP->IndexAddr,*(DWord_t *)&R[0]);
+}
+
+/***************************************************************************
+Function: sFlushRxFIFO
+Purpose:  Flush the Rx FIFO
+Call:     sFlushRxFIFO(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Return:   void
+Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
+          while it is being flushed the receive processor is stopped
+          and the transmitter is disabled.  After these operations a
+          4 uS delay is done before clearing the pointers to allow
+          the receive processor to stop.  These items are handled inside
+          this function.
+Warnings: No context switches are allowed while executing this function.
+*/
+void sFlushRxFIFO(CHANNEL_T *ChP)
+{
+   int i;
+   Byte_t Ch;                   /* channel number within AIOP */
+   int RxFIFOEnabled;                  /* TRUE if Rx FIFO enabled */
+
+   if(sGetRxCnt(ChP) == 0)             /* Rx FIFO empty */
+      return;                          /* don't need to flush */
+
+   RxFIFOEnabled = FALSE;
+   if(ChP->R[0x32] == 0x08) /* Rx FIFO is enabled */
+   {
+      RxFIFOEnabled = TRUE;
+      sDisRxFIFO(ChP);                 /* disable it */
+      for(i=0; i < 2000/200; i++)	/* delay 2 uS to allow proc to disable FIFO*/
+         sInB(ChP->IntChan);		/* depends on bus i/o timing */
+   }
+   sGetChanStatus(ChP);          /* clear any pending Rx errors in chan stat */
+   Ch = (Byte_t)sGetChanNum(ChP);
+   sOutB(ChP->Cmd,Ch | RESRXFCNT);     /* apply reset Rx FIFO count */
+   sOutB(ChP->Cmd,Ch);                 /* remove reset Rx FIFO count */
+   sOutW((WordIO_t)ChP->IndexAddr,ChP->RxFIFOPtrs); /* clear Rx out ptr */
+   sOutW(ChP->IndexData,0);
+   sOutW((WordIO_t)ChP->IndexAddr,ChP->RxFIFOPtrs + 2); /* clear Rx in ptr */
+   sOutW(ChP->IndexData,0);
+   if(RxFIFOEnabled)
+      sEnRxFIFO(ChP);                  /* enable Rx FIFO */
+}
+
+/***************************************************************************
+Function: sFlushTxFIFO
+Purpose:  Flush the Tx FIFO
+Call:     sFlushTxFIFO(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Return:   void
+Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
+          while it is being flushed the receive processor is stopped
+          and the transmitter is disabled.  After these operations a
+          4 uS delay is done before clearing the pointers to allow
+          the receive processor to stop.  These items are handled inside
+          this function.
+Warnings: No context switches are allowed while executing this function.
+*/
+void sFlushTxFIFO(CHANNEL_T *ChP)
+{
+   int i;
+   Byte_t Ch;                   /* channel number within AIOP */
+   int TxEnabled;                      /* TRUE if transmitter enabled */
+
+   if(sGetTxCnt(ChP) == 0)             /* Tx FIFO empty */
+      return;                          /* don't need to flush */
+
+   TxEnabled = FALSE;
+   if(ChP->TxControl[3] & TX_ENABLE)
+   {
+      TxEnabled = TRUE;
+      sDisTransmit(ChP);               /* disable transmitter */
+   }
+   sStopRxProcessor(ChP);              /* stop Rx processor */
+   for(i = 0; i < 4000/200; i++)         /* delay 4 uS to allow proc to stop */
+      sInB(ChP->IntChan);	/* depends on bus i/o timing */
+   Ch = (Byte_t)sGetChanNum(ChP);
+   sOutB(ChP->Cmd,Ch | RESTXFCNT);     /* apply reset Tx FIFO count */
+   sOutB(ChP->Cmd,Ch);                 /* remove reset Tx FIFO count */
+   sOutW((WordIO_t)ChP->IndexAddr,ChP->TxFIFOPtrs); /* clear Tx in/out ptrs */
+   sOutW(ChP->IndexData,0);
+   if(TxEnabled)
+      sEnTransmit(ChP);                /* enable transmitter */
+   sStartRxProcessor(ChP);             /* restart Rx processor */
+}
+
+/***************************************************************************
+Function: sWriteTxPrioByte
+Purpose:  Write a byte of priority transmit data to a channel
+Call:     sWriteTxPrioByte(ChP,Data)
+          CHANNEL_T *ChP; Ptr to channel structure
+          Byte_t Data; The transmit data byte
+
+Return:   int: 1 if the bytes is successfully written, otherwise 0.
+
+Comments: The priority byte is transmitted before any data in the Tx FIFO.
+
+Warnings: No context switches are allowed while executing this function.
+*/
+int sWriteTxPrioByte(CHANNEL_T *ChP, Byte_t Data)
+{
+   Byte_t DWBuf[4];             /* buffer for double word writes */
+   Word_t *WordPtr;          /* must be far because Win SS != DS */
+   register DWordIO_t IndexAddr;
+
+   if(sGetTxCnt(ChP) > 1)              /* write it to Tx priority buffer */
+   {
+      IndexAddr = ChP->IndexAddr;
+      sOutW((WordIO_t)IndexAddr,ChP->TxPrioCnt); /* get priority buffer status */
+      if(sInB((ByteIO_t)ChP->IndexData) & PRI_PEND) /* priority buffer busy */
+         return(0);                    /* nothing sent */
+
+      WordPtr = (Word_t *)(&DWBuf[0]);
+      *WordPtr = ChP->TxPrioBuf;       /* data byte address */
+
+      DWBuf[2] = Data;                 /* data byte value */
+      sOutDW(IndexAddr,*((DWord_t *)(&DWBuf[0]))); /* write it out */
+
+      *WordPtr = ChP->TxPrioCnt;       /* Tx priority count address */
+
+      DWBuf[2] = PRI_PEND + 1;         /* indicate 1 byte pending */
+      DWBuf[3] = 0;                    /* priority buffer pointer */
+      sOutDW(IndexAddr,*((DWord_t *)(&DWBuf[0]))); /* write it out */
+   }
+   else                                /* write it to Tx FIFO */
+   {
+      sWriteTxByte(sGetTxRxDataIO(ChP),Data);
+   }
+   return(1);                          /* 1 byte sent */
+}
+
+/***************************************************************************
+Function: sEnInterrupts
+Purpose:  Enable one or more interrupts for a channel
+Call:     sEnInterrupts(ChP,Flags)
+          CHANNEL_T *ChP; Ptr to channel structure
+          Word_t Flags: Interrupt enable flags, can be any combination
+             of the following flags:
+                TXINT_EN:   Interrupt on Tx FIFO empty
+                RXINT_EN:   Interrupt on Rx FIFO at trigger level (see
+                            sSetRxTrigger())
+                SRCINT_EN:  Interrupt on SRC (Special Rx Condition)
+                MCINT_EN:   Interrupt on modem input change
+                CHANINT_EN: Allow channel interrupt signal to the AIOP's
+                            Interrupt Channel Register.
+Return:   void
+Comments: If an interrupt enable flag is set in Flags, that interrupt will be
+          enabled.  If an interrupt enable flag is not set in Flags, that
+          interrupt will not be changed.  Interrupts can be disabled with
+          function sDisInterrupts().
+
+          This function sets the appropriate bit for the channel in the AIOP's
+          Interrupt Mask Register if the CHANINT_EN flag is set.  This allows
+          this channel's bit to be set in the AIOP's Interrupt Channel Register.
+
+          Interrupts must also be globally enabled before channel interrupts
+          will be passed on to the host.  This is done with function
+          sEnGlobalInt().
+
+          In some cases it may be desirable to disable interrupts globally but
+          enable channel interrupts.  This would allow the global interrupt
+          status register to be used to determine which AIOPs need service.
+*/
+void sEnInterrupts(CHANNEL_T *ChP,Word_t Flags)
+{
+   Byte_t Mask;                 /* Interrupt Mask Register */
+
+   ChP->RxControl[2] |=
+      ((Byte_t)Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
+
+   sOutDW(ChP->IndexAddr,*(DWord_t *)&ChP->RxControl[0]);
+
+   ChP->TxControl[2] |= ((Byte_t)Flags & TXINT_EN);
+
+   sOutDW(ChP->IndexAddr,*(DWord_t *)&ChP->TxControl[0]);
+
+   if(Flags & CHANINT_EN)
+   {
+      Mask = sInB(ChP->IntMask) | sBitMapSetTbl[ChP->ChanNum];
+      sOutB(ChP->IntMask,Mask);
+   }
+}
+
+/***************************************************************************
+Function: sDisInterrupts
+Purpose:  Disable one or more interrupts for a channel
+Call:     sDisInterrupts(ChP,Flags)
+          CHANNEL_T *ChP; Ptr to channel structure
+          Word_t Flags: Interrupt flags, can be any combination
+             of the following flags:
+                TXINT_EN:   Interrupt on Tx FIFO empty
+                RXINT_EN:   Interrupt on Rx FIFO at trigger level (see
+                            sSetRxTrigger())
+                SRCINT_EN:  Interrupt on SRC (Special Rx Condition)
+                MCINT_EN:   Interrupt on modem input change
+                CHANINT_EN: Disable channel interrupt signal to the
+                            AIOP's Interrupt Channel Register.
+Return:   void
+Comments: If an interrupt flag is set in Flags, that interrupt will be
+          disabled.  If an interrupt flag is not set in Flags, that
+          interrupt will not be changed.  Interrupts can be enabled with
+          function sEnInterrupts().
+
+          This function clears the appropriate bit for the channel in the AIOP's
+          Interrupt Mask Register if the CHANINT_EN flag is set.  This blocks
+          this channel's bit from being set in the AIOP's Interrupt Channel
+          Register.
+*/
+void sDisInterrupts(CHANNEL_T *ChP,Word_t Flags)
+{
+   Byte_t Mask;                 /* Interrupt Mask Register */
+
+   ChP->RxControl[2] &=
+         ~((Byte_t)Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
+   sOutDW(ChP->IndexAddr,*(DWord_t *)&ChP->RxControl[0]);
+   ChP->TxControl[2] &= ~((Byte_t)Flags & TXINT_EN);
+   sOutDW(ChP->IndexAddr,*(DWord_t *)&ChP->TxControl[0]);
+
+   if(Flags & CHANINT_EN)
+   {
+      Mask = sInB(ChP->IntMask) & sBitMapClrTbl[ChP->ChanNum];
+      sOutB(ChP->IntMask,Mask);
+   }
+}
diff --git a/drivers/char/rocket_int.h b/drivers/char/rocket_int.h
new file mode 100644
index 000000000..8b2ea2212
--- /dev/null
+++ b/drivers/char/rocket_int.h
@@ -0,0 +1,1149 @@
+/*
+ * rocket_int.h --- internal header file for rocket.c
+ *
+ * Written by Theodore Ts'o, Copyright 1997.
+ *
+ * Portions of this file are....
+ * 
+ * Copyright 1994 Comtrol Corporation.    All Rights Reserved.
+ * 
+ * The following source code is subject to Comtrol Corporation's
+ * Developer's License Agreement.
+ * 
+ * This source code is protected by United States copyright law and 
+ * international copyright treaties.
+ * 
+ * This source code may only be used to develop software products that
+ * will operate with Comtrol brand hardware.
+ * 
+ * You may not reproduce nor distribute this source code in its original
+ * form but must produce a derivative work which includes portions of
+ * this source code only.
+ * 
+ * The portions of this source code which you use in your derivative
+ * work must bear Comtrol's copyright notice:
+ * 
+ * 		Copyright 1994 Comtrol Corporation.
+ * 
+ */
+
+/*
+ * Begin Comtrol-provided headers, et. al.
+ */
+
+/*
+	user definitions for Rocket Toolkit
+
+	The following typedefs and defines must be established
+	depending on the platform the toolkit is being used
+	with.
+
+*/
+
+/************************************************************
+The following sets up the world for use with Linux
+************************************************************/
+
+#include <asm/io.h>
+
+typedef unsigned char Byte_t;
+typedef unsigned int ByteIO_t;
+
+typedef unsigned int Word_t;
+typedef unsigned int WordIO_t;
+
+typedef unsigned long DWord_t;
+typedef unsigned int DWordIO_t;
+
+#define sOutB(a, b) outb_p(b, a)
+#define sOutW(a, b) outw_p(b, a)
+#define sOutDW(a, b) outl_p(b, a)
+#define sInB(a) (inb_p(a))
+#define sInW(a) (inw_p(a))
+
+#define sOutStrW(port, addr, count) outsw(port, addr, count)
+
+#define sInStrW(port, addr, count) insw(port, addr, count)
+	
+#define CTL_SIZE 4
+#define AIOP_CTL_SIZE 4
+#define CHAN_AIOP_SIZE 8
+#define MAX_PORTS_PER_AIOP 8
+#define MAX_AIOPS_PER_BOARD 4
+#define MAX_PORTS_PER_BOARD 32
+
+/* Bus type ID */
+#define	isISA	0
+#define	isPCI	1
+#define	isMC	2
+
+/* Controller ID numbers */
+#define CTLID_NULL  -1              /* no controller exists */
+#define CTLID_0001  0x0001          /* controller release 1 */
+
+/* AIOP ID numbers, identifies AIOP type implementing channel */
+#define AIOPID_NULL -1              /* no AIOP or channel exists */
+#define AIOPID_0001 0x0001          /* AIOP release 1 */
+
+#define NULLDEV -1                  /* identifies non-existant device */
+#define NULLCTL -1                  /* identifies non-existant controller */
+#define NULLCTLPTR (CONTROLLER_T *)0 /* identifies non-existant controller */
+#define NULLAIOP -1                 /* identifies non-existant AIOP */
+#define NULLCHAN -1                 /* identifies non-existant channel */
+
+/************************************************************************
+ Global Register Offsets - Direct Access - Fixed values
+************************************************************************/
+
+#define _CMD_REG   0x38   /* Command Register            8    Write */
+#define _INT_CHAN  0x39   /* Interrupt Channel Register  8    Read */
+#define _INT_MASK  0x3A   /* Interrupt Mask Register     8    Read / Write */
+#define _UNUSED    0x3B   /* Unused                      8 */
+#define _INDX_ADDR 0x3C   /* Index Register Address      16   Write */
+#define _INDX_DATA 0x3E   /* Index Register Data         8/16 Read / Write */
+
+/************************************************************************
+ Channel Register Offsets for 1st channel in AIOP - Direct Access
+************************************************************************/
+#define _TD0       0x00  /* Transmit Data               16   Write */
+#define _RD0       0x00  /* Receive Data                16   Read */
+#define _CHN_STAT0 0x20  /* Channel Status              8/16 Read / Write */
+#define _FIFO_CNT0 0x10  /* Transmit/Receive FIFO Count 16   Read */
+#define _INT_ID0   0x30  /* Interrupt Identification    8    Read */
+
+/************************************************************************
+ Tx Control Register Offsets - Indexed - External - Fixed
+************************************************************************/
+#define _TX_ENBLS  0x980    /* Tx Processor Enables Register 8 Read / Write */
+#define _TXCMP1    0x988    /* Transmit Compare Value #1     8 Read / Write */
+#define _TXCMP2    0x989    /* Transmit Compare Value #2     8 Read / Write */
+#define _TXREP1B1  0x98A    /* Tx Replace Value #1 - Byte 1  8 Read / Write */
+#define _TXREP1B2  0x98B    /* Tx Replace Value #1 - Byte 2  8 Read / Write */
+#define _TXREP2    0x98C    /* Transmit Replace Value #2     8 Read / Write */
+
+/************************************************************************
+Memory Controller Register Offsets - Indexed - External - Fixed
+************************************************************************/
+#define _RX_FIFO    0x000    /* Rx FIFO */
+#define _TX_FIFO    0x800    /* Tx FIFO */
+#define _RXF_OUTP   0x990    /* Rx FIFO OUT pointer        16 Read / Write */
+#define _RXF_INP    0x992    /* Rx FIFO IN pointer         16 Read / Write */
+#define _TXF_OUTP   0x994    /* Tx FIFO OUT pointer        8  Read / Write */
+#define _TXF_INP    0x995    /* Tx FIFO IN pointer         8  Read / Write */
+#define _TXP_CNT    0x996    /* Tx Priority Count          8  Read / Write */
+#define _TXP_PNTR   0x997    /* Tx Priority Pointer        8  Read / Write */
+
+#define PRI_PEND    0x80     /* Priority data pending (bit7, Tx pri cnt) */
+#define TXFIFO_SIZE 255      /* size of Tx FIFO */
+#define RXFIFO_SIZE 1023     /* size of Rx FIFO */
+
+/************************************************************************
+Tx Priority Buffer - Indexed - External - Fixed
+************************************************************************/
+#define _TXP_BUF    0x9C0    /* Tx Priority Buffer  32  Bytes   Read / Write */
+#define TXP_SIZE    0x20     /* 32 bytes */
+
+/************************************************************************
+Channel Register Offsets - Indexed - Internal - Fixed
+************************************************************************/
+
+#define _TX_CTRL    0xFF0    /* Transmit Control               16  Write */
+#define _RX_CTRL    0xFF2    /* Receive Control                 8  Write */
+#define _BAUD       0xFF4    /* Baud Rate                      16  Write */
+#define _CLK_PRE    0xFF6    /* Clock Prescaler                 8  Write */
+
+#if 0
+#define CLOCK_PRESC 0x14          /* ?????? new mod 4 (divide by 5) prescale */
+
+#define BRD50             9215
+#define BRD75             6143  
+#define BRD110            4188
+#define BRD134            3438
+#define BRD150            3071
+#define BRD200            2303
+#define BRD300            1535
+#define BRD600            767
+#define BRD1200           383
+#define BRD1800           255
+#define BRD2000           229
+#define BRD2400           191
+#define BRD3600           127
+#define BRD4800           95
+#define BRD7200           63
+#define BRD9600           47
+#define BRD14400          31 
+#define BRD19200          23
+#define BRD38400          11
+#define BRD57600          7
+#define BRD76800          5
+#define BRD115200         3
+#define BRD230400         1
+#define BRD460800	  0
+#endif
+
+#if 0
+
+/* Old clock prescale definition and baud rates associated with it */
+
+#define CLOCK_PRESC 0x19  */        /* mod 9 (divide by 10) prescale */
+#define BRD50             4607
+#define BRD75             3071
+#define BRD110            2094
+#define BRD134            1712
+#define BRD150            1535
+#define BRD200            1151
+#define BRD300            767
+#define BRD600            383
+#define BRD1200           191
+#define BRD1800           127
+#define BRD2000           114
+#define BRD2400           95
+#define BRD3600           64
+#define BRD4800           47
+#define BRD7200           31
+#define BRD9600           23
+#define BRD14400          15
+#define BRD19200          11
+#define BRD38400          5
+#define BRD57600          3
+#define BRD76800          2
+#define BRD115200         1
+#define BRD230400         0
+
+#endif
+
+#define STMBREAK   0x08        /* BREAK */
+#define STMFRAME   0x04        /* framing error */
+#define STMRCVROVR 0x02        /* receiver over run error */
+#define STMPARITY  0x01        /* parity error */
+#define STMERROR   (STMBREAK | STMFRAME | STMPARITY)
+#define STMBREAKH   0x800      /* BREAK */
+#define STMFRAMEH   0x400      /* framing error */
+#define STMRCVROVRH 0x200      /* receiver over run error */
+#define STMPARITYH  0x100      /* parity error */
+#define STMERRORH   (STMBREAKH | STMFRAMEH | STMPARITYH)
+
+#define CTS_ACT   0x20        /* CTS input asserted */
+#define DSR_ACT   0x10        /* DSR input asserted */
+#define CD_ACT    0x08        /* CD input asserted */
+#define TXFIFOMT  0x04        /* Tx FIFO is empty */
+#define TXSHRMT   0x02        /* Tx shift register is empty */
+#define RDA       0x01        /* Rx data available */
+#define DRAINED (TXFIFOMT | TXSHRMT)  /* indicates Tx is drained */
+
+#define STATMODE  0x8000      /* status mode enable bit */
+#define RXFOVERFL 0x2000      /* receive FIFO overflow */
+#define RX2MATCH  0x1000      /* receive compare byte 2 match */
+#define RX1MATCH  0x0800      /* receive compare byte 1 match */
+#define RXBREAK   0x0400      /* received BREAK */
+#define RXFRAME   0x0200      /* received framing error */
+#define RXPARITY  0x0100      /* received parity error */
+#define STATERROR (RXBREAK | RXFRAME | RXPARITY)
+
+#define CTSFC_EN  0x80        /* CTS flow control enable bit */
+#define RTSTOG_EN 0x40        /* RTS toggle enable bit */
+#define TXINT_EN  0x10        /* transmit interrupt enable */
+#define STOP2     0x08        /* enable 2 stop bits (0 = 1 stop) */
+#define PARITY_EN 0x04        /* enable parity (0 = no parity) */
+#define EVEN_PAR  0x02        /* even parity (0 = odd parity) */
+#define DATA8BIT  0x01        /* 8 bit data (0 = 7 bit data) */
+
+#define SETBREAK  0x10        /* send break condition (must clear) */
+#define LOCALLOOP 0x08        /* local loopback set for test */
+#define SET_DTR   0x04        /* assert DTR */
+#define SET_RTS   0x02        /* assert RTS */
+#define TX_ENABLE 0x01        /* enable transmitter */
+
+#define RTSFC_EN  0x40        /* RTS flow control enable */
+#define RXPROC_EN 0x20        /* receive processor enable */
+#define TRIG_NO   0x00        /* Rx FIFO trigger level 0 (no trigger) */
+#define TRIG_1    0x08        /* trigger level 1 char */
+#define TRIG_1_2  0x10        /* trigger level 1/2 */
+#define TRIG_7_8  0x18        /* trigger level 7/8 */
+#define TRIG_MASK 0x18        /* trigger level mask */
+#define SRCINT_EN 0x04        /* special Rx condition interrupt enable */
+#define RXINT_EN  0x02        /* Rx interrupt enable */
+#define MCINT_EN  0x01        /* modem change interrupt enable */
+
+#define RXF_TRIG  0x20        /* Rx FIFO trigger level interrupt */
+#define TXFIFO_MT 0x10        /* Tx FIFO empty interrupt */
+#define SRC_INT   0x08        /* special receive condition interrupt */
+#define DELTA_CD  0x04        /* CD change interrupt */
+#define DELTA_CTS 0x02        /* CTS change interrupt */
+#define DELTA_DSR 0x01        /* DSR change interrupt */
+
+#define REP1W2_EN 0x10        /* replace byte 1 with 2 bytes enable */
+#define IGN2_EN   0x08        /* ignore byte 2 enable */
+#define IGN1_EN   0x04        /* ignore byte 1 enable */
+#define COMP2_EN  0x02        /* compare byte 2 enable */
+#define COMP1_EN  0x01        /* compare byte 1 enable */
+
+#define RESET_ALL 0x80        /* reset AIOP (all channels) */
+#define TXOVERIDE 0x40        /* Transmit software off override */
+#define RESETUART 0x20        /* reset channel's UART */
+#define RESTXFCNT 0x10        /* reset channel's Tx FIFO count register */
+#define RESRXFCNT 0x08        /* reset channel's Rx FIFO count register */
+
+#define INTSTAT0  0x01        /* AIOP 0 interrupt status */
+#define INTSTAT1  0x02        /* AIOP 1 interrupt status */
+#define INTSTAT2  0x04        /* AIOP 2 interrupt status */
+#define INTSTAT3  0x08        /* AIOP 3 interrupt status */
+
+#define INTR_EN   0x08        /* allow interrupts to host */
+#define INT_STROB 0x04        /* strobe and clear interrupt line (EOI) */
+
+/**************************************************************************
+ MUDBAC remapped for PCI
+**************************************************************************/
+
+#define _CFG_INT_PCI  0x40
+#define _PCI_INT_FUNC 0x3A
+
+#define PCI_STROB 0x2000        /* bit 13 of int aiop register */
+#define INTR_EN_PCI   0x0010        /* allow interrupts to host */
+
+
+#define CHAN3_EN  0x08        /* enable AIOP 3 */
+#define CHAN2_EN  0x04        /* enable AIOP 2 */
+#define CHAN1_EN  0x02        /* enable AIOP 1 */
+#define CHAN0_EN  0x01        /* enable AIOP 0 */
+#define FREQ_DIS  0x00
+#define FREQ_274HZ 0x60
+#define FREQ_137HZ 0x50
+#define FREQ_69HZ  0x40
+#define FREQ_34HZ  0x30
+#define FREQ_17HZ  0x20
+#define FREQ_9HZ   0x10
+#define PERIODIC_ONLY 0x80    /* only PERIODIC interrupt */
+
+#define CHANINT_EN 0x0100           /* flags to enable/disable channel ints */
+
+#define RDATASIZE 72
+#define RREGDATASIZE 52
+
+/* Controller level information structure */
+typedef struct
+{
+	int		CtlID;
+	int		CtlNum;
+	int		BusType;
+	WordIO_t	PCIIO;
+	ByteIO_t	MBaseIO;
+	ByteIO_t	MReg1IO;
+	ByteIO_t	MReg2IO;
+	ByteIO_t	MReg3IO;
+	Byte_t		MReg2;
+	Byte_t		MReg3;
+	int		NumAiop;
+	WordIO_t	AiopIO[AIOP_CTL_SIZE];
+	ByteIO_t	AiopIntChanIO[AIOP_CTL_SIZE];
+	int		AiopID[AIOP_CTL_SIZE];
+	int		AiopNumChan[AIOP_CTL_SIZE];
+} CONTROLLER_T;
+
+typedef CONTROLLER_T CONTROLLER_t;
+
+/* Channel level information structure */
+typedef struct
+{
+	CONTROLLER_T	*CtlP;
+	int		AiopNum;
+	int		ChanID;
+	int		ChanNum;
+
+	ByteIO_t	Cmd;
+	ByteIO_t	IntChan;
+	ByteIO_t	IntMask;
+	DWordIO_t	IndexAddr;
+	WordIO_t	IndexData;
+
+	WordIO_t	TxRxData;
+	WordIO_t	ChanStat;
+	WordIO_t	TxRxCount;
+	ByteIO_t	IntID;
+
+	Word_t		TxFIFO;
+	Word_t		TxFIFOPtrs;
+	Word_t		RxFIFO;
+	Word_t		RxFIFOPtrs;
+	Word_t		TxPrioCnt;
+	Word_t		TxPrioPtr;
+	Word_t		TxPrioBuf;
+
+	Byte_t		R[RREGDATASIZE];
+
+	Byte_t		BaudDiv[4];
+	Byte_t		TxControl[4];
+	Byte_t		RxControl[4];
+	Byte_t		TxEnables[4];
+	Byte_t		TxCompare[4];
+	Byte_t		TxReplace1[4];
+	Byte_t		TxReplace2[4];
+} CHANNEL_T;
+
+typedef CHANNEL_T CHANNEL_t;
+typedef CHANNEL_T * CHANPTR_T;
+
+/***************************************************************************
+Function: sClrBreak
+Purpose:  Stop sending a transmit BREAK signal
+Call:     sClrBreak(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sClrBreak(ChP) \
+{ \
+   (ChP)->TxControl[3] &= ~SETBREAK; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sClrDTR
+Purpose:  Clr the DTR output
+Call:     sClrDTR(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sClrDTR(ChP) \
+{ \
+   (ChP)->TxControl[3] &= ~SET_DTR; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sClrRTS
+Purpose:  Clr the RTS output
+Call:     sClrRTS(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sClrRTS(ChP) \
+{ \
+   (ChP)->TxControl[3] &= ~SET_RTS; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sClrTxXOFF
+Purpose:  Clear any existing transmit software flow control off condition
+Call:     sClrTxXOFF(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sClrTxXOFF(ChP) \
+{ \
+   sOutB((ChP)->Cmd,TXOVERIDE | (Byte_t)(ChP)->ChanNum); \
+   sOutB((ChP)->Cmd,(Byte_t)(ChP)->ChanNum); \
+}
+
+/***************************************************************************
+Function: sCtlNumToCtlPtr
+Purpose:  Convert a controller number to controller structure pointer
+Call:     sCtlNumToCtlPtr(CtlNum)
+          int CtlNum; Controller number
+Return:   CONTROLLER_T *: Ptr to controller structure
+*/
+#define sCtlNumToCtlPtr(CTLNUM) &sController[CTLNUM]
+
+/***************************************************************************
+Function: sControllerEOI
+Purpose:  Strobe the MUDBAC's End Of Interrupt bit.
+Call:     sControllerEOI(CtlP)
+          CONTROLLER_T *CtlP; Ptr to controller structure
+*/
+#define sControllerEOI(CTLP) sOutB((CTLP)->MReg2IO,(CTLP)->MReg2 | INT_STROB)
+
+/***************************************************************************
+Function: sPCIControllerEOI
+Purpose:  Strobe the PCI End Of Interrupt bit.
+Call:     sPCIControllerEOI(CtlP)
+          CONTROLLER_T *CtlP; Ptr to controller structure
+*/
+#define sPCIControllerEOI(CTLP) sOutW((CTLP)->PCIIO, PCI_STROB)
+
+/***************************************************************************
+Function: sDisAiop
+Purpose:  Disable I/O access to an AIOP
+Call:     sDisAiop(CltP)
+          CONTROLLER_T *CtlP; Ptr to controller structure
+          int AiopNum; Number of AIOP on controller
+*/
+#define sDisAiop(CTLP,AIOPNUM) \
+{ \
+   (CTLP)->MReg3 &= sBitMapClrTbl[AIOPNUM]; \
+   sOutB((CTLP)->MReg3IO,(CTLP)->MReg3); \
+}
+
+/***************************************************************************
+Function: sDisCTSFlowCtl
+Purpose:  Disable output flow control using CTS
+Call:     sDisCTSFlowCtl(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sDisCTSFlowCtl(ChP) \
+{ \
+   (ChP)->TxControl[2] &= ~CTSFC_EN; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: DisParity
+Purpose:  Disable parity
+Call:     sDisParity(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Comments: Function sSetParity() can be used in place of functions sEnParity(),
+          sDisParity(), sSetOddParity(), and sSetEvenParity().
+*/
+#define sDisParity(ChP) \
+{ \
+   (ChP)->TxControl[2] &= ~PARITY_EN; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sDisRxFIFO
+Purpose:  Disable Rx FIFO
+Call:     sDisRxFIFO(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sDisRxFIFO(ChP) \
+{ \
+   (ChP)->R[0x32] = 0x0a; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x30]); \
+}
+
+/***************************************************************************
+Function: sDisRxStatusMode
+Purpose:  Disable the Rx status mode
+Call:     sDisRxStatusMode(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Comments: This takes the channel out of the receive status mode.  All
+          subsequent reads of receive data using sReadRxWord() will return
+          two data bytes.
+*/
+#define sDisRxStatusMode(ChP) sOutW((ChP)->ChanStat,0)
+
+/***************************************************************************
+Function: sDisTransmit
+Purpose:  Disable transmit
+Call:     sDisTransmit(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+          This disables movement of Tx data from the Tx FIFO into the 1 byte
+          Tx buffer.  Therefore there could be up to a 2 byte latency
+          between the time sDisTransmit() is called and the transmit buffer
+          and transmit shift register going completely empty.
+*/
+#define sDisTransmit(ChP) \
+{ \
+   (ChP)->TxControl[3] &= ~TX_ENABLE; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sDisTxSoftFlowCtl
+Purpose:  Disable Tx Software Flow Control
+Call:     sDisTxSoftFlowCtl(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sDisTxSoftFlowCtl(ChP) \
+{ \
+   (ChP)->R[0x06] = 0x8a; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x04]); \
+}
+
+/***************************************************************************
+Function: sEnAiop
+Purpose:  Enable I/O access to an AIOP
+Call:     sEnAiop(CltP)
+          CONTROLLER_T *CtlP; Ptr to controller structure
+          int AiopNum; Number of AIOP on controller
+*/
+#define sEnAiop(CTLP,AIOPNUM) \
+{ \
+   (CTLP)->MReg3 |= sBitMapSetTbl[AIOPNUM]; \
+   sOutB((CTLP)->MReg3IO,(CTLP)->MReg3); \
+}
+
+/***************************************************************************
+Function: sEnCTSFlowCtl
+Purpose:  Enable output flow control using CTS
+Call:     sEnCTSFlowCtl(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sEnCTSFlowCtl(ChP) \
+{ \
+   (ChP)->TxControl[2] |= CTSFC_EN; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: EnParity
+Purpose:  Enable parity
+Call:     sEnParity(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Comments: Function sSetParity() can be used in place of functions sEnParity(),
+          sDisParity(), sSetOddParity(), and sSetEvenParity().
+
+Warnings: Before enabling parity odd or even parity should be chosen using
+          functions sSetOddParity() or sSetEvenParity().
+*/
+#define sEnParity(ChP) \
+{ \
+   (ChP)->TxControl[2] |= PARITY_EN; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sEnRxFIFO
+Purpose:  Enable Rx FIFO
+Call:     sEnRxFIFO(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sEnRxFIFO(ChP) \
+{ \
+   (ChP)->R[0x32] = 0x08; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x30]); \
+}
+
+/***************************************************************************
+Function: sEnRxProcessor
+Purpose:  Enable the receive processor
+Call:     sEnRxProcessor(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Comments: This function is used to start the receive processor.  When
+          the channel is in the reset state the receive processor is not
+          running.  This is done to prevent the receive processor from
+          executing invalid microcode instructions prior to the
+          downloading of the microcode.
+
+Warnings: This function must be called after valid microcode has been
+          downloaded to the AIOP, and it must not be called before the
+          microcode has been downloaded.
+*/
+#define sEnRxProcessor(ChP) \
+{ \
+   (ChP)->RxControl[2] |= RXPROC_EN; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->RxControl[0]); \
+}
+
+/***************************************************************************
+Function: sEnRxStatusMode
+Purpose:  Enable the Rx status mode
+Call:     sEnRxStatusMode(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Comments: This places the channel in the receive status mode.  All subsequent
+          reads of receive data using sReadRxWord() will return a data byte
+          in the low word and a status byte in the high word.
+
+*/
+#define sEnRxStatusMode(ChP) sOutW((ChP)->ChanStat,STATMODE)
+
+/***************************************************************************
+Function: sEnTransmit
+Purpose:  Enable transmit
+Call:     sEnTransmit(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sEnTransmit(ChP) \
+{ \
+   (ChP)->TxControl[3] |= TX_ENABLE; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sGetAiopIntStatus
+Purpose:  Get the AIOP interrupt status
+Call:     sGetAiopIntStatus(CtlP,AiopNum)
+          CONTROLLER_T *CtlP; Ptr to controller structure
+          int AiopNum; AIOP number
+Return:   Byte_t: The AIOP interrupt status.  Bits 0 through 7
+                         represent channels 0 through 7 respectively.  If a
+                         bit is set that channel is interrupting.
+*/
+#define sGetAiopIntStatus(CTLP,AIOPNUM) sInB((CTLP)->AiopIntChanIO[AIOPNUM])
+
+/***************************************************************************
+Function: sGetAiopNumChan
+Purpose:  Get the number of channels supported by an AIOP
+Call:     sGetAiopNumChan(CtlP,AiopNum)
+          CONTROLLER_T *CtlP; Ptr to controller structure
+          int AiopNum; AIOP number
+Return:   int: The number of channels supported by the AIOP
+*/
+#define sGetAiopNumChan(CTLP,AIOPNUM) (CTLP)->AiopNumChan[AIOPNUM]
+
+/***************************************************************************
+Function: sGetChanIntID
+Purpose:  Get a channel's interrupt identification byte
+Call:     sGetChanIntID(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Return:   Byte_t: The channel interrupt ID.  Can be any
+             combination of the following flags:
+                RXF_TRIG:     Rx FIFO trigger level interrupt
+                TXFIFO_MT:    Tx FIFO empty interrupt
+                SRC_INT:      Special receive condition interrupt
+                DELTA_CD:     CD change interrupt
+                DELTA_CTS:    CTS change interrupt
+                DELTA_DSR:    DSR change interrupt
+*/
+#define sGetChanIntID(ChP) (sInB((ChP)->IntID) & (RXF_TRIG | TXFIFO_MT | SRC_INT | DELTA_CD | DELTA_CTS | DELTA_DSR))
+
+/***************************************************************************
+Function: sGetChanNum
+Purpose:  Get the number of a channel within an AIOP
+Call:     sGetChanNum(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Return:   int: Channel number within AIOP, or NULLCHAN if channel does
+               not exist.
+*/
+#define sGetChanNum(ChP) (ChP)->ChanNum
+
+/***************************************************************************
+Function: sGetChanStatus
+Purpose:  Get the channel status
+Call:     sGetChanStatus(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Return:   Word_t: The channel status.  Can be any combination of
+             the following flags:
+                LOW BYTE FLAGS
+                CTS_ACT:      CTS input asserted
+                DSR_ACT:      DSR input asserted
+                CD_ACT:       CD input asserted
+                TXFIFOMT:     Tx FIFO is empty
+                TXSHRMT:      Tx shift register is empty
+                RDA:          Rx data available
+
+                HIGH BYTE FLAGS
+                STATMODE:     status mode enable bit
+                RXFOVERFL:    receive FIFO overflow
+                RX2MATCH:     receive compare byte 2 match
+                RX1MATCH:     receive compare byte 1 match
+                RXBREAK:      received BREAK
+                RXFRAME:      received framing error
+                RXPARITY:     received parity error
+Warnings: This function will clear the high byte flags in the Channel
+          Status Register.
+*/
+#define sGetChanStatus(ChP) sInW((ChP)->ChanStat)
+
+/***************************************************************************
+Function: sGetChanStatusLo
+Purpose:  Get the low byte only of the channel status
+Call:     sGetChanStatusLo(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Return:   Byte_t: The channel status low byte.  Can be any combination
+             of the following flags:
+                CTS_ACT:      CTS input asserted
+                DSR_ACT:      DSR input asserted
+                CD_ACT:       CD input asserted
+                TXFIFOMT:     Tx FIFO is empty
+                TXSHRMT:      Tx shift register is empty
+                RDA:          Rx data available
+*/
+#define sGetChanStatusLo(ChP) sInB((ByteIO_t)(ChP)->ChanStat)
+
+/***************************************************************************
+Function: sGetControllerIntStatus
+Purpose:  Get the controller interrupt status
+Call:     sGetControllerIntStatus(CtlP)
+          CONTROLLER_T *CtlP; Ptr to controller structure
+Return:   Byte_t: The controller interrupt status in the lower 4
+                         bits.  Bits 0 through 3 represent AIOP's 0
+                         through 3 respectively.  If a bit is set that
+                         AIOP is interrupting.  Bits 4 through 7 will
+                         always be cleared.
+*/
+#define sGetControllerIntStatus(CTLP) (sInB((CTLP)->MReg1IO) & 0x0f)
+
+/***************************************************************************
+Function: sPCIGetControllerIntStatus
+Purpose:  Get the controller interrupt status
+Call:     sPCIGetControllerIntStatus(CtlP)
+          CONTROLLER_T *CtlP; Ptr to controller structure
+Return:   unsigned char: The controller interrupt status in the lower 4
+                         bits and bit 4.  Bits 0 through 3 represent AIOP's 0
+                         through 3 respectively. Bit 4 is set if the int 
+			 was generated from periodic. If a bit is set the
+			 AIOP is interrupting.
+*/
+#define sPCIGetControllerIntStatus(CTLP) ((sInW((CTLP)->PCIIO) >> 8) & 0x1f)
+
+/***************************************************************************
+
+Function: sGetRxCnt
+Purpose:  Get the number of data bytes in the Rx FIFO
+Call:     sGetRxCnt(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Return:   int: The number of data bytes in the Rx FIFO.
+Comments: Byte read of count register is required to obtain Rx count.
+
+*/
+#define sGetRxCnt(ChP) sInW((ChP)->TxRxCount)
+
+/***************************************************************************
+Function: sGetTxCnt
+Purpose:  Get the number of data bytes in the Tx FIFO
+Call:     sGetTxCnt(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Return:   Byte_t: The number of data bytes in the Tx FIFO.
+Comments: Byte read of count register is required to obtain Tx count.
+
+*/
+#define sGetTxCnt(ChP) sInB((ByteIO_t)(ChP)->TxRxCount)
+
+/*****************************************************************************
+Function: sGetTxRxDataIO
+Purpose:  Get the I/O address of a channel's TxRx Data register
+Call:     sGetTxRxDataIO(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Return:   WordIO_t: I/O address of a channel's TxRx Data register
+*/
+#define sGetTxRxDataIO(ChP) (ChP)->TxRxData
+
+/***************************************************************************
+Function: sInitChanDefaults
+Purpose:  Initialize a channel structure to it's default state.
+Call:     sInitChanDefaults(ChP)
+          CHANNEL_T *ChP; Ptr to the channel structure
+Comments: This function must be called once for every channel structure
+          that exists before any other SSCI calls can be made.
+
+*/
+#define sInitChanDefaults(ChP) \
+{ \
+   (ChP)->CtlP = NULLCTLPTR; \
+   (ChP)->AiopNum = NULLAIOP; \
+   (ChP)->ChanID = AIOPID_NULL; \
+   (ChP)->ChanNum = NULLCHAN; \
+}
+
+/***************************************************************************
+Function: sResetAiopByNum
+Purpose:  Reset the AIOP by number
+Call:     sResetAiopByNum(CTLP,AIOPNUM)
+	CONTROLLER_T CTLP; Ptr to controller structure
+	AIOPNUM; AIOP index 
+*/
+#define sResetAiopByNum(CTLP,AIOPNUM) \
+{ \
+   sOutB((CTLP)->AiopIO[(AIOPNUM)]+_CMD_REG,RESET_ALL); \
+   sOutB((CTLP)->AiopIO[(AIOPNUM)]+_CMD_REG,0x0); \
+}
+
+/***************************************************************************
+Function: sSendBreak
+Purpose:  Send a transmit BREAK signal
+Call:     sSendBreak(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sSendBreak(ChP) \
+{ \
+   (ChP)->TxControl[3] |= SETBREAK; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sSetBaud
+Purpose:  Set baud rate
+Call:     sSetBaud(ChP,Divisor)
+          CHANNEL_T *ChP; Ptr to channel structure
+          Word_t Divisor; 16 bit baud rate divisor for channel
+*/
+#define sSetBaud(ChP,DIVISOR) \
+{ \
+   (ChP)->BaudDiv[2] = (Byte_t)(DIVISOR); \
+   (ChP)->BaudDiv[3] = (Byte_t)((DIVISOR) >> 8); \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->BaudDiv[0]); \
+}
+
+/***************************************************************************
+Function: sSetData7
+Purpose:  Set data bits to 7
+Call:     sSetData7(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sSetData7(ChP) \
+{ \
+   (ChP)->TxControl[2] &= ~DATA8BIT; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sSetData8
+Purpose:  Set data bits to 8
+Call:     sSetData8(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sSetData8(ChP) \
+{ \
+   (ChP)->TxControl[2] |= DATA8BIT; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sSetDTR
+Purpose:  Set the DTR output
+Call:     sSetDTR(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sSetDTR(ChP) \
+{ \
+   (ChP)->TxControl[3] |= SET_DTR; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sSetEvenParity
+Purpose:  Set even parity
+Call:     sSetEvenParity(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Comments: Function sSetParity() can be used in place of functions sEnParity(),
+          sDisParity(), sSetOddParity(), and sSetEvenParity().
+
+Warnings: This function has no effect unless parity is enabled with function
+          sEnParity().
+*/
+#define sSetEvenParity(ChP) \
+{ \
+   (ChP)->TxControl[2] |= EVEN_PAR; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sSetOddParity
+Purpose:  Set odd parity
+Call:     sSetOddParity(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Comments: Function sSetParity() can be used in place of functions sEnParity(),
+          sDisParity(), sSetOddParity(), and sSetEvenParity().
+
+Warnings: This function has no effect unless parity is enabled with function
+          sEnParity().
+*/
+#define sSetOddParity(ChP) \
+{ \
+   (ChP)->TxControl[2] &= ~EVEN_PAR; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sSetRTS
+Purpose:  Set the RTS output
+Call:     sSetRTS(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sSetRTS(ChP) \
+{ \
+   (ChP)->TxControl[3] |= SET_RTS; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sSetRxTrigger
+Purpose:  Set the Rx FIFO trigger level
+Call:     sSetRxProcessor(ChP,Level)
+          CHANNEL_T *ChP; Ptr to channel structure
+          Byte_t Level; Number of characters in Rx FIFO at which the
+             interrupt will be generated.  Can be any of the following flags:
+
+             TRIG_NO:   no trigger
+             TRIG_1:    1 character in FIFO
+             TRIG_1_2:  FIFO 1/2 full
+             TRIG_7_8:  FIFO 7/8 full
+Comments: An interrupt will be generated when the trigger level is reached
+          only if function sEnInterrupt() has been called with flag
+          RXINT_EN set.  The RXF_TRIG flag in the Interrupt Idenfification
+          register will be set whenever the trigger level is reached
+          regardless of the setting of RXINT_EN.
+
+*/
+#define sSetRxTrigger(ChP,LEVEL) \
+{ \
+   (ChP)->RxControl[2] &= ~TRIG_MASK; \
+   (ChP)->RxControl[2] |= LEVEL; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->RxControl[0]); \
+}
+
+/***************************************************************************
+Function: sSetStop1
+Purpose:  Set stop bits to 1
+Call:     sSetStop1(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sSetStop1(ChP) \
+{ \
+   (ChP)->TxControl[2] &= ~STOP2; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sSetStop2
+Purpose:  Set stop bits to 2
+Call:     sSetStop2(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+*/
+#define sSetStop2(ChP) \
+{ \
+   (ChP)->TxControl[2] |= STOP2; \
+   sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+}
+
+/***************************************************************************
+Function: sStartRxProcessor
+Purpose:  Start a channel's receive processor
+Call:     sStartRxProcessor(ChP)
+          CHANNEL_T *ChP; Ptr to channel structure
+Comments: This function is used to start a Rx processor after it was
+          stopped with sStopRxProcessor() or sStopSWInFlowCtl().  It
+          will restart both the Rx processor and software input flow control.
+
+*/
+#define sStartRxProcessor(ChP) sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0])
+
+/***************************************************************************
+Function: sWriteTxByte
+Purpose:  Write a transmit data byte to a channel.
+          ByteIO_t io: Channel transmit register I/O address.  This can
+                           be obtained with sGetTxRxDataIO().
+          Byte_t Data; The transmit data byte.
+Warnings: This function writes the data byte without checking to see if
+          sMaxTxSize is exceeded in the Tx FIFO.
+*/
+#define sWriteTxByte(IO,DATA) sOutB(IO,DATA)
+
+int sInitController(	CONTROLLER_T *CtlP,
+			int CtlNum,
+			ByteIO_t MudbacIO,
+			ByteIO_t *AiopIOList,
+			int AiopIOListSize,
+			int IRQNum,
+			Byte_t Frequency,
+			int PeriodicOnly);
+
+int sPCIInitController(	CONTROLLER_T *CtlP,
+			int CtlNum,
+			ByteIO_t *AiopIOList,
+			int AiopIOListSize,
+			int IRQNum,
+			Byte_t Frequency,
+			int PeriodicOnly);
+
+int sReadAiopID(ByteIO_t io);
+int sReadAiopNumChan(WordIO_t io);
+int sInitChan(	CONTROLLER_T *CtlP,
+		CHANNEL_T *ChP,
+		int AiopNum,
+		int ChanNum);
+Byte_t sGetRxErrStatus(CHANNEL_T *ChP);
+void sStopRxProcessor(CHANNEL_T *ChP);
+void sStopSWInFlowCtl(CHANNEL_T *ChP);
+void sFlushRxFIFO(CHANNEL_T *ChP);
+void sFlushTxFIFO(CHANNEL_T *ChP);
+int sWriteTxPrioByte(CHANNEL_T *ChP, Byte_t Data);
+void sEnInterrupts(CHANNEL_T *ChP,Word_t Flags);
+void sDisInterrupts(CHANNEL_T *ChP,Word_t Flags);
+
+extern Byte_t R[RDATASIZE];
+extern CONTROLLER_T sController[CTL_SIZE];
+extern Byte_t sIRQMap[16];
+extern Byte_t sBitMapClrTbl[8];
+extern Byte_t sBitMapSetTbl[8];
+extern int sClockPrescale;
+
+
+/*
+ * Begin Linux specific definitions for the Rocketport driver
+ *
+ * This code is Copyright Theodore Ts'o, 1995-1997
+ */
+
+struct r_port {
+	int			magic;
+	int			line;
+	int			flags;
+	int			count;
+	int			blocked_open;
+	struct tty_struct 	*tty;
+	int			board:2;
+	int			aiop:2;
+	int			chan:3;
+	CONTROLLER_t *ctlp;
+	CHANNEL_t 		channel;
+	int			closing_wait;
+	int			close_delay;
+	int			intmask;
+	int			xmit_fifo_room;	/* room in xmit fifo */
+	unsigned char 		*xmit_buf;
+	int			xmit_head;
+	int			xmit_tail;
+	int			xmit_cnt;
+	int			session;
+	int			pgrp;
+	int			cd_status;
+	int		        ignore_status_mask;
+	int			read_status_mask;
+	int			cps;
+	struct termios		normal_termios;
+	struct termios		callout_termios;
+	struct tq_struct	tqueue;
+	struct wait_queue	*open_wait;
+	struct wait_queue	*close_wait;
+};
+	
+#define RPORT_MAGIC 0x525001
+
+#define NUM_BOARDS 8
+#define MAX_RP_PORTS (32*NUM_BOARDS)
+
+/*
+ * The size of the xmit buffer is 1 page, or 4096 bytes
+ */
+#define XMIT_BUF_SIZE 4096
+
+/* number of characters left in xmit buffer before we ask for more */
+#define WAKEUP_CHARS 256
+
+/* Internal flags used only by the rocketport driver */
+#define ROCKET_INITIALIZED	0x80000000 /* Port is active */
+#define ROCKET_CLOSING		0x40000000 /* Serial port is closing */
+#define ROCKET_NORMAL_ACTIVE	0x20000000 /* Normal port is active */
+#define ROCKET_CALLOUT_ACTIVE	0x10000000 /* Callout port is active */
+
+/*
+ * tty subtypes
+ *
+ */
+#define SERIAL_TYPE_NORMAL 1
+#define SERIAL_TYPE_CALLOUT 2
+
+/*
+ * Assigned major numbers for the Comtrol Rocketport
+ */
+#define TTY_ROCKET_MAJOR	46
+#define CUA_ROCKET_MAJOR	47
+
+/*
+ * Utility function.
+ */
+#ifndef MIN
+#define MIN(a,b)	((a) < (b) ? (a) : (b))
+#endif
+
+#ifdef PCI_VENDOR_ID_RP
+#undef PCI_VENDOR_ID_RP
+#undef PCI_DEVICE_ID_RP8OCTA
+#undef PCI_DEVICE_ID_RP8INTF
+#undef PCI_DEVICE_ID_RP16INTF
+#undef PCI_DEVICE_ID_RP32INTF
+#endif
+
+#define PCI_VENDOR_ID_RP               0x11fe
+#define PCI_DEVICE_ID_RP32INTF         0x0001
+#define PCI_DEVICE_ID_RP8INTF          0x0002
+#define PCI_DEVICE_ID_RP16INTF         0x0003
+#define PCI_DEVICE_ID_RP8OCTA          0x0005
+
+#ifndef RP4QUAD
+#define PCI_DEVICE_ID_RP4QUAD	       0x0004
+#endif
+#ifndef RP8J
+#define PCI_DEVICE_ID_RP8J	       0x0006
+#endif
+
+
diff --git a/drivers/char/tty_io.c b/drivers/char/tty_io.c
index 7a31e162d..d63578c55 100644
--- a/drivers/char/tty_io.c
+++ b/drivers/char/tty_io.c
@@ -1829,6 +1829,9 @@ __initfunc(int tty_init(void))
 #ifdef CONFIG_SERIAL
 	rs_init();
 #endif
+#ifdef CONFIG_ROCKETPORT
+	rp_init();
+#endif
 #ifdef CONFIG_CYCLADES
 	cy_init();
 #endif
@@ -1853,4 +1856,3 @@ __initfunc(int tty_init(void))
 #endif
 	return 0;
 }
-
diff --git a/drivers/misc/.cvsignore b/drivers/misc/.cvsignore
new file mode 100644
index 000000000..4671378ae
--- /dev/null
+++ b/drivers/misc/.cvsignore
@@ -0,0 +1 @@
+.depend
diff --git a/drivers/misc/BUGS-parport b/drivers/misc/BUGS-parport
new file mode 100644
index 000000000..6b8420a2c
--- /dev/null
+++ b/drivers/misc/BUGS-parport
@@ -0,0 +1,13 @@
+Currently known (or at least suspected) bugs in parport:
+
+o /proc/parport is untested under 2.0.XX
+
+o SCSI aborts for PPA under 2.0.29 [reported by jmr].  Under investigation.
+
+o make config (etc) allow you to select CONFIG_PNP_PARPORT=m, CONFIG_PPA=y -
+  the resulting kernel won't link.
+
+o IEEE1284 code does not do the terminating handshake after transfers, which
+  seems to upset some devices.
+
+o lp doesn't allow you to read status while printing is in progress.
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
new file mode 100644
index 000000000..9d568b2fd
--- /dev/null
+++ b/drivers/misc/Makefile
@@ -0,0 +1,48 @@
+#
+# Makefile for the kernel miscellaneous drivers.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+# Note 2! The CFLAGS definitions are now inherited from the
+# parent makes..
+
+SUB_DIRS     := 
+MOD_SUB_DIRS := $(SUB_DIRS)
+ALL_SUB_DIRS := $(SUB_DIRS)
+
+L_TARGET := misc.a
+MX_OBJS  :=
+LX_OBJS  := 
+MI_OBJS  :=
+MIX_OBJS :=
+
+ifeq ($(CONFIG_PARPORT),y)
+  L_OBJS += parport_share.o parport_ieee1284.o
+  ifeq ($(CONFIG_PROC_FS),y)
+    L_OBJS += parport_procfs.o
+  endif
+  ifeq ($(CONFIG_PARPORT_PC),y)
+    LX_OBJS += parport_pc.o
+  endif
+  LX_OBJS += parport_init.o
+else
+  ifeq ($(CONFIG_PARPORT),m)
+    MI_OBJS += parport_share.o parport_ieee1284.o
+    ifneq ($(CONFIG_PROC_FS),n) 
+      MI_OBJS += parport_procfs.o
+    endif
+    MIX_OBJS += parport_init.o
+    M_OBJS += parport.o
+  endif
+  ifeq ($(CONFIG_PARPORT_PC),m)
+    MX_OBJS += parport_pc.o
+  endif
+endif
+
+include $(TOPDIR)/Rules.make
+
+# Special rule to build the composite parport.o module
+parport.o: $(MI_OBJS) $(MIX_OBJS)
+	$(LD) $(LD_RFLAG) -r -o $@ $(MI_OBJS) $(MIX_OBJS)
diff --git a/drivers/misc/TODO-parport b/drivers/misc/TODO-parport
new file mode 100644
index 000000000..eea6a01fd
--- /dev/null
+++ b/drivers/misc/TODO-parport
@@ -0,0 +1,21 @@
+Things to be done.
+
+0. Fix the bugs (see BUGS-parport).
+
+1. Proper documentation.
+
+2. Overhaul lp.c:
+
+   a) It's a mess, and there is a lot of code duplication.
+
+   b) ECP support would be nice.  This can only work if both the port and
+      the printer support it.
+
+   c) Errors could do with being handled better.  There's no point logging a
+      message every 10 seconds when the printer is out of paper. 
+
+   d) Handle status readback automatically.  IEEE1284 printers can post status
+      bits when they have something to say.  We should read out and deal 
+      with (maybe just log) whatever the printer wants to tell the world.
+
+3. Assimilate more drivers.
diff --git a/drivers/misc/parport_arc.c b/drivers/misc/parport_arc.c
new file mode 100644
index 000000000..8ceaee794
--- /dev/null
+++ b/drivers/misc/parport_arc.c
@@ -0,0 +1,77 @@
+/* $Id: parport_arc.c,v 1.1 1997/07/25 01:53:12 ralf Exp $
+ * Parallel-port routines for ARC onboard hardware.
+ *
+ * Author: Phil Blundell <pjb27@cam.ac.uk>
+ */
+
+#include <linux/tasks.h>
+
+#include <asm/ptrace.h>
+#include <asm/io.h>
+#include <asm/dma.h>
+
+#include <linux/config.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/kernel.h>
+#include <linux/malloc.h>
+
+#include <linux/parport.h>
+
+#include <linux/arch/oldlatches.h>
+
+#define DATA_LATCH    0x3350010
+
+/* ARC can't read from the data latch, so we must use a soft copy. */
+static unsigned int data_copy;
+
+static void arc_write_data(struct parport *p, unsigned int data)
+{
+	data_copy = data;
+	outb(data, DATA_LATCH);
+}
+
+static unsigned int arc_read_data(struct parport *p)
+{
+	return data_copy;
+}
+
+static struct parport_operations arc_ops = 
+{
+	arc_write_data,
+	arc_read_data,
+
+	arc_write_control,
+	arc_read_control,
+	arc_frob_control,
+
+	NULL, /* write_econtrol */
+	NULL, /* read_econtrol */
+	NULL, /* frob_econtrol */
+
+	arc_write_status,
+	arc_read_status,
+
+	NULL, /* write_fifo */
+	NULL, /* read_fifo */
+	
+	NULL, /* change_mode */
+	
+	arc_release_resources,
+	arc_claim_resources,
+	
+	NULL, /* epp_write_block */
+	NULL, /* epp_read_block */
+
+	NULL, /* ecp_write_block */
+	NULL, /* epp_write_block */
+	
+	arc_save_state,
+	arc_restore_state,
+
+	arc_enable_irq,
+	arc_disable_irq,
+	arc_examine_irq 
+};
diff --git a/drivers/misc/parport_ieee1284.c b/drivers/misc/parport_ieee1284.c
new file mode 100644
index 000000000..d1e8c44de
--- /dev/null
+++ b/drivers/misc/parport_ieee1284.c
@@ -0,0 +1,89 @@
+/* $Id: parport_ieee1284.c,v 1.1 1997/07/25 01:53:13 ralf Exp $ 
+ * IEEE-1284 implementation for parport.
+ *
+ * Authors: Philip Blundell <pjb27@cam.ac.uk>
+ *          Carsten Gross <carsten@sol.wohnheim.uni-ulm.de>
+ *	    Jose Renau <renau@acm.org>
+ */
+
+#include <linux/tasks.h>
+
+#include <linux/parport.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/kernel.h>
+#include <linux/malloc.h>
+
+/* The following read functions are an implementation of a status readback
+ * and device id request confirming to IEEE1284-1994.
+ *
+ * These probably ought to go in some seperate file, so people like the SPARC
+ * don't have to pull them in.
+ */
+
+/* Wait for Status line(s) to change in 35 ms - see IEEE1284-1994 page 24 to
+ * 25 for this. After this time we can create a timeout because the
+ * peripheral doesn't conform to IEEE1284. We want to save CPU time: we are
+ * waiting a maximum time of 500 us busy (this is for speed). If there is
+ * not the right answer in this time, we call schedule and other processes
+ * are able "to eat" the time up to 30ms.  So the maximum load avarage can't
+ * get above 5% for a read even if the peripheral is really slow. (but your
+ * read gets very slow then - only about 10 characters per second. This
+ * should be tuneable). Thanks to Andreas who pointed me to this and ordered
+ * the documentation.
+ */ 
+
+int parport_wait_peripheral(struct parport *port, unsigned char mask, 
+	unsigned char result)
+{
+	int counter=0;
+	unsigned char status; 
+	
+	do {
+		status = parport_read_status(port);
+		udelay(25);
+		counter++;
+		if (need_resched)
+			schedule();
+	} while ( ((status & mask) != result) && (counter < 20) );
+	if ( (counter == 20) && ((status & mask) != result) ) { 
+		current->state=TASK_INTERRUPTIBLE;
+		current->timeout=jiffies+4;
+		schedule(); /* wait for 4 scheduler runs (40ms) */
+		status = parport_read_status(port);
+		if ((status & mask) != result) return 1; /* timeout */
+	}
+	return 0; /* okay right response from device */
+}		
+
+/* Test if nibble mode for status readback is okay. Returns the value false
+ * if the printer doesn't support readback at all. If it supports readbacks
+ * and printer data is available the function returns 1, otherwise 2. The
+ * only valid values for "mode" are 0 and 4. 0 requests normal nibble mode,
+ * 4 is for "request device id using nibble mode". The request for the
+ * device id is best done in an ioctl (or at bootup time).  There is no
+ * check for an invalid value, the only function using this call at the
+ * moment is lp_read and the ioctl LPGETDEVICEID both fixed calls from
+ * trusted kernel.
+ */
+int parport_ieee1284_nibble_mode_ok(struct parport *port, unsigned char mode) 
+{
+	parport_write_data(port, mode);
+	udelay(5);		
+	parport_write_control(port, parport_read_control(port) & ~8);  /* SelectIN  low */
+	parport_write_control(port, parport_read_control(port) | 2); /* AutoFeed  high */
+	if (parport_wait_peripheral(port, 0x78, 0x38)) { /* timeout? */
+		parport_write_control(port, (parport_read_control(port) & ~2) | 8);
+		return 0; /* first stage of negotiation failed, 
+                           * no IEEE1284 compliant device on this port 
+                           */ 
+	}
+	parport_write_control(port, parport_read_control(port) | 1);      /* Strobe  high */
+	udelay(5);				     /* Strobe wait */
+	parport_write_control(port, parport_read_control(port) & ~1);     /* Strobe  low */
+	udelay(5);
+	parport_write_control(port, parport_read_control(port) & ~2);     /*  AutoFeed low */
+	return (parport_wait_peripheral(port, 0x20, 0))?2:1;
+}
diff --git a/drivers/misc/parport_init.c b/drivers/misc/parport_init.c
new file mode 100644
index 000000000..52f3c6e33
--- /dev/null
+++ b/drivers/misc/parport_init.c
@@ -0,0 +1,114 @@
+/* $Id: parport_init.c,v 1.1 1997/07/25 01:53:14 ralf Exp $
+ * Parallel-port initialisation code.
+ * 
+ * Authors: David Campbell <campbell@tirian.che.curtin.edu.au>
+ *          Tim Waugh <tmw20@cam.ac.uk>
+ *	    Jose Renau <renau@acm.org>
+ *
+ * based on work by Grant Guenther <grant@torque.net>
+ *              and Philip Blundell <Philip.Blundell@pobox.com>
+ */
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/tasks.h>
+
+#include <linux/parport.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/malloc.h>
+#include <linux/init.h>
+
+#ifndef MODULE
+static int io[PARPORT_MAX+1] __initdata = { 0, };
+static int irq[PARPORT_MAX] __initdata = { PARPORT_IRQ_NONE, };
+static int dma[PARPORT_MAX] __initdata = { PARPORT_DMA_NONE, };
+
+extern int parport_pc_init(int *io, int *irq, int *dma);
+
+static int parport_setup_ptr __initdata = 0;
+
+__initfunc(void parport_setup(char *str, int *ints))
+{
+	if (ints[0] == 0 || ints[1] == 0) {
+		/* Disable parport if "parport=" or "parport=0" in cmdline */
+		io[0] = PARPORT_DISABLE; 
+		return;
+	}
+	if (parport_setup_ptr < PARPORT_MAX) {
+		io[parport_setup_ptr] = ints[1];
+		if (ints[0]>1) {
+			irq[parport_setup_ptr] = ints[2];
+			if (ints[0]>2) dma[parport_setup_ptr] = ints[3];
+		}
+		parport_setup_ptr++;
+	} else {
+		printk(KERN_ERR "parport=0x%x", ints[1]);
+		if (ints[0]>1) {
+			printk(",%d", ints[2]);
+			if (ints[0]>2) printk(",%d", ints[3]);
+		}
+		printk(" ignored, too many ports.\n");
+	}
+}
+#endif
+
+#ifdef MODULE
+int init_module(void)
+{
+	return 0;
+}
+
+void cleanup_module(void)
+{
+	struct parport *port, *next;
+   
+	for (port = parport_enumerate(); port; port = next) {
+		next = port->next;
+		if (!(port->flags & PARPORT_FLAG_COMA))
+			parport_quiesce(port);
+		parport_proc_unregister(port);
+		kfree(port->name);
+		kfree(port);
+	}
+	
+	parport_proc_cleanup();
+}
+#else
+__initfunc(int parport_init(void))
+{
+	struct parport *pb;
+
+	if (io[0] == PARPORT_DISABLE) return 1; 
+#ifdef CONFIG_PARPORT_PC
+	parport_pc_init(io, irq, dma);
+#endif
+	return 0;
+}
+#endif
+
+/* Exported symbols for modules. */
+
+EXPORT_SYMBOL(parport_claim);
+EXPORT_SYMBOL(parport_release);
+EXPORT_SYMBOL(parport_register_port);
+EXPORT_SYMBOL(parport_quiesce);
+EXPORT_SYMBOL(parport_register_device);
+EXPORT_SYMBOL(parport_unregister_device);
+EXPORT_SYMBOL(parport_enumerate);
+EXPORT_SYMBOL(parport_ieee1284_nibble_mode_ok);
+EXPORT_SYMBOL(parport_wait_peripheral);
+
+void inc_parport_count(void)
+{
+#ifdef MODULE
+	MOD_INC_USE_COUNT;
+#endif
+}
+
+void dec_parport_count(void)
+{
+#ifdef MODULE
+	MOD_DEC_USE_COUNT;
+#endif
+}
diff --git a/drivers/misc/parport_pc.c b/drivers/misc/parport_pc.c
new file mode 100644
index 000000000..925f697f6
--- /dev/null
+++ b/drivers/misc/parport_pc.c
@@ -0,0 +1,885 @@
+/* $Id: parport_pc.c,v 1.1 1997/07/25 01:53:16 ralf Exp $ 
+ * Parallel-port routines for PC architecture
+ * 
+ * Authors: Phil Blundell <pjb27@cam.ac.uk>
+ *          Tim Waugh <tmw20@cam.ac.uk>
+ *	    Jose Renau <renau@acm.org>
+ *          David Campbell <campbell@tirian.che.curtin.edu.au>
+ *
+ * based on work by Grant Guenther <grant@torque.net>
+ *              and Philip Blundell <Philip.Blundell@pobox.com>
+ */
+
+#include <linux/tasks.h>
+
+#include <asm/ptrace.h>
+#include <asm/io.h>
+#include <asm/dma.h>
+
+#include <linux/module.h>
+#include <linux/config.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/kernel.h>
+#include <linux/malloc.h>
+
+#include <linux/parport.h>
+
+#define ECONTROL 0x402
+#define CONFIGB  0x401
+#define CONFIGA  0x400
+#define EPPREG   0x4
+#define CONTROL  0x2
+#define STATUS   0x1
+#define DATA     0
+
+#define PC_MAX_PORTS  8
+
+static void pc_null_intr_func(int irq, void *dev_id, struct pt_regs *regs)
+{
+	/* NULL function - Does nothing */
+	return;
+}
+
+static void pc_write_epp(struct parport *p, unsigned int d)
+{
+	outb(d, p->base+EPPREG);
+}
+
+static unsigned int pc_read_epp(struct parport *p)
+{
+	return (unsigned int)inb(p->base+EPPREG);
+}
+
+static unsigned int pc_read_configb(struct parport *p)
+{
+	return (unsigned int)inb(p->base+CONFIGB);
+}
+
+static void pc_write_data(struct parport *p, unsigned int d)
+{
+	outb(d, p->base+DATA);
+}
+
+static unsigned int pc_read_data(struct parport *p)
+{
+	return (unsigned int)inb(p->base+DATA);
+}
+
+static void pc_write_control(struct parport *p, unsigned int d)
+{
+	outb(d, p->base+CONTROL);
+}
+
+static unsigned int pc_read_control(struct parport *p)
+{
+	return (unsigned int)inb(p->base+CONTROL);
+}
+
+static unsigned int pc_frob_control(struct parport *p, unsigned int mask,  unsigned int val)
+{
+	unsigned int old = (unsigned int)inb(p->base+CONTROL);
+	outb(((old & ~mask) ^ val), p->base+CONTROL);
+	return old;
+}
+
+static void pc_write_status(struct parport *p, unsigned int d)
+{
+	outb(d, p->base+STATUS);
+}
+
+static unsigned int pc_read_status(struct parport *p)
+{
+	return (unsigned int)inb(p->base+STATUS);
+}
+
+static void pc_write_econtrol(struct parport *p, unsigned int d)
+{
+	outb(d, p->base+ECONTROL);
+}
+
+static unsigned int pc_read_econtrol(struct parport *p)
+{
+	return (unsigned int)inb(p->base+ECONTROL);
+}
+
+static unsigned int pc_frob_econtrol(struct parport *p, unsigned int mask,  unsigned int val)
+{
+	unsigned int old = (unsigned int)inb(p->base+ECONTROL);
+	outb(((old & ~mask) ^ val), p->base+ECONTROL);
+	return old;
+}
+
+static void pc_change_mode(struct parport *p, int m)
+{
+	/* FIXME */
+}
+
+static void pc_write_fifo(struct parport *p, unsigned int v)
+{
+	/* FIXME */
+}
+
+static unsigned int pc_read_fifo(struct parport *p)
+{
+	return 0; /* FIXME */
+}
+
+static void pc_disable_irq(struct parport *p)
+{
+	/* FIXME */
+}
+
+static void pc_enable_irq(struct parport *p)
+{
+	/* FIXME */
+}
+
+static void pc_release_resources(struct parport *p)
+{
+	if (p->irq != PARPORT_IRQ_NONE)
+		free_irq(p->irq, NULL);
+	release_region(p->base, p->size);
+	if (p->modes & PARPORT_MODE_PCECR)
+		release_region(p->base+0x400, 3);
+}
+
+static int pc_claim_resources(struct parport *p)
+{
+	/* FIXME check that resources are free */
+	if (p->irq != PARPORT_IRQ_NONE)
+		request_irq(p->irq, pc_null_intr_func, 0, p->name, NULL);
+	request_region(p->base, p->size, p->name);
+	if (p->modes & PARPORT_MODE_PCECR)
+		request_region(p->base+0x400, 3, p->name);
+	return 0;
+}
+
+static void pc_save_state(struct parport *p, struct parport_state *s)
+{
+	/* FIXME */
+}
+
+static void pc_restore_state(struct parport *p, struct parport_state *s)
+{
+	/* FIXME */
+}
+
+static unsigned int pc_epp_read_block(struct parport *p, void *buf, unsigned  int length)
+{
+	return 0; /* FIXME */
+}
+
+static unsigned int pc_epp_write_block(struct parport *p, void *buf, unsigned  int length)
+{
+	return 0; /* FIXME */
+}
+
+static unsigned int pc_ecp_read_block(struct parport *p, void *buf, unsigned  int length, void (*fn)(struct parport *, void *, unsigned int), void *handle)
+{
+	return 0; /* FIXME */
+}
+
+static unsigned int pc_ecp_write_block(struct parport *p, void *buf, unsigned  int length, void (*fn)(struct parport *, void *, unsigned int), void *handle)
+{
+	return 0; /* FIXME */
+}
+
+static int pc_examine_irq(struct parport *p)
+{
+	return 0; /* FIXME */
+}
+
+static struct parport_operations pc_ops = 
+{
+	pc_write_data,
+	pc_read_data,
+
+	pc_write_control,
+	pc_read_control,
+	pc_frob_control,
+
+	pc_write_econtrol,
+	pc_read_econtrol,
+	pc_frob_econtrol,
+
+	pc_write_status,
+	pc_read_status,
+
+	pc_write_fifo,
+	pc_read_fifo,
+	
+	pc_change_mode,
+	
+	pc_release_resources,
+	pc_claim_resources,
+	
+	pc_epp_write_block,
+	pc_epp_read_block,
+
+	pc_ecp_write_block,
+	pc_ecp_read_block,
+	
+	pc_save_state,
+	pc_restore_state,
+
+	pc_enable_irq,
+	pc_disable_irq,
+	pc_examine_irq 
+};
+
+/******************************************************
+ *  DMA detection section:
+ */
+
+/*
+ * Prepare DMA channels from 0-8 to transmit towards buffer
+ */
+static int parport_prepare_dma(char *buff, int size)
+{
+	int tmp = 0;
+	int i,retv;
+	
+	for (i = 0; i < 8; i++) {
+		retv = request_dma(i, "probe");
+		if (retv)
+			continue;
+		tmp |= 1 << i;
+
+		cli();
+		disable_dma(i);
+		clear_dma_ff(i);
+		set_dma_addr(i, virt_to_bus(buff));
+		set_dma_count(i, size);
+		set_dma_mode(i, DMA_MODE_READ);
+		sti();
+	}
+
+	return tmp;
+}
+
+/*
+ * Activate all DMA channels passed in dma
+ */
+static int parport_enable_dma(int dma)
+{
+	int i;
+	
+	for (i = 0; i < 8; i++)
+		if (dma & (1 << i)) {
+		cli();
+		enable_dma(i);
+		sti();
+	    }
+
+	return dma;
+}
+
+static int parport_detect_dma_transfer(int dma, int size)
+{
+	int i,n,retv;
+	int count=0;
+
+	retv = PARPORT_DMA_NONE;
+	for (i = 0; i < 8; i++)
+		if (dma & (1 << i)) {
+			disable_dma(i);
+			clear_dma_ff(i);
+			n = get_dma_residue(i);
+			if (n != size) {
+				retv = i;
+				if (count > 0) {
+					retv = PARPORT_DMA_NONE; /* Multiple DMA's */
+					printk(KERN_ERR "parport: multiple DMA detected.  Huh?\n");
+				}
+				count++;
+			}
+			free_dma(i);
+		}
+
+	return retv;	
+}
+
+/* Only if supports ECP mode */
+static int programmable_dma_support(struct parport *pb)
+{
+	int dma, oldstate = pc_read_econtrol(pb);
+
+	pc_write_econtrol(pb, 0xe0); /* Configuration MODE */
+	
+	dma = pc_read_configb(pb) & 0x07;
+
+	pc_write_econtrol(pb, oldstate);
+	
+	if (dma == 0 || dma == 4) /* Jumper selection */
+		return PARPORT_DMA_NONE;
+	else
+		return dma;
+}
+
+/* Only called if port supports ECP mode.
+ *
+ * The only restriction on DMA channels is that it has to be
+ * between 0 to 7 (inclusive). Used only in an ECP mode, DMAs are
+ * considered a shared resource and hence they should be registered
+ * when needed and then immediately unregistered.
+ *
+ * DMA autoprobes for ECP mode are known not to work for some
+ * main board BIOS configs. I had to remove everything from the
+ * port, set the mode to SPP, reboot to DOS, set the mode to ECP,
+ * and reboot again, then I got IRQ probes and DMA probes to work.
+ * [Is the BIOS doing a device detection?]
+ *
+ * A value of PARPORT_DMA_NONE is allowed indicating no DMA support.
+ *
+ * if( 0 < DMA < 4 )
+ *    1Byte DMA transfer
+ * else // 4 < DMA < 8
+ *    2Byte DMA transfer
+ *
+ */
+static int parport_dma_probe(struct parport *pb)
+{
+	int dma,retv;
+	int dsr,dsr_read;
+	char *buff;
+
+	retv = programmable_dma_support(pb);
+	if (retv != PARPORT_DMA_NONE)
+		return retv;
+	
+	if (!(buff = kmalloc(2048, GFP_KERNEL | GFP_DMA))) {
+	    printk(KERN_ERR "parport: memory squeeze\n");
+	    return PARPORT_DMA_NONE;
+	}
+	
+ 	dsr = pb->ops->read_control(pb);
+	dsr_read = (dsr & ~(0x20)) | 0x04;    /* Direction == read */
+
+	pb->ops->write_econtrol(pb, 0xc0);	   /* ECP MODE */
+ 	pb->ops->write_control(pb, dsr_read );
+	dma = parport_prepare_dma(buff, 1000);
+	pb->ops->write_econtrol(pb, 0xd8);	   /* ECP FIFO + enable DMA */
+	parport_enable_dma(dma);
+	udelay(500);           /* Give some for DMA tranfer */
+	retv = parport_detect_dma_transfer(dma, 1000);
+	
+	/*
+	 * National Semiconductors only supports DMA tranfers
+	 * in ECP MODE
+	 */
+	if (retv == PARPORT_DMA_NONE) {
+		pb->ops->write_econtrol(pb, 0x60);	   /* ECP MODE */
+		pb->ops->write_control(pb, dsr_read );
+		dma=parport_prepare_dma(buff,1000);
+		pb->ops->write_econtrol(pb, 0x68);	   /* ECP FIFO + enable DMA */
+		parport_enable_dma(dma);
+		udelay(500);           /* Give some for DMA tranfer */
+		retv = parport_detect_dma_transfer(dma, 1000);
+	}
+	
+	kfree(buff);
+	
+	return retv;
+}
+/******************************************************
+ *  MODE detection section:
+ */
+
+/*
+ * Clear TIMEOUT BIT in EPP MODE
+ */
+static int epp_clear_timeout(struct parport *pb)
+{
+	int r;
+
+	if (!(pc_read_status(pb) & 0x01))
+		return 1;
+
+	/* To clear timeout some chips require double read */
+	pc_read_status(pb);
+	r = pc_read_status(pb);
+	pc_write_status(pb, r | 0x01); /* Some reset by writing 1 */
+	pc_write_status(pb, r & 0xfe); /* Others by writing 0 */
+	r = pc_read_status(pb);
+
+	return !(r & 0x01);
+}
+
+
+/*
+ * Checks for port existence, all ports support SPP MODE
+ */
+static int parport_SPP_supported(struct parport *pb)
+{
+	/* Do a simple read-write test to make sure the port exists. */
+	pc_write_control(pb, 0xc);
+	pc_write_data(pb, 0xaa);
+	if (pc_read_data(pb) != 0xaa) return 0;
+	
+	pc_write_data(pb, 0x55);
+	if (pc_read_data(pb) != 0x55) return 0;
+
+	return PARPORT_MODE_PCSPP;
+}
+
+/* Check for ECP
+ *
+ * Old style XT ports alias io ports every 0x400, hence accessing ECR
+ * on these cards actually accesses the CTR.
+ *
+ * Modern cards don't do this but reading from ECR will return 0xff
+ * regardless of what is written here if the card does NOT support
+ * ECP.
+ *
+ * We will write 0x2c to ECR and 0xcc to CTR since both of these
+ * values are "safe" on the CTR since bits 6-7 of CTR are unused.
+ */
+static int parport_ECR_present(struct parport *pb)
+{
+	int r, octr = pc_read_control(pb), oecr = pc_read_econtrol(pb);
+
+	r= pc_read_control(pb);	
+	if ((pc_read_econtrol(pb) & 0x03) == (r & 0x03)) {
+		pc_write_control(pb, r ^ 0x03 ); /* Toggle bits 0-1 */
+
+		r= pc_read_control(pb);	
+		if ((pc_read_econtrol(pb) & 0x03) == (r & 0x03))
+			return 0; /* Sure that no ECR register exists */
+	}
+	
+	if ((pc_read_econtrol(pb) & 0x03 ) != 0x01)
+		return 0;
+
+	pc_write_econtrol(pb,0x34);
+	if (pc_read_econtrol(pb) != 0x35)
+		return 0;
+
+	pc_write_econtrol(pb, oecr);
+	pc_write_control(pb, octr);
+	
+	return PARPORT_MODE_PCECR;
+}
+
+static int parport_ECP_supported(struct parport *pb)
+{
+	int i, oecr = pc_read_econtrol(pb);
+	
+	/* If there is no ECR, we have no hope of supporting ECP. */
+	if (!(pb->modes & PARPORT_MODE_PCECR))
+		return 0;
+
+	/*
+	 * Using LGS chipset it uses ECR register, but
+	 * it doesn't support ECP or FIFO MODE
+	 */
+	
+	pc_write_econtrol(pb, 0xc0); /* TEST FIFO */
+	for (i=0; i < 1024 && (pc_read_econtrol(pb) & 0x01); i++)
+		pc_write_fifo(pb, 0xaa);
+
+	pc_write_econtrol(pb, oecr);
+	return (i==1024)?0:PARPORT_MODE_PCECP;
+}
+
+/* EPP mode detection
+ * Theory:
+ *	Bit 0 of STR is the EPP timeout bit, this bit is 0
+ *	when EPP is possible and is set high when an EPP timeout
+ *	occurs (EPP uses the HALT line to stop the CPU while it does
+ *	the byte transfer, an EPP timeout occurs if the attached
+ *	device fails to respond after 10 micro seconds).
+ *
+ *	This bit is cleared by either reading it (National Semi)
+ *	or writing a 1 to the bit (SMC, UMC, WinBond), others ???
+ *	This bit is always high in non EPP modes.
+ */
+static int parport_EPP_supported(struct parport *pb)
+{
+	/* If EPP timeout bit clear then EPP available */
+	if (!epp_clear_timeout(pb))
+		return 0;  /* No way to clear timeout */
+
+	pc_write_control(pb, pc_read_control(pb) | 0x20);
+	pc_write_control(pb, pc_read_control(pb) | 0x10);
+	epp_clear_timeout(pb);
+	
+	pc_read_epp(pb);
+	udelay(30);  /* Wait for possible EPP timeout */
+	
+	if (pc_read_status(pb) & 0x01) {
+		epp_clear_timeout(pb);
+		return PARPORT_MODE_PCEPP;
+	}
+
+	return 0;
+}
+
+static int parport_ECPEPP_supported(struct parport *pb)
+{
+	int mode, oecr = pc_read_econtrol(pb);
+
+	if (!(pb->modes & PARPORT_MODE_PCECR))
+		return 0;
+	
+	/* Search for SMC style EPP+ECP mode */
+	pc_write_econtrol(pb, 0x80);
+	
+	mode = parport_EPP_supported(pb);
+
+	pc_write_econtrol(pb, oecr);
+	
+	return mode?PARPORT_MODE_PCECPEPP:0;
+}
+
+/* Detect PS/2 support.
+ *
+ * Bit 5 (0x20) sets the PS/2 data direction; setting this high
+ * allows us to read data from the data lines.  In theory we would get back
+ * 0xff but any peripheral attached to the port may drag some or all of the
+ * lines down to zero.  So if we get back anything that isn't the contents
+ * of the data register we deem PS/2 support to be present. 
+ *
+ * Some SPP ports have "half PS/2" ability - you can't turn off the line
+ * drivers, but an external peripheral with sufficiently beefy drivers of
+ * its own can overpower them and assert its own levels onto the bus, from
+ * where they can then be read back as normal.  Ports with this property
+ * and the right type of device attached are likely to fail the SPP test,
+ * (as they will appear to have stuck bits) and so the fact that they might
+ * be misdetected here is rather academic. 
+ */
+
+static int parport_PS2_supported(struct parport *pb)
+{
+	int ok = 0, octr = pc_read_control(pb);
+  
+	epp_clear_timeout(pb);
+
+	pc_write_control(pb, octr | 0x20);  /* try to tri-state the buffer */
+	
+	pc_write_data(pb, 0x55);
+	if (pc_read_data(pb) != 0x55) ok++;
+
+	pc_write_data(pb, 0xaa);
+	if (pc_read_data(pb) != 0xaa) ok++;
+	
+	pc_write_control(pb, octr);          /* cancel input mode */
+
+	return ok?PARPORT_MODE_PCPS2:0;
+}
+
+static int parport_ECPPS2_supported(struct parport *pb)
+{
+	int mode, oecr = pc_read_econtrol(pb);
+
+	if (!(pb->modes & PARPORT_MODE_PCECR))
+		return 0;
+	
+	pc_write_econtrol(pb, 0x20);
+	
+	mode = parport_PS2_supported(pb);
+
+	pc_write_econtrol(pb, oecr);
+	return mode?PARPORT_MODE_PCECPPS2:0;
+}
+
+/******************************************************
+ *  IRQ detection section:
+ *
+ * This code is for detecting ECP interrupts (due to problems with the
+ * monolithic interrupt probing routines).
+ *
+ * In short this is a voting system where the interrupt with the most
+ * "votes" is the elected interrupt (it SHOULD work...)
+ *
+ * This is horribly x86-specific at the moment.  I'm not convinced it
+ * belongs at all.
+ */
+
+static int intr_vote[16];
+
+static void parport_vote_intr_func(int irq, void *dev_id, struct pt_regs *regs)
+{
+	intr_vote[irq]++;
+	return;
+}
+
+static long open_intr_election(void)
+{
+	long tmp = 0;
+	int i;
+
+	/* We ignore the timer - irq 0 */
+	for (i = 1; i < 16; i++) {
+		intr_vote[i] = 0;
+		if (request_irq(i, parport_vote_intr_func,
+		       SA_INTERRUPT, "probe", intr_vote) == 0)
+			tmp |= 1 << i;
+	}
+	return tmp;
+}
+
+static int close_intr_election(long tmp)
+{
+	int irq = PARPORT_IRQ_NONE;
+	int i;
+
+	/* We ignore the timer - irq 0 */
+	for (i = 1; i < 16; i++)
+		if (tmp & (1 << i)) {
+			if (intr_vote[i]) {
+				if (irq != PARPORT_IRQ_NONE)
+					/* More than one interrupt */
+					return PARPORT_IRQ_NONE;
+				irq = i;
+			}
+			free_irq(i, intr_vote);
+		}
+	return irq;
+}
+
+/* Only if supports ECP mode */
+static int programmable_irq_support(struct parport *pb)
+{
+	int irq, oecr = pc_read_econtrol(pb);
+
+	pc_write_econtrol(pb,0xE0); /* Configuration MODE */
+	
+	irq = (pc_read_configb(pb) >> 3) & 0x07;
+
+	switch(irq){
+	case 2:
+		irq = 9;
+		break;
+	case 7:
+		irq = 5;
+		break;
+	case 0:
+		irq = PARPORT_IRQ_NONE;
+		break;
+	default:
+		irq += 7;
+	}
+	
+	pc_write_econtrol(pb, oecr);
+	return irq;
+}
+
+static int irq_probe_ECP(struct parport *pb)
+{
+	int irqs, i, oecr = pc_read_econtrol(pb);
+		
+	probe_irq_off(probe_irq_on());	/* Clear any interrupts */
+	irqs = open_intr_election();
+		
+	pc_write_econtrol(pb, 0x00);	    /* Reset FIFO */
+	pc_write_econtrol(pb, 0xd0);	    /* TEST FIFO + nErrIntrEn */
+
+	/* If Full FIFO sure that WriteIntrThresold is generated */
+	for (i=0; i < 1024 && !(pc_read_econtrol(pb) & 0x02) ; i++) 
+		pc_write_fifo(pb, 0xaa);
+		
+	pb->irq = close_intr_election(irqs);
+	pc_write_econtrol(pb, oecr);
+	return pb->irq;
+}
+
+/*
+ * This detection seems that only works in National Semiconductors
+ * This doesn't work in SMC, LGS, and Winbond 
+ */
+static int irq_probe_EPP(struct parport *pb)
+{
+	int irqs, octr = pc_read_control(pb);
+
+#ifndef ADVANCED_DETECT
+	return PARPORT_IRQ_NONE;
+#endif
+	
+	probe_irq_off(probe_irq_on());	/* Clear any interrupts */
+	irqs = open_intr_election();
+
+	if (pb->modes & PARPORT_MODE_PCECR)
+		pc_write_econtrol(pb, pc_read_econtrol(pb) | 0x10);
+	
+	epp_clear_timeout(pb);
+	pc_write_control(pb, pc_read_control(pb) | 0x20);
+	pc_write_control(pb, pc_read_control(pb) | 0x10);
+	epp_clear_timeout(pb);
+
+	/*  Device isn't expecting an EPP read
+	 * and generates an IRQ.
+	 */
+	pc_read_epp(pb);
+	udelay(20);
+
+	pb->irq = close_intr_election(irqs);
+	pc_write_control(pb, octr);
+	return pb->irq;
+}
+
+static int irq_probe_SPP(struct parport *pb)
+{
+	int irqs, octr = pc_read_control(pb);
+
+#ifndef ADVANCED_DETECT
+	return PARPORT_IRQ_NONE;
+#endif
+
+	probe_irq_off(probe_irq_on());	/* Clear any interrupts */
+	irqs = probe_irq_on();
+
+	if (pb->modes & PARPORT_MODE_PCECR)
+		pc_write_econtrol(pb, 0x10);
+
+	pc_write_data(pb,0x00);
+	pc_write_control(pb,0x00);
+	pc_write_control(pb,0x0c);
+	udelay(5);
+	pc_write_control(pb,0x0d);
+	udelay(5);
+	pc_write_control(pb,0x0c);
+	udelay(25);
+	pc_write_control(pb,0x08);
+	udelay(25);
+	pc_write_control(pb,0x0c);
+	udelay(50);
+
+	pb->irq = probe_irq_off(irqs);
+	if (pb->irq <= 0)
+		pb->irq = PARPORT_IRQ_NONE;	/* No interrupt detected */
+	
+	pc_write_control(pb, octr);
+	return pb->irq;
+}
+
+/* We will attempt to share interrupt requests since other devices
+ * such as sound cards and network cards seem to like using the
+ * printer IRQs.
+ *
+ * When ECP is available we can autoprobe for IRQs.
+ * NOTE: If we can autoprobe it, we can register the IRQ.
+ */
+static int parport_irq_probe(struct parport *pb)
+{
+	if (pb->modes & PARPORT_MODE_PCECR)
+		pb->irq = programmable_irq_support(pb);
+
+	if (pb->modes & PARPORT_MODE_PCECP)
+		pb->irq = irq_probe_ECP(pb);
+			
+	if (pb->irq == PARPORT_IRQ_NONE && 
+	    (pb->modes & PARPORT_MODE_PCECPEPP)) {
+		int oecr = pc_read_econtrol(pb);
+		pc_write_econtrol(pb, 0x80);
+		pb->irq = irq_probe_EPP(pb);
+		pc_write_econtrol(pb, oecr);
+	}
+
+	epp_clear_timeout(pb);
+
+	if (pb->irq == PARPORT_IRQ_NONE && (pb->modes & PARPORT_MODE_PCEPP))
+		pb->irq = irq_probe_EPP(pb);
+
+	epp_clear_timeout(pb);
+
+	if (pb->irq == PARPORT_IRQ_NONE)
+		pb->irq = irq_probe_SPP(pb);
+
+	return pb->irq;
+}
+
+static int probe_one_port(unsigned long int base, int irq, int dma)
+{
+	struct parport tmpport, *p;
+	if (check_region(base, 3)) return 0;
+	tmpport.base = base;
+	tmpport.ops = &pc_ops;
+	if (!(parport_SPP_supported(&tmpport))) return 0;
+       	if (!(p = parport_register_port(base, irq, dma, &pc_ops))) return 0;
+	p->modes = PARPORT_MODE_PCSPP | parport_PS2_supported(p);
+	if (p->base != 0x3bc) {
+		if (!check_region(base+0x400,3)) {
+			p->modes |= parport_ECR_present(p);	
+			p->modes |= parport_ECP_supported(p);
+			p->modes |= parport_ECPPS2_supported(p);
+		}
+		if (!check_region(base+0x3, 5)) {
+			p->modes |= parport_EPP_supported(p);
+			p->modes |= parport_ECPEPP_supported(p);
+		}
+	}
+	p->size = (p->modes & (PARPORT_MODE_PCEPP 
+			       | PARPORT_MODE_PCECPEPP))?8:3;
+	printk(KERN_INFO "%s: PC-style at 0x%x", p->name, p->base);
+	if (p->irq == PARPORT_IRQ_AUTO) {
+		p->irq = PARPORT_IRQ_NONE;
+		parport_irq_probe(p);
+	}
+	if (p->irq != PARPORT_IRQ_NONE)
+		printk(", irq %d", p->irq);
+	if (p->irq != PARPORT_DMA_NONE)
+		printk(", dma %d", p->dma);
+	printk(" [");
+#define printmode(x) {if(p->modes&PARPORT_MODE_PC##x){printk("%s%s",f?",":"",#x);f++;}}
+	{
+		int f = 0;
+		printmode(SPP);
+		printmode(PS2);
+		printmode(EPP);
+		printmode(ECP);
+		printmode(ECPEPP);
+		printmode(ECPPS2);
+	}
+#undef printmode
+	printk("]\n");
+	return 1;
+}
+
+int parport_pc_init(int *io, int *irq, int *dma)
+{
+	int count = 0, i = 0;
+	if (io && *io) {
+		/* Only probe the ports we were given. */
+		do {
+			count += probe_one_port(*(io++), *(irq++), *(dma++));
+		} while (*io && (++i < PC_MAX_PORTS));
+	} else {
+		/* Probe all the likely ports. */
+		count += probe_one_port(0x378, PARPORT_IRQ_AUTO, PARPORT_DMA_AUTO);
+		
+#if defined(__i386__)
+		count += probe_one_port(0x278, PARPORT_IRQ_AUTO, PARPORT_DMA_AUTO);
+		count += probe_one_port(0x3bc, PARPORT_IRQ_AUTO, PARPORT_DMA_AUTO);
+#endif
+	}
+	return count;
+}
+
+#ifdef MODULE
+static int io[PC_MAX_PORTS+1] = { 0, };
+static int dma[PC_MAX_PORTS] = { PARPORT_DMA_AUTO, };
+static int irq[PC_MAX_PORTS] = { PARPORT_IRQ_AUTO, };
+MODULE_PARM(io, "1-" __MODULE_STRING(PC_MAX_PORTS) "i");
+MODULE_PARM(irq, "1-" __MODULE_STRING(PC_MAX_PORTS) "i");
+MODULE_PARM(dma, "1-" __MODULE_STRING(PC_MAX_PORTS) "i");
+
+static int init_module(void)
+{	
+	return (parport_pc_init(NULL, NULL, NULL)?0:1);
+}
+
+static void cleanup_module(void)
+{
+	struct parport *p = parport_enumerate();
+	while (p) {
+		if (p->modes & PARPORT_MODE_PCSPP) { 
+			if (!(p->flags & PARPORT_FLAG_COMA)) 
+				parport_quiesce(p);
+		}
+		p = p->next;
+	}
+}
+#endif
diff --git a/drivers/misc/parport_procfs.c b/drivers/misc/parport_procfs.c
new file mode 100644
index 000000000..5365c0df7
--- /dev/null
+++ b/drivers/misc/parport_procfs.c
@@ -0,0 +1,341 @@
+/* $Id: parport_procfs.c,v 1.1 1997/07/25 01:53:18 ralf Exp $
+ * Parallel port /proc interface code.
+ * 
+ * Authors: David Campbell <campbell@tirian.che.curtin.edu.au>
+ *          Tim Waugh <tmw20@cam.ac.uk>
+ *
+ * based on work by Grant Guenther <grant@torque.net>
+ *              and Philip Blundell <Philip.Blundell@pobox.com>
+ */
+
+#include <linux/tasks.h>
+#include <asm/ptrace.h>
+#include <asm/io.h>
+#include <asm/dma.h>
+
+#include <linux/config.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/kernel.h>
+#include <linux/malloc.h>
+
+#include <linux/proc_fs.h>
+
+#include <linux/parport.h>
+
+#undef PARPORT_INCLUDE_BENCH
+
+struct proc_dir_entry *base=NULL;
+
+extern void parport_null_intr_func(int irq, void *dev_id, struct pt_regs *regs);
+
+static int irq_write_proc(struct file *file, const char *buffer,
+					  unsigned long count, void *data)
+{
+	int newirq;
+	struct parport *pp = (struct parport *)data;
+	
+	if (count > 4 )  /* more than 4 digits for a irq 0x?? 0?? ??  */
+		return(-EOVERFLOW);
+
+	if (buffer[0] < 32 || !strncmp(buffer, "none", 4)) {
+		newirq = PARPORT_IRQ_NONE;
+	} else {
+		if (buffer[0] == '0') {
+			if( buffer[1] == 'x' )
+				newirq = simple_strtoul(&buffer[2],0,16);
+			else
+				newirq = simple_strtoul(&buffer[1],0,8);
+		} else {
+			newirq = simple_strtoul(buffer,0,10);
+		}
+	}
+
+	if (pp->irq != PARPORT_IRQ_NONE && !(pp->flags & PARPORT_FLAG_COMA)) 
+		free_irq(pp->irq, pp);
+
+	pp->irq = newirq;
+
+	if (pp->irq != PARPORT_IRQ_NONE && !(pp->flags & PARPORT_FLAG_COMA)) { 
+		struct pardevice *pd = pp->cad;
+
+		if (pd == NULL) {
+			pd = pp->devices;
+			if (pd != NULL) 
+				request_irq(pp->irq, pd->irq_func ? 
+					    pd->irq_func :
+					    parport_null_intr_func,
+					    SA_INTERRUPT, pd->name, pd->port);
+		} else {
+			request_irq(pp->irq, pd->irq_func ? pd->irq_func :
+				    parport_null_intr_func,
+				    SA_INTERRUPT, pp->name, pd->port);
+		}
+	}
+
+	return count;
+}
+
+static int irq_read_proc(char *page, char **start, off_t off,
+					 int count, int *eof, void *data)
+{
+	struct parport *pp = (struct parport *)data;
+	int len;
+	
+	if (pp->irq == PARPORT_IRQ_NONE)
+		len = sprintf(page, "none\n");
+	else
+		len = sprintf(page, "%d\n", pp->irq);
+	
+	*start = 0;
+	*eof   = 1;
+	return len;
+}
+
+static int devices_read_proc(char *page, char **start, off_t off,
+					 int count, int *eof, void *data)
+{
+	struct parport *pp = (struct parport *)data;
+	struct pardevice *pd1;
+	int len=0;
+
+	for (pd1 = pp->devices; pd1 ; pd1 = pd1->next) {
+		if (pd1 == pp->cad)
+			len += sprintf(page+len, "+");
+		else
+			len += sprintf(page+len, " ");
+
+		len += sprintf(page+len, "%s",pd1->name);
+
+		if (pd1 == pp->lurker)
+			len += sprintf(page+len, " LURK");
+		
+		len += sprintf(page+len,"\n");
+	}
+		
+	*start = 0;
+	*eof   = 1;
+	return len;
+}
+
+static int hardware_read_proc(char *page, char **start, off_t off,
+							  int count, int *eof, void *data)
+{
+	struct parport *pp = (struct parport *)data;
+	int len=0;
+	
+	len += sprintf(page+len, "base:\t0x%x\n",pp->base);
+	if (pp->irq == PARPORT_IRQ_NONE)
+		len += sprintf(page+len, "irq:\tnone\n");
+	else
+		len += sprintf(page+len, "irq:\t%d\n",pp->irq);
+	len += sprintf(page+len, "dma:\t%d\n",pp->dma);
+
+
+#if 0
+	len += sprintf(page+len, "modes:\t");
+	{
+#define printmode(x) {if(pp->modes&PARPORT_MODE_##x){len+=sprintf(page+len,"%s%s",f?",":"",#x);f++;}}
+		int f = 0;
+		printmode(SPP);
+		printmode(PS2);
+		printmode(EPP);
+		printmode(ECP);
+		printmode(ECPEPP);
+		printmode(ECPPS2);
+#undef printmode
+	}
+	len += sprintf(page+len, "\n");
+
+	len += sprintf(page+len, "mode:\t");
+	if (pp->modes & PARPORT_MODE_ECR) {
+		switch (r_ecr(pp) >> 5) {
+		case 0:
+			len += sprintf(page+len, "SPP");
+			if( pp->modes & PARPORT_MODE_PS2 )
+				len += sprintf(page+len, ",PS2");
+			if( pp->modes & PARPORT_MODE_EPP )
+				len += sprintf(page+len, ",EPP");
+			break;
+		case 1:
+			len += sprintf(page+len, "ECPPS2");
+			break;
+		case 2:
+			len += sprintf(page+len, "DATAFIFO");
+			break;
+		case 3:
+			len += sprintf(page+len, "ECP");
+			break;
+		case 4:
+			len += sprintf(page+len, "ECPEPP");
+			break;
+		case 5:
+			len += sprintf(page+len, "Reserved?");
+			break;
+		case 6:
+			len += sprintf(page+len, "TEST");
+			break;
+		case 7:
+			len += sprintf(page+len, "Configuration");
+			break;
+		}
+	} else {
+		len += sprintf(page+len, "SPP");
+		if (pp->modes & PARPORT_MODE_PS2)
+			len += sprintf(page+len, ",PS2");
+		if (pp->modes & PARPORT_MODE_EPP)
+			len += sprintf(page+len, ",EPP");
+	}
+	len += sprintf(page+len, "\n");
+#endif	
+#if 0
+	/* Now no detection, please fix with an external function */
+	len += sprintf(page+len, "chipset:\tunknown\n");
+#endif
+#ifdef PARPORT_INCLUDE_BENCHMARK
+	if (pp->speed)
+		len += sprintf(page+len, "bench:\t%d Bytes/s\n",pp->speed);
+	else
+		len += sprintf(page+len, "bench:\tunknown\n");
+#endif	
+
+	*start = 0;
+	*eof   = 1;
+	return len;
+}
+
+static struct proc_dir_entry *new_proc_entry(const char *name, mode_t mode,
+					     struct proc_dir_entry *parent,
+					     unsigned short ino)
+{
+	struct proc_dir_entry *ent;
+
+	ent = kmalloc(sizeof(struct proc_dir_entry), GFP_KERNEL);
+	if (!ent)
+		return NULL;
+	memset(ent, 0, sizeof(struct proc_dir_entry));
+	
+	if (mode == S_IFDIR)
+		mode |= S_IRUGO | S_IXUGO;
+	else if (mode == 0)
+		mode = S_IFREG | S_IRUGO;
+
+
+	ent->low_ino = ino;
+	ent->name = name;
+	ent->namelen = strlen(name);
+	ent->mode = mode;
+	if (S_ISDIR(mode)) 
+		ent->nlink = 2;
+	else
+		ent->nlink = 1;
+
+	proc_register(parent, ent);
+	
+	return ent;
+}
+
+
+int parport_proc_init()
+{
+	base = new_proc_entry("parport", S_IFDIR, &proc_root,PROC_PARPORT);
+
+	if (base)
+		return 1;
+	else {
+		printk(KERN_ERR "parport: Error creating proc entry /proc/parport\n");
+		return 0;
+	}
+}
+
+int parport_proc_cleanup()
+{
+	if (base)
+		proc_unregister(&proc_root,base->low_ino);
+
+	base = NULL;
+	
+	return 0;
+}
+
+int parport_proc_register(struct parport *pp)
+{
+	struct proc_dir_entry *ent;
+	static int conta=0;
+	char *name;
+
+	memset(&pp->pdir,0,sizeof(struct parport_dir));
+
+	if (!base) {
+		printk(KERN_ERR "parport: Error entry /proc/parport, not generated?\n");
+		return 1;
+	}
+	
+	name = pp->pdir.name;
+	sprintf(name,"%d",conta++);
+
+	ent = new_proc_entry(name, S_IFDIR, base,0);
+	if (!ent) {
+		printk(KERN_ERR "parport: Error registering proc_entry /proc/%s\n",name);
+		return 1;
+	}
+	pp->pdir.entry = ent;
+
+	ent = new_proc_entry("irq", S_IFREG | S_IRUGO | S_IWUSR, pp->pdir.entry,0);
+	if (!ent) {
+		printk(KERN_ERR "parport: Error registering proc_entry /proc/%s/irq\n",name);
+		return 1;
+	}
+	ent->read_proc = irq_read_proc;
+	ent->write_proc= irq_write_proc;
+	ent->data      = pp;
+	pp->pdir.irq   = ent;
+	
+	ent = new_proc_entry("devices", 0, pp->pdir.entry,0);
+	if (!ent) {
+		printk(KERN_ERR "parport: Error registering proc_entry /proc/%s/devices\n",name);
+		return 1;
+	}
+	ent->read_proc   = devices_read_proc;
+	ent->data        = pp;
+	pp->pdir.devices = ent;
+	
+	ent = new_proc_entry("hardware", 0, pp->pdir.entry,0);
+	if (!ent) {
+		printk(KERN_ERR "parport: Error registering proc_entry /proc/%s/hardware\n",name);
+		return 1;
+	}
+	ent->read_proc    = hardware_read_proc;
+	ent->data         = pp;
+	pp->pdir.hardware = ent;
+	return 0;
+}
+
+int parport_proc_unregister(struct parport *pp)
+{
+	if (pp->pdir.entry) {
+		if (pp->pdir.irq) {
+			proc_unregister(pp->pdir.entry, pp->pdir.irq->low_ino);
+			kfree(pp->pdir.irq);
+		}
+		
+		if (pp->pdir.devices) {
+			proc_unregister(pp->pdir.entry,
+					pp->pdir.devices->low_ino);
+			kfree(pp->pdir.devices);
+		}
+		
+		if (pp->pdir.hardware) {
+			proc_unregister(pp->pdir.entry,
+					pp->pdir.hardware->low_ino);
+			kfree(pp->pdir.hardware);
+		}
+		
+		proc_unregister(base, pp->pdir.entry->low_ino);
+		kfree(pp->pdir.entry);
+	}
+	
+	return 0;
+}
diff --git a/drivers/misc/parport_share.c b/drivers/misc/parport_share.c
new file mode 100644
index 000000000..55b64e856
--- /dev/null
+++ b/drivers/misc/parport_share.c
@@ -0,0 +1,319 @@
+/* $Id: parport_share.c,v 1.1 1997/07/25 01:53:19 ralf Exp $
+ * Parallel-port resource manager code.
+ * 
+ * Authors: David Campbell <campbell@tirian.che.curtin.edu.au>
+ *          Tim Waugh <tmw20@cam.ac.uk>
+ *	    Jose Renau <renau@acm.org>
+ *
+ * based on work by Grant Guenther <grant@torque.net>
+ *              and Philip Blundell <Philip.Blundell@pobox.com>
+ */
+
+#include <linux/tasks.h>
+
+#include <linux/parport.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/kernel.h>
+#include <linux/malloc.h>
+
+#undef PARPORT_PARANOID
+
+static struct parport *portlist = NULL, *portlist_tail = NULL;
+static int portcount = 0;
+
+/* Return a list of all the ports we know about. */
+struct parport *parport_enumerate(void)
+{
+	return portlist;
+}
+
+void parport_null_intr_func(int irq, void *dev_id, struct pt_regs *regs)
+{
+	/* NULL function - Does nothing */
+	return;
+}
+
+struct parport *parport_register_port(unsigned long base, int irq, int dma,
+				      struct parport_operations *ops)
+{
+	struct parport *tmp;
+
+	/* Check for a previously registered port.
+	 * NOTE: we will ignore irq and dma if we find a previously
+	 * registered device.
+	 */
+	for (tmp = portlist; tmp; tmp = tmp->next) {
+		if (tmp->base == base)
+			return tmp;
+	}
+
+	tmp = kmalloc(sizeof(struct parport), GFP_KERNEL);
+	if (!tmp) {
+		printk(KERN_WARNING "parport: memory squeeze\n");
+		return NULL;
+	}
+
+	/* Init our structure */
+ 	memset(tmp, 0, sizeof(struct parport));
+	tmp->base = base;
+	tmp->irq = irq;
+	tmp->dma = dma;
+	tmp->modes = 0;
+ 	tmp->next = NULL;
+	tmp->devices = tmp->cad = tmp->lurker = NULL;
+	tmp->flags = 0;
+	tmp->ops = ops; 
+
+	tmp->name = kmalloc(15, GFP_KERNEL);
+	if (!tmp->name) {
+		printk(KERN_ERR "parport: memory squeeze\n");
+		kfree(tmp);
+		return NULL;
+	}
+	sprintf(tmp->name, "parport%d", portcount);
+
+	/* Here we chain the entry to our list. */
+	if (portlist_tail)
+		portlist_tail->next = tmp;
+	portlist_tail = tmp;
+	if (!portlist)
+		portlist = tmp;
+
+	portcount++;
+
+	tmp->probe_info.class = PARPORT_CLASS_LEGACY;  /* assume the worst */
+	return tmp;
+}
+
+void parport_quiesce(struct parport *port)
+{
+	if (port->devices) {
+		printk(KERN_WARNING "%s: attempt to quiesce active port.\n", port->name);
+		return;
+	}
+
+	if (port->flags & PARPORT_FLAG_COMA) {
+		printk(KERN_WARNING "%s: attempt to quiesce comatose port.\n", port->name);
+		return;
+	}
+
+	port->ops->release_resources(port);
+
+	port->flags |= PARPORT_FLAG_COMA; 
+}
+
+struct pardevice *parport_register_device(struct parport *port, const char *name,
+			  int (*pf)(void *), int (*kf)(void *),
+			  void (*irq_func)(int, void *, struct pt_regs *), 
+			  int flags, void *handle)
+{
+	struct pardevice *tmp;
+
+	/* We only allow one lurking device. */
+	if (flags & PARPORT_DEV_LURK) {
+		if (port->lurker) {
+			printk(KERN_INFO "%s: refused to register second lurker (%s)\n",
+				   port->name, name);
+			return NULL;
+		}
+		if (!pf || !kf) {
+			printk(KERN_INFO "%s: refused to register lurking device (%s) without callbacks\n", port->name, name);
+			return NULL;
+		}
+	}
+
+	/* We may need to claw back the port hardware. */
+	if (port->flags & PARPORT_FLAG_COMA) {
+		if (port->ops->claim_resources(port)) {
+			printk(KERN_WARNING "%s: unable to get hardware to register %s.\n", port->name, name);
+			return NULL;
+		}
+		port->flags &= ~PARPORT_FLAG_COMA;
+	}
+
+	tmp = kmalloc(sizeof(struct pardevice), GFP_KERNEL);
+	if (tmp == NULL) {
+		printk(KERN_WARNING "%s: memory squeeze, couldn't register %s.\n", port->name, name);
+		return NULL;
+	}
+
+	tmp->state = kmalloc(sizeof(struct parport_state), GFP_KERNEL);
+	if (tmp->state == NULL) {
+		printk(KERN_WARNING "%s: memory squeeze, couldn't register %s.\n", port->name, name);
+		kfree(tmp);
+		return NULL;
+	}
+
+	tmp->name = (char *) name;
+	tmp->port = port;
+	tmp->preempt = pf;
+	tmp->wakeup = kf;
+	tmp->private = handle;
+	tmp->flags = flags;
+	tmp->irq_func = irq_func;
+	port->ops->save_state(port, tmp->state);
+
+	/* Chain this onto the list */
+	tmp->prev = NULL;
+	tmp->next = port->devices;
+	if (port->devices)
+		port->devices->prev = tmp;
+	port->devices = tmp;
+
+	if (flags & PARPORT_DEV_LURK)
+		port->lurker = tmp;
+
+	inc_parport_count();
+
+	return tmp;
+}
+
+void parport_unregister_device(struct pardevice *dev)
+{
+	struct parport *port;
+
+	if (dev == NULL) {
+		printk(KERN_ERR "parport_unregister_device: passed NULL\n");
+		return;
+	}
+
+	port = dev->port;
+
+	if (port->cad == dev) {
+		printk(KERN_WARNING "%s: refused to unregister currently active device %s.\n", port->name, dev->name);
+		return;
+	}
+
+	if (port->lurker == dev)
+		port->lurker = NULL;
+
+	if (dev->next)
+		dev->next->prev = dev->prev;
+	if (dev->prev)
+		dev->prev->next = dev->next;
+	else
+		port->devices = dev->next;
+
+	kfree(dev->state);
+	kfree(dev);
+
+	dec_parport_count();
+
+	/* If there are no more devices, put the port to sleep. */
+	if (!port->devices)
+		parport_quiesce(port);
+
+	return;
+}
+
+int parport_claim(struct pardevice *dev)
+{
+	struct pardevice *pd1;
+
+	if (dev->port->cad == dev) {
+		printk(KERN_INFO "%s: %s already owner\n",
+			   dev->port->name,dev->name);
+		return 0;
+	}
+
+	/* Preempt any current device */
+	pd1 = dev->port->cad;
+	if (dev->port->cad) {
+		if (dev->port->cad->preempt) {
+			/* Now try to preempt */
+			if (dev->port->cad->preempt(dev->port->cad->private))
+				return -EAGAIN;
+			dev->port->ops->save_state(dev->port, dev->state);
+		} else
+			return -EAGAIN;
+	}
+
+	/* Watch out for bad things */
+	if (dev->port->cad != pd1) {
+		printk(KERN_WARNING "%s: death while preempting %s\n",
+		       dev->port->name, dev->name);
+		if (dev->port->cad)
+			return -EAGAIN;
+	}
+
+	/* Now we do the change of devices */
+	dev->port->cad = dev;
+
+	/* Swap the IRQ handlers. */
+	if (dev->port->irq >= 0) {
+		free_irq(dev->port->irq, dev->port);
+		request_irq(dev->port->irq, dev->irq_func ? dev->irq_func :
+			    parport_null_intr_func, SA_INTERRUPT, dev->name,
+			    dev->port);
+	}
+
+	/* Restore control registers */
+	dev->port->ops->restore_state(dev->port, dev->state);
+
+	return 0;
+}
+
+void parport_release(struct pardevice *dev)
+{
+	struct pardevice *pd1;
+
+	/* Make sure that dev is the current device */
+	if (dev->port->cad != dev) {
+		printk(KERN_WARNING "%s: %s tried to release parport when not owner\n", dev->port->name, dev->name);
+		return;
+	}
+	dev->port->cad = NULL;
+
+	/* Save control registers */
+	dev->port->ops->save_state(dev->port, dev->state);
+
+	/* Point IRQs somewhere harmless. */
+	if (dev->port->irq >= 0) {
+		free_irq(dev->port->irq, dev->port);
+		request_irq(dev->port->irq, parport_null_intr_func,
+			    SA_INTERRUPT, dev->port->name, dev->port);
+ 	}
+
+	/* Walk the list, offering a wakeup callback to everybody other
+	 * than the lurker and the device that called us.
+	 */
+	for (pd1 = dev->next; pd1; pd1 = pd1->next) {
+		if (!(pd1->flags & PARPORT_DEV_LURK)) {
+			if (pd1->wakeup) {
+				pd1->wakeup(pd1->private);
+				if (dev->port->cad)
+					return;
+			}
+		}
+	}
+
+	for (pd1 = dev->port->devices; pd1 && pd1 != dev; pd1 = pd1->next) {
+		if (!(pd1->flags & PARPORT_DEV_LURK)) {
+			if (pd1->wakeup) {
+				pd1->wakeup(pd1->private);
+				if (dev->port->cad)
+					return;
+			}
+		}
+	}
+
+	/* Now give the lurker a chance.
+	 * There should be a wakeup callback because we checked for it
+	 * at registration.
+	 */
+	if (dev->port->lurker && (dev->port->lurker != dev)) {
+		if (dev->port->lurker->wakeup) {
+			dev->port->lurker->wakeup(dev->port->lurker->private);
+		} 
+#ifdef PARPORT_PARANOID
+		else {  /* can't happen */
+			printk(KERN_DEBUG
+			  "%s (%s): lurker's wakeup callback went away!\n",
+			       dev->port->name, dev->name);
+		}
+#endif
+	}
+}
diff --git a/drivers/net/Config.in b/drivers/net/Config.in
index bba3e43b8..4c879ceca 100644
--- a/drivers/net/Config.in
+++ b/drivers/net/Config.in
@@ -16,7 +16,7 @@ tristate 'EQL (serial line load balancing) support' CONFIG_EQUALIZER
 bool 'Ethernet (10 or 100Mbit)' CONFIG_NET_ETHERNET
 if [ "$CONFIG_NET_ETHERNET" = "y" ]; then
   if [ "$CONFIG_MIPS_JAZZ" = "y" ]; then
-    bool 'MIPS JAZZ onboard SONIC ethernet support' CONFIG_MIPS_JAZZ_SONIC
+    tristate 'MIPS JAZZ onboard SONIC ethernet support' CONFIG_MIPS_JAZZ_SONIC
   fi
   bool '3COM cards' CONFIG_NET_VENDOR_3COM
   if [ "$CONFIG_NET_VENDOR_3COM" = "y" ]; then
diff --git a/drivers/net/eexpress.c b/drivers/net/eexpress.c
index 8e8852bc0..eb0117eb4 100644
--- a/drivers/net/eexpress.c
+++ b/drivers/net/eexpress.c
@@ -1493,7 +1493,7 @@ eexp_set_multicast(struct device *dev)
 #endif
                 oj = jiffies;
                 while ((SCB_CUstat(scb_status(dev)) == 2) &&
-                       ((jiffies-oj) < 100));
+                       ((jiffies-oj) < 2000));
 		if (SCB_CUstat(scb_status(dev)) == 2)
 			printk("%s: warning, CU didn't stop\n", dev->name);
                 lp->started &= ~(STARTED_CU);
diff --git a/drivers/net/ibmtr.c b/drivers/net/ibmtr.c
index d803e953e..ad3a6eafd 100644
--- a/drivers/net/ibmtr.c
+++ b/drivers/net/ibmtr.c
@@ -1610,7 +1610,7 @@ void cleanup_module(void)
 			 irq2dev_map[dev_ibmtr[i]->irq] = NULL;
 			 release_region(dev_ibmtr[i]->base_addr, IBMTR_IO_EXTENT);
 			 kfree_s(dev_ibmtr[i]->priv, sizeof(struct tok_info));
-			 kfree_s(dev_ibmtr[i], sizeof(struct dev));
+			 kfree_s(dev_ibmtr[i], sizeof(struct device));
 			 dev_ibmtr[i] = NULL;
                 }
 }
diff --git a/drivers/net/lance.c b/drivers/net/lance.c
index bf4061b05..c827a9518 100644
--- a/drivers/net/lance.c
+++ b/drivers/net/lance.c
@@ -48,12 +48,6 @@ static const char *version = "lance.c:v1.09 Aug 20 1996 dplatt@3do.com, becker@c
 #include <linux/bios32.h>
 #include <linux/init.h>
 #include <asm/bitops.h>
-#ifdef __mips__
-#include <asm/bootinfo.h>
-static unsigned long lance_base;
-extern unsigned long port_base;
-#define PORT_BASE lance_base
-#endif /* __mips__ */
 #include <asm/io.h>
 #include <asm/dma.h>
 
@@ -362,24 +356,6 @@ __initfunc(int lance_init(void))
 	}
 #endif  /* defined(CONFIG_PCI) */
 
-#ifdef __mips__
-	lance_base = port_base;
-	if (mips_machgroup == MACH_GROUP_SNI_RM
-            && mips_machtype == MACH_SNI_RM200_PCI) {
-		int ioaddr = 0x100;
-		lance_base = 0xbb000000;
-		if ( check_region(ioaddr, LANCE_TOTAL_SIZE) == 0) {
-			/* Detect "normal" 0x57 0x57 and the NI6510EB 0x52 0x44
-			   signatures w/ minimal I/O reads */
-			char offset15, offset14 = inb(ioaddr + 14);
-			
-			if ((offset14 == 0x52 || offset14 == 0x57) &&
-				((offset15 = inb(ioaddr + 15)) == 0x57 || offset15 == 0x44))
-				lance_probe1(ioaddr);
-		}
-	}
-	else
-#endif
 	for (port = lance_portlist; *port; port++) {
 		int ioaddr = *port;
 
diff --git a/drivers/net/scc.c b/drivers/net/scc.c
index 4e43e5161..7f1b70b90 100644
--- a/drivers/net/scc.c
+++ b/drivers/net/scc.c
@@ -1,4 +1,4 @@
-#define RCS_ID "$Id: scc.c,v 1.69 1997/04/06 19:22:45 jreuter Exp jreuter $"
+#define RCS_ID "$Id: scc.c,v 1.1.1.1 1997/06/01 03:17:20 ralf Exp $"
 
 #define VERSION "3.0"
 #define BANNER  "Z8530 SCC driver version "VERSION".dl1bke (experimental) by DL1BKE\n"
@@ -165,10 +165,6 @@
 #include <asm/uaccess.h>
 #include <asm/bitops.h>
 
-#include <stdlib.h>
-#include <stdio.h>
-#include <ctype.h>
-#include <time.h>
 #include <linux/kernel.h>
 #include <linux/proc_fs.h>
 
diff --git a/drivers/net/soundmodem/.cvsignore b/drivers/net/soundmodem/.cvsignore
new file mode 100644
index 000000000..1f1dff45f
--- /dev/null
+++ b/drivers/net/soundmodem/.cvsignore
@@ -0,0 +1,3 @@
+.depend
+sm_tbl_*.h
+gentbl
diff --git a/drivers/net/soundmodem/Makefile b/drivers/net/soundmodem/Makefile
index 5259b724c..9997190fc 100644
--- a/drivers/net/soundmodem/Makefile
+++ b/drivers/net/soundmodem/Makefile
@@ -43,7 +43,7 @@ endif
 M_OBJS		:= $(O_TARGET)
 
 gentbl:		gentbl.c
-		$(HOSTCC) -Wall $< -o $@ -lm
+		$(HOSTCC) $< -o $@ -lm
 
 TBLHDR		:= sm_tbl_afsk1200.h sm_tbl_afsk2400_8.h 
 TBLHDR		+= sm_tbl_afsk2666.h sm_tbl_psk4800.h
diff --git a/drivers/net/soundmodem/gentbl.c b/drivers/net/soundmodem/gentbl.c
index cb8cb246f..5eff27167 100644
--- a/drivers/net/soundmodem/gentbl.c
+++ b/drivers/net/soundmodem/gentbl.c
@@ -177,12 +177,12 @@ static const float fsk96_tx_coeff_5[40] = {
 
 #define HAMMING(x) (0.54-0.46*cos(2*M_PI*(x)));
 
-static inline float hamming(float x)
+static float hamming(float x)
 {
 	return 0.54-0.46*cos(2*M_PI*x);
 }
 
-static inline float sinc(float x)
+static float sinc(float x)
 {
 	if (x == 0)
 		return 1;
diff --git a/drivers/net/strip.c b/drivers/net/strip.c
index 0104f6dc9..1ba68cf78 100644
--- a/drivers/net/strip.c
+++ b/drivers/net/strip.c
@@ -82,8 +82,8 @@ static const char StripVersion[] = "1.2-STUART.CHESHIRE";
 #include <linux/version.h>
 #endif
 
-#include <stdlib.h>
 #include <asm/system.h>
+#include <linux/types.h>
 #include <asm/uaccess.h>
 #include <asm/bitops.h>
 
diff --git a/drivers/net/tlan.h b/drivers/net/tlan.h
index 9919fd275..076f6b71a 100644
--- a/drivers/net/tlan.h
+++ b/drivers/net/tlan.h
@@ -478,8 +478,3 @@ inline u32 TLan_HashFunc( u8 *a )
 	return hash;
 
 } 
-
-
-
-
-#endif
diff --git a/drivers/pnp/BUGS-parport b/drivers/pnp/BUGS-parport
index 6b8420a2c..e69de29bb 100644
--- a/drivers/pnp/BUGS-parport
+++ b/drivers/pnp/BUGS-parport
@@ -1,13 +0,0 @@
-Currently known (or at least suspected) bugs in parport:
-
-o /proc/parport is untested under 2.0.XX
-
-o SCSI aborts for PPA under 2.0.29 [reported by jmr].  Under investigation.
-
-o make config (etc) allow you to select CONFIG_PNP_PARPORT=m, CONFIG_PPA=y -
-  the resulting kernel won't link.
-
-o IEEE1284 code does not do the terminating handshake after transfers, which
-  seems to upset some devices.
-
-o lp doesn't allow you to read status while printing is in progress.
diff --git a/drivers/pnp/Config.in b/drivers/pnp/Config.in
index 44bb52d68..f8279fd67 100644
--- a/drivers/pnp/Config.in
+++ b/drivers/pnp/Config.in
@@ -8,8 +8,8 @@ comment 'Plug and Play support'
 bool 'Plug and Play support' CONFIG_PNP
 
 if [ "$CONFIG_PNP" = "y" ]; then
-  if [ "$CONFIG_PNP_PARPORT" != "n" ]; then
-    bool '  Auto-probe for parallel devices' CONFIG_PNP_PARPORT_AUTOPROBE
+  if [ "$CONFIG_PARPORT" != "n" ]; then
+    dep_tristate '  Auto-probe for parallel devices' CONFIG_PNP_PARPORT $CONFIG_PARPORT
   fi
 fi
 
diff --git a/drivers/pnp/Makefile b/drivers/pnp/Makefile
index 6153b8da6..565062f7e 100644
--- a/drivers/pnp/Makefile
+++ b/drivers/pnp/Makefile
@@ -23,29 +23,11 @@ MI_OBJS  :=
 MIX_OBJS :=
 
 ifeq ($(CONFIG_PNP_PARPORT),y)
-  L_OBJS += parport_share.o
-  ifeq ($(CONFIG_PROC_FS),y)
-    L_OBJS += parport_procfs.o
-  endif
-  ifeq ($(CONFIG_PNP_PARPORT_AUTOPROBE),y)
-    L_OBJS += parport_probe.o
-  endif
-  LX_OBJS += parport_init.o
+  LX_OBJS += parport_probe.o
 else
   ifeq ($(CONFIG_PNP_PARPORT),m)
-    MI_OBJS += parport_share.o
-    ifneq ($(CONFIG_PROC_FS),n) 
-      MI_OBJS += parport_procfs.o
-    endif
-    ifeq ($(CONFIG_PNP_PARPORT_AUTOPROBE),y)
-      MI_OBJS += parport_probe.o
-    endif
-    MIX_OBJS += parport_init.o
-    M_OBJS += parport.o
+    MX_OBJS += parport_probe.o
   endif
 endif
 
 include $(TOPDIR)/Rules.make
-
-parport.o: $(MI_OBJS) $(MIX_OBJS)
-	$(LD) $(LD_RFLAG) -r -o $@ $(MI_OBJS) $(MIX_OBJS)
diff --git a/drivers/pnp/TODO-parport b/drivers/pnp/TODO-parport
index eea6a01fd..e69de29bb 100644
--- a/drivers/pnp/TODO-parport
+++ b/drivers/pnp/TODO-parport
@@ -1,21 +0,0 @@
-Things to be done.
-
-0. Fix the bugs (see BUGS-parport).
-
-1. Proper documentation.
-
-2. Overhaul lp.c:
-
-   a) It's a mess, and there is a lot of code duplication.
-
-   b) ECP support would be nice.  This can only work if both the port and
-      the printer support it.
-
-   c) Errors could do with being handled better.  There's no point logging a
-      message every 10 seconds when the printer is out of paper. 
-
-   d) Handle status readback automatically.  IEEE1284 printers can post status
-      bits when they have something to say.  We should read out and deal 
-      with (maybe just log) whatever the printer wants to tell the world.
-
-3. Assimilate more drivers.
diff --git a/drivers/pnp/parport_init.c b/drivers/pnp/parport_init.c
deleted file mode 100644
index 57574b6a5..000000000
--- a/drivers/pnp/parport_init.c
+++ /dev/null
@@ -1,831 +0,0 @@
-/* $Id: parport_init.c,v 1.3.2.4 1997/04/16 21:20:44 phil Exp $
- * Parallel-port initialisation code.
- * 
- * Authors: David Campbell <campbell@tirian.che.curtin.edu.au>
- *          Tim Waugh <tmw20@cam.ac.uk>
- *	    Jose Renau <renau@acm.org>
- *
- * based on work by Grant Guenther <grant@torque.net>
- *              and Philip Blundell <Philip.Blundell@pobox.com>
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/tasks.h>
-#include <asm/io.h>
-#include <asm/dma.h>
-
-#include <linux/parport.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/kernel.h>
-#include <linux/malloc.h>
-
-#include "parport_ll_io.h"
-
-static int io[PARPORT_MAX] = { 0, };
-static int irq[PARPORT_MAX] = { PARPORT_IRQ_NONE, };
-static int dma[PARPORT_MAX] = { PARPORT_DMA_NONE, };
-
-/******************************************************
- *  DMA detection section:
- */
-
-/*
- * Prepare DMA channels from 0-8 to transmit towards buffer
- */
-static int parport_prepare_dma(char *buff, int size)
-{
-	int tmp = 0;
-	int i,retv;
-	
-	for (i = 0; i < 8; i++) {
-		retv = request_dma(i, "probe");
-		if (retv)
-			continue;
-		tmp |= 1 << i;
-
-		cli();
-		disable_dma(i);
-		clear_dma_ff(i);
-		set_dma_addr(i, virt_to_bus(buff));
-		set_dma_count(i, size);
-		set_dma_mode(i, DMA_MODE_READ);
-		sti();
-	}
-
-	return tmp;
-}
-
-/*
- * Activate all DMA channels passed in dma
- */
-static int parport_enable_dma(int dma)
-{
-	int i;
-	
-	for (i = 0; i < 8; i++)
-		if (dma & (1 << i)) {
-		cli();
-		enable_dma(i);
-		sti();
-	    }
-
-	return dma;
-}
-
-static int parport_detect_dma_transfer(int dma,int size,int *resid)
-{
-	int i,n,retv;
-	int count=0;
-
-	retv = -1;
-	for (i = 0; i < 8; i++)
-		if (dma & (1 << i)) {
-			disable_dma(i);
-			clear_dma_ff(i);
-			n = get_dma_residue(i);
-			if (n != size) {
-				*resid = n;
-				retv = i;
-				if (count > 0) {
-					retv = -1;	/* Multiple DMA's */
-					printk(KERN_ERR "parport: multiple DMA detected.  Huh?\n");
-				}
-				count++;
-			}
-			free_dma(i);
-		}
-
-	return retv;	
-}
-
-/* Only if supports ECP mode */
-static int programmable_dma_support(struct parport *pb)
-{
-	int dma;
-
-	w_ecr(pb,0xE0); /* Configuration MODE */
-	
-	dma = r_cnfgB(pb) & 0x07;
-
-	w_ecr(pb,pb->ecr);
-	
-	if( dma == 0 || dma == 4 ) /* Jumper selection */
-		return -1;
-	else
-		return dma;
-}
-
-/* Only called if port supports ECP mode.
- *
- * The only restriction on DMA channels is that it has to be
- * between 0 to 7 (inclusive). Used only in an ECP mode, DMAs are
- * considered a shared resource and hence they should be registered
- * when needed and then immediately unregistered.
- *
- * DMA autoprobes for ECP mode are known not to work for some
- * main board BIOS configs. I had to remove everything from the
- * port, set the mode to SPP, reboot to DOS, set the mode to ECP,
- * and reboot again, then I got IRQ probes and DMA probes to work.
- * [Is the BIOS doing a device detection?]
- *
- * A value of -1 is allowed indicating no DMA support.
- *
- * if( 0 < DMA < 4 )
- *    1Byte DMA transfer
- * else // 4 < DMA < 8
- *    2Byte DMA transfer
- *
- */
-static int parport_dma_probe(struct parport *pb)
-{
-	int dma,retv;
-	int dsr,dsr_read;
-	char *buff;
-
-	retv = programmable_dma_support(pb);
-	if (retv != -1)
-		return retv;
-	
-	if (!(buff = kmalloc(2048, GFP_KERNEL | GFP_DMA))) {
-	    printk(KERN_ERR "parport: memory squeeze\n");
-	    return -1;
-	}
-	
- 	dsr = r_ctr(pb);
-	dsr_read = (dsr & ~(0x20)) | 0x04;    /* Direction == read */
-
-	w_ecr(pb, 0xc0);	   /* ECP MODE */
- 	w_ctr(pb, dsr_read );
-	dma=parport_prepare_dma(buff,1000);
-	w_ecr(pb, 0xd8);	   /* ECP FIFO + enable DMA */
-	parport_enable_dma(dma);
-	udelay(500);           /* Give some for DMA tranfer */
-	retv = parport_detect_dma_transfer(dma,1000,&pb->speed);
-	pb->speed = pb->speed * 2000;  /* 500uSec * 2000 = 1sec */
-	
-	/*
-	 * National Semiconductors only supports DMA tranfers
-	 * in ECP MODE
-	 */
-	if (retv == -1) {
-		w_ecr(pb, 0x60);	   /* ECP MODE */
-		w_ctr(pb, dsr_read );
-		dma=parport_prepare_dma(buff,1000);
-		w_ecr(pb, 0x68);	   /* ECP FIFO + enable DMA */
-		parport_enable_dma(dma);
-		udelay(500);           /* Give some for DMA tranfer */
-		retv = parport_detect_dma_transfer(dma,1000,&pb->speed);
-		pb->speed = pb->speed * 2000;  /* 500uSec * 2000 = 1sec */
-	}
-	
-	kfree(buff);
-	
-	w_ctr(pb, pb->ctr);
-	w_ecr(pb, pb->ecr);
-
-	return retv;
-}
-/******************************************************
- *  MODE detection section:
- */
-
-/*
- * Clear TIMEOUT BIT in EPP MODE
- */
-static int epp_clear_timeout(struct parport *pb)
-{
-	int r;
-
-	if (!(r_str(pb) & 0x01))
-		return 1;
-
-	/* To clear timeout some chips require double read */
-	r_str(pb);
-	r = r_str(pb);
-	w_str(pb, r | 0x01); /* Some reset by writing 1 */
-	w_str(pb, r & 0xfe); /* Others by writing 0 */
-	r = r_str(pb);
-
-	return !(r & 0x01);
-}
-
-
-/*
- * Checks for port existence, all ports support SPP MODE
- */
-static int parport_SPP_supported(struct parport *pb)
-{
-	/* Do a simple read-write test to make sure the port exists. */
-
-	w_dtr(pb, 0xaa);
-	if (r_dtr(pb) != 0xaa) return 0;
-	
-	w_dtr(pb, 0x55);
-	if (r_dtr(pb) != 0x55) return 0;
-
-	return PARPORT_MODE_SPP;
-}
-
-/* Check for ECP
- *
- * Old style XT ports alias io ports every 0x400, hence accessing ECR
- * on these cards actually accesses the CTR.
- *
- * Modern cards don't do this but reading from ECR will return 0xff
- * regardless of what is written here if the card does NOT support
- * ECP.
- *
- * We will write 0x2c to ECR and 0xcc to CTR since both of these
- * values are "safe" on the CTR since bits 6-7 of CTR are unused.
- */
-static int parport_ECR_present(struct parport *pb)
-{
-	int r;
-
-	r= r_ctr(pb);	
-	if ((r_ecr(pb) & 0x03) == (r & 0x03)) {
-		w_ctr(pb, r ^ 0x03 ); /* Toggle bits 0-1 */
-
-		r= r_ctr(pb);	
-		if ((r_ecr(pb) & 0x03) == (r & 0x03))
-			return 0; /* Sure that no ECR register exists */
-	}
-	
-	if ((r_ecr(pb) & 0x03 ) != 0x01)
-		return 0;
-
-	w_ecr(pb,0x34);
-	if (r_ecr(pb) != 0x35)
-		return 0;
-
-	w_ecr(pb,pb->ecr);
-	w_ctr(pb,pb->ctr);
-	
-	return PARPORT_MODE_ECR;
-}
-
-static int parport_ECP_supported(struct parport *pb)
-{
-	int i;
-	
-	/* If there is no ECR, we have no hope of supporting ECP. */
-	if (!(pb->modes & PARPORT_MODE_ECR))
-		return 0;
-
-	/*
-	 * Using LGS chipset it uses ECR register, but
-	 * it doesn't support ECP or FIFO MODE
-	 */
-	
-	w_ecr(pb, 0xc0); /* TEST FIFO */
-	for (i=0; i < 1024 && (r_ecr(pb) & 0x01); i++)
-		w_fifo(pb, 0xaa);
-
-	w_ecr(pb, pb->ecr);
-
-	if (i == 1024)
-		return 0;
-	
-	return PARPORT_MODE_ECP;
-}
-
-/* EPP mode detection
- * Theory:
- *	Bit 0 of STR is the EPP timeout bit, this bit is 0
- *	when EPP is possible and is set high when an EPP timeout
- *	occurs (EPP uses the HALT line to stop the CPU while it does
- *	the byte transfer, an EPP timeout occurs if the attached
- *	device fails to respond after 10 micro seconds).
- *
- *	This bit is cleared by either reading it (National Semi)
- *	or writing a 1 to the bit (SMC, UMC, WinBond), others ???
- *	This bit is always high in non EPP modes.
- */
-static int parport_EPP_supported(struct parport *pb)
-{
-	/* If EPP timeout bit clear then EPP available */
-	if (!epp_clear_timeout(pb))
-		return 0;  /* No way to clear timeout */
-
-	w_ctr(pb, r_ctr(pb) | 0x20);
-	w_ctr(pb, r_ctr(pb) | 0x10);
-	epp_clear_timeout(pb);
-	
-	r_epp(pb);
-	udelay(30);  /* Wait for possible EPP timeout */
-	
-	if (r_str(pb) & 0x01) {
-		epp_clear_timeout(pb);
-		return PARPORT_MODE_EPP;
-	}
-
-	return 0;
-}
-
-static int parport_ECPEPP_supported(struct parport *pb)
-{
-	int mode;
-
-	if (!(pb->modes & PARPORT_MODE_ECR))
-		return 0;
-	
-	/* Search for SMC style EPP+ECP mode */
-	w_ecr(pb, 0x80);
-	
-	mode = parport_EPP_supported(pb);
-
-	w_ecr(pb, pb->ecr);
-	
-	if (mode)
-		return PARPORT_MODE_ECPEPP;
-	
-	return 0;
-}
-
-/* Detect PS/2 support.
- *
- * Bit 5 (0x20) sets the PS/2 data direction; setting this high
- * allows us to read data from the data lines.  In theory we would get back
- * 0xff but any peripheral attached to the port may drag some or all of the
- * lines down to zero.  So if we get back anything that isn't the contents
- * of the data register we deem PS/2 support to be present. 
- *
- * Some SPP ports have "half PS/2" ability - you can't turn off the line
- * drivers, but an external peripheral with sufficiently beefy drivers of
- * its own can overpower them and assert its own levels onto the bus, from
- * where they can then be read back as normal.  Ports with this property
- * and the right type of device attached are likely to fail the SPP test,
- * (as they will appear to have stuck bits) and so the fact that they might
- * be misdetected here is rather academic. 
- */
-
-static int parport_PS2_supported(struct parport *pb)
-{
-	int ok = 0;
-  
-	epp_clear_timeout(pb);
-
-	w_ctr(pb, pb->ctr | 0x20);   /* try to tri-state the buffer */
-	
-	w_dtr(pb, 0x55);
-	if (r_dtr(pb) != 0x55) ok++;
-
-	w_dtr(pb, 0xaa);
-	if (r_dtr(pb) != 0xaa) ok++;
-	
-	w_ctr(pb, pb->ctr);          /* cancel input mode */
-
-	return ok?PARPORT_MODE_PS2:0;
-}
-
-static int parport_ECPPS2_supported(struct parport *pb)
-{
-	int mode;
-
-	if (!(pb->modes & PARPORT_MODE_ECR))
-		return 0;
-	
-	w_ecr(pb, 0x20);
-	
-	mode = parport_PS2_supported(pb);
-
-	w_ecr(pb,pb->ecr);
-	
-	if (mode)
-		return PARPORT_MODE_ECPPS2;
-	
-	return 0;
-}
-
-/******************************************************
- *  IRQ detection section:
- *
- * This code is for detecting ECP interrupts (due to problems with the
- * monolithic interrupt probing routines).
- *
- * In short this is a voting system where the interrupt with the most
- * "votes" is the elected interrupt (it SHOULD work...)
- *
- * This is horribly x86-specific at the moment.  I'm not convinced it
- * belongs at all.
- */
-
-static int intr_vote[16];
-
-static void parport_vote_intr_func(int irq, void *dev_id, struct pt_regs *regs)
-{
-	intr_vote[irq]++;
-	return;
-}
-
-static long open_intr_election(void)
-{
-	long tmp = 0;
-	int i;
-
-	/* We ignore the timer - irq 0 */
-	for (i = 1; i < 16; i++) {
-		intr_vote[i] = 0;
-		if (request_irq(i, parport_vote_intr_func,
-		       SA_INTERRUPT, "probe", intr_vote) == 0)
-			tmp |= 1 << i;
-	}
-	return tmp;
-}
-
-static int close_intr_election(long tmp)
-{
-	int irq = PARPORT_IRQ_NONE;
-	int i;
-
-	/* We ignore the timer - irq 0 */
-	for (i = 1; i < 16; i++)
-		if (tmp & (1 << i)) {
-			if (intr_vote[i]) {
-				if (irq != PARPORT_IRQ_NONE)
-					/* More than one interrupt */
-					return PARPORT_IRQ_NONE;
-				irq = i;
-			}
-			free_irq(i, intr_vote);
-		}
-	return irq;
-}
-
-/* Only if supports ECP mode */
-static int programmable_irq_support(struct parport *pb)
-{
-	int irq;
-
-	w_ecr(pb,0xE0); /* Configuration MODE */
-	
-	irq = (r_cnfgB(pb) >> 3) & 0x07;
-
-	switch(irq){
-	  case 2:
-		  irq = 9;
-		  break;
-	  case 7:
-		  irq = 5;
-		  break;
-	  case 0:
-		  irq = -1;
-		  break;
-	  default:
-		  irq += 7;
-	}
-		  
-	w_ecr(pb,pb->ecr);
-	
-	return irq;
-}
-
-static int irq_probe_ECP(struct parport *pb)
-{
-	int irqs,i;
-		
-	probe_irq_off(probe_irq_on());	/* Clear any interrupts */
-	irqs = open_intr_election();
-		
-	w_ecr(pb, 0x00);	    /* Reset FIFO */
-	w_ctr(pb, pb->ctr );	    /* Force direction = 0 */
-	w_ecr(pb, 0xd0);	    /* TEST FIFO + nErrIntrEn */
-
-	/* If Full FIFO sure that WriteIntrThresold is generated */
-	for( i=0 ; i < 1024 && !(r_ecr(pb) & 0x02) ; i++ ){
-		w_fifo(pb, 0xaa);
-	}
-		
-	pb->irq = close_intr_election(irqs);
-	
-	w_ecr(pb, pb->ecr);
-
-	return pb->irq;
-}
-
-/*
- * This detection seems that only works in National Semiconductors
- * This doesn't work in SMC, LGS, and Winbond 
- */
-static int irq_probe_EPP(struct parport *pb)
-{
-	int irqs;
-
-#ifndef ADVANCED_DETECT
-	return -1;
-#endif
-	
-	probe_irq_off(probe_irq_on());	/* Clear any interrupts */
-	irqs = open_intr_election();
-
-	if( pb->modes & PARPORT_MODE_ECR )
-		w_ecr(pb, r_ecr(pb) | 0x10 );
-	
-	epp_clear_timeout(pb);
-	w_ctr(pb, r_ctr(pb) | 0x20);
-	w_ctr(pb, r_ctr(pb) | 0x10);
-	epp_clear_timeout(pb);
-
-	/*  Device isn't expecting an EPP read
-	 * and generates an IRQ.
-	 */
-	r_epp(pb);
-	udelay(20);
-
-	pb->irq = close_intr_election(irqs);
-	
-	w_ctr(pb,pb->ctr);
-	
-	return pb->irq;
-}
-
-static int irq_probe_SPP(struct parport *pb)
-{
-	int irqs;
-
-#ifndef ADVANCED_DETECT
-	return -1;
-#endif
-
-	probe_irq_off(probe_irq_on());	/* Clear any interrupts */
-	irqs = probe_irq_on();
-
-	if( pb->modes & PARPORT_MODE_ECR )
-		w_ecr(pb, 0x10 );
-
-	w_dtr(pb,0x00);
-	w_ctr(pb,0x00);
-	w_ctr(pb,0x0c);
-	udelay(5);
-	w_ctr(pb,0x0d);
-	udelay(5);
-	w_ctr(pb,0x0c);
-	udelay(25);
-	w_ctr(pb,0x08);
-	udelay(25);
-	w_ctr(pb,0x0c);
-	udelay(50);
-
-	pb->irq = probe_irq_off(irqs);
-	if (pb->irq <= 0)
-		pb->irq = PARPORT_IRQ_NONE;	/* No interrupt detected */
-	
-	w_ctr(pb,pb->ctr);
-	
-	return pb->irq;
-}
-
-/* We will attempt to share interrupt requests since other devices
- * such as sound cards and network cards seem to like using the
- * printer IRQs.
- *
- * When ECP is available we can autoprobe for IRQs.
- * NOTE: If we can autoprobe it, we can register the IRQ.
- */
-static int parport_irq_probe(struct parport *pb)
-{
-	if (pb->modes & PARPORT_MODE_ECR)
-		pb->irq = programmable_irq_support(pb);
-
-	if (pb->modes & PARPORT_MODE_ECP)
-		pb->irq = irq_probe_ECP(pb);
-			
-	if (pb->irq == PARPORT_IRQ_NONE && (pb->modes & PARPORT_MODE_ECPEPP)) {
-		w_ecr(pb,0x80);
-		pb->irq = irq_probe_EPP(pb);
-		w_ecr(pb,pb->ecr);
-	}
-
-	epp_clear_timeout(pb);
-
-	if (pb->irq == PARPORT_IRQ_NONE && (pb->modes & PARPORT_MODE_EPP))
-		pb->irq = irq_probe_EPP(pb);
-
-	epp_clear_timeout(pb);
-
-	if (pb->irq == PARPORT_IRQ_NONE)
-		pb->irq = irq_probe_SPP(pb);
-
-	return pb->irq;
-}
-
-
-int initialize_parport(struct parport *pb, unsigned long base, int irq, int dma, int count)
-{
-	/* Check some parameters */
-	if (dma < -2) {
-		printk(KERN_ERR "parport: Invalid DMA[%d] at base 0x%lx\n",dma,base);
-		return 0;
-	}
-
-	if (irq < -2) {
-		printk(KERN_ERR "parport: Invalid IRQ[%d] at base 0x%lx\n",irq,base);
-		return 0;
-	}
-	
-	/* Init our structure */
- 	memset(pb, 0, sizeof(struct parport));
-	pb->base = base;
-	pb->irq = irq;
-	pb->dma = dma;
-	pb->modes = 0;
- 	pb->next = NULL;
-	pb->devices = pb->cad = pb->lurker = NULL;
-	pb->flags = 0;
-
-	/* Before we start, set the control registers to something sensible. */
-	pb->ecr = 0xc;
-	pb->ctr = 0xc;
-
-	pb->name = kmalloc(15, GFP_KERNEL);
-	if (!pb->name) {
-		printk(KERN_ERR "parport: memory squeeze\n");
-		return 0;
-	}
-	sprintf(pb->name, "parport%d", count);
-
-	if (!parport_SPP_supported(pb)) {
-		epp_clear_timeout(pb);
-		if (!parport_SPP_supported(pb)) {
-			kfree(pb->name);
-			return 0;
-		}
-	}
-
-	pb->modes |= PARPORT_MODE_SPP; 	/* All ports support SPP mode. */
-	pb->modes |= parport_PS2_supported(pb);
-
-	if (pb->base != 0x3bc) {
-		pb->modes |= parport_ECR_present(pb);	
-		pb->modes |= parport_ECP_supported(pb);
-		pb->modes |= parport_ECPPS2_supported(pb);
-		pb->modes |= parport_EPP_supported(pb);
-		pb->modes |= parport_ECPEPP_supported(pb);
-	}
-
-	/* Now register regions */
-	if ((pb->modes & (PARPORT_MODE_EPP | PARPORT_MODE_ECPEPP)) && 
-	    (check_region(pb->base, 8))) {
-		printk(KERN_INFO "%s: EPP disabled due to port conflict at %x.\n", pb->name, pb->base + 3);
-		pb->modes &= ~(PARPORT_MODE_EPP | PARPORT_MODE_ECPEPP);
-	}
-	pb->size = (pb->modes & (PARPORT_MODE_EPP | PARPORT_MODE_ECPEPP)) ? 8 : 3;
-
-	request_region(pb->base, pb->size, pb->name);
-	if (pb->modes & PARPORT_MODE_ECR)
-		request_region(pb->base+0x400, 3, pb->name);
-
-	/* DMA check */
-	if (pb->modes & PARPORT_MODE_ECP) {
-		if (pb->dma == PARPORT_DMA_NONE)
-			pb->dma = parport_dma_probe(pb);
-		else if (pb->dma == -2)
-			pb->dma = PARPORT_DMA_NONE;
-	}
-
-	/* IRQ check */
-	if (pb->irq == PARPORT_IRQ_NONE)
-		pb->irq = parport_irq_probe(pb);
-	else if (pb->irq == -2)
-		pb->irq = PARPORT_IRQ_NONE;
-
-	return 1;
-}
-
-#ifndef MODULE
-static int parport_setup_ptr = 0;
-
-void parport_setup(char *str, int *ints)
-{
-	if (ints[0] == 0 || ints[1] == 0) {
-		/* Disable parport if "parport=" or "parport=0" in cmdline */
-		io[0] = PARPORT_DISABLE; 
-		return;
-	}
-	if (parport_setup_ptr < PARPORT_MAX) {
-		io[parport_setup_ptr] = ints[1];
-		if (ints[0]>1) {
-			irq[parport_setup_ptr] = ints[2];
-			if (ints[0]>2) dma[parport_setup_ptr] = ints[3];
-		}
-		parport_setup_ptr++;
-	} else {
-		printk(KERN_ERR "parport=0x%x", ints[1]);
-		if (ints[0]>1) {
-			printk(",%d", ints[2]);
-			if (ints[0]>2) printk(",%d", ints[3]);
-		}
-		printk(" ignored, too many ports.\n");
-	}
-}
-#endif
-
-#ifdef CONFIG_PNP_PARPORT_AUTOPROBE
-extern void parport_probe_one(struct parport *port);
-#endif
-
-#ifdef MODULE
-MODULE_PARM(io, "1-" __MODULE_STRING(PARPORT_MAX) "i");
-MODULE_PARM(irq, "1-" __MODULE_STRING(PARPORT_MAX) "i");
-MODULE_PARM(dma, "1-" __MODULE_STRING(PARPORT_MAX) "i");
-
-int init_module(void)
-#else
-int pnp_parport_init(void)
-#endif				/* MODULE */
-{
-	struct parport *pb;
-
-	printk(KERN_INFO "Parallel port sharing: %s\n",
-	       "$Revision: 1.3.2.4 $");
-
-	if (io[0] == PARPORT_DISABLE) return 1; 
-
-#ifdef CONFIG_PROC_FS
-	parport_proc_init();
-#endif
-
-	/* Run probes to ensure parport does exist */
-#define PORT(a,b,c) \
-		if ((pb = parport_register_port((a), (b), (c))))  \
-		        parport_destroy(pb); 
-
-
-	if (io[0]) {
-		/* If the user specified any ports, use them */
-		int i;
-		for (i = 0; io[i] && i < PARPORT_MAX; i++) {
-			PORT(io[i], irq[i], dma[i]);
-		}
-	} else {
-		/* Go for the standard ports. */
-		PORT(0x378, PARPORT_IRQ_NONE, PARPORT_DMA_NONE);
-		PORT(0x278, PARPORT_IRQ_NONE, PARPORT_DMA_NONE);
-		PORT(0x3bc, PARPORT_IRQ_NONE, PARPORT_DMA_NONE);
-#undef PORT
-	}
-
-#if defined(CONFIG_PNP_PARPORT_AUTOPROBE) || defined(CONFIG_PROC_FS)
-	for (pb = parport_enumerate(); pb; pb = pb->next) {
-#ifdef CONFIG_PNP_PARPORT_AUTOPROBE
-		parport_probe_one(pb);
-#endif
-#ifdef CONFIG_PROC_FS
-		parport_proc_register(pb);
-#endif
-	}
-#endif
-
-	return 0;
-}
-
-#ifdef MODULE
-void cleanup_module(void)
-{
-	struct parport *port, *next;
-   
-	for (port = parport_enumerate(); port; port = next) {
-		next = port->next;
-		parport_destroy(port);
-		parport_proc_unregister(port);
-		kfree(port->name);
-		kfree(port);
-	}
-	
-	parport_proc_cleanup();
-}
-#endif
-
-/* Exported symbols for modules. */
-
-EXPORT_SYMBOL(parport_claim);
-EXPORT_SYMBOL(parport_release);
-EXPORT_SYMBOL(parport_register_port);
-EXPORT_SYMBOL(parport_destroy);
-EXPORT_SYMBOL(parport_register_device);
-EXPORT_SYMBOL(parport_unregister_device);
-EXPORT_SYMBOL(parport_enumerate);
-EXPORT_SYMBOL(parport_ieee1284_nibble_mode_ok);
-
-#ifdef CONFIG_PNP_PARPORT_AUTOPROBE
-EXPORT_SYMBOL(parport_probe);
-EXPORT_SYMBOL(parport_probe_one);
-#endif
-
-void inc_parport_count(void)
-{
-#ifdef MODULE
-	MOD_INC_USE_COUNT;
-#endif
-}
-
-void dec_parport_count(void)
-{
-#ifdef MODULE
-	MOD_DEC_USE_COUNT;
-#endif
-}
diff --git a/drivers/pnp/parport_ll_io.h b/drivers/pnp/parport_ll_io.h
index c2592aff6..e69de29bb 100644
--- a/drivers/pnp/parport_ll_io.h
+++ b/drivers/pnp/parport_ll_io.h
@@ -1,21 +0,0 @@
-/* $Id: parport_ll_io.h,v 1.1.2.1 1997/03/26 13:01:09 phil Exp $ 
- * David Campbell's "favourite IO routines" for parallel ports
- */
-
-#define r_dtr(x)	inb((x)->base)
-#define r_str(x)	inb((x)->base+1)
-#define r_ctr(x)	inb((x)->base+2)
-#define r_epp(x)	inb((x)->base+4)
-#define r_fifo(x)	inb((x)->base+0x400)
-#define r_ecr(x)	inb((x)->base+0x402)
-#define r_cnfgA(x)	inb((x)->base+0x400)
-#define r_cnfgB(x)	inb((x)->base+0x401)
-
-#define w_dtr(x,y)	outb((y), (x)->base)
-#define w_str(x,y)	outb((y), (x)->base+1)
-#define w_ctr(x,y)	outb((y), (x)->base+2)
-#define w_epp(x,y)	outb((y), (x)->base+4)
-#define w_fifo(x,y)	outb((y), (x)->base+0x400)
-#define w_ecr(x,y)	outb((y), (x)->base+0x402)
-#define w_cnfgA(x,y)	outb((y), (x)->base+0x400)
-#define w_cnfgB(x,y)	outb((y), (x)->base+0x401)
diff --git a/drivers/pnp/parport_probe.c b/drivers/pnp/parport_probe.c
index b40164496..0e7b56294 100644
--- a/drivers/pnp/parport_probe.c
+++ b/drivers/pnp/parport_probe.c
@@ -1,4 +1,4 @@
-/* $Id: parport_probe.c,v 1.1.2.9 1997/03/29 21:08:16 phil Exp $ 
+/* $Id: parport_probe.c,v 1.1.1.1 1997/06/01 03:17:25 ralf Exp $ 
  * Parallel port device probing code
  * 
  * Authors:    Carsten Gross, carsten@sol.wohnheim.uni-ulm.de
@@ -17,6 +17,7 @@
 #include <linux/kernel.h>
 #include <linux/malloc.h>
 #include <linux/ctype.h>
+#include <linux/module.h>
 
 #include <linux/lp.h>
 
@@ -26,23 +27,23 @@
 static inline int read_nibble(struct parport *port) 
 {
 	unsigned char i;
-	i = parport_r_status(port)>>3;
+	i = parport_read_status(port)>>3;
 	i&=~8;
 	if ( ( i & 0x10) == 0) i|=8;
 	return(i & 0x0f);
 }
 
 static void read_terminate(struct parport *port) {
-	parport_w_ctrl(port, (parport_r_ctrl(port) & ~2) | 8);
+	parport_write_control(port, (parport_read_control(port) & ~2) | 8);
 	/* SelectIN high, AutoFeed low */
 	if (parport_wait_peripheral(port, 0x80, 0)) 
 		/* timeout, SelectIN high, Autofeed low */
 		return;
-	parport_w_ctrl(port, parport_r_ctrl(port) | 2);
+	parport_write_control(port, parport_read_control(port) | 2);
 	/* AutoFeed high */
 	parport_wait_peripheral(port, 0x80, 0x80);
 	/* no timeout possible, Autofeed low, SelectIN high */
-	parport_w_ctrl(port, (parport_r_ctrl(port) & ~2) | 8);
+	parport_write_control(port, (parport_read_control(port) & ~2) | 8);
 	return;
 }
 
@@ -56,14 +57,14 @@ static long read_polled(struct parport *port, char *buf,
 	unsigned char Byte=0;
 
 	for (i=0; ; i++) {
-		parport_w_ctrl(port, parport_r_ctrl(port) | 2); /* AutoFeed high */
+		parport_write_control(port, parport_read_control(port) | 2); /* AutoFeed high */
 		if (parport_wait_peripheral(port, 0x40, 0)) {
 			printk("%s: read1 timeout.\n", port->name);
-			parport_w_ctrl(port, parport_r_ctrl(port) & ~2);
+			parport_write_control(port, parport_read_control(port) & ~2);
 			break;
 		}
 		z = read_nibble(port);
-		parport_w_ctrl(port, parport_r_ctrl(port) & ~2); /* AutoFeed low */
+		parport_write_control(port, parport_read_control(port) & ~2); /* AutoFeed low */
 		if (parport_wait_peripheral(port, 0x40, 0x40)) {
 			printk("%s: read2 timeout.\n", port->name);
 			break;
@@ -75,7 +76,7 @@ static long read_polled(struct parport *port, char *buf,
 			if (count++ == length)
 				temp = NULL;
 			/* Does the error line indicate end of data? */
-			if ((parport_r_status(port) & LP_PERRORP) == LP_PERRORP) 
+			if ((parport_read_status(port) & LP_PERRORP) == LP_PERRORP) 
 				break;
 		} else Byte=z;
 	}
@@ -87,7 +88,7 @@ static struct wait_queue *wait_q = NULL;
 
 static int wakeup(void *ref)
 {
-	struct ppd **dev = (struct ppd **)ref;
+	struct pardevice **dev = (struct pardevice **)ref;
 	
 	if (!wait_q || parport_claim(*dev))
 		return 1;
@@ -98,9 +99,7 @@ static int wakeup(void *ref)
 
 int parport_probe(struct parport *port, char *buffer, int len)
 {
-	struct ppd *dev = parport_register_device(port, "IEEE 1284 probe",
-						  NULL, wakeup, NULL,
-						  PARPORT_DEV_TRAN, &dev);
+	struct pardevice *dev = parport_register_device(port, "IEEE 1284 probe", NULL, wakeup, NULL, PARPORT_DEV_TRAN, &dev);
 
 	int result = 0;
 
@@ -264,3 +263,17 @@ void parport_probe_one(struct parport *port)
 	}
 	kfree(buffer);
 }
+
+#if MODULE
+int init_module(void)
+{
+	struct parport *p;
+	for (p = parport_enumerate(); p; p = p->next) 
+		parport_probe_one(p);
+	return 0;
+}
+
+void cleanup_module(void)
+{
+}
+#endif
diff --git a/drivers/pnp/parport_procfs.c b/drivers/pnp/parport_procfs.c
index 7adfac2da..e69de29bb 100644
--- a/drivers/pnp/parport_procfs.c
+++ b/drivers/pnp/parport_procfs.c
@@ -1,339 +0,0 @@
-/* $Id: parport_procfs.c,v 1.2 1997/06/03 07:28:11 ralf Exp $
- * Parallel port /proc interface code.
- * 
- * Authors: David Campbell <campbell@tirian.che.curtin.edu.au>
- *          Tim Waugh <tmw20@cam.ac.uk>
- *
- * based on work by Grant Guenther <grant@torque.net>
- *              and Philip Blundell <Philip.Blundell@pobox.com>
- */
-
-#include <linux/tasks.h>
-#include <asm/ptrace.h>
-#include <asm/io.h>
-#include <asm/dma.h>
-
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/kernel.h>
-#include <linux/malloc.h>
-#include <linux/interrupt.h>
-
-#include <linux/proc_fs.h>
-
-#include <linux/parport.h>
-#include "parport_ll_io.h"
-
-#undef PARPORT_INCLUDE_BENCH
-
-struct proc_dir_entry *base=NULL;
-
-void parport_null_intr_func(int irq, void *dev_id, struct pt_regs *regs);
-
-static int irq_write_proc(struct file *file, const char *buffer,
-					  unsigned long count, void *data)
-{
-	int newirq;
-	struct parport *pp = (struct parport *)data;
-	
-	if (count > 4 )  /* more than 4 digits for a irq 0x?? 0?? ??  */
-		return(-EOVERFLOW);
-
-	if (buffer[0] < 32 || !strncmp(buffer, "none", 4)) {
-		newirq = PARPORT_IRQ_NONE;
-	} else {
-		if (buffer[0] == '0') {
-			if( buffer[1] == 'x' )
-				newirq = simple_strtoul(&buffer[2],0,16);
-			else
-				newirq = simple_strtoul(&buffer[1],0,8);
-		} else {
-			newirq = simple_strtoul(buffer,0,10);
-		}
-	}
-
-	if (pp->irq != PARPORT_IRQ_NONE && !(pp->flags & PARPORT_FLAG_COMA)) 
-		free_irq(pp->irq, pp);
-
-	pp->irq = newirq;
-
-	if (pp->irq != PARPORT_IRQ_NONE && !(pp->flags & PARPORT_FLAG_COMA)) { 
-		struct ppd *pd = pp->cad;
-
-		if (pd == NULL) {
-			pd = pp->devices;
-			if (pd != NULL) 
-				request_irq(pp->irq, pd->irq_func ? 
-					    pd->irq_func :
-					    parport_null_intr_func,
-					    SA_INTERRUPT, pd->name, pd->port);
-		} else {
-			request_irq(pp->irq, pd->irq_func ? pd->irq_func :
-				    parport_null_intr_func,
-				    SA_INTERRUPT, pp->name, pd->port);
-		}
-	}
-
-	return count;
-}
-
-static int irq_read_proc(char *page, char **start, off_t off,
-					 int count, int *eof, void *data)
-{
-	struct parport *pp = (struct parport *)data;
-	int len;
-	
-	if (pp->irq == PARPORT_IRQ_NONE)
-		len = sprintf(page, "none\n");
-	else
-		len = sprintf(page, "%d\n", pp->irq);
-	
-	*start = 0;
-	*eof   = 1;
-	return len;
-}
-
-static int devices_read_proc(char *page, char **start, off_t off,
-					 int count, int *eof, void *data)
-{
-	struct parport *pp = (struct parport *)data;
-	struct ppd *pd1;
-	int len=0;
-
-	for (pd1 = pp->devices; pd1 ; pd1 = pd1->next) {
-		if (pd1 == pp->cad)
-			len += sprintf(page+len, "+");
-		else
-			len += sprintf(page+len, " ");
-
-		len += sprintf(page+len, "%s",pd1->name);
-
-		if (pd1 == pp->lurker)
-			len += sprintf(page+len, " LURK");
-		
-		len += sprintf(page+len,"\n");
-	}
-		
-	*start = 0;
-	*eof   = 1;
-	return len;
-}
-
-static int hardware_read_proc(char *page, char **start, off_t off,
-							  int count, int *eof, void *data)
-{
-	struct parport *pp = (struct parport *)data;
-	int len=0;
-	
-	len += sprintf(page+len, "base:\t0x%x\n",pp->base);
-	if (pp->irq == PARPORT_IRQ_NONE)
-		len += sprintf(page+len, "irq:\tnone\n");
-	else
-		len += sprintf(page+len, "irq:\t%d\n",pp->irq);
-	len += sprintf(page+len, "dma:\t%d\n",pp->dma);
-
-	len += sprintf(page+len, "modes:\t");
-	{
-#define printmode(x) {if(pp->modes&PARPORT_MODE_##x){len+=sprintf(page+len,"%s%s",f?",":"",#x);f++;}}
-		int f = 0;
-		printmode(SPP);
-		printmode(PS2);
-		printmode(EPP);
-		printmode(ECP);
-		printmode(ECPEPP);
-		printmode(ECPPS2);
-#undef printmode
-	}
-	len += sprintf(page+len, "\n");
-
-	len += sprintf(page+len, "mode:\t");
-	if (pp->modes & PARPORT_MODE_ECR) {
-		switch (r_ecr(pp) >> 5) {
-		case 0:
-			len += sprintf(page+len, "SPP");
-			if( pp->modes & PARPORT_MODE_PS2 )
-				len += sprintf(page+len, ",PS2");
-			if( pp->modes & PARPORT_MODE_EPP )
-				len += sprintf(page+len, ",EPP");
-			break;
-		case 1:
-			len += sprintf(page+len, "ECPPS2");
-			break;
-		case 2:
-			len += sprintf(page+len, "DATAFIFO");
-			break;
-		case 3:
-			len += sprintf(page+len, "ECP");
-			break;
-		case 4:
-			len += sprintf(page+len, "ECPEPP");
-			break;
-		case 5:
-			len += sprintf(page+len, "Reserved?");
-			break;
-		case 6:
-			len += sprintf(page+len, "TEST");
-			break;
-		case 7:
-			len += sprintf(page+len, "Configuration");
-			break;
-		}
-	} else {
-		len += sprintf(page+len, "SPP");
-		if (pp->modes & PARPORT_MODE_PS2)
-			len += sprintf(page+len, ",PS2");
-		if (pp->modes & PARPORT_MODE_EPP)
-			len += sprintf(page+len, ",EPP");
-	}
-	len += sprintf(page+len, "\n");
-	
-#if 0
-	/* Now no detection, please fix with an external function */
-	len += sprintf(page+len, "chipset:\tunknown\n");
-#endif
-#ifdef PARPORT_INCLUDE_BENCHMARK
-	if (pp->speed)
-		len += sprintf(page+len, "bench:\t%d Bytes/s\n",pp->speed);
-	else
-		len += sprintf(page+len, "bench:\tunknown\n");
-#endif	
-
-	*start = 0;
-	*eof   = 1;
-	return len;
-}
-
-static struct proc_dir_entry *new_proc_entry(const char *name, mode_t mode,
-					     struct proc_dir_entry *parent,
-					     unsigned short ino)
-{
-	struct proc_dir_entry *ent;
-
-	ent = kmalloc(sizeof(struct proc_dir_entry), GFP_KERNEL);
-	if (!ent)
-		return NULL;
-	memset(ent, 0, sizeof(struct proc_dir_entry));
-	
-	if (mode == S_IFDIR)
-		mode |= S_IRUGO | S_IXUGO;
-	else if (mode == 0)
-		mode = S_IFREG | S_IRUGO;
-
-
-	ent->low_ino = ino;
-	ent->name = name;
-	ent->namelen = strlen(name);
-	ent->mode = mode;
-	if (S_ISDIR(mode)) 
-		ent->nlink = 2;
-	else
-		ent->nlink = 1;
-
-	proc_register(parent, ent);
-	
-	return ent;
-}
-
-
-int parport_proc_init()
-{
-	base = new_proc_entry("parport", S_IFDIR, &proc_root,PROC_PARPORT);
-
-	if (base)
-		return 1;
-	else {
-		printk(KERN_ERR "parport: Error creating proc entry /proc/parport\n");
-		return 0;
-	}
-}
-
-int parport_proc_cleanup()
-{
-	if (base)
-		proc_unregister(&proc_root,base->low_ino);
-
-	base = NULL;
-	
-	return 0;
-}
-
-int parport_proc_register(struct parport *pp)
-{
-	struct proc_dir_entry *ent;
-	static int conta=0;
-	char *name;
-
-	memset(&pp->pdir,0,sizeof(struct parport_dir));
-
-	if (!base) {
-		printk(KERN_ERR "parport: Error entry /proc/parport, not generated?\n");
-		return 1;
-	}
-	
-	name = pp->pdir.name;
-	sprintf(name,"%d",conta++);
-
-	ent = new_proc_entry(name, S_IFDIR, base,0);
-	if (!ent) {
-		printk(KERN_ERR "parport: Error registering proc_entry /proc/%s\n",name);
-		return 1;
-	}
-	pp->pdir.entry = ent;
-
-	ent = new_proc_entry("irq", S_IFREG | S_IRUGO | S_IWUSR, pp->pdir.entry,0);
-	if (!ent) {
-		printk(KERN_ERR "parport: Error registering proc_entry /proc/%s/irq\n",name);
-		return 1;
-	}
-	ent->read_proc = irq_read_proc;
-	ent->write_proc= irq_write_proc;
-	ent->data      = pp;
-	pp->pdir.irq   = ent;
-	
-	ent = new_proc_entry("devices", 0, pp->pdir.entry,0);
-	if (!ent) {
-		printk(KERN_ERR "parport: Error registering proc_entry /proc/%s/devices\n",name);
-		return 1;
-	}
-	ent->read_proc   = devices_read_proc;
-	ent->data        = pp;
-	pp->pdir.devices = ent;
-	
-	ent = new_proc_entry("hardware", 0, pp->pdir.entry,0);
-	if (!ent) {
-		printk(KERN_ERR "parport: Error registering proc_entry /proc/%s/hardware\n",name);
-		return 1;
-	}
-	ent->read_proc    = hardware_read_proc;
-	ent->data         = pp;
-	pp->pdir.hardware = ent;
-	return 0;
-}
-
-int parport_proc_unregister(struct parport *pp)
-{
-	if (pp->pdir.entry) {
-		if (pp->pdir.irq) {
-			proc_unregister(pp->pdir.entry, pp->pdir.irq->low_ino);
-			kfree(pp->pdir.irq);
-		}
-		
-		if (pp->pdir.devices) {
-			proc_unregister(pp->pdir.entry,
-					pp->pdir.devices->low_ino);
-			kfree(pp->pdir.devices);
-		}
-		
-		if (pp->pdir.hardware) {
-			proc_unregister(pp->pdir.entry,
-					pp->pdir.hardware->low_ino);
-			kfree(pp->pdir.hardware);
-		}
-		
-		proc_unregister(base, pp->pdir.entry->low_ino);
-		kfree(pp->pdir.entry);
-	}
-	
-	return 0;
-}
diff --git a/drivers/pnp/parport_share.c b/drivers/pnp/parport_share.c
index 9b854f138..e69de29bb 100644
--- a/drivers/pnp/parport_share.c
+++ b/drivers/pnp/parport_share.c
@@ -1,470 +0,0 @@
-/* $Id: parport_share.c,v 1.3.2.5 1997/04/16 21:20:44 phil Exp $
- * Parallel-port resource manager code.
- * 
- * Authors: David Campbell <campbell@tirian.che.curtin.edu.au>
- *          Tim Waugh <tmw20@cam.ac.uk>
- *	    Jose Renau <renau@acm.org>
- *
- * based on work by Grant Guenther <grant@torque.net>
- *              and Philip Blundell <Philip.Blundell@pobox.com>
- */
-
-#include <linux/tasks.h>
-#include <asm/io.h>
-#include <asm/dma.h>
-
-#include <linux/parport.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/kernel.h>
-#include <linux/malloc.h>
-
-#undef PARPORT_PARANOID
-
-#include "parport_ll_io.h"
-
-static struct parport *portlist = NULL, *portlist_tail = NULL;
-static int portcount = 0;
-
-/* from parport_init.c */
-extern int initialize_parport(struct parport *, unsigned long base, 
-			      int irq, int dma, int count);
-
-/* Return a list of all the ports we know about. */
-struct parport *parport_enumerate(void)
-{
-	return portlist;
-}
-
-void parport_null_intr_func(int irq, void *dev_id, struct pt_regs *regs)
-{
-	/* NULL function - Does nothing */
-	return;
-}
-
-struct parport *parport_register_port(unsigned long base, int irq, int dma)
-{
-	struct parport new, *tmp;
-
-	/* Check for a previously registered port.
-	 * NOTE: we will ignore irq and dma if we find a previously
-	 * registered device.
-	 */
-	for (tmp = portlist; tmp; tmp = tmp->next) {
-		if (tmp->base == base)
-			return tmp;
-	}
-
-	/* Has someone grabbed the address yet? */
-	if (check_region(base, 3))
-		return NULL;
-
-	if (!initialize_parport(&new,base,irq,dma,portcount))
-		return NULL;
-					   
-	if (new.dma >= 0) {
-		if (request_dma(new.dma, new.name)) {
-			printk(KERN_INFO "%s: unable to claim DMA %d\n", 
-			       new.name, new.dma);
-			release_region(new.base, new.size);
-			if( new.modes & PARPORT_MODE_ECR )
-				release_region(new.base+0x400, 3);
-			kfree(new.name);
-			return NULL;
-		}
-	}
-
-	tmp = kmalloc(sizeof(struct parport), GFP_KERNEL);
-	if (!tmp) {
-		printk(KERN_WARNING "parport: memory squeeze\n");
-		release_region(new.base, new.size);
-		if( new.modes & PARPORT_MODE_ECR )
-			release_region(new.base+0x400, 3);
-		kfree(new.name);
-		return NULL;
-	}
-	memcpy(tmp, &new, sizeof(struct parport));
-
-	if (new.irq != PARPORT_IRQ_NONE) {
-		if (request_irq(new.irq, parport_null_intr_func,
-			  SA_INTERRUPT, new.name, tmp) != 0) {
-			printk(KERN_INFO "%s: unable to claim IRQ %d\n", 
-			       new.name, new.irq);
-			kfree(tmp);
-			release_region(new.base, new.size);
-			if( new.modes & PARPORT_MODE_ECR )
-				release_region(new.base+0x400, 3);
-			kfree(new.name);
-			return NULL;
-		}
-	}
-
-	/* Here we chain the entry to our list. */
-	if (portlist_tail)
-		portlist_tail->next = tmp;
-	portlist_tail = tmp;
-	if (!portlist)
-		portlist = tmp;
-
-	printk(KERN_INFO "%s at 0x%x", tmp->name, tmp->base);
-	if (tmp->irq >= 0)
-		printk(", irq %d", tmp->irq);
-	if (tmp->dma >= 0)
-		printk(", dma %d", tmp->dma);
-	printk(" [");
-	{
-		/* Ugh! */
-#define printmode(x) {if(tmp->modes&PARPORT_MODE_##x){printk("%s%s",f?",":"",#x);f++;}}
-		int f = 0;
-		printmode(SPP);
-		printmode(PS2);
-		printmode(EPP);
-		printmode(ECP);
-		printmode(ECPEPP);
-		printmode(ECPPS2);
-#undef printmode
-	}
-	printk("]\n");
-	portcount++;
-
-	/* Restore device back to default conditions */
-	if (tmp->modes & PARPORT_MODE_ECR)
-		w_ecr(tmp, tmp->ecr);
-	w_ctr(tmp, tmp->ctr);
-
-	tmp->probe_info.class = PARPORT_CLASS_LEGACY;  /* assume the worst */
-	return tmp;
-}
-
-void parport_destroy(struct parport *port)
-{
-	/* Dangerous to try destroying a port if its friends are nearby. */
-	if (port->devices) {
-		printk("%s: attempt to release active port\n", port->name);
-		return;		/* Devices still present */
-	}
-
-	/* No point in further destroying a port that already lies in ruins. */
-	if (port->flags & PARPORT_FLAG_COMA) 
-		return;
-
-	/* Now clean out the port entry */
-	if (port->irq >= 0)
-		free_irq(port->irq, port);
-	if (port->dma >= 0)
-		free_dma(port->dma);
-	release_region(port->base, port->size);
-	if( port->modes & PARPORT_MODE_ECR )
-		release_region(port->base+0x400, 3);
-	port->flags |= PARPORT_FLAG_COMA; 
-}
-
-struct ppd *parport_register_device(struct parport *port, const char *name,
-				   callback_func pf, callback_func kf,
-				   irq_handler_func irq_func, int flags,
-				   void *handle)
-{
-	struct ppd *tmp;
-
-	/* We only allow one lurker device (eg PLIP) */
-	if (flags & PARPORT_DEV_LURK) {
-		if (port->lurker) {
-			printk(KERN_INFO "%s: refused to register second lurker (%s)\n",
-				   port->name, name);
-			return NULL;
-		}
-		if (!pf || !kf) {
-			printk(KERN_INFO "%s: refused to register lurking device (%s) without callbacks\n"
-				   ,port->name, name);
-			return NULL;
-		}
-	}
-
-	/* We may need to claw back the port hardware. */
-	if (port->flags & PARPORT_FLAG_COMA) {
-		if (check_region(port->base, 3)) {
-			return NULL;
-		}
-		request_region(port->base, port->size, port->name);
-		if( port->modes & PARPORT_MODE_ECR )
-			request_region(port->base+0x400, 3,port->name);
-			
-		if (port->dma >= 0) {
-			if (request_dma(port->dma, port->name)) {
-				release_region(port->base, port->size);
-				if( port->modes & PARPORT_MODE_ECR )
-					release_region(port->base+0x400, 3);
-				return NULL;
-			}
-		}
-		if (port->irq != PARPORT_IRQ_NONE) {
-			if (request_irq(port->irq, parport_null_intr_func,
-					SA_INTERRUPT, port->name,
-					port) != 0) {
-				release_region(port->base, port->size);
-				if( port->modes & PARPORT_MODE_ECR )
-					release_region(port->base+0x400, 3);
-				if (port->dma >= 0)
-					free_dma(port->dma);
-				return NULL;
-			}
-		}
-		port->flags &= ~PARPORT_FLAG_COMA;
-	}
-
-	tmp = kmalloc(sizeof(struct ppd), GFP_KERNEL);
-	tmp->name = (char *) name;
-	tmp->port = port;
-	tmp->preempt = pf;
-	tmp->wakeup = kf;
-	tmp->private = handle;
-	tmp->flags = flags;
-	tmp->irq_func = irq_func;
-	tmp->ctr = port->ctr;
-	tmp->ecr = port->ecr;
-
-	/* Chain this onto the list */
-	tmp->prev = NULL;
-	tmp->next = port->devices;
-	if (port->devices)
-		port->devices->prev = tmp;
-	port->devices = tmp;
-
-	if (flags & PARPORT_DEV_LURK)
-		port->lurker = tmp;
-
-	inc_parport_count();
-
-	return tmp;
-}
-
-void parport_unregister_device(struct ppd *dev)
-{
-	struct parport *port;
-
-	if (!dev) {
-		printk(KERN_ERR "parport_unregister_device: passed NULL\n");
-		return;
-	}
-
-	port = dev->port;
-
-	if (port->cad == dev) {
-		printk(KERN_INFO "%s: refused to unregister currently active device %s\n", port->name, dev->name);
-		return;
-	}
-
-	if (port->lurker == dev)
-		port->lurker = NULL;
-
-	if (dev->next)
-		dev->next->prev = dev->prev;
-	if (dev->prev)
-		dev->prev->next = dev->next;
-	else
-		port->devices = dev->next;
-
-	kfree(dev);
-
-	dec_parport_count();
-
-	/* If there are no more devices, put the port to sleep. */
-	if (!port->devices)
-		parport_destroy(port);
-
-	return;
-}
-
-int parport_claim(struct ppd *dev)
-{
-	struct ppd *pd1;
-
-	if (dev->port->cad == dev) {
-		printk(KERN_INFO "%s: %s already owner\n",
-			   dev->port->name,dev->name);
-		return 0;
-	}
-
-	/* Preempt any current device */
-	pd1 = dev->port->cad;
-	if (dev->port->cad) {
-		if (dev->port->cad->preempt) {
-			/* Now try to preempt */
-			if (dev->port->cad->preempt(dev->port->cad->private))
-				return -EAGAIN;
-
-			/* Save control registers */
-			if (dev->port->modes & PARPORT_MODE_ECR)
-				dev->port->cad->ecr = dev->port->ecr = 
-					r_ecr(dev->port);
-			if (dev->port->modes & PARPORT_MODE_SPP)
-				dev->port->cad->ctr = dev->port->ctr =
-					r_ctr(dev->port);
-		} else
-			return -EAGAIN;
-	}
-
-	/* Watch out for bad things */
-	if (dev->port->cad != pd1) {
-		printk(KERN_WARNING "%s: death while preempting %s\n",
-		       dev->port->name, dev->name);
-		if (dev->port->cad)
-			return -EAGAIN;
-	}
-
-	/* Now we do the change of devices */
-	dev->port->cad = dev;
-
-	if (dev->port->irq >= 0) {
-		free_irq(dev->port->irq, dev->port);
-		request_irq(dev->port->irq, dev->irq_func ? dev->irq_func :
-			    parport_null_intr_func, SA_INTERRUPT, dev->name,
-			    dev->port);
-	}
-
-	/* Restore control registers */
-	if (dev->port->modes & PARPORT_MODE_ECR)
-		if (dev->ecr != dev->port->ecr) w_ecr(dev->port, dev->ecr);
-	if (dev->port->modes & PARPORT_MODE_SPP)
-		if (dev->ctr != dev->port->ctr) w_ctr(dev->port, dev->ctr);
-
-	return 0;
-}
-
-void parport_release(struct ppd *dev)
-{
-	struct ppd *pd1;
-
-	/* Make sure that dev is the current device */
-	if (dev->port->cad != dev) {
-		printk(KERN_WARNING "%s: %s tried to release parport when not owner\n", dev->port->name, dev->name);
-		return;
-	}
-	dev->port->cad = NULL;
-
-	/* Save control registers */
-	if (dev->port->modes & PARPORT_MODE_ECR)
-		dev->ecr = dev->port->ecr = r_ecr(dev->port);
-	if (dev->port->modes & PARPORT_MODE_SPP)
-		dev->ctr = dev->port->ctr = r_ctr(dev->port);
-	
-	if (dev->port->irq >= 0) {
-		free_irq(dev->port->irq, dev->port);
-		request_irq(dev->port->irq, parport_null_intr_func,
-			    SA_INTERRUPT, dev->port->name, dev->port);
- 	}
-
-	/* Walk the list, offering a wakeup callback to everybody other
-	 * than the lurker and the device that called us.
-	 */
-	for (pd1 = dev->next; pd1; pd1 = pd1->next) {
-		if (!(pd1->flags & PARPORT_DEV_LURK)) {
-			if (pd1->wakeup) {
-				pd1->wakeup(pd1->private);
-				if (dev->port->cad)
-					return;
-			}
-		}
-	}
-
-	for (pd1 = dev->port->devices; pd1 && pd1 != dev; pd1 = pd1->next) {
-		if (!(pd1->flags & PARPORT_DEV_LURK)) {
-			if (pd1->wakeup) {
-				pd1->wakeup(pd1->private);
-				if (dev->port->cad)
-					return;
-			}
-		}
-	}
-
-	/* Now give the lurker a chance.
-	 * There should be a wakeup callback because we checked for it
-	 * at registration.
-	 */
-	if (dev->port->lurker && (dev->port->lurker != dev)) {
-		if (dev->port->lurker->wakeup) {
-			dev->port->lurker->wakeup(dev->port->lurker->private);
-		} 
-#ifdef PARPORT_PARANOID
-		else {  /* can't happen */
-			printk(KERN_DEBUG
-			  "%s (%s): lurker's wakeup callback went away!\n",
-			       dev->port->name, dev->name);
-		}
-#endif
-	}
-}
-
-/* The following read funktions are an implementation of a status readback
- * and device id request confirming to IEEE1284-1994.
- *
- * These probably ought to go in some seperate file, so people like the SPARC
- * don't have to pull them in.
- */
-
-/* Wait for Status line(s) to change in 35 ms - see IEEE1284-1994 page 24 to
- * 25 for this. After this time we can create a timeout because the
- * peripheral doesn't conform to IEEE1284. We want to save CPU time: we are
- * waiting a maximum time of 500 us busy (this is for speed). If there is
- * not the right answer in this time, we call schedule and other processes
- * are able "to eat" the time up to 30ms.  So the maximum load avarage can't
- * get above 5% for a read even if the peripheral is really slow. (but your
- * read gets very slow then - only about 10 characters per second. This
- * should be tuneable). Thanks to Andreas who pointed me to this and ordered
- * the documentation.
- */ 
-
-int parport_wait_peripheral(struct parport *port, unsigned char mask, 
-	unsigned char result)
-{
-	int counter=0;
-	unsigned char status; 
-	
-	do {
-		status = parport_r_status(port);
-		udelay(25);
-		counter++;
-		if (need_resched)
-			schedule();
-	} while ( ((status & mask) != result) && (counter < 20) );
-	if ( (counter == 20) && ((status & mask) != result) ) { 
-		current->state=TASK_INTERRUPTIBLE;
-		current->timeout=jiffies+4;
-		schedule(); /* wait for 4 scheduler runs (40ms) */
-		status = parport_r_status(port);
-		if ((status & mask) != result) return 1; /* timeout */
-	}
-	return 0; /* okay right response from device */
-}		
-
-/* Test if nibble mode for status readback is okay. Returns the value false
- * if the printer doesn't support readback at all. If it supports readbacks
- * and printer data is available the function returns 1, otherwise 2. The
- * only valid values for "mode" are 0 and 4. 0 requests normal nibble mode,
- * 4 is for "request device id using nibble mode". The request for the
- * device id is best done in an ioctl (or at bootup time).  There is no
- * check for an invalid value, the only function using this call at the
- * moment is lp_read and the ioctl LPGETDEVICEID both fixed calls from
- * trusted kernel.
- */
-int parport_ieee1284_nibble_mode_ok(struct parport *port, unsigned char mode) 
-{
-	parport_w_data(port, mode);
-	udelay(5);		
-	parport_w_ctrl(port, parport_r_ctrl(port) & ~8);  /* SelectIN low */
-	parport_w_ctrl(port, parport_r_ctrl(port) | 2); /* AutoFeed high */
-	if (parport_wait_peripheral(port, 0x78, 0x38)) { /* timeout? */
-		parport_w_ctrl(port, (parport_r_ctrl(port) & ~2) | 8);
-		return 0; /* first stage of negotiation failed, 
-                           * no IEEE1284 compliant device on this port 
-                           */ 
-	}
-	parport_w_ctrl(port, parport_r_ctrl(port) | 1);      /* Strobe high */
-	udelay(5);				     /* Strobe wait */
-	parport_w_ctrl(port, parport_r_ctrl(port) & ~1);     /* Strobe low */
-	udelay(5);
-	parport_w_ctrl(port, parport_r_ctrl(port) & ~2);     /* AutoFeed low */
-	return (parport_wait_peripheral(port, 0x20, 0))?2:1;
-}
diff --git a/drivers/scsi/.cvsignore b/drivers/scsi/.cvsignore
index 4671378ae..38d1d3090 100644
--- a/drivers/scsi/.cvsignore
+++ b/drivers/scsi/.cvsignore
@@ -1 +1,3 @@
 .depend
+aic7xxx_asm
+aic7xxx_seq.h
diff --git a/drivers/scsi/sgiwd93.c b/drivers/scsi/sgiwd93.c
index 83affefb6..ed5b1ec97 100644
--- a/drivers/scsi/sgiwd93.c
+++ b/drivers/scsi/sgiwd93.c
@@ -1,4 +1,4 @@
-/* $Id: sgiwd93.c,v 1.7 1996/07/23 09:00:16 dm Exp $
+/* $Id: sgiwd93.c,v 1.1.1.1 1997/06/01 03:17:36 ralf Exp $
  * sgiwd93.c: SGI WD93 scsi driver.
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
@@ -244,3 +244,15 @@ int sgiwd93_detect(Scsi_Host_Template *HPsUX)
 
 	return 1; /* Found one. */
 }
+
+#ifdef MODULE
+
+#define HOSTS_C
+
+#include "sgiwd93.h"
+
+Scsi_Host_Template driver_template = SGIWD93_SCSI;
+
+#include "scsi_module.c"
+
+#endif
diff --git a/drivers/sound/.cvsignore b/drivers/sound/.cvsignore
index 4671378ae..7c1f51961 100644
--- a/drivers/sound/.cvsignore
+++ b/drivers/sound/.cvsignore
@@ -1 +1,4 @@
 .depend
+.defines
+local.h
+configure
diff --git a/drivers/sound/Config.in b/drivers/sound/Config.in
index d14653d45..310bf01bf 100644
--- a/drivers/sound/Config.in
+++ b/drivers/sound/Config.in
@@ -1,277 +1,15 @@
-bool 'ProAudioSpectrum 16 support' CONFIG_PAS
-bool '100%% Sound Blaster compatibles (SB16/32/64, ESS, Jazz16) support' CONFIG_SB
-bool 'Generic OPL2/OPL3 FM synthesizer support' CONFIG_ADLIB
-bool 'Gravis Ultrasound support' CONFIG_GUS
-bool 'MPU-401 support (NOT for SB16)' CONFIG_MPU401
-bool 'PSS (ECHO-ADI2111) support' CONFIG_PSS
-bool '16 bit sampling option of GUS (_NOT_ GUS MAX)' CONFIG_GUS16
-bool 'GUS MAX support' CONFIG_GUSMAX
-bool 'Microsoft Sound System support' CONFIG_MSS
-bool 'Ensoniq SoundScape support' CONFIG_SSCAPE
-bool 'MediaTrix AudioTrix Pro support' CONFIG_TRIX
-bool 'Support for MAD16 and/or Mozart based cards' CONFIG_MAD16
-bool 'Support for Crystal CS4232 based (PnP) cards' CONFIG_CS4232
-bool 'Support for Turtle Beach Wave Front (Maui, Tropez) synthesizers' CONFIG_MAUI
-bool 'FM synthesizer (YM3812/OPL-3) support' CONFIG_YM3812
-
-if [ "$CONFIG_AEDSP16" = "y" ]; then
-hex 'I/O base for Audio Excel DSP 16 220 or 240' AEDSP16_BASE 220
-fi
-
-if [ "$CONFIG_SB" = "y" ]; then
-hex 'I/O base for SB Check from manual of the card' SBC_BASE 220
-fi
-
-if [ "$CONFIG_SB" = "y" ]; then
-int 'Sound Blaster IRQ Check from manual of the card' SBC_IRQ 7
-fi
-
-if [ "$CONFIG_SB" = "y" ]; then
-int 'Sound Blaster DMA 0, 1 or 3' SBC_DMA 1
-fi
-
-if [ "$CONFIG_SB" = "y" ]; then
-int 'Sound Blaster 16 bit DMA (SB16, Jazz16, SMW) 5, 6 or 7 (use 1 for 8 bit cards)' SB_DMA2 5
-fi
-
-if [ "$CONFIG_SB" = "y" ]; then
-hex 'MPU401 I/O base of SB16, Jazz16 and ES1688 Check from manual of the card' SB_MPU_BASE 330
-fi
-
-
-if [ "$CONFIG_SB" = "y" ]; then
-comment 'MPU401 IRQ is only required with Jazz16, SM Wave and ESS1688.'
-fi
-
-
-if [ "$CONFIG_SB" = "y" ]; then
-comment 'Enter -1 to the following question if you have something else such as SB16/32.'
-fi
-
-if [ "$CONFIG_SB" = "y" ]; then
-int 'SB MPU401 IRQ (Jazz16, SM Wave and ES1688) Check from manual of the card' SB_MPU_IRQ -1
-fi
-
-if [ "$CONFIG_PAS" = "y" ]; then
-int 'PAS16 IRQ 3, 4, 5, 7, 9, 10, 11, 12, 14 or 15' PAS_IRQ 10
-fi
-
-if [ "$CONFIG_PAS" = "y" ]; then
-int 'PAS16 DMA 0, 1, 3, 5, 6 or 7' PAS_DMA 3
-fi
-
-if [ "$CONFIG_GUS" = "y" ]; then
-hex 'I/O base for GUS 210, 220, 230, 240, 250 or 260' GUS_BASE 220
-fi
-
-if [ "$CONFIG_GUS" = "y" ]; then
-int 'GUS IRQ 3, 5, 7, 9, 11, 12 or 15' GUS_IRQ 15
-fi
-
-if [ "$CONFIG_GUS" = "y" ]; then
-int 'GUS DMA 1, 3, 5, 6 or 7' GUS_DMA 6
-fi
-
-if [ "$CONFIG_GUS" = "y" ]; then
-int 'Second DMA channel for GUS 1, 3, 5, 6 or 7' GUS_DMA2 -1
-fi
-
-if [ "$CONFIG_GUS16" = "y" ]; then
-hex 'I/O base for the 16 bit daughtercard of GUS 530, 604, E80 or F40' GUS16_BASE 530
-fi
-
-if [ "$CONFIG_GUS16" = "y" ]; then
-int 'GUS 16 bit daughtercard IRQ 3, 4, 5, 7, or 9' GUS16_IRQ 7
-fi
-
-if [ "$CONFIG_GUS16" = "y" ]; then
-int 'GUS DMA 0, 1 or 3' GUS16_DMA 3
-fi
-
-if [ "$CONFIG_MPU401" = "y" ]; then
-hex 'I/O base for MPU401 Check from manual of the card' MPU_BASE 330
-fi
-
-if [ "$CONFIG_MPU401" = "y" ]; then
-int 'MPU401 IRQ Check from manual of the card' MPU_IRQ 9
-fi
-
-
-if [ "$CONFIG_MAUI" = "y" ]; then
-comment 'ERROR! You have to use old sound configuration method with Maui.'
-fi
-
-if [ "$CONFIG_MAUI" = "y" ]; then
-hex 'I/O base for Maui 210, 230, 260, 290, 300, 320, 338 or 330' MAUI_BASE 330
-fi
-
-if [ "$CONFIG_MAUI" = "y" ]; then
-int 'Maui IRQ 5, 9, 12 or 15' MAUI_IRQ 9
-fi
-
-if [ "$CONFIG_UART6850" = "y" ]; then
-hex 'I/O base for UART 6850 MIDI port (Unknown)' U6850_BASE 0
-fi
-
-if [ "$CONFIG_UART6850" = "y" ]; then
-int 'UART6850 IRQ (Unknown)' U6850_IRQ -1
-fi
-
-
-if [ "$CONFIG_PSS" = "y" ]; then
-comment 'ERROR! You have to use old sound configuration method with PSS cards.'
-fi
-
-if [ "$CONFIG_PSS" = "y" ]; then
-hex 'PSS I/O base 220 or 240' PSS_BASE 220
-fi
-
-if [ "$CONFIG_PSS" = "y" ]; then
-hex 'PSS audio I/O base 530, 604, E80 or F40' PSS_MSS_BASE 530
-fi
-
-if [ "$CONFIG_PSS" = "y" ]; then
-int 'PSS audio IRQ 7, 9, 10 or 11' PSS_MSS_IRQ 11
-fi
-
-if [ "$CONFIG_PSS" = "y" ]; then
-int 'PSS audio DMA 0, 1 or 3' PSS_MSS_DMA 3
-fi
-
-if [ "$CONFIG_PSS" = "y" ]; then
-hex 'PSS MIDI I/O base ' PSS_MPU_BASE 330
-fi
-
-if [ "$CONFIG_PSS" = "y" ]; then
-int 'PSS MIDI IRQ 3, 4, 5, 7 or 9' PSS_MPU_IRQ 9
-fi
-
-if [ "$CONFIG_MSS" = "y" ]; then
-hex 'MSS/WSS I/O base 530, 604, E80 or F40' MSS_BASE 530
-fi
-
-if [ "$CONFIG_MSS" = "y" ]; then
-int 'MSS/WSS IRQ 7, 9, 10 or 11' MSS_IRQ 11
-fi
-
-if [ "$CONFIG_MSS" = "y" ]; then
-int 'MSS/WSS DMA 0, 1 or 3' MSS_DMA 3
-fi
-
-if [ "$CONFIG_MSS" = "y" ]; then
-int 'MSS/WSS second DMA (if possible) 0, 1 or 3' MSS_DMA2 -1
-fi
-
-if [ "$CONFIG_SSCAPE" = "y" ]; then
-hex 'SoundScape MIDI I/O base 320, 330, 340 or 350' SSCAPE_BASE 330
-fi
-
-if [ "$CONFIG_SSCAPE" = "y" ]; then
-int 'SoundScape MIDI IRQ ' SSCAPE_IRQ 9
-fi
-
-if [ "$CONFIG_SSCAPE" = "y" ]; then
-int 'SoundScape initialization DMA 0, 1 or 3' SSCAPE_DMA 3
-fi
-
-if [ "$CONFIG_SSCAPE" = "y" ]; then
-hex 'SoundScape audio I/O base 534, 608, E84 or F44' SSCAPE_MSS_BASE 534
-fi
-
-if [ "$CONFIG_SSCAPE" = "y" ]; then
-int 'SoundScape audio IRQ 7, 9, 10 or 11' SSCAPE_MSS_IRQ 11
-fi
-
-
-if [ "$CONFIG_TRIX" = "y" ]; then
-comment 'ERROR! You have to use old sound configuration method with AudioTrix.'
-fi
-
-if [ "$CONFIG_TRIX" = "y" ]; then
-hex 'AudioTrix audio I/O base 530, 604, E80 or F40' TRIX_BASE 530
-fi
-
-if [ "$CONFIG_TRIX" = "y" ]; then
-int 'AudioTrix audio IRQ 7, 9, 10 or 11' TRIX_IRQ 11
-fi
-
-if [ "$CONFIG_TRIX" = "y" ]; then
-int 'AudioTrix audio DMA 0, 1 or 3' TRIX_DMA 0
-fi
-
-if [ "$CONFIG_TRIX" = "y" ]; then
-int 'AudioTrix second (duplex) DMA 0, 1 or 3' TRIX_DMA2 3
-fi
-
-if [ "$CONFIG_TRIX" = "y" ]; then
-hex 'AudioTrix MIDI I/O base 330, 370, 3B0 or 3F0' TRIX_MPU_BASE 330
-fi
-
-if [ "$CONFIG_TRIX" = "y" ]; then
-int 'AudioTrix MIDI IRQ 3, 4, 5, 7 or 9' TRIX_MPU_IRQ 9
-fi
-
-if [ "$CONFIG_TRIX" = "y" ]; then
-hex 'AudioTrix SB I/O base 220, 210, 230, 240, 250, 260 or 270' TRIX_SB_BASE 220
-fi
-
-if [ "$CONFIG_TRIX" = "y" ]; then
-int 'AudioTrix SB IRQ 3, 4, 5 or 7' TRIX_SB_IRQ 7
-fi
-
-if [ "$CONFIG_TRIX" = "y" ]; then
-int 'AudioTrix SB DMA 1 or 3' TRIX_SB_DMA 1
-fi
-
-if [ "$CONFIG_CS4232" = "y" ]; then
-hex 'CS4232 audio I/O base 530, 604, E80 or F40' CS4232_BASE 530
-fi
-
-if [ "$CONFIG_CS4232" = "y" ]; then
-int 'CS4232 audio IRQ 5, 7, 9, 11, 12 or 15' CS4232_IRQ 11
-fi
-
-if [ "$CONFIG_CS4232" = "y" ]; then
-int 'CS4232 audio DMA 0, 1 or 3' CS4232_DMA 0
-fi
-
-if [ "$CONFIG_CS4232" = "y" ]; then
-int 'CS4232 second (duplex) DMA 0, 1 or 3' CS4232_DMA2 3
-fi
-
-if [ "$CONFIG_CS4232" = "y" ]; then
-hex 'CS4232 MIDI I/O base 330, 370, 3B0 or 3F0' CS4232_MPU_BASE 330
-fi
-
-if [ "$CONFIG_CS4232" = "y" ]; then
-int 'CS4232 MIDI IRQ 5, 7, 9, 11, 12 or 15' CS4232_MPU_IRQ 9
-fi
-
-if [ "$CONFIG_MAD16" = "y" ]; then
-hex 'MAD16 audio I/O base 530, 604, E80 or F40' MAD16_BASE 530
-fi
-
-if [ "$CONFIG_MAD16" = "y" ]; then
-int 'MAD16 audio IRQ 7, 9, 10 or 11' MAD16_IRQ 11
-fi
-
-if [ "$CONFIG_MAD16" = "y" ]; then
-int 'MAD16 audio DMA 0, 1 or 3' MAD16_DMA 3
-fi
-
-if [ "$CONFIG_MAD16" = "y" ]; then
-int 'MAD16 second (duplex) DMA 0, 1 or 3' MAD16_DMA2 0
-fi
-
-if [ "$CONFIG_MAD16" = "y" ]; then
-hex 'MAD16 MIDI I/O base 300, 310, 320 or 330 (0 disables)' MAD16_MPU_BASE 330
-fi
-
-if [ "$CONFIG_MAD16" = "y" ]; then
-int 'MAD16 MIDI IRQ 5, 7, 9 or 10' MAD16_MPU_IRQ 9
-fi
 #
-$MAKE -C drivers/sound kernelconfig || exit 1
+# Sound driver configuration
+#
+#--------
+# There is another confic script which is compatible with rest of
+# the kernel. It can be activated by running 'make mkscript' in this
+# directory. Please note that this is an _experimental_ feature which
+# doesn't work with all cards (PSS, SM Wave, AudioTriX Pro, Maui).
+#--------
+#
+$MAKE -C drivers/sound config || exit 1
+
 bool 'Additional low level drivers' CONFIG_LOWLEVEL_SOUND
 
 if [ "$CONFIG_LOWLEVEL_SOUND" = "y" ]; then