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authorRalf Baechle <ralf@linux-mips.org>1997-04-29 21:13:14 +0000
committer <ralf@linux-mips.org>1997-04-29 21:13:14 +0000
commit19c9bba94152148523ba0f7ef7cffe3d45656b11 (patch)
tree40b1cb534496a7f1ca0f5c314a523c69f1fee464 /include/asm-alpha/bitops.h
parent7206675c40394c78a90e74812bbdbf8cf3cca1be (diff)
Import of Linux/MIPS 2.1.36
Diffstat (limited to 'include/asm-alpha/bitops.h')
-rw-r--r--include/asm-alpha/bitops.h84
1 files changed, 47 insertions, 37 deletions
diff --git a/include/asm-alpha/bitops.h b/include/asm-alpha/bitops.h
index 200a905c1..2a6f33a64 100644
--- a/include/asm-alpha/bitops.h
+++ b/include/asm-alpha/bitops.h
@@ -10,6 +10,10 @@
* is guaranteed to be atomic. All bit operations return 0 if the bit
* was cleared before the operation and != 0 if it was not.
*
+ * To get proper branch prediction for the main line, we must branch
+ * forward to code at the end of this object's .text section, then
+ * branch back to restart the operation.
+ *
* bit 0 is the LSB of addr; bit 64 is the LSB of (addr+1).
*/
@@ -20,19 +24,19 @@ extern __inline__ unsigned long set_bit(unsigned long nr, void * addr)
unsigned int * m = ((unsigned int *) addr) + (nr >> 5);
__asm__ __volatile__(
- "\n1:\t"
- "ldl_l %0,%1\n\t"
- "and %0,%3,%2\n\t"
- "bne %2,2f\n\t"
- "xor %0,%3,%0\n\t"
- "stl_c %0,%1\n\t"
- "beq %0,1b\n"
- "2:"
- :"=&r" (temp),
- "=m" (*m),
- "=&r" (oldbit)
- :"Ir" (1UL << (nr & 31)),
- "m" (*m));
+ "1: ldl_l %0,%1\n"
+ " and %0,%3,%2\n"
+ " bne %2,2f\n"
+ " xor %0,%3,%0\n"
+ " stl_c %0,%1\n"
+ " beq %0,3f\n"
+ "2:\n"
+ ".text 2\n"
+ "3: br 1b\n"
+ ".text"
+ :"=&r" (temp), "=m" (*m), "=&r" (oldbit)
+ :"Ir" (1UL << (nr & 31)), "m" (*m));
+
return oldbit != 0;
}
@@ -43,19 +47,19 @@ extern __inline__ unsigned long clear_bit(unsigned long nr, void * addr)
unsigned int * m = ((unsigned int *) addr) + (nr >> 5);
__asm__ __volatile__(
- "\n1:\t"
- "ldl_l %0,%1\n\t"
- "and %0,%3,%2\n\t"
- "beq %2,2f\n\t"
- "xor %0,%3,%0\n\t"
- "stl_c %0,%1\n\t"
- "beq %0,1b\n"
- "2:"
- :"=&r" (temp),
- "=m" (*m),
- "=&r" (oldbit)
- :"Ir" (1UL << (nr & 31)),
- "m" (*m));
+ "1: ldl_l %0,%1\n"
+ " and %0,%3,%2\n\t"
+ " beq %2,2f\n\t"
+ " xor %0,%3,%0\n\t"
+ " stl_c %0,%1\n\t"
+ " beq %0,3f\n"
+ "2:\n"
+ ".text 2\n"
+ "3: br 1b\n"
+ ".text"
+ :"=&r" (temp), "=m" (*m), "=&r" (oldbit)
+ :"Ir" (1UL << (nr & 31)), "m" (*m));
+
return oldbit != 0;
}
@@ -66,17 +70,17 @@ extern __inline__ unsigned long change_bit(unsigned long nr, void * addr)
unsigned int * m = ((unsigned int *) addr) + (nr >> 5);
__asm__ __volatile__(
- "\n1:\t"
- "ldl_l %0,%1\n\t"
- "and %0,%3,%2\n\t"
- "xor %0,%3,%0\n\t"
- "stl_c %0,%1\n\t"
- "beq %0,1b\n"
- :"=&r" (temp),
- "=m" (*m),
- "=&r" (oldbit)
- :"Ir" (1UL << (nr & 31)),
- "m" (*m));
+ "1: ldl_l %0,%1\n"
+ " and %0,%3,%2\n\t"
+ " xor %0,%3,%0\n\t"
+ " stl_c %0,%1\n\t"
+ " beq %0,3f\n"
+ ".text 2\n"
+ "3: br 1b\n"
+ ".text"
+ :"=&r" (temp), "=m" (*m), "=&r" (oldbit)
+ :"Ir" (1UL << (nr & 31)), "m" (*m));
+
return oldbit != 0;
}
@@ -168,6 +172,12 @@ found_middle:
#define ext2_find_first_zero_bit find_first_zero_bit
#define ext2_find_next_zero_bit find_next_zero_bit
+/* Bitmap functions for the minix filesystem. */
+#define minix_set_bit(nr,addr) set_bit(nr,addr)
+#define minix_clear_bit(nr,addr) clear_bit(nr,addr)
+#define minix_test_bit(nr,addr) test_bit(nr,addr)
+#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
+
#endif /* __KERNEL__ */
#endif /* _ALPHA_BITOPS_H */