diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 1998-03-17 22:05:47 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 1998-03-17 22:05:47 +0000 |
| commit | 27cfca1ec98e91261b1a5355d10a8996464b63af (patch) | |
| tree | 8e895a53e372fa682b4c0a585b9377d67ed70d0e /include/asm-alpha/cache.h | |
| parent | 6a76fb7214c477ccf6582bd79c5b4ccc4f9c41b1 (diff) | |
Look Ma' what I found on my harddisk ...
o New faster syscalls for 2.1.x, too
o Upgrade to 2.1.89.
Don't try to run this. It's flaky as hell. But feel free to debug ...
Diffstat (limited to 'include/asm-alpha/cache.h')
| -rw-r--r-- | include/asm-alpha/cache.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/asm-alpha/cache.h b/include/asm-alpha/cache.h index c1276cb1e..c9b94b76b 100644 --- a/include/asm-alpha/cache.h +++ b/include/asm-alpha/cache.h @@ -4,9 +4,9 @@ #ifndef __ARCH_ALPHA_CACHE_H #define __ARCH_ALPHA_CACHE_H -/* bytes per L1 cache line */ -#define L1_CACHE_BYTES 32 /* a guess */ - -#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) +/* Bytes per L1 (data) cache line. Both EV4 and EV5 are write-through, + read-allocate, direct-mapped, physical. */ +#define L1_CACHE_BYTES 32 +#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) #endif |