diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 1999-06-22 23:05:57 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 1999-06-22 23:05:57 +0000 |
| commit | 51d3b7814cdccef9188240fe0cbd8d97ff2c7470 (patch) | |
| tree | 5cbb01d0323d4f63ade66bdf48ba4a91aaa6df16 /include/asm-arm/proc-armv | |
| parent | 52273a23c9a84336b93a35e4847fc88fac7eb0e4 (diff) | |
Merge with Linux 2.3.7.
WARNING: 2.3.7 is known to eat filesystems for breakfast and little
children for lunch, so if you try this on your machine make backups
first ...
Diffstat (limited to 'include/asm-arm/proc-armv')
| -rw-r--r-- | include/asm-arm/proc-armv/ptrace.h | 8 | ||||
| -rw-r--r-- | include/asm-arm/proc-armv/semaphore.h | 16 | ||||
| -rw-r--r-- | include/asm-arm/proc-armv/system.h | 6 |
3 files changed, 20 insertions, 10 deletions
diff --git a/include/asm-arm/proc-armv/ptrace.h b/include/asm-arm/proc-armv/ptrace.h index b24305bd4..01f0a8ac8 100644 --- a/include/asm-arm/proc-armv/ptrace.h +++ b/include/asm-arm/proc-armv/ptrace.h @@ -52,6 +52,8 @@ struct pt_regs { #define CC_Z_BIT (1 << 30) #define CC_N_BIT (1 << 31) +#ifdef __KERNEL__ + #if 0 /* GCC/egcs should be able to optimise this, IMHO */ #define user_mode(regs) \ ((((regs)->ARM_cpsr & MODE_MASK) == USR_MODE) || \ @@ -81,8 +83,8 @@ struct pt_regs { */ static inline int valid_user_regs(struct pt_regs *regs) { - if ((regs->ARM_cpsr & 0xf) == 0 || - (regs->ARM_cpsr & (F_BIT|I_BIT))) + if ((regs->ARM_cpsr & 0xf) == 0 && + (regs->ARM_cpsr & (F_BIT|I_BIT)) == 0) return 1; /* @@ -93,5 +95,7 @@ static inline int valid_user_regs(struct pt_regs *regs) return 0; } +#endif /* __KERNEL__ */ + #endif diff --git a/include/asm-arm/proc-armv/semaphore.h b/include/asm-arm/proc-armv/semaphore.h index 52098bc5c..45ceaa3f1 100644 --- a/include/asm-arm/proc-armv/semaphore.h +++ b/include/asm-arm/proc-armv/semaphore.h @@ -16,12 +16,12 @@ extern inline void down(struct semaphore * sem) @ atomic down operation mrs %0, cpsr orr %1, %0, #128 @ disable IRQs - bic %0, %0, #0x80000000 @ clear N msr cpsr, %1 ldr %1, [%2] + bic %0, %0, #0x80000000 @ clear N subs %1, %1, #1 - orrmi %0, %0, #0x80000000 @ set N str %1, [%2] + orrmi %0, %0, #0x80000000 @ set N msr cpsr, %0 movmi r0, %2 blmi " SYMBOL_NAME_STR(__down_failed) @@ -42,12 +42,12 @@ extern inline int down_interruptible (struct semaphore * sem) @ atomic down interruptible operation mrs %0, cpsr orr %1, %0, #128 @ disable IRQs - bic %0, %0, #0x80000000 @ clear N msr cpsr, %1 ldr %1, [%2] + bic %0, %0, #0x80000000 @ clear N subs %1, %1, #1 - orrmi %0, %0, #0x80000000 @ set N str %1, [%2] + orrmi %0, %0, #0x80000000 @ set N msr cpsr, %0 movmi r0, %2 movpl r0, #0 @@ -68,12 +68,12 @@ extern inline int down_trylock(struct semaphore *sem) @ atomic down try lock operation mrs %0, cpsr orr %1, %0, #128 @ disable IRQs - bic %0, %0, #0x80000000 @ clear N msr cpsr, %1 ldr %1, [%2] + bic %0, %0, #0x80000000 @ clear N subs %1, %1, #1 - orrmi %0, %0, #0x80000000 @ set N str %1, [%2] + orrmi %0, %0, #0x80000000 @ set N msr cpsr, %0 movmi r0, %2 movpl r0, #0 @@ -100,12 +100,12 @@ extern inline void up(struct semaphore * sem) @ atomic up operation mrs %0, cpsr orr %1, %0, #128 @ disable IRQs - bic %0, %0, #0x80000000 @ clear N msr cpsr, %1 ldr %1, [%2] + bic %0, %0, #0x80000000 @ clear N adds %1, %1, #1 - orrls %0, %0, #0x80000000 @ set N str %1, [%2] + orrle %0, %0, #0x80000000 @ set N msr cpsr, %0 movmi r0, %2 blmi " SYMBOL_NAME_STR(__up_wakeup) diff --git a/include/asm-arm/proc-armv/system.h b/include/asm-arm/proc-armv/system.h index 9de0fccc5..2aa59a26e 100644 --- a/include/asm-arm/proc-armv/system.h +++ b/include/asm-arm/proc-armv/system.h @@ -121,6 +121,12 @@ extern unsigned long cr_alignment; /* defined in entry-armv.S */ : "memory"); \ } while (0) +/* For spinlocks etc */ +#define local_irq_save(x) __save_flags_cli(x) +#define local_irq_restore(x) __restore_flags(x) +#define local_irq_disable() __cli() +#define local_irq_enable() __sti() + #ifdef __SMP__ #error SMP not supported #else |