o Merge with Linux 2.1.116.

 o New Newport console code.
 o New G364 console code.

2 files changed, 29 insertions, 30 deletions

diff --git a/include/asm-arm/proc-armv/mm-init.h b/include/asm-arm/proc-armv/mm-init.h
index 287779258..2e861b213 100644
--- a/include/asm-arm/proc-armv/mm-init.h
+++ b/include/asm-arm/proc-armv/mm-init.h
@@ -48,12 +48,13 @@ static inline void
 alloc_init_section(unsigned long *mem, unsigned long virt, unsigned long phys, int domain, int prot)
 {
 	pgd_t *pgdp;
-	pmd_t *pmdp;
+	pmd_t *pmdp, pmd;
 
 	pgdp = pgd_offset_k(virt);
 	pmdp = pmd_offset(pgdp, virt);
 
-	pmd_val(*pmdp) = phys | PMD_TYPE_SECT | PMD_DOMAIN(domain) | prot;
+	pmd_val(pmd) = phys | PMD_TYPE_SECT | PMD_DOMAIN(domain) | prot;
+	set_pmd(pmdp, pmd);
 }
 
 /*
@@ -78,7 +79,7 @@ static inline void
 alloc_init_page(unsigned long *mem, unsigned long virt, unsigned long phys, int domain, int prot)
 {
 	pgd_t *pgdp;
-	pmd_t *pmdp;
+	pmd_t *pmdp, pmd;
 	pte_t *ptep;
 
 	pgdp = pgd_offset_k(virt);
@@ -92,7 +93,8 @@ alloc_init_page(unsigned long *mem, unsigned long virt, unsigned long phys, int
 		ptep = (pte_t *)memory;
 		memzero(ptep, PTE_SIZE);
 
-		pmd_val(*pmdp) = __virt_to_phys(memory) | PMD_TYPE_TABLE | PMD_DOMAIN(domain);
+		pmd_val(pmd) = __virt_to_phys(memory) | PMD_TYPE_TABLE | PMD_DOMAIN(domain);
+		set_pmd(pmdp, pmd);
 
 		*mem = memory + PTE_SIZE;
 	}
diff --git a/include/asm-arm/proc-armv/pgtable.h b/include/asm-arm/proc-armv/pgtable.h
index 288e4043a..60b670fc2 100644
--- a/include/asm-arm/proc-armv/pgtable.h
+++ b/include/asm-arm/proc-armv/pgtable.h
@@ -45,12 +45,12 @@
 	processor.u.armv3v4._flush_icache_area((_start), (_end))
 
 /*
- * We don't have a mem map cache...
+ * We don't have a MEMC chip...
  */
-#define update_mm_cache_all()			do { } while (0)
-#define update_mm_cache_task(tsk)		do { } while (0)
-#define update_mm_cache_mm(mm)			do { } while (0)
-#define update_mm_cache_mm_addr(mm,addr,pte)	do { } while (0)
+#define update_memc_all()		do { } while (0)
+#define update_memc_task(tsk)		do { } while (0)
+#define update_memc_mm(mm)		do { } while (0)
+#define update_memc_addr(mm,addr,pte)	do { } while (0)
 
 /*
  * This flushes back any buffered write data.  We have to clean and flush the entries
@@ -133,7 +133,7 @@
 #define PTRS_PER_PTE    256
 #define PTRS_PER_PMD    1
 #define PTRS_PER_PGD    4096
-#define USER_PTRS_PER_PGD	(TASK_SIZE / PGDIR_SIZE)
+#define USER_PTRS_PER_PGD	(TASK_SIZE/PGDIR_SIZE)
 
 /* Just any arbitrary offset to the start of the vmalloc VM area: the
  * current 8MB value just means that there will be a 8MB "hole" after the
@@ -178,23 +178,22 @@
 
 /*
  * We define the bits in the page tables as follows:
- *  PTE_BUFFERABLE	page is writable
- *  PTE_AP_WRITE	page is dirty
+ *  PTE_BUFFERABLE	page is dirty
+ *  PTE_AP_WRITE	page is writable
  *  PTE_AP_READ		page is a young (unsetting this causes faults for any access)
+ *  PTE_CACHEABLE       page is readable
  *
- * Any page that is mapped in is assumed to be readable...
+ * A page will not be made writable without the dirty bit set.
+ * It is not legal to have a writable non-dirty page though (it breaks).
+ *
+ * A readable page is marked as being cacheable.
+ * Youngness is indicated by hardware read.  If the page is old,
+ * then we will fault and make the page young again.
  */
-#if 0
 #define _PTE_YOUNG	PTE_AP_READ
-#define _PTE_DIRTY	PTE_AP_WRITE
-#define _PTE_READ	PTE_CACHEABLE
-#define _PTE_WRITE	PTE_BUFFERABLE
-#else
-#define _PTE_YOUNG	PTE_CACHEABLE
 #define _PTE_DIRTY	PTE_BUFFERABLE
-#define _PTE_READ	PTE_AP_READ
+#define _PTE_READ	PTE_CACHEABLE
 #define _PTE_WRITE	PTE_AP_WRITE
-#endif
 
 #define PAGE_NONE       __pgprot(PTE_TYPE_SMALL | _PTE_YOUNG)
 #define PAGE_SHARED     __pgprot(PTE_TYPE_SMALL | _PTE_YOUNG | _PTE_READ | _PTE_WRITE)
@@ -351,7 +350,7 @@ extern __inline__ int pmd_present(pmd_t pmd)
 
 extern __inline__ int pte_write(pte_t pte)
 {
-	return pte_val(pte) & PTE_AP_WRITE;
+	return pte_val(pte) & _PTE_WRITE;
 }
 
 extern __inline__ int pte_dirty(pte_t pte)
@@ -366,7 +365,7 @@ extern __inline__ int pte_young(pte_t pte)
 
 extern __inline__ pte_t pte_wrprotect(pte_t pte)
 {
-	pte_val(pte) &= ~PTE_AP_WRITE;
+	pte_val(pte) &= ~_PTE_WRITE;
 	return pte;
 }
 
@@ -378,31 +377,31 @@ extern __inline__ pte_t pte_nocache(pte_t pte)
 
 extern __inline__ pte_t pte_mkclean(pte_t pte)
 {
-	pte_val(pte) &= ~PTE_BUFFERABLE;
+	pte_val(pte) &= ~_PTE_DIRTY;
 	return pte;
 }
 
 extern __inline__ pte_t pte_mkold(pte_t pte)
 {
-	pte_val(pte) &= ~PTE_AP_READ;
+	pte_val(pte) &= ~_PTE_YOUNG;
 	return pte;
 }
 
 extern __inline__ pte_t pte_mkwrite(pte_t pte)
 {
-	pte_val(pte) |= PTE_AP_WRITE;
+	pte_val(pte) |= _PTE_WRITE;
 	return pte;
 }
 
 extern __inline__ pte_t pte_mkdirty(pte_t pte)
 {
-	pte_val(pte) |= PTE_BUFFERABLE;
+	pte_val(pte) |= _PTE_DIRTY;
 	return pte;
 }
 
 extern __inline__ pte_t pte_mkyoung(pte_t pte)
 {
-	pte_val(pte) |= PTE_AP_READ;
+	pte_val(pte) |= _PTE_YOUNG;
 	return pte;
 }
 
@@ -671,7 +670,6 @@ extern __inline__ pmd_t *pmd_alloc(pgd_t *pgd, unsigned long address)
 #define pmd_free_kernel		pmd_free
 #define pmd_alloc_kernel	pmd_alloc
 
-#if 0
 extern __inline__ void set_pgdir(unsigned long address, pgd_t entry)
 {
 	struct task_struct * p;
@@ -687,7 +685,6 @@ extern __inline__ void set_pgdir(unsigned long address, pgd_t entry)
 	for (pgd = (pgd_t *)pgd_quicklist; pgd; pgd = (pgd_t *)*(unsigned long *)pgd)
 		pgd[address >> PGDIR_SHIFT] = entry;
 }
-#endif
 
 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];