Merge with Linux 2.3.32.

49 files changed, 1752 insertions, 620 deletions

diff --git a/include/asm-arm/arch-arc/io.h b/include/asm-arm/arch-arc/io.h
index 4e984bd3c..c7d6b9e2b 100644
--- a/include/asm-arm/arch-arc/io.h
+++ b/include/asm-arm/arch-arc/io.h
@@ -9,11 +9,7 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-/*
- * This architecture does not require any delayed IO, and
- * has the constant-optimised IO
- */
-#undef	ARCH_IO_DELAY
+#define IO_SPACE_LIMIT 0xffffffff
 
 /*
  * We use two different types of addressing - PC style addresses, and ARM
@@ -196,6 +192,14 @@ DECLARE_IO(long,l,"")
 	addr;									\
 })
 
+#define inb(p)	 	(__builtin_constant_p((p)) ? __inbc(p)    : __inb(p))
+#define inw(p)	 	(__builtin_constant_p((p)) ? __inwc(p)    : __inw(p))
+#define inl(p)	 	(__builtin_constant_p((p)) ? __inlc(p)    : __inl(p))
+#define outb(v,p)	(__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
+#define outw(v,p)	(__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
+#define outl(v,p)	(__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
+#define __ioaddr(p)	(__builtin_constant_p((p)) ? __ioaddr(p)  : __ioaddrc(p))
+
 /*
  * Translated address IO functions
  *
diff --git a/include/asm-arm/arch-arc/serial.h b/include/asm-arm/arch-arc/serial.h
index 763954175..c068ac62f 100644
--- a/include/asm-arm/arch-arc/serial.h
+++ b/include/asm-arm/arch-arc/serial.h
@@ -23,30 +23,24 @@
 
 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
 
+#define RS_TABLE_SIZE	16
+
 #if defined(CONFIG_ARCH_A5K)
      /* UART CLK        PORT  IRQ     FLAGS        */
-#define SERIAL_PORT_DFNS \
+
+#define STD_SERIAL_PORT_DEFNS
 	{ 0, BASE_BAUD, 0x3F8, 10, STD_COM_FLAGS },	/* ttyS0 */	\
-	{ 0, BASE_BAUD, 0x2F8, 10, STD_COM_FLAGS },	/* ttyS1 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS2 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS3 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS }, 	/* ttyS4 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS5 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS6 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS7 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS8 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS9 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS10 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS11 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS12 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS13 */
+	{ 0, BASE_BAUD, 0x2F8, 10, STD_COM_FLAGS },	/* ttyS1 */
 
-#elif defined(CONFIG_ARCH_ARC)
+#else
 
-     /* UART CLK        PORT  IRQ     FLAGS        */
-#define SERIAL_PORT_DFNS \
+#define STD_SERIAL_PORT_DEFNS
 	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS0 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS1 */	\
+	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS1 */
+
+#endif
+
+#define EXTRA_SERIAL_PORT_DEFNS \
 	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS2 */	\
 	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS3 */	\
 	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS }, 	/* ttyS4 */	\
@@ -61,4 +55,3 @@
 	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS13 */
 
 #endif
-#endif
diff --git a/include/asm-arm/arch-cl7500/acornfb.h b/include/asm-arm/arch-cl7500/acornfb.h
new file mode 100644
index 000000000..567d53973
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/acornfb.h
@@ -0,0 +1,34 @@
+#include <linux/config.h>
+#define acornfb_valid_pixrate(rate) (rate >= 39325 && rate <= 40119)
+
+static inline void
+acornfb_vidc20_find_rates(struct vidc_timing *vidc,
+			  struct fb_var_screeninfo *var)
+{
+	u_int bandwidth;
+  
+	vidc->control |= VIDC20_CTRL_PIX_CK;
+
+	/* Calculate bandwidth */
+	bandwidth = var->pixclock * 8 / var->bits_per_pixel;
+
+	/* Encode bandwidth as VIDC20 setting */
+	if (bandwidth > 16667*2)
+		vidc->control |= VIDC20_CTRL_FIFO_16;
+	else if (bandwidth > 13333*2)
+		vidc->control |= VIDC20_CTRL_FIFO_20;
+	else if (bandwidth > 11111*2)
+		vidc->control |= VIDC20_CTRL_FIFO_24;
+	else
+		vidc->control |= VIDC20_CTRL_FIFO_28;
+
+	vidc->pll_ctl  = 0x2020;
+}
+
+#ifdef CONFIG_CHRONTEL_7003
+#define acornfb_default_control()	VIDC20_CTRL_PIX_HCLK
+#else
+#define acornfb_default_control()	VIDC20_CTRL_PIX_VCLK
+#endif
+
+#define acornfb_default_econtrol()	VIDC20_ECTL_DAC | VIDC20_ECTL_REG(3) | VIDC20_ECTL_ECK
diff --git a/include/asm-arm/arch-cl7500/dma.h b/include/asm-arm/arch-cl7500/dma.h
new file mode 100644
index 000000000..fb31f5db9
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/dma.h
@@ -0,0 +1,21 @@
+/*
+ * linux/include/asm-arm/arch-cl7500/dma.h
+ *
+ * Copyright (C) 1999 Nexus Electronics Ltd.
+ */
+
+#ifndef __ASM_ARCH_DMA_H
+#define __ASM_ARCH_DMA_H
+
+/*
+ * This is the maximum DMA address that can be DMAd to.
+ * There should not be more than (0xd0000000 - 0xc0000000)
+ * bytes of RAM.
+ */
+#define MAX_DMA_ADDRESS		0xd0000000
+
+#define MAX_DMA_CHANNELS	1
+
+#define DMA_S0			0
+
+#endif /* _ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-cl7500/hardware.h b/include/asm-arm/arch-cl7500/hardware.h
new file mode 100644
index 000000000..b155e6933
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/hardware.h
@@ -0,0 +1,97 @@
+/*
+ * linux/include/asm-arm/arch-cl7500/hardware.h
+ *
+ * Copyright (C) 1996-1999 Russell King.
+ * Copyright (C) 1999 Nexus Electronics Ltd.
+ *
+ * This file contains the hardware definitions of the 
+ * CL7500 evaluation board.
+ */
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+#include <asm/arch/memory.h>
+#include <asm/iomd.h>
+
+/*
+ * What hardware must be present
+ */
+#define HAS_IOMD
+#define HAS_VIDC20
+
+/* Hardware addresses of major areas.
+ *  *_START is the physical address
+ *  *_SIZE  is the size of the region
+ *  *_BASE  is the virtual address
+ */
+
+#define IO_START		0x03000000	/* I/O */
+#define IO_SIZE			0x01000000
+#define IO_BASE			0xe0000000
+
+#define ISA_START		0x0c000000	/* ISA */
+#define ISA_SIZE		0x00010000
+#define ISA_BASE		0xe1000000
+
+#define FLASH_START		0x01000000	/* XXX */
+#define FLASH_SIZE		0x01000000
+#define FLASH_BASE		0xe2000000
+
+#define LED_START		0x0302B000
+#define LED_SIZE		0x00001000
+#define LED_BASE		0xe3000000
+#define LED_ADDRESS		(LED_BASE + 0xa00)
+
+/* Let's define SCREEN_START for CL7500, even though it's a lie. */
+#define SCREEN_START		0x02000000	/* VRAM */
+#define SCREEN2_END		0xe0000000
+#define SCREEN2_BASE		0xd8000000
+#define SCREEN1_END		0xd8000000
+#define SCREEN1_BASE		0xd0000000
+
+#define FLUSH_BASE		0xdf000000
+
+
+#ifndef __ASSEMBLER__
+
+/*
+ * for use with inb/outb
+ */
+#define IO_VIDC_AUDIO_BASE	0x80140000
+#define IO_VIDC_BASE		0x80100000
+#define IO_IOMD_BASE		0x80080000
+#define IOC_BASE		0x80080000
+
+/*
+ * IO definitions
+ */
+#define EXPMASK_BASE		((volatile unsigned char *)0xe0360000)
+#define IOEB_BASE		((volatile unsigned char *)0xe0350050)
+#define PCIO_FLOPPYDMABASE	((volatile unsigned char *)0xe002a000)
+#define PCIO_BASE		0xe0010000
+
+/*
+ * RAM definitions
+ */
+#define GET_MEMORY_END(p)	(PAGE_OFFSET + p->u1.s.page_size * \
+						(p->u1.s.pages_in_bank[0] + \
+						 p->u1.s.pages_in_bank[1] + \
+						 p->u1.s.pages_in_bank[2] + \
+						 p->u1.s.pages_in_bank[3]))
+
+#define PARAMS_BASE		0
+
+#define FLUSH_BASE_PHYS		0x00000000	/* ROM */
+
+#else
+
+#define VIDC_SND_BASE		0xe0500000
+#define VIDC_BASE		0xe0400000
+#define IOMD_BASE		0xe0200000
+#define IOC_BASE		0xe0200000
+#define PCIO_FLOPPYDMABASE	0xe002a000
+#define PCIO_BASE		0xe0010000
+
+#endif
+#endif
+
diff --git a/include/asm-arm/arch-cl7500/ide.h b/include/asm-arm/arch-cl7500/ide.h
new file mode 100644
index 000000000..590579747
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/ide.h
@@ -0,0 +1,38 @@
+/*
+ * linux/include/asm-arm/arch-cl7500/ide.h
+ *
+ * Copyright (c) 1997 Russell King
+ *
+ * Modifications:
+ *  29-07-1998	RMK	Major re-work of IDE architecture specific code
+ */
+#include <asm/irq.h>
+
+/*
+ * Set up a hw structure for a specified data port, control port and IRQ.
+ * This should follow whatever the default interface uses.
+ */
+static __inline__ void
+ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int irq)
+{
+	ide_ioreg_t reg = (ide_ioreg_t) data_port;
+	int i;
+
+	memset(hw, 0, sizeof(*hw));
+
+	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
+		hw->io_ports[i] = reg;
+		reg += 1;
+	}
+	hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port;
+	hw->irq = irq;
+}
+
+/*
+ * This registers the standard ports for this architecture with the IDE
+ * driver.
+ */
+static __inline__ void
+ide_init_default_hwifs(void)
+{
+}
diff --git a/include/asm-arm/arch-cl7500/io.h b/include/asm-arm/arch-cl7500/io.h
new file mode 100644
index 000000000..bdbbefce3
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/io.h
@@ -0,0 +1,214 @@
+/*
+ * linux/include/asm-arm/arch-cl7500/io.h
+ *  from linux/include/asm-arm/arch-rpc/io.h
+ *
+ * Copyright (C) 1997 Russell King
+ *
+ * Modifications:
+ *  06-Dec-1997	RMK	Created.
+ */
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+#define IO_SPACE_LIMIT 0xffffffff
+
+/*
+ * We use two different types of addressing - PC style addresses, and ARM
+ * addresses.  PC style accesses the PC hardware with the normal PC IO
+ * addresses, eg 0x3f8 for serial#1.  ARM addresses are 0x80000000+
+ * and are translated to the start of IO.  Note that all addresses are
+ * shifted left!
+ */
+#define __PORT_PCIO(x)	(!((x) & 0x80000000))
+
+/*
+ * Dynamic IO functions - let the compiler
+ * optimize the expressions
+ */
+extern __inline__ void __outb (unsigned int value, unsigned int port)
+{
+	unsigned long temp;
+	__asm__ __volatile__(
+	"tst	%2, #0x80000000\n\t"
+	"mov	%0, %4\n\t"
+	"addeq	%0, %0, %3\n\t"
+	"strb	%1, [%0, %2, lsl #2]	@ outb"
+	: "=&r" (temp)
+	: "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
+	: "cc");
+}
+
+extern __inline__ void __outw (unsigned int value, unsigned int port)
+{
+	unsigned long temp;
+	__asm__ __volatile__(
+	"tst	%2, #0x80000000\n\t"
+	"mov	%0, %4\n\t"
+	"addeq	%0, %0, %3\n\t"
+	"str	%1, [%0, %2, lsl #2]	@ outw"
+	: "=&r" (temp)
+	: "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
+	: "cc");
+}
+
+extern __inline__ void __outl (unsigned int value, unsigned int port)
+{
+	unsigned long temp;
+	__asm__ __volatile__(
+	"tst	%2, #0x80000000\n\t"
+	"mov	%0, %4\n\t"
+	"addeq	%0, %0, %3\n\t"
+	"str	%1, [%0, %2, lsl #2]	@ outl"
+	: "=&r" (temp)
+	: "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
+	: "cc");
+}
+
+#define DECLARE_DYN_IN(sz,fnsuffix,instr)					\
+extern __inline__ unsigned sz __in##fnsuffix (unsigned int port)		\
+{										\
+	unsigned long temp, value;						\
+	__asm__ __volatile__(							\
+	"tst	%2, #0x80000000\n\t"						\
+	"mov	%0, %4\n\t"							\
+	"addeq	%0, %0, %3\n\t"							\
+	"ldr" ##instr## "	%1, [%0, %2, lsl #2]	@ in"###fnsuffix	\
+	: "=&r" (temp), "=r" (value)						\
+	: "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)		\
+	: "cc");								\
+	return (unsigned sz)value;						\
+}
+
+extern __inline__ unsigned int __ioaddr (unsigned int port)			\
+{										\
+	if (__PORT_PCIO(port))							\
+		return (unsigned int)(PCIO_BASE + (port << 2));			\
+	else									\
+		return (unsigned int)(IO_BASE + (port << 2));			\
+}
+
+#define DECLARE_IO(sz,fnsuffix,instr)	\
+	DECLARE_DYN_IN(sz,fnsuffix,instr)
+
+DECLARE_IO(char,b,"b")
+DECLARE_IO(short,w,"")
+DECLARE_IO(long,l,"")
+
+#undef DECLARE_IO
+#undef DECLARE_DYN_IN
+
+/*
+ * Constant address IO functions
+ *
+ * These have to be macros for the 'J' constraint to work -
+ * +/-4096 immediate operand.
+ */
+#define __outbc(value,port)							\
+({										\
+	if (__PORT_PCIO((port)))						\
+		__asm__ __volatile__(						\
+		"strb	%0, [%1, %2]	@ outbc"				\
+		: : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2));		\
+	else									\
+		__asm__ __volatile__(						\
+		"strb	%0, [%1, %2]	@ outbc"				\
+		: : "r" (value), "r" (IO_BASE), "r" ((port) << 2));		\
+})
+
+#define __inbc(port)								\
+({										\
+	unsigned char result;							\
+	if (__PORT_PCIO((port)))						\
+		__asm__ __volatile__(						\
+		"ldrb	%0, [%1, %2]	@ inbc"					\
+		: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));		\
+	else									\
+		__asm__ __volatile__(						\
+		"ldrb	%0, [%1, %2]	@ inbc"					\
+		: "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));		\
+	result;									\
+})
+
+#define __outwc(value,port)							\
+({										\
+	unsigned long v = value;						\
+	if (__PORT_PCIO((port)))						\
+		__asm__ __volatile__(						\
+		"str	%0, [%1, %2]	@ outwc"				\
+		: : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2));	\
+	else									\
+		__asm__ __volatile__(						\
+		"str	%0, [%1, %2]	@ outwc"				\
+		: : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2));		\
+})
+
+#define __inwc(port)								\
+({										\
+	unsigned short result;							\
+	if (__PORT_PCIO((port)))						\
+		__asm__ __volatile__(						\
+		"ldr	%0, [%1, %2]	@ inwc"					\
+		: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));		\
+	else									\
+		__asm__ __volatile__(						\
+		"ldr	%0, [%1, %2]	@ inwc"					\
+		: "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));		\
+	result & 0xffff;							\
+})
+
+#define __outlc(value,port)							\
+({										\
+	unsigned long v = value;						\
+	if (__PORT_PCIO((port)))						\
+		__asm__ __volatile__(						\
+		"str	%0, [%1, %2]	@ outlc"				\
+		: : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2));		\
+	else									\
+		__asm__ __volatile__(						\
+		"str	%0, [%1, %2]	@ outlc"				\
+		: : "r" (v), "r" (IO_BASE), "r" ((port) << 2));			\
+})
+
+#define __inlc(port)								\
+({										\
+	unsigned long result;							\
+	if (__PORT_PCIO((port)))						\
+		__asm__ __volatile__(						\
+		"ldr	%0, [%1, %2]	@ inlc"					\
+		: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));		\
+	else									\
+		__asm__ __volatile__(						\
+		"ldr	%0, [%1, %2]	@ inlc"					\
+		: "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));		\
+	result;									\
+})
+
+#define __ioaddrc(port)								\
+	(__PORT_PCIO((port)) ? PCIO_BASE + ((port) << 2) : IO_BASE + ((port) << 2))
+
+#define inb(p)	 	(__builtin_constant_p((p)) ? __inbc(p)    : __inb(p))
+#define inw(p)	 	(__builtin_constant_p((p)) ? __inwc(p)    : __inw(p))
+#define inl(p)	 	(__builtin_constant_p((p)) ? __inlc(p)    : __inl(p))
+#define outb(v,p)	(__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
+#define outw(v,p)	(__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
+#define outl(v,p)	(__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
+#define __ioaddr(p)	(__builtin_constant_p((p)) ? __ioaddr(p)  : __ioaddrc(p))
+
+/*
+ * Translated address IO functions
+ *
+ * IO address has already been translated to a virtual address
+ */
+#define outb_t(v,p)								\
+	(*(volatile unsigned char *)(p) = (v))
+
+#define inb_t(p)								\
+	(*(volatile unsigned char *)(p))
+
+#define outl_t(v,p)								\
+	(*(volatile unsigned long *)(p) = (v))
+
+#define inl_t(p)								\
+	(*(volatile unsigned long *)(p))
+
+#endif
diff --git a/include/asm-arm/arch-cl7500/irq.h b/include/asm-arm/arch-cl7500/irq.h
new file mode 100644
index 000000000..3621c08f7
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/irq.h
@@ -0,0 +1,267 @@
+/*
+ * include/asm-arm/arch-cl7500/irq.h
+ *
+ * Copyright (C) 1996 Russell King
+ * Copyright (C) 1999 Nexus Electronics Ltd.
+ *
+ * Changelog:
+ *   10-10-1996	RMK	Brought up to date with arch-sa110eval
+ *   22-08-1998	RMK	Restructured IRQ routines
+ *   11-08-1999	PJB	Created ARM7500 version, derived from RiscPC code
+ */
+#include <asm/iomd.h>
+
+static inline int fixup_irq(unsigned int irq)
+{
+	if (irq == IRQ_ISA) {
+		int isabits = *((volatile unsigned int *)0xe002b700);
+		if (isabits == 0) {
+			printk("Spurious ISA IRQ!\n");
+			return irq;
+		}
+		irq = 40;
+		while (!(isabits & 1)) {
+			irq++;
+			isabits >>= 1;
+		}
+	}
+
+	return irq;
+}
+
+static void cl7500_mask_irq_ack_a(unsigned int irq)
+{
+	unsigned int temp;
+
+	__asm__ __volatile__(
+	"ldrb	%0, [%2]\n"
+"	bic	%0, %0, %1\n"
+"	strb	%0, [%2]\n"
+"	strb	%1, [%3]"
+	: "=&r" (temp)
+	: "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKA)),
+	  "r" (ioaddr(IOMD_IRQCLRA)));
+}
+
+static void cl7500_mask_irq_a(unsigned int irq)
+{
+	unsigned int temp;
+
+	__asm__ __volatile__(
+	"ldrb	%0, [%2]\n"
+"	bic	%0, %0, %1\n"
+"	strb	%0, [%2]"
+	: "=&r" (temp)
+	: "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKA)));
+}
+
+static void cl7500_unmask_irq_a(unsigned int irq)
+{
+	unsigned int temp;
+
+	__asm__ __volatile__(
+	"ldrb	%0, [%2]\n"
+"	orr	%0, %0, %1\n"
+"	strb	%0, [%2]"
+	: "=&r" (temp)
+	: "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKA)));
+}
+
+static void cl7500_mask_irq_b(unsigned int irq)
+{
+	unsigned int temp;
+
+	__asm__ __volatile__(
+	"ldrb	%0, [%2]\n"
+"	bic	%0, %0, %1\n"
+"	strb	%0, [%2]"
+	: "=&r" (temp)
+	: "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKB)));
+}
+
+static void cl7500_unmask_irq_b(unsigned int irq)
+{
+	unsigned int temp;
+
+	__asm__ __volatile__(
+	"ldrb	%0, [%2]\n"
+"	orr	%0, %0, %1\n"
+"	strb	%0, [%2]"
+	: "=&r" (temp)
+	: "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKB)));
+}
+
+static void cl7500_mask_irq_c(unsigned int irq)
+{
+	unsigned int temp;
+
+	__asm__ __volatile__(
+	"ldrb	%0, [%2]\n"
+"	bic	%0, %0, %1\n"
+"	strb	%0, [%2]"
+	: "=&r" (temp)
+	: "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKC)));
+}
+
+static void cl7500_unmask_irq_c(unsigned int irq)
+{
+	unsigned int temp;
+
+	__asm__ __volatile__(
+	"ldrb	%0, [%2]\n"
+"	orr	%0, %0, %1\n"
+"	strb	%0, [%2]"
+	: "=&r" (temp)
+	: "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKC)));
+}
+
+
+static void cl7500_mask_irq_d(unsigned int irq)
+{
+	unsigned int temp;
+
+	__asm__ __volatile__(
+	"ldrb	%0, [%2]\n"
+"	bic	%0, %0, %1\n"
+"	strb	%0, [%2]"
+	: "=&r" (temp)
+	: "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKD)));
+}
+
+static void cl7500_unmask_irq_d(unsigned int irq)
+{
+	unsigned int temp;
+
+	__asm__ __volatile__(
+	"ldrb	%0, [%2]\n"
+"	orr	%0, %0, %1\n"
+"	strb	%0, [%2]"
+	: "=&r" (temp)
+	: "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_IRQMASKD)));
+}
+
+static void cl7500_mask_irq_dma(unsigned int irq)
+{
+	unsigned int temp;
+
+	__asm__ __volatile__(
+	"ldrb	%0, [%2]\n"
+"	bic	%0, %0, %1\n"
+"	strb	%0, [%2]"
+	: "=&r" (temp)
+	: "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_DMAMASK)));
+}
+
+static void cl7500_unmask_irq_dma(unsigned int irq)
+{
+	unsigned int temp;
+
+	__asm__ __volatile__(
+	"ldrb	%0, [%2]\n"
+"	orr	%0, %0, %1\n"
+"	strb	%0, [%2]"
+	: "=&r" (temp)
+	: "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_DMAMASK)));
+}
+
+static void cl7500_mask_irq_fiq(unsigned int irq)
+{
+	unsigned int temp;
+
+	__asm__ __volatile__(
+	"ldrb	%0, [%2]\n"
+"	bic	%0, %0, %1\n"
+"	strb	%0, [%2]"
+	: "=&r" (temp)
+	: "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_FIQMASK)));
+}
+
+static void cl7500_unmask_irq_fiq(unsigned int irq)
+{
+	unsigned int temp;
+
+	__asm__ __volatile__(
+	"ldrb	%0, [%2]\n"
+"	orr	%0, %0, %1\n"
+"	strb	%0, [%2]"
+	: "=&r" (temp)
+	: "r" (1 << (irq & 7)), "r" (ioaddr(IOMD_FIQMASK)));
+}
+
+static void no_action(int cpl, void *dev_id, struct pt_regs *regs)
+{
+}
+
+static struct irqaction irq_isa = { no_action, 0, 0, "isa", NULL, NULL };
+
+static __inline__ void irq_init_irq(void)
+{
+	extern void ecard_disableirq(unsigned int irq);
+	extern void ecard_enableirq(unsigned int irq);
+	int irq;
+
+	outb(0, IOMD_IRQMASKA);
+	outb(0, IOMD_IRQMASKB);
+	outb(0, IOMD_FIQMASK);
+	outb(0, IOMD_DMAMASK);
+
+	for (irq = 0; irq < NR_IRQS; irq++) {
+		switch (irq) {
+		case 0 ... 6:
+			irq_desc[irq].probe_ok = 1;
+		case 7:
+			irq_desc[irq].valid    = 1;
+			irq_desc[irq].mask_ack = cl7500_mask_irq_ack_a;
+			irq_desc[irq].mask     = cl7500_mask_irq_a;
+			irq_desc[irq].unmask   = cl7500_unmask_irq_a;
+			break;
+
+		case 9 ... 15:
+			irq_desc[irq].probe_ok = 1;
+		case 8:
+			irq_desc[irq].valid    = 1;
+			irq_desc[irq].mask_ack = cl7500_mask_irq_b;
+			irq_desc[irq].mask     = cl7500_mask_irq_b;
+			irq_desc[irq].unmask   = cl7500_unmask_irq_b;
+			break;
+
+		case 16 ... 22:
+			irq_desc[irq].valid    = 1;
+			irq_desc[irq].mask_ack = cl7500_mask_irq_dma;
+			irq_desc[irq].mask     = cl7500_mask_irq_dma;
+			irq_desc[irq].unmask   = cl7500_unmask_irq_dma;
+			break;
+
+		case 24 ... 31:
+			irq_desc[irq].valid    = 1;
+			irq_desc[irq].mask_ack = cl7500_mask_irq_c;
+			irq_desc[irq].mask     = cl7500_mask_irq_c;
+			irq_desc[irq].unmask   = cl7500_unmask_irq_c;
+			break;
+
+		case 32 ... 39:
+			irq_desc[irq].valid    = 1;
+			irq_desc[irq].mask_ack = cl7500_mask_irq_d;
+			irq_desc[irq].mask     = cl7500_mask_irq_d;
+			irq_desc[irq].unmask   = cl7500_unmask_irq_d;
+			break;
+
+		case 40 ... 47:
+			irq_desc[irq].valid      = 1;
+			irq_desc[irq].probe_ok   = 1;
+			irq_desc[irq].mask_ack   = no_action;
+			irq_desc[irq].mask       = no_action;
+			irq_desc[irq].unmask     = no_action;
+			break;
+
+		case 64 ... 72:
+			irq_desc[irq].valid    = 1;
+			irq_desc[irq].mask_ack = cl7500_mask_irq_fiq;
+			irq_desc[irq].mask     = cl7500_mask_irq_fiq;
+			irq_desc[irq].unmask   = cl7500_unmask_irq_fiq;
+			break;
+		}
+	}
+
+	setup_arm_irq(IRQ_ISA, &irq_isa);
+}
diff --git a/include/asm-arm/arch-cl7500/irqs.h b/include/asm-arm/arch-cl7500/irqs.h
new file mode 100644
index 000000000..22c9ab23a
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/irqs.h
@@ -0,0 +1,59 @@
+/*
+ * linux/include/asm-arm/arch-cl7500/irqs.h
+ *
+ * Copyright (C) 1999 Nexus Electronics Ltd
+ */
+
+#define IRQ_INT2		0
+#define IRQ_INT1		2
+#define IRQ_VSYNCPULSE		3
+#define IRQ_POWERON		4
+#define IRQ_TIMER0		5
+#define IRQ_TIMER1		6
+#define IRQ_FORCE		7
+#define IRQ_INT8		8
+#define IRQ_ISA			9
+#define IRQ_INT6		10
+#define IRQ_INT5		11
+#define IRQ_INT4		12
+#define IRQ_INT3		13
+#define IRQ_KEYBOARDTX		14
+#define IRQ_KEYBOARDRX		15
+
+#define IRQ_DMA0		16
+#define IRQ_DMA1		17
+#define IRQ_DMA2		18
+#define IRQ_DMA3		19
+#define IRQ_DMAS0		20
+#define IRQ_DMAS1		21
+
+#define IRQ_IOP0		24
+#define IRQ_IOP1		25
+#define IRQ_IOP2		26
+#define IRQ_IOP3		27
+#define IRQ_IOP4		28
+#define IRQ_IOP5		29
+#define IRQ_IOP6		30
+#define IRQ_IOP7		31
+#define IRQ_MOUSERX		32
+#define IRQ_MOUSETX		33
+#define IRQ_ADC			34
+#define IRQ_EVENT1		35
+#define IRQ_EVENT2		36
+
+#define IRQ_ISA_3		40
+#define IRQ_ISA_4		41
+#define IRQ_ISA_5		42
+#define IRQ_ISA_7		43
+#define IRQ_ISA_9		44
+#define IRQ_ISA_10		45
+#define IRQ_ISA_11		46
+#define IRQ_ISA_14		47	
+
+#define FIQ_INT9		0
+#define FIQ_INT5		1
+#define FIQ_INT6		4
+#define FIQ_INT8		6
+#define FIQ_FORCE		7
+
+#define IRQ_TIMER		IRQ_TIMER0
diff --git a/include/asm-arm/arch-cl7500/keyboard.h b/include/asm-arm/arch-cl7500/keyboard.h
new file mode 100644
index 000000000..21bd69974
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/keyboard.h
@@ -0,0 +1,29 @@
+/*
+ * linux/include/asm-arm/arch-cl7500/keyboard.h
+ *  from linux/include/asm-arm/arch-rpc/keyboard.h
+ *
+ * Keyboard driver definitions for CL7500 architecture
+ *
+ * (C) 1998 Russell King
+ */
+
+#include <asm/irq.h>
+
+#define NR_SCANCODES 128
+
+extern void ps2kbd_leds(unsigned char leds);
+extern void ps2kbd_init_hw(void);
+extern unsigned char ps2kbd_sysrq_xlate[NR_SCANCODES];
+
+#define kbd_setkeycode(sc,kc)		(-EINVAL)
+#define kbd_getkeycode(sc)		(-EINVAL)
+
+#define kbd_translate(sc, kcp, rm)	({ *(kcp) = (sc); 1; })
+#define kbd_unexpected_up(kc)		(0200)
+#define kbd_leds(leds)			ps2kbd_leds(leds)
+#define kbd_init_hw()			ps2kbd_init_hw()
+#define kbd_sysrq_xlate			ps2kbd_sysrq_xlate
+#define kbd_disable_irq()		disable_irq(IRQ_KEYBOARDRX)
+#define kbd_enable_irq()		enable_irq(IRQ_KEYBOARDRX)
+
+#define SYSRQ_KEY	13
diff --git a/include/asm-arm/arch-cl7500/memory.h b/include/asm-arm/arch-cl7500/memory.h
new file mode 100644
index 000000000..ecd1aa035
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/memory.h
@@ -0,0 +1,41 @@
+/*
+ * linux/include/asm-arm/arch-cl7500/memory.h
+ *
+ * Copyright (c) 1996,1997,1998 Russell King.
+ *
+ * Changelog:
+ *  20-Oct-1996	RMK	Created
+ *  31-Dec-1997	RMK	Fixed definitions to reduce warnings
+ *  11-Jan-1998	RMK	Uninlined to reduce hits on cache
+ *  08-Feb-1998	RMK	Added __virt_to_bus and __bus_to_virt
+ *  21-Mar-1999	RMK	Renamed to memory.h
+ *		RMK	Added TASK_SIZE and PAGE_OFFSET
+ */
+#ifndef __ASM_ARCH_MMU_H
+#define __ASM_ARCH_MMU_H
+
+/*
+ * Task size: 3GB
+ */
+#define TASK_SIZE	(0xc0000000UL)
+
+/*
+ * Page offset: 3GB
+ */
+#define PAGE_OFFSET	(0xc0000000UL)
+
+#ifndef __ASSEMBLY__
+extern unsigned long __virt_to_phys(unsigned long vpage);
+extern unsigned long __phys_to_virt(unsigned long ppage);
+#endif
+
+/*
+ * These are exactly the same on the RiscPC as the
+ * physical memory view.
+ */
+#define __virt_to_bus__is_a_macro
+#define __virt_to_bus(x) __virt_to_phys(x)
+#define __bus_to_virt__is_a_macro
+#define __bus_to_virt(x) __phys_to_virt(x)
+
+#endif
diff --git a/include/asm-arm/arch-cl7500/param.h b/include/asm-arm/arch-cl7500/param.h
new file mode 100644
index 000000000..46c223599
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/param.h
@@ -0,0 +1,5 @@
+/*
+ * linux/include/asm-arm/arch-cl7500/param.h
+ *
+ * Copyright (C) 1999 Nexus Electronics Ltd
+ */
diff --git a/include/asm-arm/arch-cl7500/processor.h b/include/asm-arm/arch-cl7500/processor.h
new file mode 100644
index 000000000..41bf0451f
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/processor.h
@@ -0,0 +1,29 @@
+/*
+ * linux/include/asm-arm/arch-cl7500/processor.h
+ *
+ * Copyright (c) 1996-1999 Russell King.
+ *
+ * Changelog:
+ *  10-Sep-1996	RMK	Created
+ *  21-Mar-1999	RMK	Added asm/arch/memory.h
+ */
+
+#ifndef __ASM_ARCH_PROCESSOR_H
+#define __ASM_ARCH_PROCESSOR_H
+
+#include <asm/arch/memory.h>
+
+/*
+ * Bus types
+ */
+#define EISA_bus 0
+#define EISA_bus__is_a_macro /* for versions in ksyms.c */
+#define MCA_bus 0
+#define MCA_bus__is_a_macro /* for versions in ksyms.c */
+
+/* This decides where the kernel will search for a free chunk of vm
+ * space during mmap's.
+ */
+#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
+
+#endif
diff --git a/include/asm-arm/arch-cl7500/serial.h b/include/asm-arm/arch-cl7500/serial.h
new file mode 100644
index 000000000..4132273cc
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/serial.h
@@ -0,0 +1,42 @@
+/*
+ * linux/include/asm-arm/arch-cl7500/serial.h
+ *
+ * Copyright (c) 1996 Russell King.
+ * Copyright (C) 1999 Nexus Electronics Ltd.
+ *
+ * Changelog:
+ *  15-10-1996	RMK	Created
+ *  10-08-1999	PJB	Added COM3/COM4 for CL7500
+ */
+#ifndef __ASM_ARCH_SERIAL_H
+#define __ASM_ARCH_SERIAL_H
+
+/*
+ * This assumes you have a 1.8432 MHz clock for your UART.
+ *
+ * It'd be nice if someone built a serial card with a 24.576 MHz
+ * clock, since the 16550A is capable of handling a top speed of 1.5
+ * megabits/second; but this requires the faster clock.
+ */
+#define BASE_BAUD (1843200 / 16)
+
+#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
+
+     /* UART CLK        PORT  IRQ     FLAGS        */
+#define SERIAL_PORT_DFNS \
+	{ 0, BASE_BAUD, 0x3F8, 10, STD_COM_FLAGS },	/* ttyS0 */	\
+	{ 0, BASE_BAUD, 0x2F8, 10, STD_COM_FLAGS },	/* ttyS1 */	\
+	{ 0, BASE_BAUD, 0x804002e8,  41, STD_COM_FLAGS },	/* ttyS2 */	\
+	{ 0, BASE_BAUD, 0x804003e8,  40, STD_COM_FLAGS },	/* ttyS3 */	\
+	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS }, 	/* ttyS4 */	\
+	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS5 */	\
+	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS6 */	\
+	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS7 */	\
+	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS8 */	\
+	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS9 */	\
+	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS10 */	\
+	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS11 */	\
+	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS12 */	\
+	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS13 */
+
+#endif
diff --git a/include/asm-arm/arch-cl7500/shmparam.h b/include/asm-arm/arch-cl7500/shmparam.h
new file mode 100644
index 000000000..9c718858e
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/shmparam.h
@@ -0,0 +1,8 @@
+/*
+ * linux/include/asm-arm/arch-cl7500/shmparam.h
+ *
+ * Copyright (c) 1999 Nexus Electronics Ltd
+ */
+
+/* The processor-centric definitions are OK.  */
+
diff --git a/include/asm-arm/arch-cl7500/system.h b/include/asm-arm/arch-cl7500/system.h
new file mode 100644
index 000000000..767730a4c
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/system.h
@@ -0,0 +1,27 @@
+/*
+ * linux/include/asm-arm/arch-cl7500/system.h
+ *
+ * Copyright (c) 1999 Nexus Electronics Ltd.
+ */
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H
+
+#include <asm/iomd.h>
+
+#define arch_reset(mode) {			\
+	outb (0, IOMD_ROMCR0);			\
+	cli();					\
+	__asm__ __volatile__(			\
+		"mcr	p15, 0, %0, c1, c0, 0;"	\
+		"mov	pc, #0"			\
+	 : 					\
+	 : "r" (cpu_reset()));			\
+	}
+
+/*
+ * We can wait for an interrupt...
+ */
+#define arch_do_idle()				\
+	outb(0, IOMD_SUSMODE)
+
+#endif
diff --git a/include/asm-arm/arch-cl7500/time.h b/include/asm-arm/arch-cl7500/time.h
new file mode 100644
index 000000000..19b388682
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/time.h
@@ -0,0 +1,123 @@
+/*
+ * linux/include/asm-arm/arch-cl7500/time.h
+ *
+ * Copyright (c) 1996 Russell King.
+ * Copyright (C) 1999 Nexus Electronics Ltd.
+ *
+ * Changelog:
+ *  24-Sep-1996	RMK	Created
+ *  10-Oct-1996	RMK	Brought up to date with arch-sa110eval
+ *  04-Dec-1997	RMK	Updated for new arch/arm/time.c
+ *  10-Aug-1999	PJB	Converted for CL7500
+ */
+#include <asm/iomd.h>
+
+static long last_rtc_update = 0;	/* last time the cmos clock got updated */
+
+extern __inline__ unsigned long gettimeoffset (void)
+{
+	unsigned long offset = 0;
+	unsigned int count1, count2, status1, status2;
+
+	status1 = IOMD_IRQREQA;
+	barrier ();
+	outb(0, IOMD_T0LATCH);
+	barrier ();
+	count1 = inb(IOMD_T0CNTL) | (inb(IOMD_T0CNTH) << 8);
+	barrier ();
+	status2 = inb(IOMD_IRQREQA);
+	barrier ();
+	outb(0, IOMD_T0LATCH);
+	barrier ();
+	count2 = inb(IOMD_T0CNTL) | (inb(IOMD_T0CNTH) << 8);
+
+	if (count2 < count1) {
+		/*
+		 * This means that we haven't just had an interrupt
+		 * while reading into status2.
+		 */
+		if (status2 & (1 << 5))
+			offset = tick;
+		count1 = count2;
+	} else if (count2 > count1) {
+		/*
+		 * We have just had another interrupt while reading
+		 * status2.
+		 */
+		offset += tick;
+		count1 = count2;
+	}
+
+	count1 = LATCH - count1;
+	/*
+	 * count1 = number of clock ticks since last interrupt
+	 */
+	offset += count1 * tick / LATCH;
+	return offset;
+}
+
+extern __inline__ unsigned long get_rtc_time(void)
+{
+	return mktime(1976, 06, 24, 0, 0, 0);
+}
+
+static int set_rtc_time(unsigned long nowtime)
+{
+	return 0;
+}
+
+static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+	do_timer(regs);
+
+	/* If we have an externally synchronized linux clock, then update
+	 * CMOS clock accordingly every ~11 minutes.  Set_rtc_mmss() has to be
+	 * called as close as possible to 500 ms before the new second starts.
+	 */
+	if ((time_status & STA_UNSYNC) == 0 &&
+	    xtime.tv_sec > last_rtc_update + 660 &&
+	    xtime.tv_usec >= 50000 - (tick >> 1) &&
+	    xtime.tv_usec < 50000 + (tick >> 1)) {
+		if (set_rtc_time(xtime.tv_sec) == 0)
+			last_rtc_update = xtime.tv_sec;
+		else
+			last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
+	}
+
+	{
+		/* Twinkle the lights. */
+		static int count, bit = 8, dir = 1;
+		if (count-- == 0) {
+			bit += dir;
+			if (bit == 8 || bit == 15) dir = -dir;
+			count = 5;
+			*((volatile unsigned int *)(0xe002ba00)) = 1 << bit;
+		}
+	}
+
+	if (!user_mode(regs))
+		do_profile(instruction_pointer(regs));
+}
+
+static struct irqaction timerirq = {
+	timer_interrupt,
+	0,
+	0,
+	"timer",
+	NULL,
+	NULL
+};
+
+/*
+ * Set up timer interrupt, and return the current time in seconds.
+ */
+extern __inline__ void setup_timer(void)
+{
+	outb(LATCH & 255, IOMD_T0LTCHL);
+	outb(LATCH >> 8, IOMD_T0LTCHH);
+	outb(0, IOMD_T0GO);
+
+	xtime.tv_sec = get_rtc_time();
+
+	setup_arm_irq(IRQ_TIMER, &timerirq);
+}
diff --git a/include/asm-arm/arch-cl7500/timex.h b/include/asm-arm/arch-cl7500/timex.h
new file mode 100644
index 000000000..8a4175fc0
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/timex.h
@@ -0,0 +1,13 @@
+/*
+ * linux/include/asm-arm/arch-cl7500/timex.h
+ *
+ * CL7500 architecture timex specifications
+ *
+ * Copyright (C) 1999 Nexus Electronics Ltd
+ */
+
+/*
+ * On the ARM7500, the clock ticks at 2MHz.
+ */
+#define CLOCK_TICK_RATE		2000000
+
diff --git a/include/asm-arm/arch-cl7500/uncompress.h b/include/asm-arm/arch-cl7500/uncompress.h
new file mode 100644
index 000000000..0585c8318
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/uncompress.h
@@ -0,0 +1,42 @@
+/*
+ * linux/include/asm-arm/arch-cl7500/uncompress.h
+ *
+ * Copyright (C) 1999 Nexus Electronics Ltd.
+ */
+
+#define BASE 0x03010000
+
+static __inline__ void putc(char c)
+{
+	while (!(*((volatile unsigned int *)(BASE + 0xbf4)) & 0x20));
+	*((volatile unsigned int *)(BASE + 0xbe0)) = c;
+}
+
+/*
+ * This does not append a newline
+ */
+static void puts(const char *s)
+{
+	while (*s) {
+		putc(*s);
+		if (*s == '\n')
+			putc('\r');
+		s++;
+	}
+}
+
+static __inline__ void arch_decomp_setup(void)
+{
+	int baud = 3686400 / (9600 * 16);
+
+	*((volatile unsigned int *)(BASE + 0xBEC)) = 0x80;
+	*((volatile unsigned int *)(BASE + 0xBE0)) = baud & 0xff;
+	*((volatile unsigned int *)(BASE + 0xBE4)) = (baud & 0xff00) >> 8;
+	*((volatile unsigned int *)(BASE + 0xBEC)) = 3; /* 8 bits */
+	*((volatile unsigned int *)(BASE + 0xBF0)) = 3; /* DTR, RTS */
+}
+
+/*
+ * nothing to do
+ */
+#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-ebsa110/io.h b/include/asm-arm/arch-ebsa110/io.h
index 32fc49c1a..4f936f0e9 100644
--- a/include/asm-arm/arch-ebsa110/io.h
+++ b/include/asm-arm/arch-ebsa110/io.h
@@ -9,11 +9,7 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-/*
- * This architecture does not require any delayed IO, and
- * has the constant-optimised IO
- */
-#undef	ARCH_IO_DELAY
+#define IO_SPACE_LIMIT 0xffffffff
 
 /*
  * We use two different types of addressing - PC style addresses, and ARM
@@ -173,6 +169,14 @@ DECLARE_IO(long,l,"")
 	addr;									\
 })
 
+#define inb(p)	 	(__builtin_constant_p((p)) ? __inbc(p)    : __inb(p))
+#define inw(p)	 	(__builtin_constant_p((p)) ? __inwc(p)    : __inw(p))
+#define inl(p)	 	(__builtin_constant_p((p)) ? __inlc(p)    : __inl(p))
+#define outb(v,p)	(__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
+#define outw(v,p)	(__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
+#define outl(v,p)	(__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
+#define __ioaddr(p)	(__builtin_constant_p((p)) ? __ioaddr(p)  : __ioaddrc(p))
+
 /*
  * Translated address IO functions
  *
diff --git a/include/asm-arm/arch-ebsa110/serial.h b/include/asm-arm/arch-ebsa110/serial.h
index 7388f813b..d2133c6d1 100644
--- a/include/asm-arm/arch-ebsa110/serial.h
+++ b/include/asm-arm/arch-ebsa110/serial.h
@@ -20,22 +20,14 @@
 
 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
 
+#define RS_TABLE_SIZE	2
+
      /* UART CLK        PORT  IRQ     FLAGS        */
-#define SERIAL_PORT_DFNS \
+#define STD_SERIAL_PORT_DEFNS \
 	{ 0, BASE_BAUD, 0x3F8,  1, STD_COM_FLAGS },	/* ttyS0 */	\
-	{ 0, BASE_BAUD, 0x2F8,  2, STD_COM_FLAGS },	/* ttyS1 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS2 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS3 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS }, 	/* ttyS4 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS5 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS6 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS7 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS8 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS9 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS10 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS11 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS12 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS13 */
+	{ 0, BASE_BAUD, 0x2F8,  2, STD_COM_FLAGS }	/* ttyS1 */
+
+#define EXTRA_SERIAL_PORT_DEFNS
 
 #endif
 
diff --git a/include/asm-arm/arch-ebsa110/system.h b/include/asm-arm/arch-ebsa110/system.h
index 064227627..05e2be707 100644
--- a/include/asm-arm/arch-ebsa110/system.h
+++ b/include/asm-arm/arch-ebsa110/system.h
@@ -6,7 +6,16 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#define arch_do_idle()		do { } while (0)
-#define arch_reset(mode)	do { } while (0)
+#define arch_do_idle()		cpu_do_idle()
+
+extern __inline__ void arch_reset(char mode)
+{
+	if (mode == 's') {
+		__asm__ volatile(
+		"mcr	p15, 0, %0, c1, c0, 0	@ MMU off
+		 mov	pc, #0x80000000		@ jump to flash"
+		: : "r" (cpu_reset()) : "cc");
+	}
+}
 
 #endif
diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h
index ebc42770c..9aeaf6712 100644
--- a/include/asm-arm/arch-ebsa285/hardware.h
+++ b/include/asm-arm/arch-ebsa285/hardware.h
@@ -12,47 +12,53 @@
 #include <asm/arch/memory.h>
 
 #ifdef CONFIG_HOST_FOOTBRIDGE
-/*   Virtual      Physical
- * 0xfff00000	0x40000000	X-Bus
- * 0xff000000	0x7c000000	PCI I/O space
+/*   Virtual      Physical	Size
+ * 0xff800000	0x40000000	1MB	X-Bus
+ * 0xff000000	0x7c000000	1MB	PCI I/O space
  *
- * 0xfe000000	0x42000000	CSR
- * 0xfd000000	0x78000000	Outbound write flush
- * 0xfc000000	0x79000000	PCI IACK/special space
+ * 0xfe000000	0x42000000	1MB	CSR
+ * 0xfd000000	0x78000000	1MB	Outbound write flush (not supported)
+ * 0xfc000000	0x79000000	1MB	PCI IACK/special space
  *
- * 0xf9000000	0x7a000000	PCI Config type 1
- * 0xf8000000	0x7b000000	PCI Config type 0
- * 
+ * 0xfb000000	0x7a000000	16MB	PCI Config type 1
+ * 0xfa000000	0x7b000000	16MB	PCI Config type 0
+ *
+ * 0xf9000000	0x50000000	1MB	Cache flush
+ * 0xf8000000	0x41000000	16MB	Flash memory
+ *
+ * 0xe1000000				unmapped (to catch bad ISA/PCI)
+ *
+ * 0xe0000000	0x80000000	16MB	ISA memory
  */
 #define XBUS_SIZE		0x00100000
-#define XBUS_BASE		0xfff00000
+#define XBUS_BASE		0xff800000
 
 #define PCIO_SIZE		0x00100000
 #define PCIO_BASE		0xff000000
 
-#define ARMCSR_SIZE		0x01000000
+#define ARMCSR_SIZE		0x00100000
 #define ARMCSR_BASE		0xfe000000
 
-#define WFLUSH_SIZE		0x01000000
+#define WFLUSH_SIZE		0x00100000
 #define WFLUSH_BASE		0xfd000000
 
-#define PCIIACK_SIZE		0x01000000
+#define PCIIACK_SIZE		0x00100000
 #define PCIIACK_BASE		0xfc000000
 
 #define PCICFG1_SIZE		0x01000000
-#define PCICFG1_BASE		0xf9000000
+#define PCICFG1_BASE		0xfb000000
 
 #define PCICFG0_SIZE		0x01000000
-#define PCICFG0_BASE		0xf8000000
-
-#define PCIMEM_SIZE		0x18000000
-#define PCIMEM_BASE		0xe0000000
+#define PCICFG0_BASE		0xfa000000
 
 #define FLUSH_SIZE		0x00100000
-#define FLUSH_BASE		0xdf000000
+#define FLUSH_BASE		0xf9000000
 
-#define FLASH_SIZE		0x00400000
-#define FLASH_BASE		0xd8000000
+#define FLASH_SIZE		0x01000000
+#define FLASH_BASE		0xf8000000
+
+#define PCIMEM_SIZE		0x01000000
+#define PCIMEM_BASE		0xe0000000
 
 #elif defined(CONFIG_ARCH_CO285)
 
diff --git a/include/asm-arm/arch-ebsa285/io.h b/include/asm-arm/arch-ebsa285/io.h
index a9cc3afe0..7861f8470 100644
--- a/include/asm-arm/arch-ebsa285/io.h
+++ b/include/asm-arm/arch-ebsa285/io.h
@@ -10,92 +10,91 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <asm/dec21285.h>
+#define IO_SPACE_LIMIT 0xffff
 
 /*
- * This architecture does not require any delayed IO, and
- * has the constant-optimised IO
+ * Translation of various region addresses to virtual addresses
  */
-#undef	ARCH_IO_DELAY
-#define ARCH_READWRITE
+#define __io_pci(a)		(PCIO_BASE + (a))
+#if 0
+#define __mem_pci(a)		((unsigned long)(a))
+#define __mem_isa(a)		(PCIMEM_BASE + (unsigned long)(a))
+#else
 
-#define __pci_io_addr(x)	(PCIO_BASE + (unsigned int)(x))
+extern __inline__ unsigned long ___mem_pci(unsigned long a)
+{
+	if (a <= 0xc0000000 || a >= 0xe0000000)
+		BUG();
+	return a;
+}
 
-#define __inb(p)		(*(volatile unsigned char *)__pci_io_addr(p))
-#define __inl(p)		(*(volatile unsigned long *)__pci_io_addr(p))
+extern __inline__ unsigned long ___mem_isa(unsigned long a)
+{
+	if (a >= 16*1048576)
+		BUG();
+	return PCIMEM_BASE + a;
+}
+#define __mem_pci(a)		___mem_pci((unsigned long)(a))
+#define __mem_isa(a)		___mem_isa((unsigned long)(a))
+#endif
+
+/* the following macro is depreciated */
+#define __ioaddr(p)		__io_pci(p)
 
-extern __inline__ unsigned int __inw(unsigned int port)
+/*
+ * Generic virtual read/write
+ */
+#define __arch_getb(a)		(*(volatile unsigned char *)(a))
+#define __arch_getl(a)		(*(volatile unsigned long *)(a))
+
+extern __inline__ unsigned int __arch_getw(unsigned long a)
 {
 	unsigned int value;
-	__asm__ __volatile__(
-	"ldr%?h	%0, [%1, %2]	@ inw"
-	: "=&r" (value)
-	: "r" (PCIO_BASE), "r" (port));
+	__asm__ __volatile__("ldr%?h	%0, [%1, #0]	@ getw"
+		: "=&r" (value)
+		: "r" (a));
 	return value;
 }
 
 
-#define __outb(v,p)		(*(volatile unsigned char *)__pci_io_addr(p) = (v))
-#define __outl(v,p)		(*(volatile unsigned long *)__pci_io_addr(p) = (v))
+#define __arch_putb(v,a)	(*(volatile unsigned char *)(a) = (v))
+#define __arch_putl(v,a)	(*(volatile unsigned long *)(a) = (v))
 
-extern __inline__ void __outw(unsigned int value, unsigned int port)
+extern __inline__ void __arch_putw(unsigned int value, unsigned long a)
 {
-	__asm__ __volatile__(
-	"str%?h	%0, [%1, %2]	@ outw"
-	: : "r" (value), "r" (PCIO_BASE), "r" (port));
+	__asm__ __volatile__("str%?h	%0, [%1, #0]	@ putw"
+		: : "r" (value), "r" (a));
 }
 
-#define __ioaddr(p)	__pci_io_addr(p)
+#define inb(p)			__arch_getb(__io_pci(p))
+#define inw(p)			__arch_getw(__io_pci(p))
+#define inl(p)			__arch_getl(__io_pci(p))
+
+#define outb(v,p)		__arch_putb(v,__io_pci(p))
+#define outw(v,p)		__arch_putw(v,__io_pci(p))
+#define outl(v,p)		__arch_putl(v,__io_pci(p))
+
+#include <asm/dec21285.h>
 
 /*
  * ioremap support - validate a PCI memory address,
  * and convert a PCI memory address to a physical
  * address for the page tables.
  */
-#define valid_ioaddr(iomem,size) ((iomem) < 0x80000000 && (iomem) + (size) <= 0x80000000)
-#define io_to_phys(iomem)	 ((iomem) + DC21285_PCI_MEM)
-
-/*
- * Fudge up IO addresses by this much.  Once we're confident that nobody
- * is using read*() and so on with addresses they didn't get from ioremap
- * this can go away.
- */
-#define IO_FUDGE_FACTOR		PCIMEM_BASE
-
-#define __pci_mem_addr(x)	((void *)(IO_FUDGE_FACTOR + (unsigned long)(x)))
+#define valid_ioaddr(off,sz)	((off) < 0x80000000 && (off) + (sz) <= 0x80000000)
+#define io_to_phys(off)		((off) + DC21285_PCI_MEM)
 
 /*
  * ioremap takes a PCI memory address, as specified in
  * linux/Documentation/IO-mapping.txt
  */
-#define ioremap(iomem_addr,size)					\
-({									\
-	unsigned long _addr = (iomem_addr), _size = (size);		\
-	void *_ret = NULL;						\
-	if (valid_ioaddr(_addr, _size)) {				\
-		_addr = io_to_phys(_addr);				\
-		_ret = __ioremap(_addr, _size, 0);			\
-		if (_ret)						\
-			_ret = (void *)((int) _ret - IO_FUDGE_FACTOR);	\
-	}								\
-	_ret; })
-
-#define ioremap_nocache(iomem_addr,size) ioremap((iomem_addr),(size))
-
-#define iounmap(_addr)	do { __iounmap(__pci_mem_addr((_addr))); } while (0)
-
-#define readb(addr)	(*(volatile unsigned char *)__pci_mem_addr(addr))
-#define readw(addr)	(*(volatile unsigned short *)__pci_mem_addr(addr))
-#define readl(addr)	(*(volatile unsigned long *)__pci_mem_addr(addr))
-
-#define writeb(b,addr)	(*(volatile unsigned char *)__pci_mem_addr(addr) = (b))
-#define writew(b,addr)	(*(volatile unsigned short *)__pci_mem_addr(addr) = (b))
-#define writel(b,addr)	(*(volatile unsigned long *)__pci_mem_addr(addr) = (b))
-
-#define memset_io(a,b,c)	memset(__pci_mem_addr(a),(b),(c))
-#define memcpy_fromio(a,b,c)	memcpy((a),__pci_mem_addr(b),(c))
-#define memcpy_toio(a,b,c)	memcpy(__pci_mem_addr(a),(b),(c))
-
-#define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),__pci_mem_addr(b),(c),(d))
+#define __arch_ioremap(off,size,nocache)			\
+({								\
+	unsigned long _off = (off), _size = (size);		\
+	void *_ret = NULL;					\
+	if (valid_ioaddr(_off, _size))				\
+		_ret = __ioremap(io_to_phys(_off), _size, 0);	\
+	_ret;							\
+})
 
 #endif
diff --git a/include/asm-arm/arch-ebsa285/irq.h b/include/asm-arm/arch-ebsa285/irq.h
index d97490079..195aad743 100644
--- a/include/asm-arm/arch-ebsa285/irq.h
+++ b/include/asm-arm/arch-ebsa285/irq.h
@@ -11,6 +11,7 @@
  *  16-Mar-1999	RMK	Added autodetect of ISA PICs
  */
 /* no need for config.h - arch/arm/kernel/irq.c does this for us */
+#include <linux/config.h>
 #include <asm/hardware.h>
 #include <asm/dec21285.h>
 #include <asm/irq.h>
diff --git a/include/asm-arm/arch-ebsa285/serial.h b/include/asm-arm/arch-ebsa285/serial.h
index 63a699e66..0efc4c849 100644
--- a/include/asm-arm/arch-ebsa285/serial.h
+++ b/include/asm-arm/arch-ebsa285/serial.h
@@ -24,23 +24,15 @@
 #define _SER_IRQ0	IRQ_ISA_UART
 #define _SER_IRQ1	IRQ_ISA_UART2
 
+#define RS_TABLE_SIZE	16
+
 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
 
      /* UART CLK        PORT  IRQ     FLAGS        */
-#define SERIAL_PORT_DFNS \
+#define STD_SERIAL_PORT_DEFNS \
 	{ 0, BASE_BAUD, 0x3F8, _SER_IRQ0, STD_COM_FLAGS },	/* ttyS0 */	\
-	{ 0, BASE_BAUD, 0x2F8, _SER_IRQ1, STD_COM_FLAGS },	/* ttyS1 */	\
-	{ 0, BASE_BAUD, 0    , 0        , STD_COM_FLAGS },	/* ttyS2 */	\
-	{ 0, BASE_BAUD, 0    , 0        , STD_COM_FLAGS },	/* ttyS3 */	\
-	{ 0, BASE_BAUD, 0    , 0        , STD_COM_FLAGS }, 	/* ttyS4 */	\
-	{ 0, BASE_BAUD, 0    , 0        , STD_COM_FLAGS },	/* ttyS5 */	\
-	{ 0, BASE_BAUD, 0    , 0        , STD_COM_FLAGS },	/* ttyS6 */	\
-	{ 0, BASE_BAUD, 0    , 0        , STD_COM_FLAGS },	/* ttyS7 */	\
-	{ 0, BASE_BAUD, 0    , 0        , STD_COM_FLAGS },	/* ttyS8 */	\
-	{ 0, BASE_BAUD, 0    , 0        , STD_COM_FLAGS },	/* ttyS9 */	\
-	{ 0, BASE_BAUD, 0    , 0        , STD_COM_FLAGS },	/* ttyS10 */	\
-	{ 0, BASE_BAUD, 0    , 0        , STD_COM_FLAGS },	/* ttyS11 */	\
-	{ 0, BASE_BAUD, 0    , 0        , STD_COM_FLAGS },	/* ttyS12 */	\
-	{ 0, BASE_BAUD, 0    , 0        , STD_COM_FLAGS },	/* ttyS13 */
+	{ 0, BASE_BAUD, 0x2F8, _SER_IRQ1, STD_COM_FLAGS },	/* ttyS1 */
+
+#define EXTRA_SERIAL_PORT_DEFNS
 
 #endif
diff --git a/include/asm-arm/arch-ebsa285/system.h b/include/asm-arm/arch-ebsa285/system.h
index 24a22d31c..ee7573804 100644
--- a/include/asm-arm/arch-ebsa285/system.h
+++ b/include/asm-arm/arch-ebsa285/system.h
@@ -14,9 +14,9 @@ extern __inline__ void arch_reset(char mode)
 {
 	if (mode == 's') {
 		__asm__ volatile (
-		"mov	lr, #0x41000000		@ prepare to jump to ROM
-		 mcr	p15, 0, %0, c1, c0, 0	@ MMU off
-		 mov	pc, lr" : : "r" (cpu_reset()) : "cc");
+		"mcr	p15, 0, %0, c1, c0, 0	@ MMU off
+		 mov	pc, #0x41000000		@ jump to ROM" : :
+		"r" (cpu_reset()) : "cc");
 	} else {
 		if (machine_is_netwinder()) {
 			/* open up the SuperIO chip
diff --git a/include/asm-arm/arch-nexuspci/io.h b/include/asm-arm/arch-nexuspci/io.h
index 5142e9126..f70fbadbd 100644
--- a/include/asm-arm/arch-nexuspci/io.h
+++ b/include/asm-arm/arch-nexuspci/io.h
@@ -1,5 +1,5 @@
 /*
- * linux/include/asm-arm/arch-ebsa110/io.h
+ * linux/include/asm-arm/arch-nexuspci/io.h
  *
  * Copyright (C) 1997,1998 Russell King
  *
@@ -9,11 +9,7 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-/*
- * This architecture does not require any delayed IO, and
- * has the constant-optimised IO
- */
-#undef	ARCH_IO_DELAY
+#define IO_SPACE_LIMIT 0xffffffff
 
 /*
  * Dynamic IO functions - let the compiler
@@ -123,6 +119,14 @@ DECLARE_IO(long,l,"","Jr")
 	addr;									\
 })
 
+#define inb(p)	 	(__builtin_constant_p((p)) ? __inbc(p)    : __inb(p))
+#define inw(p)	 	(__builtin_constant_p((p)) ? __inwc(p)    : __inw(p))
+#define inl(p)	 	(__builtin_constant_p((p)) ? __inlc(p)    : __inl(p))
+#define outb(v,p)	(__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
+#define outw(v,p)	(__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
+#define outl(v,p)	(__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
+#define __ioaddr(p)	(__builtin_constant_p((p)) ? __ioaddr(p)  : __ioaddrc(p))
+
 /*
  * Translated address IO functions
  *
diff --git a/include/asm-arm/arch-rpc/io.h b/include/asm-arm/arch-rpc/io.h
index 740fa30c0..2e093217c 100644
--- a/include/asm-arm/arch-rpc/io.h
+++ b/include/asm-arm/arch-rpc/io.h
@@ -9,11 +9,7 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-/*
- * This architecture does not require any delayed IO, and
- * has the constant-optimised IO
- */
-#undef	ARCH_IO_DELAY
+#define IO_SPACE_LIMIT 0xffffffff
 
 /*
  * We use two different types of addressing - PC style addresses, and ARM
@@ -25,8 +21,7 @@
 #define __PORT_PCIO(x)	(!((x) & 0x80000000))
 
 /*
- * Dynamic IO functions - let the compiler
- * optimize the expressions
+ * Dynamic IO functions.
  */
 extern __inline__ void __outb (unsigned int value, unsigned int port)
 {
@@ -189,6 +184,14 @@ DECLARE_IO(long,l,"")
 #define __ioaddrc(port)								\
 	(__PORT_PCIO((port)) ? PCIO_BASE + ((port) << 2) : IO_BASE + ((port) << 2))
 
+#define inb(p)	 	(__builtin_constant_p((p)) ? __inbc(p)    : __inb(p))
+#define inw(p)	 	(__builtin_constant_p((p)) ? __inwc(p)    : __inw(p))
+#define inl(p)	 	(__builtin_constant_p((p)) ? __inlc(p)    : __inl(p))
+#define outb(v,p)	(__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
+#define outw(v,p)	(__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
+#define outl(v,p)	(__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
+#define __ioaddr(p)	(__builtin_constant_p((p)) ? __ioaddr(p)  : __ioaddrc(p))
+
 /*
  * Translated address IO functions
  *
diff --git a/include/asm-arm/arch-rpc/serial.h b/include/asm-arm/arch-rpc/serial.h
index 8c33a7964..87e81c609 100644
--- a/include/asm-arm/arch-rpc/serial.h
+++ b/include/asm-arm/arch-rpc/serial.h
@@ -20,8 +20,10 @@
 
 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
 
+#define RS_TABLE_SIZE	16
+
      /* UART CLK        PORT  IRQ     FLAGS        */
-#define SERIAL_PORT_DFNS \
+#define STD_SERIAL_PORT_DEFNS \
 	{ 0, BASE_BAUD, 0x3F8, 10, STD_COM_FLAGS },	/* ttyS0 */	\
 	{ 0, BASE_BAUD, 0x2F8, 10, STD_COM_FLAGS },	/* ttyS1 */	\
 	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS2 */	\
@@ -35,6 +37,8 @@
 	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS10 */	\
 	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS11 */	\
 	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS12 */	\
-	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },	/* ttyS13 */
+	{ 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS }	/* ttyS13 */
+
+#define EXTRA_SERIAL_PORT_DEFNS
 
 #endif
diff --git a/include/asm-arm/arch-sa1100/io.h b/include/asm-arm/arch-sa1100/io.h
index 6c8d3711a..3e0001a1a 100644
--- a/include/asm-arm/arch-sa1100/io.h
+++ b/include/asm-arm/arch-sa1100/io.h
@@ -1,5 +1,5 @@
 /*
- * linux/include/asm-arm/arch-ebsa285/io.h
+ * linux/include/asm-arm/arch-sa1100/io.h
  *
  * Copyright (C) 1997-1999 Russell King
  *
@@ -10,37 +10,43 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-/*
- * This architecture does not require any delayed IO
- */
-#undef	ARCH_IO_DELAY
+#define IO_SPACE_LIMIT 0xffffffff
+
+#define __io_pci(a)		(PCIO_BASE + (a))
 
-#define __pci_io_addr(x)	(PCIO_BASE + (unsigned int)(x))
+#define __ioaddr(p)		__io_pci(p)
 
-#define __inb(p)		(*(volatile unsigned char *)__pci_io_addr(p))
-#define __inl(p)		(*(volatile unsigned long *)__pci_io_addr(p))
+/*
+ * Generic virtual read/write
+ */
+#define __arch_getb(a)		(*(volatile unsigned char *)(a))
+#define __arch_getl(a)		(*(volatile unsigned long *)(a))
 
-extern __inline__ unsigned int __inw(unsigned int port)
+extern __inline__ unsigned int __arch_getw(unsigned long a)
 {
 	unsigned int value;
-	__asm__ __volatile__(
-	"ldr%?h	%0, [%1, %2]	@ inw"
-	: "=&r" (value)
-	: "r" (PCIO_BASE), "r" (port));
+	__asm__ __volatile__("ldr%?h	%0, [%1, #0]	@ getw"
+		: "=&r" (value)
+		: "r" (a));
 	return value;
 }
 
 
-#define __outb(v,p)		(*(volatile unsigned char *)__pci_io_addr(p) = (v))
-#define __outl(v,p)		(*(volatile unsigned long *)__pci_io_addr(p) = (v))
+#define __arch_putb(v,a)	(*(volatile unsigned char *)(a) = (v))
+#define __arch_putl(v,a)	(*(volatile unsigned long *)(a) = (v))
 
-extern __inline__ void __outw(unsigned int value, unsigned int port)
+extern __inline__ void __arch_putw(unsigned int value, unsigned long a)
 {
-	__asm__ __volatile__(
-	"str%?h	%0, [%1, %2]	@ outw"
-	: : "r" (value), "r" (PCIO_BASE), "r" (port));
+	__asm__ __volatile__("str%?h	%0, [%1, #0]	@ putw"
+		: : "r" (value), "r" (a));
 }
 
-#define __ioaddr(p)	__pci_io_addr(p)
+#define inb(p)			__arch_getb(__io_pci(p))
+#define inw(p)			__arch_getw(__io_pci(p))
+#define inl(p)			__arch_getl(__io_pci(p))
+
+#define outb(v,p)		__arch_putb(v,__io_pci(p))
+#define outw(v,p)		__arch_putw(v,__io_pci(p))
+#define outl(v,p)		__arch_putl(v,__io_pci(p))
 
 #endif
diff --git a/include/asm-arm/arch-sa1100/irq.h b/include/asm-arm/arch-sa1100/irq.h
index e81a99910..3289801ac 100644
--- a/include/asm-arm/arch-sa1100/irq.h
+++ b/include/asm-arm/arch-sa1100/irq.h
@@ -12,6 +12,8 @@
  *   11-08-1999	PD	SA1101 support added
  *   25-09-1999	RMK	Merged into main ARM tree, cleaned up
  */
+#include <linux/config.h>
+
 static inline unsigned int fixup_irq(unsigned int irq)
 {
 #ifdef CONFIG_SA1101
diff --git a/include/asm-arm/arch-sa1100/irqs.h b/include/asm-arm/arch-sa1100/irqs.h
index f09145c77..246ad9344 100644
--- a/include/asm-arm/arch-sa1100/irqs.h
+++ b/include/asm-arm/arch-sa1100/irqs.h
@@ -4,6 +4,7 @@
  * Copyright (C) 1996 Russell King
  * Copyright (C) 1998 Deborah Wallach (updates for SA1100/Brutus).
  */
+#include <linux/config.h>
 
 #ifdef CONFIG_SA1101
 #define NR_IRQS                 95
diff --git a/include/asm-arm/arch-sa1100/serial.h b/include/asm-arm/arch-sa1100/serial.h
index ad7766ace..f57de7f4a 100644
--- a/include/asm-arm/arch-sa1100/serial.h
+++ b/include/asm-arm/arch-sa1100/serial.h
@@ -20,11 +20,13 @@
 /* Standard COM flags */
 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
 
+#define RS_TABLE_SIZE 4
+
 #define STD_SERIAL_PORT_DEFNS			\
 	/* UART CLK   PORT IRQ     FLAGS        */			\
 	{ 0, BASE_BAUD, 0x3F8, IRQ_GPIO3, STD_COM_FLAGS },	/* ttyS0 */	\
 	{ 0, BASE_BAUD, 0x2F8, IRQ_GPIO3, STD_COM_FLAGS },	/* ttyS1 */	\
 	{ 0, BASE_BAUD, 0x3E8, IRQ_GPIO3, STD_COM_FLAGS },	/* ttyS2 */	\
-	{ 0, BASE_BAUD, 0x2E8, IRQ_GPIO3, STD_COM4_FLAGS },	/* ttyS3 */
+	{ 0, BASE_BAUD, 0x2E8, IRQ_GPIO3, STD_COM4_FLAGS }	/* ttyS3 */
 
 
diff --git a/include/asm-arm/arch-sa1100/system.h b/include/asm-arm/arch-sa1100/system.h
index 90dbe88f9..24072c298 100644
--- a/include/asm-arm/arch-sa1100/system.h
+++ b/include/asm-arm/arch-sa1100/system.h
@@ -3,6 +3,8 @@
  *
  * Copyright (c) 1999 Nicolas Pitre <nico@visuaide.com>
  */
+#include <linux/config.h>
+
 #ifdef CONFIG_SA1100_VICTOR
 
 #define arch_reset( x ) {					\
@@ -14,10 +16,10 @@
 
 #else
 
-#define arch_reset( x ) {					\
+#define arch_reset(x) {						\
 	__asm__ volatile (					\
 "	mcr	p15, 0, %0, c1, c0	@ MMU off\n"		\
-"	mov	pc, #0\n" : : "r" (cpu_reset()));		\
+"	mov	pc, #0\n" : : "r" (cpu_reset()) : "cc");	\
 	}
 
 #endif
diff --git a/include/asm-arm/div64.h b/include/asm-arm/div64.h
new file mode 100644
index 000000000..fc473b6f0
--- /dev/null
+++ b/include/asm-arm/div64.h
@@ -0,0 +1,33 @@
+#ifndef __ASM_ARM_DIV64
+#define __ASM_ARM_DIV64
+
+/*
+ * unsigned long long division.  Yuck Yuck!  What is Linux coming to?
+ * This is 100% disgusting
+ */
+#define do_div(n,base)							\
+({									\
+	unsigned long __low, __low2, __high, __rem;			\
+	__low  = (n) & 0xffffffff;					\
+	__high = (n) >> 32;						\
+	if (__high) {							\
+		__rem   = __high % (unsigned long)base;			\
+		__high  = __high / (unsigned long)base;			\
+		__low2  = __low >> 16;					\
+		__low2 += __rem << 16;					\
+		__rem   = __low2 % (unsigned long)base;			\
+		__low2  = __low2 / (unsigned long)base;			\
+		__low   = __low & 0xffff;				\
+		__low  += __rem << 16;					\
+		__rem   = __low  % (unsigned long)base;			\
+		__low   = __low  / (unsigned long)base;			\
+		n = __low  + (__low2 << 16) + (__high << 32);		\
+	} else {							\
+		__rem = __low % (unsigned long)base;			\
+		n = (__low / (unsigned long)base);			\
+	}								\
+	__rem;								\
+})
+
+#endif
+
diff --git a/include/asm-arm/fcntl.h b/include/asm-arm/fcntl.h
index 9a3678193..60f155085 100644
--- a/include/asm-arm/fcntl.h
+++ b/include/asm-arm/fcntl.h
@@ -3,21 +3,23 @@
 
 /* open/fcntl - O_SYNC is only implemented on blocks devices and on files
    located on an ext2 file system */
-#define O_ACCMODE	  0003
-#define O_RDONLY	    00
-#define O_WRONLY	    01
-#define O_RDWR		    02
-#define O_CREAT		  0100	/* not fcntl */
-#define O_EXCL		  0200	/* not fcntl */
-#define O_NOCTTY	  0400	/* not fcntl */
-#define O_TRUNC		 01000	/* not fcntl */
-#define O_APPEND	 02000
-#define O_NONBLOCK	 04000
+#define O_ACCMODE	   0003
+#define O_RDONLY	     00
+#define O_WRONLY	     01
+#define O_RDWR		     02
+#define O_CREAT		   0100	/* not fcntl */
+#define O_EXCL		   0200	/* not fcntl */
+#define O_NOCTTY	   0400	/* not fcntl */
+#define O_TRUNC		  01000	/* not fcntl */
+#define O_APPEND	  02000
+#define O_NONBLOCK	  04000
 #define O_NDELAY	O_NONBLOCK
-#define O_SYNC		010000
-#define FASYNC		020000	/* fcntl, for BSD compatibility */
-#define O_DIRECTORY	040000	/* must be a directory */
+#define O_SYNC		 010000
+#define FASYNC		 020000	/* fcntl, for BSD compatibility */
+#define O_DIRECTORY	 040000	/* must be a directory */
 #define O_NOFOLLOW	0100000	/* don't follow links */
+#define O_DIRECT	0200000	/* direct disk access hint - currently ignored */
+#define O_LARGEFILE	0400000
 
 #define F_DUPFD		0	/* dup */
 #define F_GETFD		1	/* get f_flags */
@@ -33,6 +35,10 @@
 #define F_SETSIG	10	/*  for sockets. */
 #define F_GETSIG	11	/*  for sockets. */
 
+#define F_GETLK64	12	/*  using 'struct flock64' */
+#define F_SETLK64	13
+#define F_SETLKW64	14
+
 /* for F_[GET|SET]FL */
 #define FD_CLOEXEC	1	/* actually anything with low bit set goes */
 
@@ -60,4 +66,12 @@ struct flock {
 	pid_t l_pid;
 };
 
+struct flock64 {
+	short  l_type;
+	short  l_whence;
+	loff_t l_start;
+	loff_t l_len;
+	pid_t  l_pid;
+};
+
 #endif
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index a726d7afa..96dc9883d 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -1,7 +1,7 @@
 /*
  * linux/include/asm-arm/io.h
  *
- * Copyright (C) 1996 Russell King
+ * Copyright (C) 1996-1999 Russell King
  *
  * Modifications:
  *  16-Sep-1996	RMK	Inlined the inx/outx functions & optimised for both
@@ -10,217 +10,160 @@
  *			specific IO header files.
  *  27-Mar-1999	PJB	Second parameter of memcpy_toio is const..
  *  04-Apr-1999	PJB	Added check_signature.
+ *  12-Dec-1999	RMK	More cleanups
  */
 #ifndef __ASM_ARM_IO_H
 #define __ASM_ARM_IO_H
 
+#include <asm/arch/hardware.h>
+#include <asm/arch/io.h>
+#include <asm/proc/io.h>
+
+#define outb_p(val,port)		outb((val),(port))
+#define outw_p(val,port)		outw((val),(port))
+#define outl_p(val,port)		outl((val),(port))
+#define inb_p(port)			inb((port))
+#define inw_p(port)			inw((port))
+#define inl_p(port)			inl((port))
+
+extern void outsb(unsigned int port, const void *from, int len);
+extern void outsw(unsigned int port, const void *from, int len);
+extern void outsl(unsigned int port, const void *from, int len);
+extern void insb(unsigned int port, void *from, int len);
+extern void insw(unsigned int port, void *from, int len);
+extern void insl(unsigned int port, void *from, int len);
+
+#define outsb_p(port,from,len)		outsb(port,from,len)
+#define outsw_p(port,from,len)		outsw(port,from,len)
+#define outsl_p(port,from,len)		outsl(port,from,len)
+#define insb_p(port,to,len)		insb(port,to,len)
+#define insw_p(port,to,len)		insw(port,to,len)
+#define insl_p(port,to,len)		insl(port,to,len)
+
 #ifdef __KERNEL__
 
 #ifndef NULL
 #define NULL	((void *) 0)
 #endif
 
-extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
-extern void __iounmap(void *addr);
-
-#endif
-
-#include <asm/arch/hardware.h>
 #include <asm/arch/memory.h>
-#include <asm/arch/io.h>
-#include <asm/proc/io.h>
 
-/* unsigned long virt_to_phys(void *x) */
-#define virt_to_phys(x)		(__virt_to_phys((unsigned long)(x)))
-
-/* void *phys_to_virt(unsigned long x) */
-#define phys_to_virt(x)		((void *)(__phys_to_virt((unsigned long)(x))))
+extern __inline__ unsigned long virt_to_phys(volatile void *x)
+{
+	return __virt_to_phys((unsigned long)(x));
+}
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define virt_to_bus(x)	(__virt_to_bus((unsigned long)(x)))
-#define bus_to_virt(x)	((void *)(__bus_to_virt((unsigned long)(x))))
+extern __inline__ void *phys_to_virt(unsigned long x)
+{
+	return (void *)(__phys_to_virt((unsigned long)(x)));
+}
 
 /*
- * These macros actually build the multi-value IO function prototypes
+ * Virtual <-> DMA view memory address translations
  */
-#define __OUTS(s,i,x)	extern void outs##s(unsigned int port, const void *from, int len);
-#define __INS(s,i,x)	extern void ins##s(unsigned int port, void *to, int len);
+#define virt_to_bus(x)		(__virt_to_bus((unsigned long)(x)))
+#define bus_to_virt(x)		((void *)(__bus_to_virt((unsigned long)(x))))
 
-#define __IO(s,i,x) \
-  __OUTS(s,i,x) \
-  __INS(s,i,x)
-
-__IO(b,"b",char)
-__IO(w,"h",short)
-__IO(l,"",long)
+/* the following macro is depreciated */
+#define ioaddr(port)			__ioaddr((port))
 
 /*
- * Note that due to the way __builtin_constant_t() works, you
- *  - can't use it inside an inline function (it will never be true)
- *  - you don't have to worry about side effects withing the __builtin..
+ * ioremap and friends
  */
-#ifdef __outbc
-#define outb(val,port)	\
-  (__builtin_constant_p((port)) ? __outbc((val),(port)) : __outb((val),(port)))
-#else
-#define outb(val,port) __outb((val),(port))
-#endif
-
-#ifdef __outwc
-#define outw(val,port)	\
-  (__builtin_constant_p((port)) ? __outwc((val),(port)) : __outw((val),(port)))
-#else
-#define outw(val,port) __outw((val),(port))
-#endif
-
-#ifdef __outlc
-#define outl(val,port)	\
-  (__builtin_constant_p((port)) ? __outlc((val),(port)) : __outl((val),(port)))
-#else
-#define outl(val,port) __outl((val),(port))
-#endif
-
-#ifdef __inbc
-#define inb(port)	\
-  (__builtin_constant_p((port)) ? __inbc((port)) : __inb((port)))
-#else
-#define inb(port) __inb((port))
-#endif
-
-#ifdef __inwc
-#define inw(port)	\
-  (__builtin_constant_p((port)) ? __inwc((port)) : __inw((port)))
-#else
-#define inw(port) __inw((port))
-#endif
+extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
+extern void __iounmap(void *addr);
 
-#ifdef __inlc
-#define inl(port)	\
-  (__builtin_constant_p((port)) ? __inlc((port)) : __inl((port)))
-#else
-#define inl(port) __inl((port))
-#endif
+#define ioremap(off,sz)			__arch_ioremap((off),(sz),0)
+#define ioremap_nocache(off,sz)		__arch_ioremap((off),(sz),1)
+#define iounmap(_addr)			__iounmap(_addr)
 
-/*
- * This macro will give you the translated IO address for this particular
- * architecture, which can be used with the out_t... functions.
- */
-#ifdef __ioaddrc
-#define ioaddr(port)	\
-  (__builtin_constant_p((port)) ? __ioaddrc((port)) : __ioaddr((port)))
-#else
-#define ioaddr(port) __ioaddr((port))
-#endif
+extern void __readwrite_bug(const char *fn);
 
-#ifndef ARCH_IO_DELAY
 /*
- * This architecture does not require any delayed IO.
- * It is handled in the hardware.
+ * String version of IO memory access ops:
  */
-#define outb_p(val,port)	outb((val),(port))
-#define outw_p(val,port)	outw((val),(port))
-#define outl_p(val,port)	outl((val),(port))
-#define inb_p(port)		inb((port))
-#define inw_p(port)		inw((port))
-#define inl_p(port)		inl((port))
-#define outsb_p(port,from,len)	outsb(port,from,len)
-#define outsw_p(port,from,len)	outsw(port,from,len)
-#define outsl_p(port,from,len)	outsl(port,from,len)
-#define insb_p(port,to,len)	insb(port,to,len)
-#define insw_p(port,to,len)	insw(port,to,len)
-#define insl_p(port,to,len)	insl(port,to,len)
-
-#else
+extern void _memcpy_fromio(void *, unsigned long, unsigned long);
+extern void _memcpy_toio(unsigned long, const void *, unsigned long);
+extern void _memset_io(unsigned long, int, unsigned long);
 
 /*
- * We have to delay the IO...
+ * If this architecture has PCI memory IO, then define the read/write
+ * macros.
  */
-#ifdef __outbc_p
-#define outb_p(val,port)	\
-  (__builtin_constant_p((port)) ? __outbc_p((val),(port)) : __outb_p((val),(port)))
-#else
-#define outb_p(val,port) __outb_p((val),(port))
-#endif
-
-#ifdef __outwc_p
-#define outw_p(val,port)	\
-  (__builtin_constant_p((port)) ? __outwc_p((val),(port)) : __outw_p((val),(port)))
-#else
-#define outw_p(val,port) __outw_p((val),(port))
-#endif
+#ifdef __mem_pci
 
-#ifdef __outlc_p
-#define outl_p(val,port)	\
-  (__builtin_constant_p((port)) ? __outlc_p((val),(port)) : __outl_p((val),(port)))
-#else
-#define outl_p(val,port) __outl_p((val),(port))
-#endif
+#define readb(addr)			__arch_getb(__mem_pci(addr))
+#define readw(addr)			__arch_getw(__mem_pci(addr))
+#define readl(addr)			__arch_getl(__mem_pci(addr))
+#define writeb(val,addr)		__arch_putb(val,__mem_pci(addr))
+#define writew(val,addr)		__arch_putw(val,__mem_pci(addr))
+#define writel(val,addr)		__arch_putl(val,__mem_pci(addr))
 
-#ifdef __inbc_p
-#define inb_p(port)	\
-  (__builtin_constant_p((port)) ? __inbc_p((port)) : __inb_p((port)))
-#else
-#define inb_p(port) __inb_p((port))
-#endif
+#define memset_io(a,b,c)		_memset_io(__mem_pci(a),(b),(c))
+#define memcpy_fromio(a,b,c)		_memcpy_fromio((a),__mem_pci(b),(c))
+#define memcpy_toio(a,b,c)		_memcpy_toio(__mem_pci(a),(b),(c))
 
-#ifdef __inwc_p
-#define inw_p(port)	\
-  (__builtin_constant_p((port)) ? __inwc_p((port)) : __inw_p((port)))
-#else
-#define inw_p(port) __inw_p((port))
-#endif
-
-#ifdef __inlc_p
-#define inl_p(port)	\
-  (__builtin_constant_p((port)) ? __inlc_p((port)) : __inl_p((port)))
-#else
-#define inl_p(port) __inl_p((port))
-#endif
+#define eth_io_copy_and_sum(a,b,c,d) \
+				eth_copy_and_sum((a),__mem_pci(b),(c),(d))
 
-#endif
-
-extern void __readwrite_bug(const char *fn);
+static inline int
+check_signature(unsigned long io_addr, const unsigned char *signature,
+		int length)
+{
+	int retval = 0;
+	do {
+		if (readb(io_addr) != *signature)
+			goto out;
+		io_addr++;
+		signature++;
+		length--;
+	} while (length);
+	retval = 1;
+out:
+	return retval;
+}
 
-#ifndef ARCH_READWRITE
+#else	/* __mem_pci */
 
-#define readb(p)	(__readwrite_bug("readb"),0)
-#define readw(p)	(__readwrite_bug("readw"),0)
-#define readl(p)	(__readwrite_bug("readl"),0)
-#define writeb(v,p)	__readwrite_bug("writeb")
-#define writew(v,p)	__readwrite_bug("writew")
-#define writel(v,p)	__readwrite_bug("writel")
+#define readb(addr)			(__readwrite_bug("readb"),0)
+#define readw(addr)			(__readwrite_bug("readw"),0)
+#define readl(addr)			(__readwrite_bug("readl"),0)
+#define writeb(v,addr)			__readwrite_bug("writeb")
+#define writew(v,addr)			__readwrite_bug("writew")
+#define writel(v,addr)			__readwrite_bug("writel")
 
-#endif
+#define eth_io_copy_and_sum(a,b,c,d)	__readwrite_bug("eth_io_copy_and_sum")
 
-#ifndef memcpy_fromio
-/*
- * String version of IO memory access ops:
- */
-extern void _memcpy_fromio(void *, unsigned long, unsigned long);
-extern void _memcpy_toio(unsigned long, const void *, unsigned long);
-extern void _memset_io(unsigned long, int, unsigned long);
+#define check_signature(io,sig,len)	(0)
 
-#define memcpy_fromio(to,from,len)	_memcpy_fromio((to),(unsigned long)(from),(len))
-#define memcpy_toio(to,from,len)	_memcpy_toio((unsigned long)(to),(from),(len))
-#define memset_io(addr,c,len)		_memset_io((unsigned long)(addr),(c),(len))
-#endif
+#endif	/* __mem_pci */
 
 /*
- * This isn't especially architecture dependent so it seems like it
- * might as well go here as anywhere.
+ * If this architecture has ISA IO, then define the isa_read/isa_write
+ * macros.
  */
-static inline int check_signature(unsigned long io_addr,
-                                  const unsigned char *signature, int length)
+#ifdef __mem_isa
+
+#define isa_readb(addr)			__arch_getb(__mem_isa(addr))
+#define isa_readw(addr)			__arch_getw(__mem_isa(addr))
+#define isa_readl(addr)			__arch_getl(__mem_isa(addr))
+#define isa_writeb(val,addr)		__arch_putb(val,__mem_isa(addr))
+#define isa_writew(val,addr)		__arch_putw(val,__mem_isa(addr))
+#define isa_writel(val,addr)		__arch_putl(val,__mem_isa(addr))
+#define isa_memset_io(a,b,c)		_memset_io(__mem_isa(a),(b),(c))
+#define isa_memcpy_fromio(a,b,c)	_memcpy_fromio((a),__mem_isa((b)),(c))
+#define isa_memcpy_toio(a,b,c)		_memcpy_toio(__mem_isa((a)),(b),(c))
+
+#define isa_eth_io_copy_and_sum(a,b,c,d) \
+				eth_copy_and_sum((a),__mem_isa((b),(c),(d))
+
+static inline int
+isa_check_signature(unsigned long io_addr, const unsigned char *signature,
+		    int length)
 {
 	int retval = 0;
 	do {
-		if (readb(io_addr) != *signature)
+		if (isa_readb(io_addr) != *signature)
 			goto out;
 		io_addr++;
 		signature++;
@@ -231,9 +174,23 @@ out:
 	return retval;
 }
 
-#undef ARCH_READWRITE
-#undef ARCH_IO_DELAY
-#undef ARCH_IO_CONSTANT
+#else	/* __mem_isa */
 
-#endif
+#define isa_readb(addr)			(__readwrite_bug("isa_readb"),0)
+#define isa_readw(addr)			(__readwrite_bug("isa_readw"),0)
+#define isa_readl(addr)			(__readwrite_bug("isa_readl"),0)
+#define isa_writeb(val,addr)		__readwrite_bug("isa_writeb")
+#define isa_writew(val,addr)		__readwrite_bug("isa_writew")
+#define isa_writel(val,addr)		__readwrite_bug("isa_writel")
+#define isa_memset_io(a,b,c)		__readwrite_bug("isa_memset_io")
+#define isa_memcpy_fromio(a,b,c)	__readwrite_bug("isa_memcpy_fromio")
+#define isa_memcpy_toio(a,b,c)		__readwrite_bug("isa_memcpy_toio")
+
+#define isa_eth_io_copy_and_sum(a,b,c,d) \
+				__readwrite_bug("isa_eth_io_copy_and_sum")
+
+#define isa_check_signature(io,sig,len)	(0)
 
+#endif	/* __mem_isa */
+#endif	/* __KERNEL__ */
+#endif	/* __ASM_ARM_IO_H */
diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h
index 20edac085..7ea5157ec 100644
--- a/include/asm-arm/page.h
+++ b/include/asm-arm/page.h
@@ -69,9 +69,9 @@ extern void __bug(const char *file, int line, void *data);
 
 #include <asm/arch/memory.h>
 
-#define __pa(x)			((unsigned long)(x) - PAGE_OFFSET)
-#define __va(x)			((void *)((unsigned long)(x) + PAGE_OFFSET))
-#define MAP_NR(addr)		(__pa(addr) >> PAGE_SHIFT)
+#define __pa(x)			((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET)
+#define __va(x)			((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET))
+#define MAP_NR(addr)		(((unsigned long)(addr) - PAGE_OFFSET) >> PAGE_SHIFT)
 
 #endif
 
diff --git a/include/asm-arm/pgalloc.h b/include/asm-arm/pgalloc.h
new file mode 100644
index 000000000..841855ef8
--- /dev/null
+++ b/include/asm-arm/pgalloc.h
@@ -0,0 +1,205 @@
+/*
+ * linux/include/asm-arm/pgalloc.h
+ */
+#ifndef _ASMARM_PGALLOC_H
+#define _ASMARM_PGALLOC_H
+
+#include <linux/config.h>
+#include <linux/threads.h>
+
+#include <asm/processor.h>
+
+/*
+ * Get the cache handling stuff now.
+ */
+#include <asm/proc/cache.h>
+
+/*
+ * Page table cache stuff
+ */
+#ifndef CONFIG_NO_PGT_CACHE
+
+#ifdef __SMP__
+#error Pgtable caches have to be per-CPU, so that no locking is needed.
+#endif	/* __SMP__ */
+
+extern struct pgtable_cache_struct {
+	unsigned long *pgd_cache;
+	unsigned long *pte_cache;
+	unsigned long pgtable_cache_sz;
+} quicklists;
+
+#define pgd_quicklist		(quicklists.pgd_cache)
+#define pmd_quicklist		((unsigned long *)0)
+#define pte_quicklist		(quicklists.pte_cache)
+#define pgtable_cache_size	(quicklists.pgtable_cache_sz)
+
+/* used for quicklists */
+#define __pgd_next(pgd) (((unsigned long *)pgd)[1])
+#define __pte_next(pte)	(((unsigned long *)pte)[0])
+
+extern __inline__ pgd_t *get_pgd_fast(void)
+{
+	unsigned long *ret;
+
+	if ((ret = pgd_quicklist) != NULL) {
+		pgd_quicklist = (unsigned long *)__pgd_next(ret);
+		ret[1] = ret[2];
+		clean_cache_area(ret + 1, 4);
+		pgtable_cache_size--;
+	}
+	return (pgd_t *)ret;
+}
+
+extern __inline__ void free_pgd_fast(pgd_t *pgd)
+{
+	__pgd_next(pgd) = (unsigned long) pgd_quicklist;
+	pgd_quicklist = (unsigned long *) pgd;
+	pgtable_cache_size++;
+}
+
+/* We don't use pmd cache, so this is a dummy routine */
+#define get_pmd_fast()		((pmd_t *)0)
+
+extern __inline__ void free_pmd_fast(pmd_t *pmd)
+{
+}
+
+extern __inline__ pte_t *get_pte_fast(void)
+{
+	unsigned long *ret;
+
+	if((ret = pte_quicklist) != NULL) {
+		pte_quicklist = (unsigned long *)__pte_next(ret);
+		ret[0] = ret[1];
+		clean_cache_area(ret, 4);
+		pgtable_cache_size--;
+	}
+	return (pte_t *)ret;
+}
+
+extern __inline__ void free_pte_fast(pte_t *pte)
+{
+	__pte_next(pte) = (unsigned long) pte_quicklist;
+	pte_quicklist = (unsigned long *) pte;
+	pgtable_cache_size++;
+}
+
+#else	/* CONFIG_NO_PGT_CACHE */
+
+#define pgd_quicklist		((unsigned long *)0)
+#define pmd_quicklist		((unsigned long *)0)
+#define pte_quicklist		((unsigned long *)0)
+
+#define get_pgd_fast()		((pgd_t *)0)
+#define get_pmd_fast()		((pmd_t *)0)
+#define get_pte_fast()		((pte_t *)0)
+
+#define free_pgd_fast(pgd)	free_pgd_slow(pgd)
+#define free_pmd_fast(pmd)	free_pmd_slow(pmd)
+#define free_pte_fast(pte)	free_pte_slow(pte)
+
+#endif	/* CONFIG_NO_PGT_CACHE */
+
+extern pgd_t *get_pgd_slow(void);
+extern void free_pgd_slow(pgd_t *pgd);
+
+#define free_pmd_slow(pmd)	do { } while (0)
+
+extern pte_t *get_pte_kernel_slow(pmd_t *pmd, unsigned long addr_preadjusted);
+extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long addr_preadjusted);
+extern void free_pte_slow(pte_t *pte);
+
+/*
+ * Allocate and free page tables. The xxx_kernel() versions are
+ * used to allocate a kernel page table - this turns on ASN bits
+ * if any.
+ */
+#define pte_free_kernel(pte)	free_pte_fast(pte)
+#define pte_free(pte)		free_pte_fast(pte)
+
+#ifndef pte_alloc_kernel
+extern __inline__ pte_t * pte_alloc_kernel(pmd_t *pmd, unsigned long address)
+{
+	address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
+	if (pmd_none(*pmd)) {
+		pte_t *page = (pte_t *) get_pte_fast();
+
+		if (!page)
+			return get_pte_kernel_slow(pmd, address);
+		set_pmd(pmd, mk_kernel_pmd(page));
+		return page + address;
+	}
+	if (pmd_bad(*pmd)) {
+		__handle_bad_pmd_kernel(pmd);
+		return NULL;
+	}
+	return (pte_t *) pmd_page(*pmd) + address;
+}
+#endif
+
+extern __inline__ pte_t *pte_alloc(pmd_t * pmd, unsigned long address)
+{
+	address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
+	if (pmd_none(*pmd)) {
+		pte_t *page = (pte_t *) get_pte_fast();
+
+		if (!page)
+			return get_pte_slow(pmd, address);
+		set_pmd(pmd, mk_user_pmd(page));
+		return page + address;
+	}
+	if (pmd_bad(*pmd)) {
+		__handle_bad_pmd(pmd);
+		return NULL;
+	}
+	return (pte_t *) pmd_page(*pmd) + address;
+}
+
+#define pmd_free_kernel		pmd_free
+#define pmd_free(pmd)		do { } while (0)
+
+#define pmd_alloc_kernel	pmd_alloc
+extern __inline__ pmd_t *pmd_alloc(pgd_t *pgd, unsigned long address)
+{
+	return (pmd_t *) pgd;
+}
+
+#define pgd_free(pgd)		free_pgd_fast(pgd)
+
+extern __inline__ pgd_t *pgd_alloc(void)
+{
+	pgd_t *pgd;
+
+	pgd = get_pgd_fast();
+	if (!pgd)
+		pgd = get_pgd_slow();
+
+	return pgd;
+}
+
+extern int do_check_pgt_cache(int, int);
+
+extern __inline__ void set_pgdir(unsigned long address, pgd_t entry)
+{
+	struct task_struct * p;
+
+	read_lock(&tasklist_lock);
+	for_each_task(p) {
+		if (!p->mm)
+			continue;
+		*pgd_offset(p->mm,address) = entry;
+	}
+	read_unlock(&tasklist_lock);
+
+#ifndef CONFIG_NO_PGT_CACHE
+	{
+		pgd_t *pgd;
+		for (pgd = (pgd_t *)pgd_quicklist; pgd;
+		     pgd = (pgd_t *)__pgd_next(pgd))
+			pgd[address >> PGDIR_SHIFT] = entry;
+	}
+#endif
+}
+
+#endif
diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h
index b9fb442d7..033541764 100644
--- a/include/asm-arm/pgtable.h
+++ b/include/asm-arm/pgtable.h
@@ -4,8 +4,6 @@
 #ifndef _ASMARM_PGTABLE_H
 #define _ASMARM_PGTABLE_H
 
-#include <linux/config.h>
-
 #include <asm/arch/memory.h>
 #include <asm/proc-fns.h>
 #include <asm/system.h>
@@ -67,7 +65,7 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
  * ZERO_PAGE is a global shared page that is always zero: used
  * for zero-mapped memory areas etc..
  */
-struct page *empty_zero_page;
+extern struct page *empty_zero_page;
 #define ZERO_PAGE(vaddr)	(empty_zero_page)
 
 /*
@@ -86,21 +84,11 @@ extern void __handle_bad_pmd_kernel(pmd_t *pmd);
 /*
  * Permanent address of a page.
  */
-#define page_address(page)	(PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT))
+#define page_address(page)	({ if (!(page)->virtual) BUG(); (page)->virtual; })
 #define pages_to_mb(x)		((x) >> (20 - PAGE_SHIFT))
 #define pte_page(x)		(mem_map + pte_pagenr(x))
 
 /*
- * The "pgd_xxx()" functions here are trivial for a folded two-level
- * setup: the pgd is never bad, and a pmd always exists (as it's folded
- * into the pgd entry)
- */
-#define pgd_none(pgd)		(0)
-#define pgd_bad(pgd)		(0)
-#define pgd_present(pgd)	(1)
-#define pgd_clear(pgdp)
-
-/*
  * Conversion functions: convert a page and protection to a page entry,
  * and a page entry and page directory to the page they refer to.
  */
@@ -111,12 +99,24 @@ extern __inline__ pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
 	return pte;
 }
 
-extern __inline__ pte_t mk_pte(struct page *page, pgprot_t pgprot)
-{
-	pte_t pte;
-	pte_val(pte) = (PHYS_OFFSET + ((page - mem_map) << PAGE_SHIFT)) | pgprot_val(pgprot);
-	return pte;
-}
+#define mk_pte(page,pgprot)					\
+({								\
+	pte_t __pte;						\
+	pte_val(__pte) = PHYS_OFFSET + 				\
+			  (((page) - mem_map) << PAGE_SHIFT) +	\
+			   pgprot_val(pgprot);			\
+	__pte;							\
+})
+
+/*
+ * The "pgd_xxx()" functions here are trivial for a folded two-level
+ * setup: the pgd is never bad, and a pmd always exists (as it's folded
+ * into the pgd entry)
+ */
+#define pgd_none(pgd)		(0)
+#define pgd_bad(pgd)		(0)
+#define pgd_present(pgd)	(1)
+#define pgd_clear(pgdp)
 
 #define page_pte_prot(page,prot)	mk_pte(page, prot)
 #define page_pte(page)		mk_pte(page, __pgprot(0))
@@ -136,107 +136,6 @@ extern __inline__ pte_t mk_pte(struct page *page, pgprot_t pgprot)
 #define __pte_offset(addr)	(((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 #define pte_offset(dir, addr)	((pte_t *)pmd_page(*(dir)) + __pte_offset(addr))
 
-/*
- * Get the cache handling stuff now.
- */
-#include <asm/proc/cache.h>
-
-/*
- * Page table cache stuff
- */
-#ifndef CONFIG_NO_PGT_CACHE
-
-#ifdef __SMP__
-#error Pgtable caches have to be per-CPU, so that no locking is needed.
-#endif	/* __SMP__ */
-
-extern struct pgtable_cache_struct {
-	unsigned long *pgd_cache;
-	unsigned long *pte_cache;
-	unsigned long pgtable_cache_sz;
-} quicklists;
-
-#define pgd_quicklist		(quicklists.pgd_cache)
-#define pmd_quicklist		((unsigned long *)0)
-#define pte_quicklist		(quicklists.pte_cache)
-#define pgtable_cache_size	(quicklists.pgtable_cache_sz)
-
-/* used for quicklists */
-#define __pgd_next(pgd) (((unsigned long *)pgd)[1])
-#define __pte_next(pte)	(((unsigned long *)pte)[0])
-
-extern __inline__ pgd_t *get_pgd_fast(void)
-{
-	unsigned long *ret;
-
-	if ((ret = pgd_quicklist) != NULL) {
-		pgd_quicklist = (unsigned long *)__pgd_next(ret);
-		ret[1] = ret[2];
-		clean_cache_area(ret + 1, 4);
-		pgtable_cache_size--;
-	}
-	return (pgd_t *)ret;
-}
-
-extern __inline__ void free_pgd_fast(pgd_t *pgd)
-{
-	__pgd_next(pgd) = (unsigned long) pgd_quicklist;
-	pgd_quicklist = (unsigned long *) pgd;
-	pgtable_cache_size++;
-}
-
-/* We don't use pmd cache, so this is a dummy routine */
-#define get_pmd_fast()		((pmd_t *)0)
-
-extern __inline__ void free_pmd_fast(pmd_t *pmd)
-{
-}
-
-extern __inline__ pte_t *get_pte_fast(void)
-{
-	unsigned long *ret;
-
-	if((ret = pte_quicklist) != NULL) {
-		pte_quicklist = (unsigned long *)__pte_next(ret);
-		ret[0] = ret[1];
-		clean_cache_area(ret, 4);
-		pgtable_cache_size--;
-	}
-	return (pte_t *)ret;
-}
-
-extern __inline__ void free_pte_fast(pte_t *pte)
-{
-	__pte_next(pte) = (unsigned long) pte_quicklist;
-	pte_quicklist = (unsigned long *) pte;
-	pgtable_cache_size++;
-}
-
-#else	/* CONFIG_NO_PGT_CACHE */
-
-#define pgd_quicklist		((unsigned long *)0)
-#define pmd_quicklist		((unsigned long *)0)
-#define pte_quicklist		((unsigned long *)0)
-
-#define get_pgd_fast()		((pgd_t *)0)
-#define get_pmd_fast()		((pmd_t *)0)
-#define get_pte_fast()		((pte_t *)0)
-
-#define free_pgd_fast(pgd)	free_pgd_slow(pgd)
-#define free_pmd_fast(pmd)	free_pmd_slow(pmd)
-#define free_pte_fast(pte)	free_pte_slow(pte)
-
-#endif	/* CONFIG_NO_PGT_CACHE */
-
-extern pgd_t *get_pgd_slow(void);
-extern void free_pgd_slow(pgd_t *pgd);
-
-#define free_pmd_slow(pmd)	do { } while (0)
-
-extern pte_t *get_pte_kernel_slow(pmd_t *pmd, unsigned long addr_preadjusted);
-extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long addr_preadjusted);
-extern void free_pte_slow(pte_t *pte);
-
 #include <asm/proc/pgtable.h>
 
 extern __inline__ pte_t pte_modify(pte_t pte, pgprot_t newprot)
@@ -245,131 +144,25 @@ extern __inline__ pte_t pte_modify(pte_t pte, pgprot_t newprot)
 	return pte;
 }
 
-/*
- * Allocate and free page tables. The xxx_kernel() versions are
- * used to allocate a kernel page table - this turns on ASN bits
- * if any.
- */
-#define pte_free_kernel(pte)	free_pte_fast(pte)
-#define pte_free(pte)		free_pte_fast(pte)
-
-#ifndef pte_alloc_kernel
-extern __inline__ pte_t * pte_alloc_kernel(pmd_t *pmd, unsigned long address)
-{
-	address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
-	if (pmd_none(*pmd)) {
-		pte_t *page = (pte_t *) get_pte_fast();
-
-		if (!page)
-			return get_pte_kernel_slow(pmd, address);
-		set_pmd(pmd, mk_kernel_pmd(page));
-		return page + address;
-	}
-	if (pmd_bad(*pmd)) {
-		__handle_bad_pmd_kernel(pmd);
-		return NULL;
-	}
-	return (pte_t *) pmd_page(*pmd) + address;
-}
-#endif
-
-extern __inline__ pte_t *pte_alloc(pmd_t * pmd, unsigned long address)
-{
-	address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
-	if (pmd_none(*pmd)) {
-		pte_t *page = (pte_t *) get_pte_fast();
-
-		if (!page)
-			return get_pte_slow(pmd, address);
-		set_pmd(pmd, mk_user_pmd(page));
-		return page + address;
-	}
-	if (pmd_bad(*pmd)) {
-		__handle_bad_pmd(pmd);
-		return NULL;
-	}
-	return (pte_t *) pmd_page(*pmd) + address;
-}
-
-#define pmd_free_kernel		pmd_free
-#define pmd_free(pmd)		do { } while (0)
-
-#define pmd_alloc_kernel	pmd_alloc
-extern __inline__ pmd_t *pmd_alloc(pgd_t *pgd, unsigned long address)
-{
-	return (pmd_t *) pgd;
-}
-
-#define pgd_free(pgd)		free_pgd_fast(pgd)
-
-extern __inline__ pgd_t *pgd_alloc(void)
-{
-	pgd_t *pgd;
-
-	pgd = get_pgd_fast();
-	if (!pgd)
-		pgd = get_pgd_slow();
-
-	return pgd;
-}
-
-extern int do_check_pgt_cache(int, int);
-
-extern __inline__ void set_pgdir(unsigned long address, pgd_t entry)
-{
-	struct task_struct * p;
-
-	read_lock(&tasklist_lock);
-	for_each_task(p) {
-		if (!p->mm)
-			continue;
-		*pgd_offset(p->mm,address) = entry;
-	}
-	read_unlock(&tasklist_lock);
-
-#ifndef CONFIG_NO_PGT_CACHE
-	{
-		pgd_t *pgd;
-		for (pgd = (pgd_t *)pgd_quicklist; pgd;
-		     pgd = (pgd_t *)__pgd_next(pgd))
-			pgd[address >> PGDIR_SHIFT] = entry;
-	}
-#endif
-}
-
 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 
-#define update_mmu_cache(vma,address,pte)
+#define update_mmu_cache(vma,address,pte) do { } while (0)
 
-/*
+/* Encode and decode a swap entry.
+ *
  * We support up to 32GB of swap on 4k machines
  */
-#define SWP_TYPE(entry)		(((pte_val(entry)) >> 2) & 0x7f)
-#define SWP_OFFSET(entry)	((pte_val(entry)) >> 9)
-#define SWP_ENTRY(type,offset)	__pte((((type) << 2) | ((offset) << 9)))
+#define SWP_TYPE(x)		(((x).val >> 2) & 0x7f)
+#define SWP_OFFSET(x)		((x).val >> 9)
+#define SWP_ENTRY(type,offset)	((swp_entry_t) { ((type) << 2) | ((offset) << 9) })
+#define pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })
+#define swp_entry_to_pte(swp)	((pte_t) { (swp).val })
 
 #define module_map		vmalloc
 #define module_unmap		vfree
 
-/*
- * We rely on GCC optimising this code away for
- * architectures which it doesn't apply to.  Note
- * that `addr' is checked against PAGE_OFFSET and
- * end_mem by the calling code.
- */
-#define __kern_valid_idx(a)	(((a) - PAGE_OFFSET) >> 20)
-
-extern __inline__ int __kern_valid_addr(unsigned long addr)
-{
-	extern unsigned long *valid_addr_bitmap;
-	unsigned int idx = __kern_valid_idx(addr);
-
-	return test_bit(idx, valid_addr_bitmap);
-}
-
 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
 #define PageSkip(page)		(machine_is_riscpc() && test_bit(PG_skip, &(page)->flags))
-#define kern_addr_valid(addr)	(!machine_is_riscpc() || __kern_valid_addr(addr))
 
 #define io_remap_page_range	remap_page_range
 
diff --git a/include/asm-arm/proc-armo/processor.h b/include/asm-arm/proc-armo/processor.h
index 049e2c054..6562ee712 100644
--- a/include/asm-arm/proc-armo/processor.h
+++ b/include/asm-arm/proc-armo/processor.h
@@ -67,6 +67,9 @@ extern uaccess_t uaccess_user, uaccess_kernel;
 	regs->ARM_r0 = stack[0];	/* r0 (argc) */			\
 })
 
+#define KSTK_EIP(tsk)	(((unsigned long *)(4096+(unsigned long)(tsk)))[1022])
+#define KSTK_ESP(tsk)	(((unsigned long *)(4096+(unsigned long)(tsk)))[1020])
+
 /* Allocation and freeing of basic task resources. */
 /*
  * NOTE! The task struct and the stack go together
@@ -74,8 +77,6 @@ extern uaccess_t uaccess_user, uaccess_kernel;
 extern unsigned long get_page_8k(int priority);
 extern void free_page_8k(unsigned long page);
 
-#define THREAD_SIZE	(8192)
-
 #define ll_alloc_task_struct()	((struct task_struct *)get_page_8k(GFP_KERNEL))
 #define ll_free_task_struct(p)  free_page_8k((unsigned long)(p))
 
diff --git a/include/asm-arm/proc-armv/cache.h b/include/asm-arm/proc-armv/cache.h
index 5e700bfad..ac136d6ef 100644
--- a/include/asm-arm/proc-armv/cache.h
+++ b/include/asm-arm/proc-armv/cache.h
@@ -56,8 +56,7 @@
  */
 static __inline__ void flush_page_to_ram(struct page *page)
 {
-	unsigned long virt = page_address(page);
-	cpu_flush_ram_page(virt);
+	cpu_flush_ram_page(page_address(page));
 }
 
 /*
diff --git a/include/asm-arm/proc-armv/processor.h b/include/asm-arm/proc-armv/processor.h
index 48b57243a..9ddfd0028 100644
--- a/include/asm-arm/proc-armv/processor.h
+++ b/include/asm-arm/proc-armv/processor.h
@@ -57,11 +57,13 @@ struct context_save_struct {
 	regs->ARM_r0 = stack[0];	/* r0 (argc) */			\
 })
 
+#define KSTK_EIP(tsk)	(((unsigned long *)(4096+(unsigned long)(tsk)))[1021])
+#define KSTK_ESP(tsk)	(((unsigned long *)(4096+(unsigned long)(tsk)))[1019])
+
 /* Allocation and freeing of basic task resources. */
 /*
  * NOTE! The task struct and the stack go together
  */
-#define THREAD_SIZE	(PAGE_SIZE * 2)
 #define ll_alloc_task_struct() ((struct task_struct *) __get_free_pages(GFP_KERNEL,1))
 #define ll_free_task_struct(p) free_pages((unsigned long)(p),1)
 
diff --git a/include/asm-arm/processor.h b/include/asm-arm/processor.h
index bac831217..ce080d4ad 100644
--- a/include/asm-arm/processor.h
+++ b/include/asm-arm/processor.h
@@ -34,6 +34,7 @@ typedef unsigned long mm_segment_t;		/* domain register	*/
 
 #define NR_DEBUGS	5
 
+#include <asm/atomic.h>
 #include <asm/ptrace.h>
 #include <asm/arch/memory.h>
 #include <asm/arch/processor.h>
@@ -48,6 +49,7 @@ struct debug_info {
 };
 
 struct thread_struct {
+	atomic_t			refcount;
 							/* fault info	  */
 	unsigned long			address;
 	unsigned long			trap_no;
@@ -65,6 +67,7 @@ struct thread_struct {
 { &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
 
 #define INIT_THREAD  {				\
+	ATOMIC_INIT(1),				\
 	0,					\
 	0,					\
 	0,					\
@@ -109,16 +112,17 @@ extern void release_thread(struct task_struct *);
 
 unsigned long get_wchan(struct task_struct *p);
 
-#ifdef CONFIG_CPU_26
-# define KSTK_EIP(tsk)	(((unsigned long *)(4096+(unsigned long)(tsk)))[1022])
-# define KSTK_ESP(tsk)	(((unsigned long *)(4096+(unsigned long)(tsk)))[1020])
-#else
-# define KSTK_EIP(tsk)	(((unsigned long *)(4096+(unsigned long)(tsk)))[1021])
-# define KSTK_ESP(tsk)	(((unsigned long *)(4096+(unsigned long)(tsk)))[1019])
-#endif
+#define THREAD_SIZE	(8192)
 
 extern struct task_struct *alloc_task_struct(void);
-extern void free_task_struct(struct task_struct *);
+extern void __free_task_struct(struct task_struct *);
+#define get_task_struct(p)	atomic_inc(&(p)->thread.refcount)
+#define put_task_struct(p)	free_task_struct(p)
+#define free_task_struct(p)					\
+ do {								\
+	if (atomic_dec_and_test(&(p)->thread.refcount))		\
+		__free_task_struct((p));			\
+ } while (0)
 
 #define init_task	(init_task_union.task)
 #define init_stack	(init_task_union.stack)
diff --git a/include/asm-arm/resource.h b/include/asm-arm/resource.h
index b5c6ccc6f..aea5122a0 100644
--- a/include/asm-arm/resource.h
+++ b/include/asm-arm/resource.h
@@ -18,6 +18,12 @@
 
 #define RLIM_NLIMITS	10
 
+/*
+ * SuS says limits have to be unsigned.
+ * Which makes a ton more sense anyway.
+ */
+#define RLIM_INFINITY	(~0UL)
+
 #ifdef __KERNEL__
 
 #define INIT_RLIMITS					\
diff --git a/include/asm-arm/serial.h b/include/asm-arm/serial.h
index 3e1513a45..88d57fe07 100644
--- a/include/asm-arm/serial.h
+++ b/include/asm-arm/serial.h
@@ -12,4 +12,8 @@
 
 #include <asm/arch/serial.h>
 
+#define SERIAL_PORT_DFNS		\
+	STD_SERIAL_PORT_DEFNS		\
+	EXTRA_SERIAL_PORT_DEFNS
+
 #endif
diff --git a/include/asm-arm/signal.h b/include/asm-arm/signal.h
index 12ec642aa..afca084cb 100644
--- a/include/asm-arm/signal.h
+++ b/include/asm-arm/signal.h
@@ -63,6 +63,7 @@ typedef unsigned long sigset_t;
 #define SIGLOST		29
 */
 #define SIGPWR		30
+#define SIGSYS		31
 #define	SIGUNUSED	31
 
 /* These should not be considered constants from userland.  */
diff --git a/include/asm-arm/vga.h b/include/asm-arm/vga.h
index 19c454396..926e5ee12 100644
--- a/include/asm-arm/vga.h
+++ b/include/asm-arm/vga.h
@@ -6,7 +6,7 @@
 
 #define VGA_MAP_MEM(x)	(PCIMEM_BASE + (x))
 
-#define vga_readb(x)	(*(x))
-#define vga_writeb(x,y)	(*(y) = (x))
+#define vga_readb(x)	(*((volatile unsigned char *)x))
+#define vga_writeb(x,y)	(*((volatile unsigned char *)y) = (x))
 
 #endif