diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2000-08-08 19:25:53 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2000-08-08 19:25:53 +0000 |
| commit | 57445428488a2862840c4d7c96d7746c11031aaf (patch) | |
| tree | 60b88b3a21896a33ee4dccc727d88b745a9ff731 /include/asm-arm | |
| parent | 2e837819b1563679b55363d469239fdf4f17fbbb (diff) | |
Merge with Linu 2.4.0-test6-pre6.
Diffstat (limited to 'include/asm-arm')
| -rw-r--r-- | include/asm-arm/proc-armo/cache.h | 3 | ||||
| -rw-r--r-- | include/asm-arm/proc-armv/cache.h | 7 |
2 files changed, 7 insertions, 3 deletions
diff --git a/include/asm-arm/proc-armo/cache.h b/include/asm-arm/proc-armo/cache.h index 5459eca07..75250fb3b 100644 --- a/include/asm-arm/proc-armo/cache.h +++ b/include/asm-arm/proc-armo/cache.h @@ -6,6 +6,7 @@ #define flush_cache_range(mm,start,end) do { } while (0) #define flush_cache_page(vma,vmaddr) do { } while (0) #define flush_page_to_ram(page) do { } while (0) +#define flush_dcache_page(page) do { } while (0) #define flush_icache_page(vma,page) do { } while (0) #define flush_icache_range(start,end) do { } while (0) @@ -58,7 +59,7 @@ memc_update_addr(struct mm_struct *mm, pte_t pte, unsigned long vaddr) extern __inline__ void memc_clear(struct mm_struct *mm, struct page *page) { - cpu_memc_update_entry(mm->pgd, page_address(page), 0); + cpu_memc_update_entry(mm->pgd, (unsigned long) page_address(page), 0); if (mm == current->active_mm) processor._set_pgd(mm->pgd); diff --git a/include/asm-arm/proc-armv/cache.h b/include/asm-arm/proc-armv/cache.h index b6e45ebc4..dbdc10f6b 100644 --- a/include/asm-arm/proc-armv/cache.h +++ b/include/asm-arm/proc-armv/cache.h @@ -47,7 +47,7 @@ #define flush_icache_page(vma,pg) \ do { \ if ((vma)->vm_flags & PROT_EXEC) \ - cpu_flush_icache_page(page_address(pg)); \ + cpu_flush_icache_page((unsigned long) page_address(pg)); \ } while (0) /* @@ -64,9 +64,12 @@ */ static __inline__ void flush_page_to_ram(struct page *page) { - cpu_flush_ram_page(page_address(page)); + cpu_flush_ram_page((unsigned long) page_address(page)); } +/* You guys might need to do something here. -DaveM */ +#define flush_dcache_page(page) do { } while (0) + /* * TLB flushing: * |