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authorRalf Baechle <ralf@linux-mips.org>2000-06-25 01:20:01 +0000
committerRalf Baechle <ralf@linux-mips.org>2000-06-25 01:20:01 +0000
commit3797ba0b62debb71af4606910acacc9896a9ae3b (patch)
tree414eea76253c7871bfdf3bd9d1817771eb40917c /include/asm-i386
parent2b6c0c580795a4404f72d2a794214dd9e080709d (diff)
Merge with Linux 2.4.0-test2.
Diffstat (limited to 'include/asm-i386')
-rw-r--r--include/asm-i386/bugs.h19
-rw-r--r--include/asm-i386/elf.h1
-rw-r--r--include/asm-i386/i387.h85
-rw-r--r--include/asm-i386/io_apic.h12
-rw-r--r--include/asm-i386/pci.h1
-rw-r--r--include/asm-i386/processor.h107
-rw-r--r--include/asm-i386/ptrace.h4
-rw-r--r--include/asm-i386/sigcontext.h2
-rw-r--r--include/asm-i386/user.h31
9 files changed, 140 insertions, 122 deletions
diff --git a/include/asm-i386/bugs.h b/include/asm-i386/bugs.h
index 80ba0d2e4..23460fcb6 100644
--- a/include/asm-i386/bugs.h
+++ b/include/asm-i386/bugs.h
@@ -22,6 +22,7 @@
#include <linux/config.h>
#include <asm/processor.h>
+#include <asm/i387.h>
#include <asm/msr.h>
static int __init no_halt(char *s)
@@ -49,7 +50,7 @@ static int __init no_387(char *s)
__setup("no387", no_387);
-static char fpu_error __initdata = 0;
+static char __initdata fpu_error = 0;
static void __init copro_timeout(void)
{
@@ -62,12 +63,12 @@ static void __init copro_timeout(void)
outb_p(0,0xf0);
}
-static double x __initdata = 4195835.0;
-static double y __initdata = 3145727.0;
+static double __initdata x = 4195835.0;
+static double __initdata y = 3145727.0;
#ifdef CONFIG_X86_XMM
-static float zero[4] __initdata = { 0.0, 0.0, 0.0, 0.0 };
-static float one[4] __initdata = { 1.0, 1.0, 1.0, 1.0 };
+static float __initdata zero[4] = { 0.0, 0.0, 0.0, 0.0 };
+static float __initdata one[4] = { 1.0, 1.0, 1.0, 1.0 };
#endif
static void __init check_fpu(void)
@@ -148,11 +149,11 @@ static void __init check_fpu(void)
else
printk("Hmm, FPU using exception 16 error reporting with FDIV bug.\n");
-#ifdef CONFIG_X86_FXSR
+#if defined(CONFIG_X86_FXSR) || defined(CONFIG_X86_RUNTIME_FXSR)
/*
* Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
*/
- if (offsetof(struct task_struct, thread.i387.hard.fxsr_space[0]) & 15)
+ if (offsetof(struct task_struct, thread.i387.fxsave) & 15)
panic("Kernel compiled for PII/PIII+ with FXSR, data not 16-byte aligned!");
if (cpu_has_fxsr) {
@@ -168,14 +169,14 @@ static void __init check_fpu(void)
printk("done.\n");
/* Check if exception 19 works okay. */
- set_fpu_mxcsr(XMM_UNMASKED_MXCSR);
+ load_mxcsr(0x0000);
printk(KERN_INFO "Checking SIMD FPU exceptions... ");
__asm__("movups %0,%%xmm0\n\t"
"movups %1,%%xmm1\n\t"
"divps %%xmm0,%%xmm1\n\t"
: : "m" (*&zero), "m" (*&one));
printk("OK, SIMD FPU using exception 19 error reporting.\n");
- set_fpu_mxcsr(XMM_DEFAULT_MXCSR);
+ load_mxcsr(0x1f80);
}
#endif
}
diff --git a/include/asm-i386/elf.h b/include/asm-i386/elf.h
index 0083b3f20..5bf5ec1c8 100644
--- a/include/asm-i386/elf.h
+++ b/include/asm-i386/elf.h
@@ -14,6 +14,7 @@ typedef unsigned long elf_greg_t;
typedef elf_greg_t elf_gregset_t[ELF_NGREG];
typedef struct user_i387_struct elf_fpregset_t;
+typedef struct user_fxsr_struct elf_fpxregset_t;
/*
* This is used to ensure we don't load something for the wrong architecture.
diff --git a/include/asm-i386/i387.h b/include/asm-i386/i387.h
new file mode 100644
index 000000000..ec7650841
--- /dev/null
+++ b/include/asm-i386/i387.h
@@ -0,0 +1,85 @@
+/*
+ * include/asm-i386/i387.h
+ *
+ * Copyright (C) 1994 Linus Torvalds
+ *
+ * Pentium III FXSR, SSE support
+ * General FPU state handling cleanups
+ * Gareth Hughes <gareth@valinux.com>, May 2000
+ */
+
+#ifndef __ASM_I386_I387_H
+#define __ASM_I386_I387_H
+
+#include <linux/sched.h>
+#include <asm/processor.h>
+#include <asm/sigcontext.h>
+#include <asm/user.h>
+
+/*
+ * FPU lazy state save handling...
+ */
+extern void save_fpu( struct task_struct *tsk );
+extern void save_init_fpu( struct task_struct *tsk );
+extern void restore_fpu( struct task_struct *tsk );
+
+#define unlazy_fpu( tsk ) do { \
+ if ( tsk->flags & PF_USEDFPU ) \
+ save_fpu( tsk ); \
+} while (0)
+
+#define clear_fpu( tsk ) do { \
+ if ( tsk->flags & PF_USEDFPU ) { \
+ tsk->flags &= ~PF_USEDFPU; \
+ stts(); \
+ } \
+} while (0)
+
+/*
+ * FPU state interaction...
+ */
+extern unsigned short get_fpu_cwd( struct task_struct *tsk );
+extern unsigned short get_fpu_swd( struct task_struct *tsk );
+extern unsigned short get_fpu_twd( struct task_struct *tsk );
+extern unsigned short get_fpu_mxcsr( struct task_struct *tsk );
+
+extern void set_fpu_cwd( struct task_struct *tsk, unsigned short cwd );
+extern void set_fpu_swd( struct task_struct *tsk, unsigned short swd );
+extern void set_fpu_twd( struct task_struct *tsk, unsigned short twd );
+extern void set_fpu_mxcsr( struct task_struct *tsk, unsigned short mxcsr );
+
+#define load_mxcsr( val ) do { \
+ if ( cpu_has_xmm ) { \
+ unsigned long __mxcsr = ((unsigned long)(val) & 0xffff); \
+ asm volatile( "ldmxcsr %0" : : "m" (__mxcsr) ); \
+ } \
+} while (0)
+
+/*
+ * Signal frame handlers...
+ */
+extern int save_i387( struct _fpstate *buf );
+extern int restore_i387( struct _fpstate *buf );
+
+/*
+ * ptrace request handers...
+ */
+extern int get_fpregs( struct user_i387_struct *buf,
+ struct task_struct *tsk );
+extern int set_fpregs( struct task_struct *tsk,
+ struct user_i387_struct *buf );
+
+extern int get_fpxregs( struct user_fxsr_struct *buf,
+ struct task_struct *tsk );
+extern int set_fpxregs( struct task_struct *tsk,
+ struct user_fxsr_struct *buf );
+
+/*
+ * FPU state for core dumps...
+ */
+extern int dump_fpu( struct pt_regs *regs,
+ struct user_i387_struct *fpu );
+extern int dump_extended_fpu( struct pt_regs *regs,
+ struct user_fxsr_struct *fpu );
+
+#endif /* __ASM_I386_I387_H */
diff --git a/include/asm-i386/io_apic.h b/include/asm-i386/io_apic.h
index 2068753df..9ac8df6ec 100644
--- a/include/asm-i386/io_apic.h
+++ b/include/asm-i386/io_apic.h
@@ -1,6 +1,7 @@
#ifndef __ASM_IO_APIC_H
#define __ASM_IO_APIC_H
+#include <linux/config.h>
#include <asm/types.h>
/*
@@ -9,6 +10,8 @@
* Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
*/
+#ifdef CONFIG_X86_IO_APIC
+
#define IO_APIC_BASE(idx) \
((volatile int *)__fix_to_virt(FIX_IO_APIC_BASE_0 + idx))
@@ -130,5 +133,14 @@ extern int nmi_watchdog;
extern int skip_ioapic_setup;
extern void IO_APIC_init_uniprocessor (void);
+/*
+ * If we use the IO-APIC for IRQ routing, disable automatic
+ * assignment of PCI IRQ's.
+ */
+#define io_apic_assign_pci_irqs (mp_irq_entries != 0)
+
+#else /* !CONFIG_X86_IO_APIC */
+#define io_apic_assign_pci_irqs 0
#endif
+#endif
diff --git a/include/asm-i386/pci.h b/include/asm-i386/pci.h
index d6d0311b7..074957886 100644
--- a/include/asm-i386/pci.h
+++ b/include/asm-i386/pci.h
@@ -13,6 +13,7 @@
#define PCIBIOS_MIN_MEM 0x10000000
void pcibios_set_master(struct pci_dev *dev);
+void pcibios_penalize_isa_irq(int irq);
/* Dynamic DMA mapping stuff.
* i386 has everything mapped statically.
diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h
index 76fd66fd8..80aeb3201 100644
--- a/include/asm-i386/processor.h
+++ b/include/asm-i386/processor.h
@@ -2,9 +2,6 @@
* include/asm-i386/processor.h
*
* Copyright (C) 1994 Linus Torvalds
- *
- * Pentium III FXSR, SSE support
- * Gareth Hughes <gareth@valinux.com>, May 2000
*/
#ifndef __ASM_I386_PROCESSOR_H
@@ -86,7 +83,7 @@ struct cpuinfo_x86 {
#define X86_FEATURE_PGE 0x00002000 /* Page Global Enable */
#define X86_FEATURE_MCA 0x00004000 /* Machine Check Architecture */
#define X86_FEATURE_CMOV 0x00008000 /* CMOV instruction (FCMOVCC and FCOMI too if FPU present) */
-#define X86_FEATURE_PAT 0x00010000 /* Page Attribute Table */
+#define X86_FEATURE_PAT 0x00010000 /* Page Attribute Table */
#define X86_FEATURE_PSE36 0x00020000 /* 36-bit PSEs */
#define X86_FEATURE_18 0x00040000
#define X86_FEATURE_19 0x00080000
@@ -95,7 +92,7 @@ struct cpuinfo_x86 {
#define X86_FEATURE_22 0x00400000
#define X86_FEATURE_MMX 0x00800000 /* Multimedia Extensions */
#define X86_FEATURE_FXSR 0x01000000 /* FXSAVE and FXRSTOR instructions (fast save and restore of FPU context), and CR4.OSFXSR (OS uses these instructions) available */
-#define X86_FEATURE_XMM 0x02000000 /* Streaming SIMD Extensions */
+#define X86_FEATURE_XMM 0x02000000 /* Streaming SIMD Extensions */
#define X86_FEATURE_26 0x04000000
#define X86_FEATURE_27 0x08000000
#define X86_FEATURE_28 0x10000000
@@ -147,7 +144,8 @@ extern inline void cpuid(int op, int *eax, int *ebx, int *ecx, int *edx)
"=b" (*ebx),
"=c" (*ecx),
"=d" (*edx)
- : "a" (op));
+ : "a" (op)
+ : "cc");
}
@@ -250,9 +248,7 @@ extern unsigned int mca_pentium_flag;
#define IO_BITMAP_OFFSET offsetof(struct tss_struct,io_bitmap)
#define INVALID_IO_BITMAP_OFFSET 0x8000
-#ifndef CONFIG_X86_FXSR
-
-struct i387_hard_struct {
+struct i387_fsave_struct {
long cwd;
long swd;
long twd;
@@ -264,22 +260,15 @@ struct i387_hard_struct {
long status; /* software status information */
};
-#else
-
-/* It doesn't matter if the CPU writes only part of this struct; it gets
- * copied by do_fork, so the unimplemented area never changes from what
- * init_task.i387 is initialized to (all zeroes). */
-
-struct i387_hard_struct {
- long cwd;
- long swd;
- long twd;
+struct i387_fxsave_struct {
+ unsigned short cwd;
+ unsigned short swd;
+ unsigned short twd;
+ unsigned short fop;
long fip;
long fcs;
long foo;
long fos;
- long status; /* software status information */
- long fxsr_space[6]; /* FXSR FPU environment must not be used */
long mxcsr;
long reserved;
long st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
@@ -287,10 +276,6 @@ struct i387_hard_struct {
long padding[56];
} __attribute__ ((aligned (16)));
-#define X86_FXSR_MAGIC 0x0000
-#define X86_FXSR_SIZE 512
-#endif
-
struct i387_soft_struct {
long cwd;
long swd;
@@ -306,7 +291,8 @@ struct i387_soft_struct {
};
union i387_union {
- struct i387_hard_struct hard;
+ struct i387_fsave_struct fsave;
+ struct i387_fxsave_struct fxsave;
struct i387_soft_struct soft;
};
@@ -423,75 +409,6 @@ extern void release_segments(struct mm_struct * mm);
extern void forget_segments(void);
/*
- * FPU lazy state save handling..
- */
-#ifndef CONFIG_X86_FXSR
-
-#define save_fpu(tsk) do { \
- asm volatile("fnsave %0 ; fwait" \
- : "=m" (tsk->thread.i387.hard)); \
- tsk->flags &= ~PF_USEDFPU; \
- stts(); \
-} while (0)
-
-#define save_init_fpu(tsk) save_fpu(tsk)
-
-#define restore_fpu(tsk) do { \
- asm volatile("frstor %0" \
- : : "m" (tsk->thread.i387.hard)); \
-} while (0)
-
-#else /* CONFIG_X86_FXSR */
-
-#define save_fpu(tsk) do { \
- asm volatile("fnstenv %0 ; fxsave %1 ; fwait" \
- : "=m" (tsk->thread.i387.hard), \
- "=m" (tsk->thread.i387.hard.fxsr_space[0])); \
- tsk->flags &= ~PF_USEDFPU; \
- stts(); \
-} while (0)
-
-#define save_init_fpu(tsk) do { \
- asm volatile("fnstenv %0 ; fxsave %1 ; fnclex" \
- : "=m" (tsk->thread.i387.hard), \
- "=m" (tsk->thread.i387.hard.fxsr_space[0])); \
- tsk->flags &= ~PF_USEDFPU; \
- stts(); \
-} while (0)
-
-#define restore_fpu(tsk) do { \
- asm volatile("fxrstor %0 ; fldenv %1" \
- : : "m" (tsk->thread.i387.hard.fxsr_space[0]), \
- "m" (tsk->thread.i387.hard)); \
-} while (0)
-
-#endif /* CONFIG_X86_FXSR */
-
-#define unlazy_fpu(tsk) do { \
- if (tsk->flags & PF_USEDFPU) \
- save_fpu(tsk); \
-} while (0)
-
-#define clear_fpu(tsk) do { \
- if (tsk->flags & PF_USEDFPU) { \
- tsk->flags &= ~PF_USEDFPU; \
- stts(); \
- } \
-} while (0)
-
-#ifdef CONFIG_X86_XMM
-#define XMM_DEFAULT_MXCSR 0x1f80
-#define XMM_UNMASKED_MXCSR 0x0000
-
-#define set_fpu_mxcsr(val) do { \
- if (cpu_has_xmm) { \
- unsigned long __mxcsr = ((unsigned long)(val) & 0xffff); \
- asm volatile("ldmxcsr %0" : : "m" (__mxcsr)); \
- } \
-} while (0)
-#endif
-
-/*
* Return saved PC of a blocked thread.
*/
extern inline unsigned long thread_saved_pc(struct thread_struct *t)
diff --git a/include/asm-i386/ptrace.h b/include/asm-i386/ptrace.h
index 05189f6f3..6a52f4e76 100644
--- a/include/asm-i386/ptrace.h
+++ b/include/asm-i386/ptrace.h
@@ -46,8 +46,8 @@ struct pt_regs {
#define PTRACE_SETREGS 13
#define PTRACE_GETFPREGS 14
#define PTRACE_SETFPREGS 15
-#define PTRACE_GETXFPREGS 25
-#define PTRACE_SETXFPREGS 26
+#define PTRACE_GETFPXREGS 18
+#define PTRACE_SETFPXREGS 19
#ifdef __KERNEL__
#define user_mode(regs) ((VM_MASK & (regs)->eflags) || (3 & (regs)->xcs))
diff --git a/include/asm-i386/sigcontext.h b/include/asm-i386/sigcontext.h
index 77ef66680..b51145936 100644
--- a/include/asm-i386/sigcontext.h
+++ b/include/asm-i386/sigcontext.h
@@ -52,6 +52,8 @@ struct _fpstate {
unsigned long padding[56];
};
+#define X86_FXSR_MAGIC 0x0000
+
struct sigcontext {
unsigned short gs, __gsh;
unsigned short fs, __fsh;
diff --git a/include/asm-i386/user.h b/include/asm-i386/user.h
index e034118f3..dcd555159 100644
--- a/include/asm-i386/user.h
+++ b/include/asm-i386/user.h
@@ -34,12 +34,12 @@
* Pentium III FXSR, SSE support
* Gareth Hughes <gareth@valinux.com>, May 2000
*
- * Provide support for the GDB 5.0 PTRACE_*XFPREGS requests for interacting
- * with the FXSR-format floating point environment. Floating point data
- * can be accessed in the regular FSAVE format in the usual manner, and the
- * XMM register/control data can be accessed via the new ptrace requests.
- * Note that the floating point environment contained in the FXSR format
- * is ignored and any changes to these fields will be lost.
+ * Provide support for the GDB 5.0+ PTRACE_{GET|SET}FPXREGS requests for
+ * interacting with the FXSR-format floating point environment. Floating
+ * point data can be accessed in the regular format in the usual manner,
+ * and both the standard and SIMD floating point data can be accessed via
+ * the new ptrace requests. In either case, changes to the FPU environment
+ * will be reflected in the task's state as expected.
*/
struct user_i387_struct {
@@ -48,26 +48,25 @@ struct user_i387_struct {
long twd;
long fip;
long fcs;
- long foo;
- long fos;
+ long fdp;
+ long fds;
long st_space[20]; /* 8*10 bytes for each FP-reg = 80 bytes */
};
-struct user_xfpregs_struct {
- long cwd;
- long swd;
- long twd;
+struct user_fxsr_struct {
+ unsigned short cwd;
+ unsigned short swd;
+ unsigned short twd;
+ unsigned short fop;
long fip;
long fcs;
long foo;
long fos;
- long __reserved_00;
- long fxsr_space[6]; /* FXSR FPU environment must not be used */
long mxcsr;
- long __reserved_01;
+ long reserved;
long st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
long xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
- long __reserved_02[56];
+ long padding[56];
};
/*