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authorAndrew R. Baker <andrewb@uab.edu>1999-08-11 20:26:49 +0000
committerAndrew R. Baker <andrewb@uab.edu>1999-08-11 20:26:49 +0000
commita165c5e53ce770655b2d39d3721e25ab2d7f5440 (patch)
tree5b8b675d493b532e7cabb94341972a5d3cb0949c /include/asm-mips/sgint23.h
parentf67e4ffc79905482c3b9b8c8dd65197bac7eb508 (diff)
Updates in preperation of EISA support.
Diffstat (limited to 'include/asm-mips/sgint23.h')
-rw-r--r--include/asm-mips/sgint23.h15
1 files changed, 14 insertions, 1 deletions
diff --git a/include/asm-mips/sgint23.h b/include/asm-mips/sgint23.h
index 31e5dd148..d9a093861 100644
--- a/include/asm-mips/sgint23.h
+++ b/include/asm-mips/sgint23.h
@@ -1,4 +1,4 @@
-/* $Id: sgint23.h,v 1.2 1998/03/11 15:21:45 ralf Exp $
+/* $Id: sgint23.h,v 1.3 1999/05/07 22:35:37 ulfc Exp $
* sgint23.h: Defines for the SGI INT2 and INT3 chipsets.
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
@@ -20,6 +20,19 @@
#define SGINT_HPCDMA 41 /* INDY has 11 HPCDMA irq _sources_ */
#define SGINT_END 52 /* End of 'spaces' */
+/* Individual interrupt definitions for the INDY and Indigo2
+ */
+
+#define SGI_WD93_0_IRQ SGINT_LOCAL0 + 1 /* 1st onboard WD93 */
+#define SGI_WD93_1_IRQ SGINT_LOCAL0 + 2 /* 2nd onboard WD93 */
+#define SGI_ENET_IRQ SGINT_LOCAL0 + 3 /* onboard ethernet */
+
+#define SGI_PANEL_IRQ SGINT_LOCAL1 + 1 /* front panel */
+
+#define SGI_EISA_IRQ SGINT_LOCAL2 + 3 /* EISA interrupts */
+#define SGI_KEYBOARD_IRQ SGINT_LOCAL2 + 4 /* keyboard */
+#define SGI_SERIAL_IRQ SGINT_LOCAL2 + 5 /* onboard serial */
+
/* INT2 occupies HPC PBUS slot 4, INT3 uses slot 6. */
#define SGI_INT2_BASE 0x1fbd9000 /* physical */
#define SGI_INT3_BASE 0x1fbd9880 /* physical */