Merge with Linux 2.3.21.

38 files changed, 1672 insertions, 777 deletions

diff --git a/include/asm-mips64/addrspace.h b/include/asm-mips64/addrspace.h
index dacd948da..d8d5a90a5 100644
--- a/include/asm-mips64/addrspace.h
+++ b/include/asm-mips64/addrspace.h
@@ -1,10 +1,11 @@
-/* $Id$
+/* $Id: addrspace.h,v 1.2 1999/10/19 20:51:53 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1996 by Ralf Baechle
+ * Copyright (C) 1996, 1999 by Ralf Baechle
+ * Copyright (C) 1999 by Silicon Graphics, Inc.
  */
 #ifndef _ASM_ADDRSPACE_H
 #define _ASM_ADDRSPACE_H
@@ -12,11 +13,11 @@
 /*
  * Memory segments (32bit kernel mode addresses)
  */
-#define KUSEG                   0x00000000
-#define KSEG0                   0x80000000
-#define KSEG1                   0xa0000000
-#define KSEG2                   0xc0000000
-#define KSEG3                   0xe0000000
+#define KUSEG                   0x0000000000000000
+#define KSEG0                   0xffffffff80000000
+#define KSEG1                   0xffffffffa0000000
+#define KSEG2                   0xffffffffc0000000
+#define KSEG3                   0xffffffffe0000000
 
 /*
  * Returns the kernel segment base of a given address
diff --git a/include/asm-mips64/arc/types.h b/include/asm-mips64/arc/types.h
index b1d72e10e..685580411 100644
--- a/include/asm-mips64/arc/types.h
+++ b/include/asm-mips64/arc/types.h
@@ -22,6 +22,18 @@ typedef unsigned short	USHORT;
 typedef unsigned long	ULONG __attribute__ ((__mode__ (__SI__)));
 typedef void		VOID;
 
+/* The pointer types.  Note that we're using a 64-bit compiler but all
+   pointer in the ARC structures are only 32-bit, so we need some disgusting
+   workarounds.  Keep your vomit bag handy.  */
+typedef LONG		_PCHAR;
+typedef LONG		_PSHORT;
+typedef LONG		_PLARGE_INTEGER;
+typedef	LONG		_PLONG;
+typedef LONG		_PUCHAR;
+typedef LONG		_PUSHORT;
+typedef LONG		_PULONG;
+typedef LONG		_PVOID;
+
 #endif /* CONFIG_ARC32 */
 
 #ifdef CONFIG_ARC64
@@ -35,6 +47,26 @@ typedef unsigned short	USHORT;
 typedef unsigned long	ULONG __attribute__ (__mode__ (__DI__));
 typedef void		VOID;
 
+/* The pointer types.  We're 64-bit and the firmware is also 64-bit, so
+   live is sane ...  */
+typedef CHAR		*_PCHAR;
+typedef SHORT		*_PSHORT;
+typedef LARGE_INTEGER	*_PLARGE_INTEGER;
+typedef	LONG		*_PLONG;
+typedef UCHAR		*_PUCHAR;
+typedef USHORT		*_PUSHORT;
+typedef ULONG		*_PULONG;
+typedef VOID		*_PVOID;
+
 #endif /* CONFIG_ARC64  */
 
+typedef CHAR		*PCHAR;
+typedef SHORT		*PSHORT;
+typedef LARGE_INTEGER	*PLARGE_INTEGER;
+typedef	LONG		*PLONG;
+typedef UCHAR		*PUCHAR;
+typedef USHORT		*PUSHORT;
+typedef ULONG		*PULONG;
+typedef VOID		*PVOID;
+
 #endif /* _ASM_ARC_TYPES_H */
diff --git a/include/asm-mips64/asm.h b/include/asm-mips64/asm.h
index c25e118a8..fe616eb08 100644
--- a/include/asm-mips64/asm.h
+++ b/include/asm-mips64/asm.h
@@ -1,4 +1,4 @@
-/* $Id$
+/* $Id: asm.h,v 1.1 1999/08/18 23:37:50 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -96,6 +96,17 @@ symbol		=	value
 		.set	pop;				\
 		TEXT(string)
 
+/*
+ * Print formated string
+ */
+#define PROM_PRINT(string)                              \
+		.set	push;				\
+		.set	reorder;                        \
+		la	a0,8f;                          \
+		jal	prom_printf;                    \
+		.set	pop;				\
+		TEXT(string)
+
 #define	TEXT(msg)                                       \
 		.data;                                  \
 8:		.asciiz	msg;                            \
diff --git a/include/asm-mips64/asmmacro.h b/include/asm-mips64/asmmacro.h
new file mode 100644
index 000000000..240bde270
--- /dev/null
+++ b/include/asm-mips64/asmmacro.h
@@ -0,0 +1,193 @@
+/* $Id: asmmacro.h,v 1.2 1999/10/19 20:51:53 ralf Exp $
+ *
+ * asmmacro.h: Assembler macros to make things easier to read.
+ *
+ * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
+ * Copyright (C) 1998, 1999 Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_ASMMACRO_H
+#define _ASM_ASMMACRO_H
+
+#include <asm/offset.h>
+
+	.macro	fpu_save_16even thread tmp
+	cfc1	\tmp, fcr31
+	sdc1	$f2,  (THREAD_FPU + 0x010)(\thread)
+	sdc1	$f4,  (THREAD_FPU + 0x020)(\thread)
+	sdc1	$f6,  (THREAD_FPU + 0x030)(\thread)
+	sdc1	$f8,  (THREAD_FPU + 0x040)(\thread)
+	sdc1	$f10, (THREAD_FPU + 0x050)(\thread)
+	sdc1	$f12, (THREAD_FPU + 0x060)(\thread)
+	sdc1	$f14, (THREAD_FPU + 0x070)(\thread)
+	sdc1	$f16, (THREAD_FPU + 0x080)(\thread)
+	sdc1	$f18, (THREAD_FPU + 0x090)(\thread)
+	sdc1	$f20, (THREAD_FPU + 0x0a0)(\thread)
+	sdc1	$f22, (THREAD_FPU + 0x0b0)(\thread)
+	sdc1	$f24, (THREAD_FPU + 0x0c0)(\thread)
+	sdc1	$f26, (THREAD_FPU + 0x0d0)(\thread)
+	sdc1	$f28, (THREAD_FPU + 0x0e0)(\thread)
+	sdc1	$f30, (THREAD_FPU + 0x0f0)(\thread)
+	sw	\tmp, (THREAD_FPU + 0x100)(\thread)
+	.endm
+
+	.macro	fpu_save_16odd thread
+	sdc1	$f1,  (THREAD_FPU + 0x08)(\thread)
+	sdc1	$f3,  (THREAD_FPU + 0x18)(\thread)
+	sdc1	$f5,  (THREAD_FPU + 0x28)(\thread)
+	sdc1	$f7,  (THREAD_FPU + 0x38)(\thread)
+	sdc1	$f9,  (THREAD_FPU + 0x48)(\thread)
+	sdc1	$f11, (THREAD_FPU + 0x58)(\thread)
+	sdc1	$f13, (THREAD_FPU + 0x68)(\thread)
+	sdc1	$f15, (THREAD_FPU + 0x78)(\thread)
+	sdc1	$f17, (THREAD_FPU + 0x88)(\thread)
+	sdc1	$f19, (THREAD_FPU + 0x98)(\thread)
+	sdc1	$f21, (THREAD_FPU + 0xa8)(\thread)
+	sdc1	$f23, (THREAD_FPU + 0xb8)(\thread)
+	sdc1	$f25, (THREAD_FPU + 0xc8)(\thread)
+	sdc1	$f27, (THREAD_FPU + 0xd8)(\thread)
+	sdc1	$f29, (THREAD_FPU + 0xe8)(\thread)
+	sdc1	$f31, (THREAD_FPU + 0xf8)(\thread)
+	.endm
+
+	.macro	fpu_save thread tmp
+	cfc1	\tmp,  fcr31
+	swc1	$f0,  (THREAD_FPU + 0x000)(\thread)
+	swc1	$f1,  (THREAD_FPU + 0x008)(\thread)
+	swc1	$f2,  (THREAD_FPU + 0x010)(\thread)
+	swc1	$f3,  (THREAD_FPU + 0x018)(\thread)
+	swc1	$f4,  (THREAD_FPU + 0x020)(\thread)
+	swc1	$f5,  (THREAD_FPU + 0x028)(\thread)
+	swc1	$f6,  (THREAD_FPU + 0x030)(\thread)
+	swc1	$f7,  (THREAD_FPU + 0x038)(\thread)
+	swc1	$f8,  (THREAD_FPU + 0x040)(\thread)
+	swc1	$f9,  (THREAD_FPU + 0x048)(\thread)
+	swc1	$f10, (THREAD_FPU + 0x050)(\thread)
+	swc1	$f11, (THREAD_FPU + 0x058)(\thread)
+	swc1	$f12, (THREAD_FPU + 0x060)(\thread)
+	swc1	$f13, (THREAD_FPU + 0x068)(\thread)
+	swc1	$f14, (THREAD_FPU + 0x070)(\thread)
+	swc1	$f15, (THREAD_FPU + 0x078)(\thread)
+	swc1	$f16, (THREAD_FPU + 0x080)(\thread)
+	swc1	$f17, (THREAD_FPU + 0x088)(\thread)
+	swc1	$f18, (THREAD_FPU + 0x090)(\thread)
+	swc1	$f19, (THREAD_FPU + 0x098)(\thread)
+	swc1	$f20, (THREAD_FPU + 0x0a0)(\thread)
+	swc1	$f21, (THREAD_FPU + 0x0a8)(\thread)
+	swc1	$f22, (THREAD_FPU + 0x0b0)(\thread)
+	swc1	$f23, (THREAD_FPU + 0x0b8)(\thread)
+	swc1	$f24, (THREAD_FPU + 0x0c0)(\thread)
+	swc1	$f25, (THREAD_FPU + 0x0c8)(\thread)
+	swc1	$f26, (THREAD_FPU + 0x0d0)(\thread)
+	swc1	$f27, (THREAD_FPU + 0x0d8)(\thread)
+	swc1	$f28, (THREAD_FPU + 0x0e0)(\thread)
+	swc1	$f29, (THREAD_FPU + 0x0e8)(\thread)
+	swc1	$f30, (THREAD_FPU + 0x0f0)(\thread)
+	swc1	$f31, (THREAD_FPU + 0x0f8)(\thread)
+	sw	\tmp, (THREAD_FPU + 0x100)(\thread)
+	.endm
+
+	.macro	fpu_restore_16even thread tmp
+	lw	\tmp, (THREAD_FPU + 0x100)(\thread)
+	ldc1	$f2,  (THREAD_FPU + 0x010)(\thread)
+	ldc1	$f4,  (THREAD_FPU + 0x020)(\thread)
+	ldc1	$f6,  (THREAD_FPU + 0x030)(\thread)
+	ldc1	$f8,  (THREAD_FPU + 0x040)(\thread)
+	ldc1	$f10, (THREAD_FPU + 0x050)(\thread)
+	ldc1	$f12, (THREAD_FPU + 0x060)(\thread)
+	ldc1	$f14, (THREAD_FPU + 0x070)(\thread)
+	ldc1	$f16, (THREAD_FPU + 0x080)(\thread)
+	ldc1	$f18, (THREAD_FPU + 0x090)(\thread)
+	ldc1	$f20, (THREAD_FPU + 0x0a0)(\thread)
+	ldc1	$f22, (THREAD_FPU + 0x0b0)(\thread)
+	ldc1	$f24, (THREAD_FPU + 0x0c0)(\thread)
+	ldc1	$f26, (THREAD_FPU + 0x0d0)(\thread)
+	ldc1	$f28, (THREAD_FPU + 0x0e0)(\thread)
+	ldc1	$f30, (THREAD_FPU + 0x0f0)(\thread)
+	ctc1	\tmp,  fcr31
+	.endm
+
+	.macro	fpu_restore_16odd thread
+	ldc1	$f1,  (THREAD_FPU + 0x08)(\thread)
+	ldc1	$f3,  (THREAD_FPU + 0x18)(\thread)
+	ldc1	$f5,  (THREAD_FPU + 0x28)(\thread)
+	ldc1	$f7,  (THREAD_FPU + 0x38)(\thread)
+	ldc1	$f9,  (THREAD_FPU + 0x48)(\thread)
+	ldc1	$f11, (THREAD_FPU + 0x58)(\thread)
+	ldc1	$f13, (THREAD_FPU + 0x68)(\thread)
+	ldc1	$f15, (THREAD_FPU + 0x78)(\thread)
+	ldc1	$f17, (THREAD_FPU + 0x88)(\thread)
+	ldc1	$f19, (THREAD_FPU + 0x98)(\thread)
+	ldc1	$f21, (THREAD_FPU + 0xa8)(\thread)
+	ldc1	$f23, (THREAD_FPU + 0xb8)(\thread)
+	ldc1	$f25, (THREAD_FPU + 0xc8)(\thread)
+	ldc1	$f27, (THREAD_FPU + 0xd8)(\thread)
+	ldc1	$f29, (THREAD_FPU + 0xe8)(\thread)
+	ldc1	$f31, (THREAD_FPU + 0xf8)(\thread)
+	.endm
+
+	.macro	fpu_restore thread tmp
+	lw	\tmp, (THREAD_FPU + 0x100)(\thread)
+	lwc1	$f0,  (THREAD_FPU + 0x000)(\thread)
+	lwc1	$f1,  (THREAD_FPU + 0x008)(\thread)
+	lwc1	$f2,  (THREAD_FPU + 0x010)(\thread)
+	lwc1	$f3,  (THREAD_FPU + 0x018)(\thread)
+	lwc1	$f4,  (THREAD_FPU + 0x020)(\thread)
+	lwc1	$f5,  (THREAD_FPU + 0x028)(\thread)
+	lwc1	$f6,  (THREAD_FPU + 0x030)(\thread)
+	lwc1	$f7,  (THREAD_FPU + 0x038)(\thread)
+	lwc1	$f8,  (THREAD_FPU + 0x040)(\thread)
+	lwc1	$f9,  (THREAD_FPU + 0x048)(\thread)
+	lwc1	$f10, (THREAD_FPU + 0x050)(\thread)
+	lwc1	$f11, (THREAD_FPU + 0x058)(\thread)
+	lwc1	$f12, (THREAD_FPU + 0x060)(\thread)
+	lwc1	$f13, (THREAD_FPU + 0x068)(\thread)
+	lwc1	$f14, (THREAD_FPU + 0x070)(\thread)
+	lwc1	$f15, (THREAD_FPU + 0x078)(\thread)
+	lwc1	$f16, (THREAD_FPU + 0x080)(\thread)
+	lwc1	$f17, (THREAD_FPU + 0x088)(\thread)
+	lwc1	$f18, (THREAD_FPU + 0x090)(\thread)
+	lwc1	$f19, (THREAD_FPU + 0x098)(\thread)
+	lwc1	$f20, (THREAD_FPU + 0x0a0)(\thread)
+	lwc1	$f21, (THREAD_FPU + 0x0a8)(\thread)
+	lwc1	$f22, (THREAD_FPU + 0x0b0)(\thread)
+	lwc1	$f23, (THREAD_FPU + 0x0b8)(\thread)
+	lwc1	$f24, (THREAD_FPU + 0x0c0)(\thread)
+	lwc1	$f25, (THREAD_FPU + 0x0c8)(\thread)
+	lwc1	$f26, (THREAD_FPU + 0x0d0)(\thread)
+	lwc1	$f27, (THREAD_FPU + 0x0d8)(\thread)
+	lwc1	$f28, (THREAD_FPU + 0x0e0)(\thread)
+	lwc1	$f29, (THREAD_FPU + 0x0e8)(\thread)
+	lwc1	$f30, (THREAD_FPU + 0x0f0)(\thread)
+	lwc1	$f31, (THREAD_FPU + 0x0f8)(\thread)
+	ctc1	\tmp,  fcr31
+	.endm
+
+	.macro	cpu_save_nonscratch thread
+	sd	s0, THREAD_REG16(\thread)
+	sd	s1, THREAD_REG17(\thread)
+	sd	s2, THREAD_REG18(\thread)
+	sd	s3, THREAD_REG19(\thread)
+	sd	s4, THREAD_REG20(\thread)
+	sd	s5, THREAD_REG21(\thread)
+	sd	s6, THREAD_REG22(\thread)
+	sd	s7, THREAD_REG23(\thread)
+	sd	sp, THREAD_REG29(\thread)
+	sd	fp, THREAD_REG30(\thread)
+	.endm
+
+	.macro	cpu_restore_nonscratch thread
+	ld	s0, THREAD_REG16(\thread)
+	ld	s1, THREAD_REG17(\thread)
+	ld	s2, THREAD_REG18(\thread)
+	ld	s3, THREAD_REG19(\thread)
+	ld	s4, THREAD_REG20(\thread)
+	ld	s5, THREAD_REG21(\thread)
+	ld	s6, THREAD_REG22(\thread)
+	ld	s7, THREAD_REG23(\thread)
+	ld	sp, THREAD_REG29(\thread)
+	ld	fp, THREAD_REG30(\thread)
+	ld	ra, THREAD_REG31(\thread)
+	.endm
+
+#endif /* !(_ASM_ASMMACRO_H) */
diff --git a/include/asm-mips64/bitops.h b/include/asm-mips64/bitops.h
index e6e675a5c..380adf616 100644
--- a/include/asm-mips64/bitops.h
+++ b/include/asm-mips64/bitops.h
@@ -1,4 +1,4 @@
-/* $Id: bitops.h,v 1.2 1999/08/19 22:56:34 ralf Exp $
+/* $Id: bitops.h,v 1.3 1999/08/20 21:59:08 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -13,95 +13,13 @@
 #include <linux/types.h>
 #include <linux/byteorder/swab.h>		/* sigh ... */
 
-#ifdef __KERNEL__
+#ifndef __KERNEL__
+#error "Don't do this, sucker ..."
+#endif
+
 #include <asm/system.h>
 #include <asm/sgidefs.h>
 #include <asm/mipsregs.h>
-#endif
-
-/*
- * This gets exported to userland, so we need to have a MIPS I versions
- * as well.  Userland always get the non-thread / signal safe variants.
- */
-
-#ifndef __KERNEL__
-
-extern __inline__ void
-set_bit(unsigned long nr, void * addr)
-{
-	int	mask;
-	int	*a = addr;
-
-	a += nr >> 5;
-	mask = 1 << (nr & 0x1f);
-	*a |= mask;
-}
-
-extern __inline__ void
-clear_bit(unsigned long nr, void * addr)
-{
-	int	mask;
-	int	*a = addr;
-
-	a += nr >> 5;
-	mask = 1 << (nr & 0x1f);
-	*a &= ~mask;
-}
-
-extern __inline__ void
-change_bit(unsigned long nr, void * addr)
-{
-	int	mask;
-	int	*a = addr;
-
-	a += nr >> 5;
-	mask = 1 << (nr & 0x1f);
-	*a ^= mask;
-}
-
-extern __inline__ unsigned long
-test_and_set_bit(unsigned long nr, void * addr)
-{
-	int	mask, retval;
-	int	*a = addr;
-
-	a += nr >> 5;
-	mask = 1 << (nr & 0x1f);
-	retval = (mask & *a) != 0;
-	*a |= mask;
-
-	return retval;
-}
-
-extern __inline__ unsigned long
-test_and_clear_bit(unsigned long nr, void * addr)
-{
-	int	mask, retval;
-	int	*a = addr;
-
-	a += nr >> 5;
-	mask = 1 << (nr & 0x1f);
-	retval = (mask & *a) != 0;
-	*a &= ~mask;
-
-	return retval;
-}
-
-extern __inline__ unsigned long
-test_and_change_bit(unsigned long nr, void * addr)
-{
-	int	mask, retval;
-	int	*a = addr;
-
-	a += nr >> 5;
-	mask = 1 << (nr & 0x1f);
-	retval = (mask & *a) != 0;
-	*a ^= mask;
-
-	return retval;
-}
-
-#else /* __KERNEL__ */
 
 /*
  * These functions for MIPS ISA > 1 are interrupt and SMP proof and
@@ -111,73 +29,64 @@ test_and_change_bit(unsigned long nr, void * addr)
 extern __inline__ void
 set_bit(unsigned long nr, void *addr)
 {
-	unsigned int *m = ((unsigned int *) addr) + (nr >> 5);
+	unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
 	unsigned long temp;
 
 	__asm__ __volatile__(
-		".set\tnoreorder\t\t# set_bit\n"
-		"1:\tll\t%0, %1\n\t"
+		"1:\tlld\t%0, %1\t\t# set_bit\n\t"
 		"or\t%0, %2\n\t"
-		"sc\t%0, %1\n\t"
-		"beqzl\t%0,1b\n\t"
-		" ll\t%0, %1\n\t"
-		".set\treorder"
+		"scd\t%0, %1\n\t"
+		"beqz\t%0, 1b"
 		:"=&r" (temp), "=m" (*m)
-		:"ir" (1UL << (nr & 31)), "m" (*m));
+		:"ir" (1UL << (nr & 0x3f)), "m" (*m));
 }
 
 extern __inline__ void
 clear_bit(unsigned long nr, void *addr)
 {
-	unsigned int *m = ((unsigned int *) addr) + (nr >> 5);
+	unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
 	unsigned long temp;
 
 	__asm__ __volatile__(
-		".set\tnoreorder\t\t# clear_bit\n"
-		"1:\tll\t%0, %1\n\t"
+		"1:\tlld\t%0, %1\t\t# clear_bit\n\t"
 		"and\t%0, %2\n\t"
-		"sc\t%0, %1\n\t"
-		"beqzl\t%0,1b\n\t"
-		" ll\t%0, %1\n\t"
-		".set\treorder"
+		"scd\t%0, %1\n\t"
+		"beqz\t%0, 1b\n\t"
 		:"=&r" (temp), "=m" (*m)
-		:"ir" (~(1UL << (nr & 31))), "m" (*m));
+		:"ir" (~(1UL << (nr & 0x3f))), "m" (*m));
 }
 
 extern __inline__ void
 change_bit(unsigned long nr, void *addr)
 {
-	unsigned int *m = ((unsigned int *) addr) + (nr >> 5);
+	unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
 	unsigned long temp;
 
 	__asm__ __volatile__(
-		".set\tnoreorder\t\t# change_bit\n"
-		"1:\tll\t%0, %1\n\t"
+		"1:\tlld\t%0, %1\t\t# change_bit\n\t"
 		"xor\t%0, %2\n\t"
-		"sc\t%0, %1\n\t"
-		"beqzl\t%0,1b\n\t"
-		" ll\t%0, %1\n\t"
-		".set\treorder"
+		"scd\t%0, %1\n\t"
+		"beqz\t%0, 1b"
 		:"=&r" (temp), "=m" (*m)
-		:"ir" (1UL << (nr & 31)), "m" (*m));
+		:"ir" (1UL << (nr & 0x3f)), "m" (*m));
 }
 
 extern __inline__ unsigned long
 test_and_set_bit(unsigned long nr, void *addr)
 {
-	unsigned int *m = ((unsigned int *) addr) + (nr >> 5);
+	unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
 	unsigned long temp, res;
 
 	__asm__ __volatile__(
 		".set\tnoreorder\t\t# test_and_set_bit\n"
-		"1:\tll\t%0, %1\n\t"
+		"1:\tlld\t%0, %1\n\t"
 		"or\t%2, %0, %3\n\t"
-		"sc\t%2, %1\n\t"
-		"beqz\t%2,1b\n\t"
+		"scd\t%2, %1\n\t"
+		"beqz\t%2, 1b\n\t"
 		" and\t%2, %0, %3\n\t"
 		".set\treorder"
 		:"=&r" (temp), "=m" (*m), "=&r" (res)
-		:"r" (1UL << (nr & 31)), "m" (*m));
+		:"r" (1UL << (nr & 0x3f)), "m" (*m));
 
 	return res != 0;
 }
@@ -185,20 +94,20 @@ test_and_set_bit(unsigned long nr, void *addr)
 extern __inline__ unsigned long
 test_and_clear_bit(unsigned long nr, void *addr)
 {
-	unsigned int *m = ((unsigned int *) addr) + (nr >> 5);
+	unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
 	unsigned long temp, res;
 
 	__asm__ __volatile__(
 		".set\tnoreorder\t\t# test_and_clear_bit\n"
-		"1:\tll\t%0, %1\n\t"
+		"1:\tlld\t%0, %1\n\t"
 		"or\t%2, %0, %3\n\t"
 		"xor\t%2, %3\n\t"
-		"sc\t%2, %1\n\t"
-		"beqz\t%2,1b\n\t"
+		"scd\t%2, %1\n\t"
+		"beqz\t%2, 1b\n\t"
 		" and\t%2, %0, %3\n\t"
 		".set\treorder"
 		:"=&r" (temp), "=m" (*m), "=&r" (res)
-		:"r" (1UL << (nr & 31)), "m" (*m));
+		:"r" (1UL << (nr & 0x3f)), "m" (*m));
 
 	return res != 0;
 }
@@ -206,29 +115,27 @@ test_and_clear_bit(unsigned long nr, void *addr)
 extern __inline__ unsigned long
 test_and_change_bit(unsigned long nr, void *addr)
 {
-	unsigned int *m = ((unsigned int *) addr) + (nr >> 5);
+	unsigned long *m = ((unsigned long *) addr) + (nr >> 6);
 	unsigned long temp, res;
 
 	__asm__ __volatile__(
 		".set\tnoreorder\t\t# test_and_change_bit\n"
-		"1:\tll\t%0, %1\n\t"
+		"1:\tlld\t%0, %1\n\t"
 		"xor\t%2, %0, %3\n\t"
-		"sc\t%2, %1\n\t"
-		"beqz\t%2,1b\n\t"
+		"scd\t%2, %1\n\t"
+		"beqz\t%2, 1b\n\t"
 		" and\t%2, %0, %3\n\t"
 		".set\treorder"
 		:"=&r" (temp), "=m" (*m), "=&r" (res)
-		:"r" (1UL << (nr & 31)), "m" (*m));
+		:"r" (1UL << (nr & 0x3f)), "m" (*m));
 
 	return res != 0;
 }
 
-#endif /* __KERNEL__ */
-
 extern __inline__ unsigned long
 test_bit(int nr, volatile void * addr)
 {
-	return 1UL & (((const int *) addr)[nr >> 5] >> (nr & 31));
+	return 1UL & (((const long *) addr)[nr >> 6] >> (nr & 0x3f));
 }
 
 #ifndef __MIPSEB__
@@ -332,29 +239,20 @@ find_next_zero_bit (void * addr, int size, int offset)
  * ffz = Find First Zero in word. Undefined if no zero exists,
  * so code should check against ~0UL first..
  */
-extern __inline__ unsigned long
-ffz(unsigned long word)
+extern __inline__ unsigned long ffz(unsigned long word)
 {
-	unsigned int	__res;
-	unsigned int	mask = 1;
-
-	__asm__ (
-		".set\tnoreorder\n\t"
-		".set\tnoat\n\t"
-		"move\t%0,$0\n"
-		"1:\tand\t$1,%2,%1\n\t"
-		"beqz\t$1,2f\n\t"
-		"sll\t%1,1\n\t"
-		"bnez\t%1,1b\n\t"
-		"addiu\t%0,1\n\t"
-		".set\tat\n\t"
-		".set\treorder\n"
-		"2:\n\t"
-		: "=&r" (__res), "=r" (mask)
-		: "r" (word), "1" (mask)
-		: "$1");
-
-	return __res;
+	unsigned long k;
+
+	word = ~word;
+	k = 63;
+	if (word & 0x00000000ffffffffUL) { k -= 32; word <<= 32; }
+	if (word & 0x0000ffff00000000UL) { k -= 16; word <<= 16; }
+	if (word & 0x00ff000000000000UL) { k -= 8;  word <<= 8;  }
+	if (word & 0x0f00000000000000UL) { k -= 4;  word <<= 4;  }
+	if (word & 0x3000000000000000UL) { k -= 2;  word <<= 2;  }
+	if (word & 0x4000000000000000UL) { k -= 1; }
+
+	return k;
 }
 
 #ifdef __KERNEL__
@@ -386,32 +284,32 @@ ffz(unsigned long word)
  * on Linus's ALPHA routines, which are pretty portable BTW.
  */
 
-extern __inline__ int
-find_next_zero_bit(void *addr, int size, int offset)
+extern __inline__ unsigned long
+find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
 {
-	unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
-	unsigned long result = offset & ~31UL;
+	unsigned long *p = ((unsigned long *) addr) + (offset >> 6);
+	unsigned long result = offset & ~63UL;
 	unsigned long tmp;
 
 	if (offset >= size)
 		return size;
 	size -= result;
-	offset &= 31UL;
+	offset &= 63UL;
 	if (offset) {
 		tmp = *(p++);
-		tmp |= ~0UL >> (32-offset);
-		if (size < 32)
+		tmp |= ~0UL >> (64-offset);
+		if (size < 64)
 			goto found_first;
 		if (~tmp)
 			goto found_middle;
-		size -= 32;
-		result += 32;
+		size -= 64;
+		result += 64;
 	}
-	while (size & ~31UL) {
+	while (size & ~63UL) {
 		if (~(tmp = *(p++)))
 			goto found_middle;
-		result += 32;
-		size -= 32;
+		result += 64;
+		size -= 64;
 	}
 	if (!size)
 		return result;
@@ -428,6 +326,8 @@ found_middle:
 
 #endif /* (__MIPSEB__) */
 
+#ifdef __KERNEL__
+
 /* Now for the ext2 filesystem bit operations and helper routines. */
 
 #ifdef __MIPSEB__
@@ -548,4 +448,6 @@ found_middle:
 #define minix_test_bit(nr,addr) test_bit(nr,addr)
 #define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
 
+#endif /* __KERNEL__ */
+
 #endif /* _ASM_BITOPS_H */
diff --git a/include/asm-mips64/cpu.h b/include/asm-mips64/cpu.h
new file mode 100644
index 000000000..9378e18ab
--- /dev/null
+++ b/include/asm-mips64/cpu.h
@@ -0,0 +1,45 @@
+/* $Id: cpu.h,v 1.1 1999/10/19 20:51:53 ralf Exp $
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * cpu.h: Values of the PRId register used to match up
+ *        various MIPS cpu types.
+ *
+ * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
+ */
+#ifndef _ASM_CPU_H
+#define _ASM_CPU_H
+
+/*
+ * Assigned values for the product ID register.  In order to detect a
+ * certain CPU type exactly eventually additional registers may need to
+ * be examined.
+ */
+#define PRID_IMP_R2000    0x0100
+#define PRID_IMP_R3000    0x0200
+#define PRID_IMP_R6000    0x0300
+#define PRID_IMP_R4000    0x0400
+#define PRID_IMP_R6000A   0x0600
+#define PRID_IMP_R10000   0x0900
+#define PRID_IMP_R4300    0x0b00
+#define PRID_IMP_R8000    0x1000
+#define PRID_IMP_R4600    0x2000
+#define PRID_IMP_R4700    0x2100
+#define PRID_IMP_R4640    0x2200
+#define PRID_IMP_R4650    0x2200		/* Same as R4640 */
+#define PRID_IMP_R5000    0x2300
+#define PRID_IMP_SONIC    0x2400
+#define PRID_IMP_MAGIC    0x2500
+#define PRID_IMP_RM7000   0x2700
+#define PRID_IMP_NEVADA   0x2800
+
+#define PRID_IMP_UNKNOWN  0xff00
+
+#define PRID_REV_R4400    0x0040
+#define PRID_REV_R3000A   0x0030
+#define PRID_REV_R3000    0x0020
+#define PRID_REV_R2000A   0x0010
+
+#endif /* _ASM_CPU_H */
diff --git a/include/asm-mips64/current.h b/include/asm-mips64/current.h
index 0293e6ad8..0afc8cad4 100644
--- a/include/asm-mips64/current.h
+++ b/include/asm-mips64/current.h
@@ -1,4 +1,4 @@
-/* $Id: current.h,v 1.1 1999/08/18 21:46:54 ralf Exp $
+/* $Id: current.h,v 1.2 1999/09/28 22:27:19 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -27,8 +27,8 @@ register struct task_struct *current asm("$28");
 	.set	noreorder;			\
 	lw	reg, %lo(kernelsp)(reg);	\
 	.set	pop;				\
-	ori	reg, 8191;			\
-	xori	reg, 8191
+	ori	reg, 0x3fff;			\
+	xori	reg, 0x3fff
 
 #endif
 
diff --git a/include/asm-mips64/dma.h b/include/asm-mips64/dma.h
index 169698ba5..00da1fb9f 100644
--- a/include/asm-mips64/dma.h
+++ b/include/asm-mips64/dma.h
@@ -15,7 +15,7 @@
 
 #include <linux/config.h>
 #include <asm/io.h>			/* need byte IO */
-#include <asm/spinlock.h>		/* And spinlocks */
+#include <linux/spinlock.h>		/* And spinlocks */
 #include <linux/delay.h>
 #include <asm/system.h>
 
diff --git a/include/asm-mips64/elf.h b/include/asm-mips64/elf.h
index e9b755277..f6f8785d4 100644
--- a/include/asm-mips64/elf.h
+++ b/include/asm-mips64/elf.h
@@ -7,6 +7,7 @@
 #ifndef _ASM_ELF_H
 #define _ASM_ELF_H
 
+#ifndef ELF_ARCH
 /* ELF register definitions */
 #define ELF_NGREG	45
 #define ELF_NFPREG	33
@@ -32,6 +33,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
 #define ELF_DATA	ELFDATA2LSB
 #endif
 #define ELF_ARCH	EM_MIPS
+#endif /* !defined(ELF_ARCH) */
 
 #define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE	4096
@@ -75,7 +77,9 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
    the loader.  We need to make sure that it is out of the way of the program
    that it will "exec", and that there is sufficient room for the brk.  */
 
+#ifndef ELF_ET_DYN_BASE
 #define ELF_ET_DYN_BASE         (2 * TASK_SIZE / 3)
+#endif
 
 #ifdef __KERNEL__
 #define SET_PERSONALITY(ex,ibcs2) \
diff --git a/include/asm-mips64/hardirq.h b/include/asm-mips64/hardirq.h
index 3bcdae01a..ed8895b7e 100644
--- a/include/asm-mips64/hardirq.h
+++ b/include/asm-mips64/hardirq.h
@@ -10,7 +10,7 @@
 #ifndef _ASM_HARDIRQ_H
 #define _ASM_HARDIRQ_H
 
-#include <linux/tasks.h>
+#include <linux/threads.h>
 
 extern unsigned int local_irq_count[NR_CPUS];
 
diff --git a/include/asm-mips64/inst.h b/include/asm-mips64/inst.h
new file mode 100644
index 000000000..0a484592f
--- /dev/null
+++ b/include/asm-mips64/inst.h
@@ -0,0 +1,305 @@
+/* $Id: inst.h,v 1.1 1999/10/09 20:55:09 ralf Exp $
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Format of an instruction in memory.
+ *
+ * Copyright (C) 1996 by Ralf Baechle
+ */
+#ifndef _ASM_INST_H
+#define _ASM_INST_H
+
+/*
+ * Major opcodes; before MIPS IV cop1x was called cop3.
+ */
+enum major_op {
+	spec_op, bcond_op, j_op, jal_op,
+	beq_op, bne_op, blez_op, bgtz_op,
+	addi_op, addiu_op, slti_op, sltiu_op,
+	andi_op, ori_op, xori_op, lui_op,
+	cop0_op, cop1_op, cop2_op, cop1x_op,
+	beql_op, bnel_op, blezl_op, bgtzl_op,
+	daddi_op, daddiu_op, ldl_op, ldr_op,
+	major_1c_op, major_1d_op, major_1e_op, major_1f_op,
+	lb_op, lh_op, lwl_op, lw_op,
+	lbu_op, lhu_op, lwr_op, lwu_op,
+	sb_op, sh_op, swl_op, sw_op,
+	sdl_op, sdr_op, swr_op, cache_op,
+	ll_op, lwc1_op, lwc2_op, pref_op,
+	lld_op, ldc1_op, ldc2_op, ld_op,
+	sc_op, swc1_op, swc2_op, major_3b_op, /* Opcode 0x3b is unused */
+	scd_op, sdc1_op, sdc2_op, sd_op
+};
+
+/*
+ * func field of spec opcode.
+ */
+enum spec_op {
+	sll_op, movc_op, srl_op, sra_op,
+	sllv_op, srlv_op, srav_op, spec1_unused_op, /* Opcode 0x07 is unused */
+	jr_op, jalr_op, movz_op, movn_op,
+	syscall_op, break_op, spim_op, sync_op,
+	mfhi_op, mthi_op, mflo_op, mtlo_op,
+	dsllv_op, spec2_unused_op, dsrlv_op, dsrav_op,
+	mult_op, multu_op, div_op, divu_op,
+	dmult_op, dmultu_op, ddiv_op, ddivu_op,
+	add_op, addu_op, sub_op, subu_op,
+	and_op, or_op, xor_op, nor_op,
+	spec3_unused_op, spec4_unused_op, slt_op, sltu_op,
+	dadd_op, daddu_op, dsub_op, dsubu_op,
+	tge_op, tgeu_op, tlt_op, tltu_op,
+	teq_op, spec5_unused_op, tne_op, spec6_unused_op,
+	dsll_op, spec7_unused_op, dsrl_op, dsra_op,
+	dsll32_op, spec8_unused_op, dsrl32_op, dsra32_op
+};
+
+/*
+ * rt field of bcond opcodes.
+ */
+enum rt_op {
+	bltz_op, bgez_op, bltzl_op, bgezl_op,
+	spimi_op, unused_rt_op_0x05, unused_rt_op_0x06, unused_rt_op_0x07,
+	tgei_op, tgeiu_op, tlti_op, tltiu_op,
+	teqi_op, unused_0x0d_rt_op, tnei_op, unused_0x0f_rt_op,
+	bltzal_op, bgezal_op, bltzall_op, bgezall_op
+	/*
+	 * The others (0x14 - 0x1f) are unused.
+ 	 */
+};
+
+/*
+ * rs field of cop opcodes.
+ */
+enum cop_op {
+	mfc_op        = 0x00, dmfc_op       = 0x01,
+	cfc_op        = 0x02, mtc_op        = 0x04,
+	dmtc_op       = 0x05, ctc_op        = 0x06,
+	bc_op         = 0x08, cop_op        = 0x10,
+	copm_op       = 0x18
+};
+
+/*
+ * func field of cop0 coi opcodes.
+ */
+enum cop0_coi_func {
+	tlbr_op       = 0x01, tlbwi_op      = 0x02,
+	tlbwr_op      = 0x06, tlbp_op       = 0x08,
+	rfe_op        = 0x10, eret_op       = 0x18
+};
+
+/*
+ * func field of cop0 com opcodes.
+ */
+enum cop0_com_func {
+	tlbr1_op      = 0x01, tlbw_op       = 0x02,
+	tlbp1_op      = 0x08, dctr_op       = 0x09,
+	dctw_op       = 0x0a
+};
+
+/*
+ * fmt field of cop1 opcodes.
+ */
+enum cop1_fmt {
+	s_fmt, d_fmt, e_fmt, q_fmt,
+	w_fmt, l_fmt
+};
+
+/*
+ * func field of cop1 instructions using d, s or w format.
+ */
+enum cop1_sdw_func {
+	fadd_op      =  0x00, fsub_op      =  0x01,
+	fmul_op      =  0x02, fdiv_op      =  0x03,
+	fsqrt_op     =  0x04, fabs_op      =  0x05,
+	fmov_op      =  0x06, fneg_op      =  0x07,
+	froundl_op   =  0x08, ftruncl_op   =  0x09,
+	fceill_op    =  0x0a, ffloorl_op   =  0x0b,
+	fround_op    =  0x0c, ftrunc_op    =  0x0d,
+	fceil_op     =  0x0e, ffloor_op    =  0x0f,
+	fmovc_op     =  0x11, fmovz_op     =  0x12,
+	fmovn_op     =  0x13, frecip_op    =  0x15,
+	frsqrt_op    =  0x16, fcvts_op     =  0x20,
+	fcvtd_op     =  0x21, fcvte_op     =  0x22,
+	fcvtw_op     =  0x24, fcvtl_op     =  0x25,
+	fcmp_op      =  0x30
+};
+
+/*
+ * func field of cop1x opcodes (MIPS IV).
+ */
+enum cop1x_func {
+	lwxc1_op     =  0x00, ldxc1_op     =  0x01,
+	pfetch_op    =  0x07, swxc1_op     =  0x08,
+	sdxc1_op     =  0x09, madd_s_op    =  0x20,
+	madd_d_op    =  0x21, madd_e_op    =  0x22,
+	msub_s_op    =  0x28, msub_d_op    =  0x29,
+	msub_e_op    =  0x2a, nmadd_s_op   =  0x30,
+	nmadd_d_op   =  0x31, nmadd_e_op   =  0x32,
+	nmsub_s_op   =  0x38, nmsub_d_op   =  0x39,
+	nmsub_e_op   =  0x3a
+};
+
+/*
+ * func field for mad opcodes (MIPS IV).
+ */
+enum mad_func {
+	madd_op      = 0x08, msub_op      = 0x0a,
+	nmadd_op     = 0x0c, nmsub_op     = 0x0e
+};
+
+/*
+ * Damn ...  bitfields depend from byteorder :-(
+ */
+#ifdef __MIPSEB__
+struct j_format {	/* Jump format */
+	unsigned int opcode : 6;
+	unsigned int target : 26;
+};
+
+struct i_format {	/* Immediate format (addi, lw, ...) */
+	unsigned int opcode : 6;
+	unsigned int rs : 5;
+	unsigned int rt : 5;
+	signed int simmediate : 16;
+};
+
+struct u_format {	/* Unsigned immediate format (ori, xori, ...) */
+	unsigned int opcode : 6;
+	unsigned int rs : 5;
+	unsigned int rt : 5;
+	unsigned int uimmediate : 16;
+};
+
+struct c_format {	/* Cache (>= R6000) format */
+	unsigned int opcode : 6;
+	unsigned int rs : 5;
+	unsigned int c_op : 3;
+	unsigned int cache : 2;
+	unsigned int simmediate : 16;
+};
+
+struct r_format {	/* Register format */
+	unsigned int opcode : 6;
+	unsigned int rs : 5;
+	unsigned int rt : 5;
+	unsigned int rd : 5;
+	unsigned int re : 5;
+	unsigned int func : 6;
+};
+
+struct p_format {	/* Performance counter format (R10000) */
+	unsigned int opcode : 6;
+	unsigned int rs : 5;
+	unsigned int rt : 5;
+	unsigned int rd : 5;
+	unsigned int re : 5;
+	unsigned int func : 6;
+};
+
+struct f_format {	/* FPU register format */
+	unsigned int opcode : 6;
+	unsigned int : 1;
+	unsigned int fmt : 4;
+	unsigned int rt : 5;
+	unsigned int rd : 5;
+	unsigned int re : 5;
+	unsigned int func : 6;
+};
+
+struct ma_format {	/* FPU multipy and add format (MIPS IV) */
+	unsigned int opcode : 6;
+	unsigned int fr : 5;
+	unsigned int ft : 5;
+	unsigned int fs : 5;
+	unsigned int fd : 5;
+	unsigned int func : 4;
+	unsigned int fmt : 2;
+};
+
+#elif defined(__MIPSEL__)
+
+struct j_format {	/* Jump format */
+	unsigned int target : 26;
+	unsigned int opcode : 6;
+};
+
+struct i_format {	/* Immediate format */
+	signed int simmediate : 16;
+	unsigned int rt : 5;
+	unsigned int rs : 5;
+	unsigned int opcode : 6;
+};
+
+struct u_format {	/* Unsigned immediate format */
+	unsigned int uimmediate : 16;
+	unsigned int rt : 5;
+	unsigned int rs : 5;
+	unsigned int opcode : 6;
+};
+
+struct c_format {	/* Cache (>= R6000) format */
+	unsigned int simmediate : 16;
+	unsigned int cache : 2;
+	unsigned int c_op : 3;
+	unsigned int rs : 5;
+	unsigned int opcode : 6;
+};
+
+struct r_format {	/* Register format */
+	unsigned int func : 6;
+	unsigned int re : 5;
+	unsigned int rd : 5;
+	unsigned int rt : 5;
+	unsigned int rs : 5;
+	unsigned int opcode : 6;
+};
+
+struct p_format {	/* Performance counter format (R10000) */
+	unsigned int func : 6;
+	unsigned int re : 5;
+	unsigned int rd : 5;
+	unsigned int rt : 5;
+	unsigned int rs : 5;
+	unsigned int opcode : 6;
+};
+
+struct f_format {	/* FPU register format */
+	unsigned int func : 6;
+	unsigned int re : 5;
+	unsigned int rd : 5;
+	unsigned int rt : 5;
+	unsigned int fmt : 4;
+	unsigned int : 1;
+	unsigned int opcode : 6;
+};
+
+struct ma_format {	/* FPU multipy and add format (MIPS IV) */
+	unsigned int fmt : 2;
+	unsigned int func : 4;
+	unsigned int fd : 5;
+	unsigned int fs : 5;
+	unsigned int ft : 5;
+	unsigned int fr : 5;
+	unsigned int opcode : 6;
+};
+
+#else /* !defined (__MIPSEB__) && !defined (__MIPSEL__) */
+#error "MIPS but neither __MIPSEL__ nor __MIPSEB__?"
+#endif
+
+union mips_instruction {
+	unsigned int word;
+	unsigned short halfword[2];
+	unsigned char byte[4];
+	struct j_format j_format;
+	struct i_format i_format;
+	struct u_format u_format;
+	struct c_format c_format;
+	struct r_format r_format;
+	struct f_format f_format;
+        struct ma_format ma_format;
+};
+
+#endif /* _ASM_INST_H */
diff --git a/include/asm-mips64/ipc.h b/include/asm-mips64/ipc.h
new file mode 100644
index 000000000..b3888d353
--- /dev/null
+++ b/include/asm-mips64/ipc.h
@@ -0,0 +1,32 @@
+#ifndef _ASM_IPC_H
+#define _ASM_IPC_H
+
+/* 
+ * These are used to wrap system calls on MIPS32.
+ *
+ * See arch/mips/kernel/sysmips.c for ugly details..
+ * FIXME: split up into ordinary syscalls ...
+ */
+struct ipc_kludge {
+	struct msgbuf *msgp;
+	long msgtyp;
+};
+
+#define SEMOP		 1
+#define SEMGET		 2
+#define SEMCTL		 3
+#define MSGSND		11
+#define MSGRCV		12
+#define MSGGET		13
+#define MSGCTL		14
+#define SHMAT		21
+#define SHMDT		22
+#define SHMGET		23
+#define SHMCTL		24
+
+/* Used by the DIPC package, try and avoid reusing it */
+#define DIPC		25
+
+#define IPCCALL(version,op)	((version)<<16 | (op))
+
+#endif /* _ASM_IPC_H */
diff --git a/include/asm-mips64/mmu_context.h b/include/asm-mips64/mmu_context.h
index 70f3bab5d..03df39e4b 100644
--- a/include/asm-mips64/mmu_context.h
+++ b/include/asm-mips64/mmu_context.h
@@ -1,64 +1,88 @@
-/* $Id$
+/* $Id: mmu_context.h,v 1.3 1999/11/19 20:35:49 ralf Exp $
+ *
+ * Switch a MMU context.
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1996 - 1999 by Ralf Baechle
+ * Copyright (C) 1996, 1997, 1998, 1999 by Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
  */
 #ifndef _ASM_MMU_CONTEXT_H
 #define _ASM_MMU_CONTEXT_H
 
-#define MAX_ASID 255
+#include <linux/config.h>
 
+/* Fuck.  The f-word is here so you can grep for it :-)  */
 extern unsigned long asid_cache;
+extern pgd_t *current_pgd;
 
-#define ASID_VERSION_SHIFT 16
-#define ASID_VERSION_MASK  ((~0UL) << ASID_VERSION_SHIFT)
-#define ASID_FIRST_VERSION (1UL << ASID_VERSION_SHIFT)
+#define ASID_INC	0x1
+#define ASID_MASK	0xff
 
-extern inline void get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
-{
-	/* check if it's legal.. */
-	if ((asid & ~ASID_VERSION_MASK) > MAX_ASID) {
-		/* start a new version, invalidate all old asid's */
-		flush_tlb_all();
-		asid = (asid & ASID_VERSION_MASK) + ASID_FIRST_VERSION;
-		if (!asid)
-			asid = ASID_FIRST_VERSION;
-	}
-	asid_cache = asid + 1;
-	mm->context = asid;			 /* full version + asid */
-}
+/*
+ *  All unused by hardware upper bits will be considered
+ *  as a software asid extension.
+ */
+#define ASID_VERSION_MASK  ((unsigned long)~(ASID_MASK|(ASID_MASK-1)))
+#define ASID_FIRST_VERSION ((unsigned long)(~ASID_VERSION_MASK) + 1)
 
-extern inline void get_mmu_context(struct task_struct *p)
+extern inline void
+get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
 {
-	struct mm_struct *mm = p->mm;
-
-	if (mm) {
-		unsigned long asid = asid_cache;
-		/* Check if our ASID is of an older version and thus invalid */
-		if ((mm->context ^ asid) & ASID_VERSION_MASK)
-			get_new_mmu_context(mm, asid);
+	if (! ((asid += ASID_INC) & ASID_MASK) ) {
+		flush_tlb_all(); /* start new asid cycle */
+		if (!asid)      /* fix version if needed */
+			asid = ASID_FIRST_VERSION;
 	}
+	mm->context = asid_cache = asid;
 }
 
 /*
  * Initialize the context related info for a new mm_struct
  * instance.
  */
-extern inline void init_new_context(struct mm_struct *mm)
+extern inline void
+init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 {
 	mm->context = 0;
 }
 
+extern inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
+                             struct task_struct *tsk, unsigned cpu)
+{
+	unsigned long asid = asid_cache;
+
+	/* Check if our ASID is of an older version and thus invalid */
+	if ((next->context ^ asid) & ASID_VERSION_MASK)
+		get_new_mmu_context(next, asid);
+
+	current_pgd = next->pgd;
+	set_entryhi(next->context);
+}
+
 /*
  * Destroy context related info for an mm_struct that is about
  * to be put to rest.
  */
 extern inline void destroy_context(struct mm_struct *mm)
 {
-	mm->context = 0;
+	/* Nothing to do.  */
+}
+
+/*
+ * After we have set current->mm to a new value, this activates
+ * the context for the new mm so we see the new mappings.
+ */
+extern inline void
+activate_mm(struct mm_struct *prev, struct mm_struct *next)
+{
+	/* Unconditionally get a new ASID.  */
+	get_new_mmu_context(next, asid_cache);
+
+	current_pgd = next->pgd;
+	set_entryhi(next->context);
 }
 
 #endif /* _ASM_MMU_CONTEXT_H */
diff --git a/include/asm-mips64/offset.h b/include/asm-mips64/offset.h
index e37b353aa..f2451394c 100644
--- a/include/asm-mips64/offset.h
+++ b/include/asm-mips64/offset.h
@@ -4,45 +4,45 @@
 #define _MIPS_OFFSET_H
 
 /* MIPS pt_regs offsets. */
-#define PT_R0     64
-#define PT_R1     72
-#define PT_R2     80
-#define PT_R3     88
-#define PT_R4     96
-#define PT_R5     104
-#define PT_R6     112
-#define PT_R7     120
-#define PT_R8     128
-#define PT_R9     136
-#define PT_R10    144
-#define PT_R11    152
-#define PT_R12    160
-#define PT_R13    168
-#define PT_R14    176
-#define PT_R15    184
-#define PT_R16    192
-#define PT_R17    200
-#define PT_R18    208
-#define PT_R19    216
-#define PT_R20    224
-#define PT_R21    232
-#define PT_R22    240
-#define PT_R23    248
-#define PT_R24    256
-#define PT_R25    264
-#define PT_R26    272
-#define PT_R27    280
-#define PT_R28    288
-#define PT_R29    296
-#define PT_R30    304
-#define PT_R31    312
-#define PT_LO     320
-#define PT_HI     328
-#define PT_EPC    336
-#define PT_BVADDR 344
-#define PT_STATUS 352
-#define PT_CAUSE  360
-#define PT_SIZE   368
+#define PT_R0     0
+#define PT_R1     8
+#define PT_R2     16
+#define PT_R3     24
+#define PT_R4     32
+#define PT_R5     40
+#define PT_R6     48
+#define PT_R7     56
+#define PT_R8     64
+#define PT_R9     72
+#define PT_R10    80
+#define PT_R11    88
+#define PT_R12    96
+#define PT_R13    104
+#define PT_R14    112
+#define PT_R15    120
+#define PT_R16    128
+#define PT_R17    136
+#define PT_R18    144
+#define PT_R19    152
+#define PT_R20    160
+#define PT_R21    168
+#define PT_R22    176
+#define PT_R23    184
+#define PT_R24    192
+#define PT_R25    200
+#define PT_R26    208
+#define PT_R27    216
+#define PT_R28    224
+#define PT_R29    232
+#define PT_R30    240
+#define PT_R31    248
+#define PT_LO     256
+#define PT_HI     264
+#define PT_EPC    272
+#define PT_BVADDR 280
+#define PT_STATUS 288
+#define PT_CAUSE  296
+#define PT_SIZE   304
 
 /* MIPS task_struct offsets. */
 #define TASK_STATE         0
@@ -51,37 +51,36 @@
 #define TASK_NEED_RESCHED  40
 #define TASK_COUNTER       48
 #define TASK_PRIORITY      56
-#define TASK_MM            1400
-#define TASK_STRUCT_SIZE   1480
+#define TASK_MM            1304
+#define TASK_STRUCT_SIZE   1392
 
 /* MIPS specific thread_struct offsets. */
-#define THREAD_REG16   1080
-#define THREAD_REG17   1088
-#define THREAD_REG18   1096
-#define THREAD_REG19   1104
-#define THREAD_REG20   1112
-#define THREAD_REG21   1120
-#define THREAD_REG22   1128
-#define THREAD_REG23   1136
-#define THREAD_REG29   1144
-#define THREAD_REG30   1152
-#define THREAD_REG31   1160
-#define THREAD_STATUS  1168
-#define THREAD_FPU     1176
-#define THREAD_BVADDR  1312
-#define THREAD_BUADDR  1320
-#define THREAD_ECODE   1328
-#define THREAD_TRAPNO  1336
-#define THREAD_PGDIR   1344
-#define THREAD_MFLAGS  1352
-#define THREAD_CURDS   1360
-#define THREAD_TRAMP   1368
-#define THREAD_OLDCTX  1376
+#define THREAD_REG16   864
+#define THREAD_REG17   872
+#define THREAD_REG18   880
+#define THREAD_REG19   888
+#define THREAD_REG20   896
+#define THREAD_REG21   904
+#define THREAD_REG22   912
+#define THREAD_REG23   920
+#define THREAD_REG29   928
+#define THREAD_REG30   936
+#define THREAD_REG31   944
+#define THREAD_STATUS  952
+#define THREAD_FPU     960
+#define THREAD_BVADDR  1224
+#define THREAD_BUADDR  1232
+#define THREAD_ECODE   1240
+#define THREAD_TRAPNO  1248
+#define THREAD_MFLAGS  1256
+#define THREAD_CURDS   1264
+#define THREAD_TRAMP   1272
+#define THREAD_OLDCTX  1280
 
 /* Linux mm_struct offsets. */
-#define MM_COUNT      32
+#define MM_USERS      32
 #define MM_PGD        24
-#define MM_CONTEXT    88
+#define MM_CONTEXT    96
 
 /* Linux sigcontext offsets. */
 #define SC_REGS       0
diff --git a/include/asm-mips64/page.h b/include/asm-mips64/page.h
index 5a97a951f..4471bb273 100644
--- a/include/asm-mips64/page.h
+++ b/include/asm-mips64/page.h
@@ -1,4 +1,4 @@
-/* $Id$
+/* $Id: page.h,v 1.1 1999/08/18 23:37:51 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -6,8 +6,6 @@
  *
  * Copyright (C) 1994 - 1999 by Ralf Baechle
  * Copyright (C) 1999 Silicon Graphics, Inc.
- *
- * XXX This is all complete bullshit on MIPS64.
  */
 #ifndef _ASM_PAGE_H
 #define _ASM_PAGE_H
@@ -78,7 +76,7 @@ typedef unsigned long pgprot_t;
  * This handles the memory map.
  * We handle pages at KSEG0 for kernels with 32 bit address space.
  */
-#define PAGE_OFFSET	0x80000000UL
+#define PAGE_OFFSET	0xffffffff80000000UL
 #define __pa(x)		((unsigned long) (x) - PAGE_OFFSET)
 #define __va(x)		((void *)((unsigned long) (x) + PAGE_OFFSET))
 #define MAP_NR(addr)	(__pa(addr) >> PAGE_SHIFT)
diff --git a/include/asm-mips64/pci.h b/include/asm-mips64/pci.h
new file mode 100644
index 000000000..89eca5bf3
--- /dev/null
+++ b/include/asm-mips64/pci.h
@@ -0,0 +1,16 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef _ASM_PCI_H
+#define _ASM_PCI_H
+
+/* Can be used to override the logic in pci_scan_bus for skipping
+   already-configured bus numbers - to be used for buggy BIOSes
+   or architectures with incomplete PCI setup by the loader */
+
+#define pcibios_assign_all_busses()	0
+
+#endif /* _ASM_PCI_H */
diff --git a/include/asm-mips64/pgtable.h b/include/asm-mips64/pgtable.h
index fd1e5c063..02ca0e208 100644
--- a/include/asm-mips64/pgtable.h
+++ b/include/asm-mips64/pgtable.h
@@ -58,26 +58,25 @@ extern void (*flush_tlb_page)(struct vm_area_struct *vma, unsigned long page);
 #endif /* !defined (_LANGUAGE_ASSEMBLY) */
 
 /* PMD_SHIFT determines the size of the area a second-level page table can map */
-#define PMD_SHIFT	22
+#define PMD_SHIFT	(PAGE_SHIFT + (PAGE_SHIFT - 3))
 #define PMD_SIZE	(1UL << PMD_SHIFT)
 #define PMD_MASK	(~(PMD_SIZE-1))
 
 /* PGDIR_SHIFT determines what a third-level page table entry can map */
-#define PGDIR_SHIFT	22
+#define PGDIR_SHIFT	(PMD_SHIFT + (PAGE_SHIFT + 1 - 3))
 #define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
 #define PGDIR_MASK	(~(PGDIR_SIZE-1))
 
-/* Entries per page directory level: we use two-level, so
- * we don't really have any PMD directory physically.
- */
-#define PTRS_PER_PTE	1024
-#define PTRS_PER_PMD	1
+/* Entries per page directory level: we use two-level, so we don't really
+   have any PMD directory physically.  */
 #define PTRS_PER_PGD	1024
+#define PTRS_PER_PMD	1024
+#define PTRS_PER_PTE	512
 #define USER_PTRS_PER_PGD	(TASK_SIZE/PGDIR_SIZE)
 
-#define VMALLOC_START     KSEG2
+#define VMALLOC_START     XKSEG
 #define VMALLOC_VMADDR(x) ((unsigned long)(x))
-#define VMALLOC_END       KSEG3
+#define VMALLOC_END       (KSEG3 + (1UL << 40))	/* 1 TB */
 
 /* Note that we shift the lower 32bits of each EntryLo[01] entry
  * 6 bits to the left. That way we can convert the PFN into the
@@ -173,11 +172,13 @@ extern void (*flush_tlb_page)(struct vm_area_struct *vma, unsigned long page);
  */
 extern pte_t __bad_page(void);
 extern pte_t *__bad_pagetable(void);
+extern pmd_t *__bad_pmd_table(void);
 
 extern unsigned long empty_zero_page;
 extern unsigned long zero_page_mask;
 
 #define BAD_PAGETABLE __bad_pagetable()
+#define BAD_PMDTABLE __bad_pmd_table()
 #define BAD_PAGE __bad_page()
 #define ZERO_PAGE(__vaddr) \
 	(empty_zero_page + (((unsigned long)(__vaddr)) & zero_page_mask))
@@ -191,7 +192,7 @@ extern unsigned long zero_page_mask;
 /*
  * sizeof(void*) == (1 << SIZEOF_PTR_LOG2)
  */
-#define SIZEOF_PTR_LOG2			2
+#define SIZEOF_PTR_LOG2			3
 
 /* to find an entry in a page-table */
 #define PAGE_PTR(address) \
@@ -199,7 +200,8 @@ extern unsigned long zero_page_mask;
 
 extern void (*load_pgd)(unsigned long pg_dir);
 
-extern pmd_t invalid_pte_table[PAGE_SIZE/sizeof(pmd_t)];
+extern pte_t invalid_pte_table[PAGE_SIZE/sizeof(pte_t)];
+extern pmd_t invalid_pmd_table[2*PAGE_SIZE/sizeof(pmd_t)];
 
 /*
  * Conversion functions: convert a page and protection to a page entry,
@@ -215,13 +217,30 @@ extern inline unsigned long pmd_page(pmd_t pmd)
 	return pmd_val(pmd);
 }
 
+extern inline unsigned long pgd_page(pgd_t pgd)
+{
+	return pgd_val(pgd);
+}
+
 extern inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
 {
 	pmd_val(*pmdp) = (((unsigned long) ptep) & PAGE_MASK);
 }
 
-extern inline int pte_none(pte_t pte)    { return !pte_val(pte); }
-extern inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_PRESENT; }
+extern inline void pgd_set(pgd_t * pgdp, pmd_t * pmdp)
+{
+	pgd_val(*pgdp) = (((unsigned long) pmdp) & PAGE_MASK);
+}
+
+extern inline int pte_none(pte_t pte)
+{
+	return !pte_val(pte);
+}
+
+extern inline int pte_present(pte_t pte)
+{
+	return pte_val(pte) & _PAGE_PRESENT;
+}
 
 /* Certain architectures need to do special things when pte's
  * within a page table are directly modified.  Thus, the following
@@ -238,7 +257,7 @@ extern inline void pte_clear(pte_t *ptep)
 }
 
 /*
- * Empty pgd/pmd entries point to the invalid_pte_table.
+ * Empty pmd entries point to the invalid_pte_table.
  */
 extern inline int pmd_none(pmd_t pmd)
 {
@@ -253,7 +272,7 @@ extern inline int pmd_bad(pmd_t pmd)
 
 extern inline int pmd_present(pmd_t pmd)
 {
-	return pmd_val(pmd);
+	return pmd_val(pmd) != (unsigned long) invalid_pte_table;
 }
 
 extern inline void pmd_clear(pmd_t *pmdp)
@@ -262,23 +281,52 @@ extern inline void pmd_clear(pmd_t *pmdp)
 }
 
 /*
- * The "pgd_xxx()" functions here are trivial for a folded two-level
- * setup: the pgd is never bad, and a pmd always exists (as it's folded
- * into the pgd entry)
+ * Empty pgd entries point to the invalid_pmd_table.
  */
-extern inline int pgd_none(pgd_t pgd)		{ return 0; }
-extern inline int pgd_bad(pgd_t pgd)		{ return 0; }
-extern inline int pgd_present(pgd_t pgd)	{ return 1; }
-extern inline void pgd_clear(pgd_t *pgdp)	{ }
+extern inline int pgd_none(pgd_t pgd)
+{
+	return pgd_val(pgd) == (unsigned long) invalid_pmd_table;
+}
+
+extern inline int pgd_bad(pgd_t pgd)
+{
+	return ((pgd_page(pgd) > (unsigned long) high_memory) ||
+	        (pgd_page(pgd) < PAGE_OFFSET));
+}
+
+extern inline int pgd_present(pgd_t pgd)
+{
+	return pgd_val(pgd) != (unsigned long) invalid_pmd_table;
+}
+
+extern inline void pgd_clear(pgd_t *pgdp)
+{
+	pgd_val(*pgdp) = ((unsigned long) invalid_pmd_table);
+}
 
 /*
  * The following only work if pte_present() is true.
  * Undefined behaviour if not..
  */
-extern inline int pte_read(pte_t pte)	{ return pte_val(pte) & _PAGE_READ; }
-extern inline int pte_write(pte_t pte)	{ return pte_val(pte) & _PAGE_WRITE; }
-extern inline int pte_dirty(pte_t pte)	{ return pte_val(pte) & _PAGE_MODIFIED; }
-extern inline int pte_young(pte_t pte)	{ return pte_val(pte) & _PAGE_ACCESSED; }
+extern inline int pte_read(pte_t pte)
+{
+	return pte_val(pte) & _PAGE_READ;
+}
+
+extern inline int pte_write(pte_t pte)
+{
+	return pte_val(pte) & _PAGE_WRITE;
+}
+
+extern inline int pte_dirty(pte_t pte)
+{
+	return pte_val(pte) & _PAGE_MODIFIED;
+}
+
+extern inline int pte_young(pte_t pte)
+{
+	return pte_val(pte) & _PAGE_ACCESSED;
+}
 
 extern inline pte_t pte_wrprotect(pte_t pte)
 {
@@ -361,13 +409,14 @@ extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 /* to find an entry in a page-table-directory */
 extern inline pgd_t *pgd_offset(struct mm_struct *mm, unsigned long address)
 {
-	return mm->pgd + (address >> PGDIR_SHIFT);
+	return mm->pgd + ((address >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1));
 }
 
 /* Find an entry in the second-level page table.. */
-extern inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
+extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
 {
-	return (pmd_t *) dir;
+	return (pmd_t *) pgd_page(*dir) +
+	       ((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
 }
 
 /* Find an entry in the third-level page table.. */ 
@@ -378,9 +427,11 @@ extern inline pte_t *pte_offset(pmd_t * dir, unsigned long address)
 }
 
 /*
- * Initialize new page directory with pointers to invalid ptes
+ * Initialize a new pgd / pmd table with invalid pointers.
  */
-extern void (*pgd_init)(unsigned long page);
+extern void pte_init(unsigned long page);
+extern void pgd_init(unsigned long page);
+extern void pmd_init(unsigned long page);
 
 /*
  * Allocate and free page tables. The xxx_kernel() versions are
@@ -389,24 +440,13 @@ extern void (*pgd_init)(unsigned long page);
  */
 
 #define pgd_quicklist (current_cpu_data.pgd_quick)
-#define pmd_quicklist ((unsigned long *)0)
+#define pmd_quicklist (current_cpu_data.pmd_quick)
 #define pte_quicklist (current_cpu_data.pte_quick)
 #define pgtable_cache_size (current_cpu_data.pgtable_cache_sz)
 
-extern __inline__ pgd_t *get_pgd_slow(void)
-{
-	pgd_t *ret = (pgd_t *)__get_free_page(GFP_KERNEL), *init;
-
-	if (ret) {
-		init = pgd_offset(&init_mm, 0);
-		pgd_init((unsigned long)ret);
-		memcpy (ret + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD,
-			(PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
-	}
-	return ret;
-}
+extern pgd_t *get_pgd_slow(void);
 
-extern __inline__ pgd_t *get_pgd_fast(void)
+extern inline pgd_t *get_pgd_fast(void)
 {
 	unsigned long *ret;
 
@@ -414,27 +454,29 @@ extern __inline__ pgd_t *get_pgd_fast(void)
 		pgd_quicklist = (unsigned long *)(*ret);
 		ret[0] = ret[1];
 		pgtable_cache_size--;
-	} else
-		ret = (unsigned long *)get_pgd_slow();
+		return (pgd_t *)ret;
+	}
+
+	ret = (unsigned long *) get_pgd_slow();
 	return (pgd_t *)ret;
 }
 
-extern __inline__ void free_pgd_fast(pgd_t *pgd)
+extern inline void free_pgd_fast(pgd_t *pgd)
 {
 	*(unsigned long *)pgd = (unsigned long) pgd_quicklist;
 	pgd_quicklist = (unsigned long *) pgd;
 	pgtable_cache_size++;
 }
 
-extern __inline__ void free_pgd_slow(pgd_t *pgd)
+extern inline void free_pgd_slow(pgd_t *pgd)
 {
-	free_page((unsigned long)pgd);
+	free_pages((unsigned long)pgd, 1);
 }
 
 extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long address_preadjusted);
 extern pte_t *get_pte_kernel_slow(pmd_t *pmd, unsigned long address_preadjusted);
 
-extern __inline__ pte_t *get_pte_fast(void)
+extern inline pte_t *get_pte_fast(void)
 {
 	unsigned long *ret;
 
@@ -446,37 +488,55 @@ extern __inline__ pte_t *get_pte_fast(void)
 	return (pte_t *)ret;
 }
 
-extern __inline__ void free_pte_fast(pte_t *pte)
+extern inline void free_pte_fast(pte_t *pte)
 {
 	*(unsigned long *)pte = (unsigned long) pte_quicklist;
 	pte_quicklist = (unsigned long *) pte;
 	pgtable_cache_size++;
 }
 
-extern __inline__ void free_pte_slow(pte_t *pte)
+extern inline void free_pte_slow(pte_t *pte)
 {
-	free_page((unsigned long)pte);
+	free_pages((unsigned long)pte, 0);
 }
 
-/* We don't use pmd cache, so these are dummy routines */
-extern __inline__ pmd_t *get_pmd_fast(void)
+extern pmd_t *get_pmd_slow(pgd_t *pgd, unsigned long address_preadjusted);
+extern pmd_t *get_pmd_kernel_slow(pgd_t *pgd, unsigned long address_preadjusted);
+
+extern inline pmd_t *get_pmd_fast(void)
 {
-	return (pmd_t *)0;
+	unsigned long *ret;
+
+	if ((ret = (unsigned long *)pte_quicklist) != NULL) {
+		pte_quicklist = (unsigned long *)(*ret);
+		ret[0] = ret[1];
+		pgtable_cache_size--;
+		return (pmd_t *)ret;
+	}
+
+	return (pmd_t *)ret;
 }
 
-extern __inline__ void free_pmd_fast(pmd_t *pmd)
+extern inline void free_pmd_fast(pmd_t *pmd)
 {
+	*(unsigned long *)pmd = (unsigned long) pte_quicklist;
+	pte_quicklist = (unsigned long *) pmd;
+	pgtable_cache_size++;
 }
 
-extern __inline__ void free_pmd_slow(pmd_t *pmd)
+extern inline void free_pmd_slow(pmd_t *pmd)
 {
+	free_pages((unsigned long)pmd, 1);
 }
 
 extern void __bad_pte(pmd_t *pmd);
 extern void __bad_pte_kernel(pmd_t *pmd);
+extern void __bad_pmd(pgd_t *pgd);
 
 #define pte_free_kernel(pte)    free_pte_fast(pte)
 #define pte_free(pte)           free_pte_fast(pte)
+#define pmd_free_kernel(pte)    free_pmd_fast(pte)
+#define pmd_free(pte)           free_pmd_fast(pte)
 #define pgd_free(pgd)           free_pgd_fast(pgd)
 #define pgd_alloc()             get_pgd_fast()
 
@@ -487,7 +547,7 @@ extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address)
 	if (pmd_none(*pmd)) {
 		pte_t *page = get_pte_fast();
 		if (page) {
-			pmd_val(*pmd) = (unsigned long)page;
+			pmd_val(*pmd) = (unsigned long) page;
 			return page + address;
 		}
 		return get_pte_kernel_slow(pmd, address);
@@ -506,7 +566,7 @@ extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long address)
 	if (pmd_none(*pmd)) {
 		pte_t *page = get_pte_fast();
 		if (page) {
-			pmd_val(*pmd) = (unsigned long)page;
+			pmd_val(*pmd) = (unsigned long) page;
 			return page + address;
 		}
 		return get_pte_slow(pmd, address);
@@ -518,20 +578,24 @@ extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long address)
 	return (pte_t *) pmd_page(*pmd) + address;
 }
 
-/*
- * allocating and freeing a pmd is trivial: the 1-entry pmd is
- * inside the pgd, so has no extra memory associated with it.
- */
-extern inline void pmd_free(pmd_t * pmd)
+extern inline pmd_t *pmd_alloc(pgd_t * pgd, unsigned long address)
 {
-}
+	address = (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
+	if (pgd_none(*pgd)) {
+		pmd_t *page = get_pmd_fast();
 
-extern inline pmd_t * pmd_alloc(pgd_t * pgd, unsigned long address)
-{
-	return (pmd_t *) pgd;
+		if (!page)
+			return get_pmd_slow(pgd, address);
+		pgd_set(pgd, page);
+		return page + address;
+	}
+	if (pgd_bad(*pgd)) {
+		__bad_pmd(pgd);
+		return NULL;
+	}
+	return (pmd_t *) pgd_page(*pgd) + address;
 }
 
-#define pmd_free_kernel		pmd_free
 #define pmd_alloc_kernel	pmd_alloc
 
 extern int do_check_pgt_cache(int, int);
@@ -548,7 +612,7 @@ extern inline void set_pgdir(unsigned long address, pgd_t entry)
 	for_each_task(p) {
 		if (!p->mm)
 			continue;
-		*pgd_offset(p->mm,address) = entry;
+		*pgd_offset(p->mm, address) = entry;
 	}
 	read_unlock(&tasklist_lock);
 #ifndef __SMP__
@@ -569,11 +633,18 @@ extern void (*update_mmu_cache)(struct vm_area_struct *vma,
 				unsigned long address, pte_t pte);
 
 /*
- * Kernel with 32 bit address space
+ * Non-present pages:  high 24 bits are offset, next 8 bits type,
+ * low 32 bits zero.
  */
-#define SWP_TYPE(entry) (((entry) >> 1) & 0x3f)
-#define SWP_OFFSET(entry) ((entry) >> 8)
-#define SWP_ENTRY(type,offset) (((type) << 1) | ((offset) << 8))
+extern inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
+{
+	pte_t pte; pte_val(pte) = (type << 32) | (offset << 40);
+	return pte;
+}
+
+#define SWP_TYPE(entry) (((entry) >> 32) & 0xff)
+#define SWP_OFFSET(entry) ((entry) >> 40)
+#define SWP_ENTRY(type,offset) pte_val(mk_swap_pte((type),(offset)))
 
 #define module_map      vmalloc
 #define module_unmap    vfree
@@ -624,9 +695,7 @@ extern inline unsigned long get_pagemask(void)
 
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
 		"mfc0 %0, $5\n\t"
-		".set mips0\n\t"
 		".set reorder"
 		: "=r" (val));
 	return val;
@@ -636,9 +705,7 @@ extern inline void set_pagemask(unsigned long val)
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
 		"mtc0 %0, $5\n\t"
-		".set mips0\n\t"
 		".set reorder"
 		: : "r" (val));
 }
@@ -650,9 +717,7 @@ extern inline unsigned long get_entrylo0(void)
 
 	__asm__ __volatile__(	
 		".set noreorder\n\t"
-		".set mips3\n\t"
-		"mfc0 %0, $2\n\t"
-		".set mips0\n\t"
+		"dmfc0 %0, $2\n\t"
 		".set reorder"
 		: "=r" (val));
 	return val;
@@ -662,9 +727,7 @@ extern inline void set_entrylo0(unsigned long val)
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
-		"mtc0 %0, $2\n\t"
-		".set mips0\n\t"
+		"dmtc0 %0, $2\n\t"
 		".set reorder"
 		: : "r" (val));
 }
@@ -675,9 +738,7 @@ extern inline unsigned long get_entrylo1(void)
 
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
-		"mfc0 %0, $3\n\t"
-		".set mips0\n\t"
+		"dmfc0 %0, $3\n\t"
 		".set reorder" : "=r" (val));
 
 	return val;
@@ -687,9 +748,7 @@ extern inline void set_entrylo1(unsigned long val)
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
-		"mtc0 %0, $3\n\t"
-		".set mips0\n\t"
+		"dmtc0 %0, $3\n\t"
 		".set reorder"
 		: : "r" (val));
 }
@@ -701,9 +760,7 @@ extern inline unsigned long get_entryhi(void)
 
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
-		"mfc0 %0, $10\n\t"
-		".set mips0\n\t"
+		"dmfc0 %0, $10\n\t"
 		".set reorder"
 		: "=r" (val));
 
@@ -714,9 +771,7 @@ extern inline void set_entryhi(unsigned long val)
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
-		"mtc0 %0, $10\n\t"
-		".set mips0\n\t"
+		"dmtc0 %0, $10\n\t"
 		".set reorder"
 		: : "r" (val));
 }
@@ -728,9 +783,7 @@ extern inline unsigned long get_index(void)
 
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
 		"mfc0 %0, $0\n\t"
-		".set mips0\n\t"
 		".set reorder"
 		: "=r" (val));
 	return val;
@@ -740,9 +793,7 @@ extern inline void set_index(unsigned long val)
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
 		"mtc0 %0, $0\n\t"
-		".set mips0\n\t"
 		".set reorder\n\t"
 		: : "r" (val));
 }
@@ -754,9 +805,7 @@ extern inline unsigned long get_wired(void)
 
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
 		"mfc0 %0, $6\n\t"
-		".set mips0\n\t"
 		".set reorder\n\t"
 		: "=r" (val));
 	return val;
@@ -766,9 +815,7 @@ extern inline void set_wired(unsigned long val)
 {
 	__asm__ __volatile__(
 		"\n\t.set noreorder\n\t"
-		".set mips3\n\t"
 		"mtc0 %0, $6\n\t"
-		".set mips0\n\t"
 		".set reorder"
 		: : "r" (val));
 }
@@ -780,9 +827,7 @@ extern inline unsigned long get_taglo(void)
 
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
 		"mfc0 %0, $28\n\t"
-		".set mips0\n\t"
 		".set reorder"
 		: "=r" (val));
 	return val;
@@ -792,9 +837,7 @@ extern inline void set_taglo(unsigned long val)
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
 		"mtc0 %0, $28\n\t"
-		".set mips0\n\t"
 		".set reorder"
 		: : "r" (val));
 }
@@ -805,9 +848,7 @@ extern inline unsigned long get_taghi(void)
 
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
 		"mfc0 %0, $29\n\t"
-		".set mips0\n\t"
 		".set reorder"
 		: "=r" (val));
 	return val;
@@ -817,9 +858,7 @@ extern inline void set_taghi(unsigned long val)
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
 		"mtc0 %0, $29\n\t"
-		".set mips0\n\t"
 		".set reorder"
 		: : "r" (val));
 }
@@ -831,9 +870,7 @@ extern inline unsigned long get_context(void)
 
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
 		"mfc0 %0, $4\n\t"
-		".set mips0\n\t"
 		".set reorder"
 		: "=r" (val));
 
@@ -844,9 +881,7 @@ extern inline void set_context(unsigned long val)
 {
 	__asm__ __volatile__(
 		".set noreorder\n\t"
-		".set mips3\n\t"
 		"mtc0 %0, $4\n\t"
-		".set mips0\n\t"
 		".set reorder"
 		: : "r" (val));
 }
diff --git a/include/asm-mips64/posix_types.h b/include/asm-mips64/posix_types.h
index b00f393b1..45d9961b5 100644
--- a/include/asm-mips64/posix_types.h
+++ b/include/asm-mips64/posix_types.h
@@ -1,4 +1,4 @@
-/* $Id$
+/* $Id: posix_types.h,v 1.1 1999/08/18 23:37:51 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -20,21 +20,21 @@
  * assume GCC is being used.
  */
 
-typedef unsigned long	__kernel_dev_t;
-typedef unsigned long	__kernel_ino_t;
-typedef unsigned long	__kernel_mode_t;
-typedef unsigned long	__kernel_nlink_t;
+typedef unsigned int	__kernel_dev_t;
+typedef unsigned int	__kernel_ino_t;
+typedef unsigned int	__kernel_mode_t;
+typedef unsigned int	__kernel_nlink_t;
 typedef long		__kernel_off_t;
-typedef long		__kernel_pid_t;
-typedef long		__kernel_ipc_pid_t;
-typedef long		__kernel_uid_t;
-typedef long		__kernel_gid_t;
+typedef int		__kernel_pid_t;
+typedef int		__kernel_ipc_pid_t;
+typedef int		__kernel_uid_t;
+typedef int		__kernel_gid_t;
 typedef __SIZE_TYPE__	__kernel_size_t;
 typedef __SSIZE_TYPE__	__kernel_ssize_t;
 typedef __PTRDIFF_TYPE__ __kernel_ptrdiff_t;
-typedef long		__kernel_time_t;
+typedef int		__kernel_time_t;
 typedef long		__kernel_suseconds_t;
-typedef long		__kernel_clock_t;
+typedef int		__kernel_clock_t;
 typedef long		__kernel_daddr_t;
 typedef char *		__kernel_caddr_t;
 
@@ -43,7 +43,7 @@ typedef long long      __kernel_loff_t;
 #endif
 
 typedef struct {
-        long    val[2];
+        int    val[2];
 } __kernel_fsid_t;
 
 #if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
diff --git a/include/asm-mips64/processor.h b/include/asm-mips64/processor.h
index d4251affc..7c1c76b8d 100644
--- a/include/asm-mips64/processor.h
+++ b/include/asm-mips64/processor.h
@@ -1,4 +1,4 @@
-/* $Id: processor.h,v 1.3 1999/09/27 20:56:47 ralf Exp $
+/* $Id: processor.h,v 1.3 1999/09/28 22:27:19 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -27,6 +27,7 @@
 struct mips_cpuinfo {
 	unsigned long udelay_val;
 	unsigned long *pgd_quick;
+	unsigned long *pmd_quick;
 	unsigned long *pte_quick;
 	unsigned long pgtable_cache_sz;
 };
@@ -39,6 +40,7 @@ extern char wait_available;		/* only available on R4[26]00 */
 extern char cyclecounter_available;	/* only available from R4000 upwards. */
 extern char dedicated_iv_available;	/* some embedded MIPS like Nevada */
 extern char vce_available;		/* Supports VCED / VCEI exceptions */
+extern char mips4_available;		/* CPU has MIPS IV ISA or better */
 
 extern struct mips_cpuinfo boot_cpu_data;
 extern unsigned int vced_count, vcei_count;
@@ -72,12 +74,13 @@ extern int EISA_bus;
 extern struct task_struct *last_task_used_math;
 
 /*
- * User space process size: 2GB. This is hardcoded into a few places,
+ * User space process size: 1TB. This is hardcoded into a few places,
  * so don't change it unless you know what you are doing.  TASK_SIZE
- * for a 64 bit kernel expandable to 8192EB, of which the current MIPS
- * implementations will "only" be able to use 1TB ...
+ * is limited to 1TB by the R4000 architecture; R10000 and better do
+ * support 16TB.
+#define TASK_SIZE	   0x80000000UL
  */
-#define TASK_SIZE	(0x80000000UL)
+#define TASK_SIZE	0x10000000000UL
 
 /* This decides where the kernel will search for a free chunk of vm
  * space during mmap's.
@@ -92,9 +95,9 @@ extern struct task_struct *last_task_used_math;
 #define NUM_FPU_REGS	32
 
 struct mips_fpu_hard_struct {
-	unsigned int fp_regs[NUM_FPU_REGS];
+	unsigned long fp_regs[NUM_FPU_REGS];
 	unsigned int control;
-} __attribute__((aligned(8)));
+};
 
 /*
  * FIXME: no fpu emulator yet (but who cares anyway?)
@@ -136,7 +139,6 @@ struct thread_struct {
 	unsigned long cp0_baduaddr;	/* Last kernel fault accessing USEG */
 	unsigned long error_code;
 	unsigned long trap_no;
-	unsigned long pg_dir;                   /* used in tlb refill    */
 #define MF_FIXADE 1			/* Fix address errors in software */
 #define MF_LOGADE 2			/* Log address errors to syslog */
 	unsigned long mflags;
@@ -150,7 +152,7 @@ struct thread_struct {
 #define INIT_MMAP { &init_mm, KSEG0, KSEG1, NULL, PAGE_SHARED, \
                     VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
 
-#define INIT_TSS  { \
+#define INIT_THREAD  { \
         /* \
          * saved main processor registers \
          */ \
@@ -167,7 +169,7 @@ struct thread_struct {
 	/* \
 	 * Other stuff associated with the process \
 	 */ \
-	0, 0, 0, 0, (unsigned long) swapper_pg_dir, \
+	0, 0, 0, 0, \
 	/* \
 	 * For now the default is to fix address errors \
 	 */ \
@@ -176,16 +178,18 @@ struct thread_struct {
 
 #ifdef __KERNEL__
 
-#define KERNEL_STACK_SIZE 8192
+/* Linus sez 16kb is good for you ...  */
+#define KERNEL_STACK_SIZE 0x4000
 
 #if !defined (_LANGUAGE_ASSEMBLY)
 
 /* Free all resources held by a thread. */
-extern void release_thread(struct task_struct *);
+#define release_thread(thread) do { } while(0)
+
 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 
 /* Copy and release all segment info associated with a VM */
-#define copy_segments(nr, p, mm) do { } while(0)
+#define copy_segments(p, mm) do { } while(0)
 #define release_segments(mm) do { } while(0)
 #define forget_segments()		do { } while (0)
 
@@ -214,16 +218,17 @@ extern int (*user_mode)(struct pt_regs *);
 	regs->cp0_status = (regs->cp0_status & ~(ST0_CU0|ST0_KSU)) | KSU_USER;\
 	regs->cp0_epc = new_pc;						\
 	regs->regs[29] = new_sp;					\
-	current->tss.current_ds = USER_DS;				\
+	current->thread.current_ds = USER_DS;				\
 } while (0)
 
 /* Allocation and freeing of basic task resources. */
 /*
  * NOTE! The task struct and the stack go together
  */
+#define THREAD_SIZE (2*PAGE_SIZE)
 #define alloc_task_struct() \
-	((struct task_struct *) __get_free_pages(GFP_KERNEL,1))
-#define free_task_struct(p)	free_pages((unsigned long)(p),1)
+	((struct task_struct *) __get_free_pages(GFP_KERNEL, 2))
+#define free_task_struct(p)	free_pages((unsigned long)(p), 2)
 
 #define init_task	(init_task_union.task)
 #define init_stack	(init_task_union.stack)
diff --git a/include/asm-mips64/ptrace.h b/include/asm-mips64/ptrace.h
index 23c76b6b3..3e61613ca 100644
--- a/include/asm-mips64/ptrace.h
+++ b/include/asm-mips64/ptrace.h
@@ -1,4 +1,4 @@
-/* $Id: ptrace.h,v 1.1 1999/08/18 21:46:55 ralf Exp $
+/* $Id: ptrace.h,v 1.2 1999/09/28 22:27:19 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -23,14 +23,22 @@
 #define FPC_EIR		70
 
 #ifndef __ASSEMBLY__
+
+#define abi64_no_regargs						\
+	unsigned long __dummy0,						\
+	unsigned long __dummy1,						\
+	unsigned long __dummy2,						\
+	unsigned long __dummy3,						\
+	unsigned long __dummy4,						\
+	unsigned long __dummy5,						\
+	unsigned long __dummy6,						\
+	unsigned long __dummy7
+
 /*
  * This struct defines the way the registers are stored on the stack during a
  * system call/exception. As usual the registers k0/k1 aren't being saved.
  */
 struct pt_regs {
-	/* Pad bytes for argument save space on the stack. */
-	unsigned long pad0[8];
-
 	/* Saved main processor registers. */
 	unsigned long regs[32];
 
diff --git a/include/asm-mips64/reboot.h b/include/asm-mips64/reboot.h
deleted file mode 100644
index 217c4a828..000000000
--- a/include/asm-mips64/reboot.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1997, 1999 by Ralf Baechle
- *
- * Declare variables for rebooting.
- */
-#ifndef _ASM_REBOOT_H
-#define _ASM_REBOOT_H
-
-void (*_machine_restart)(char *command);
-void (*_machine_halt)(void);
-void (*_machine_power_off)(void);
-
-#endif /* _ASM_REBOOT_H */
diff --git a/include/asm-mips64/segment.h b/include/asm-mips64/segment.h
new file mode 100644
index 000000000..92ac001fc
--- /dev/null
+++ b/include/asm-mips64/segment.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SEGMENT_H
+#define _ASM_SEGMENT_H
+
+/* Only here because we have some old header files that expect it.. */
+
+#endif /* _ASM_SEGMENT_H */
diff --git a/include/asm-mips64/semaphore-helper.h b/include/asm-mips64/semaphore-helper.h
index 908d16c4b..fa2f70645 100644
--- a/include/asm-mips64/semaphore-helper.h
+++ b/include/asm-mips64/semaphore-helper.h
@@ -1,4 +1,4 @@
-/* $Id$
+/* $Id: semaphore-helper.h,v 1.2 1999/10/20 18:10:32 ralf Exp $
  *
  * SMP- and interrupt-safe semaphores helper functions.
  *
diff --git a/include/asm-mips64/semaphore.h b/include/asm-mips64/semaphore.h
index b28d9999f..870975480 100644
--- a/include/asm-mips64/semaphore.h
+++ b/include/asm-mips64/semaphore.h
@@ -1,4 +1,4 @@
-/* $Id: semaphore.h,v 1.1 1999/08/18 23:37:52 ralf Exp $
+/* $Id: semaphore.h,v 1.3 1999/10/20 18:10:32 ralf Exp $
  *
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
diff --git a/include/asm-mips64/sgi/sgi.h b/include/asm-mips64/sgi/sgi.h
index 1606e8d5a..0e6840aed 100644
--- a/include/asm-mips64/sgi/sgi.h
+++ b/include/asm-mips64/sgi/sgi.h
@@ -1,4 +1,4 @@
-/* $Id$
+/* $Id: sgi.h,v 1.1 1999/08/20 21:13:37 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
diff --git a/include/asm-mips64/sgi/sgihpc.h b/include/asm-mips64/sgi/sgihpc.h
index d862d9dc9..ab9ede57e 100644
--- a/include/asm-mips64/sgi/sgihpc.h
+++ b/include/asm-mips64/sgi/sgihpc.h
@@ -1,4 +1,4 @@
-/* $Id$
+/* $Id: sgihpc.h,v 1.2 1999/10/19 20:51:54 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -22,8 +22,8 @@ extern int sgi_boardid;  /* Board revision. */
 
 /* An HPC dma descriptor. */
 struct hpc_dma_desc {
-	unsigned long pbuf;      /* physical address of data buffer */
-	unsigned long cntinfo;   /* counter and info bits */
+	int pbuf;		 /* physical address of data buffer */
+	int cntinfo;   		 /* counter and info bits */
 #define HPCDMA_EOX    0x80000000 /* last desc in chain for tx */
 #define HPCDMA_EOR    0x80000000 /* last desc in chain for rx */
 #define HPCDMA_EOXP   0x40000000 /* end of packet for tx */
@@ -35,10 +35,10 @@ struct hpc_dma_desc {
 #define HPCDMA_OWN    0x00004000 /* Denotes ring buffer ownership on rx */
 #define HPCDMA_BCNT   0x00003fff /* size in bytes of this dma buffer */
 
-	unsigned long pnext;     /* paddr of next hpc_dma_desc if any */
+	int pnext;		 /* paddr of next hpc_dma_desc if any */
 };
 
-typedef volatile unsigned long hpcreg;
+typedef volatile unsigned int hpcreg;
 
 /* HPC1 stuff. */
 
@@ -332,7 +332,7 @@ extern struct hpc3_miscregs *hpc3mregs;
 #define HPC3_MREGS_PBASE   0x1fbd9800 /* physical */
 
 /* We need software copies of these because they are write only. */
-extern unsigned long sgi_hpc_write1, sgi_hpc_write2;
+extern unsigned int sgi_hpc_write1, sgi_hpc_write2;
 
 #define SGI_KEYBOARD_IRQ 20
 
diff --git a/include/asm-mips64/sgi/sgimc.h b/include/asm-mips64/sgi/sgimc.h
index 9e236a564..56b5b5d19 100644
--- a/include/asm-mips64/sgi/sgimc.h
+++ b/include/asm-mips64/sgi/sgimc.h
@@ -1,4 +1,4 @@
-/* $Id$
+/* $Id: sgimc.h,v 1.2 1999/10/19 20:51:54 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -8,13 +8,15 @@
  *          SGI IP20, IP22, IP26, and IP28 machines.
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
+ * Copyright (C) 1999 Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
  */
 #ifndef _ASM_SGI_SGIMC_H
 #define _ASM_SGI_SGIMC_H
 
 struct sgimc_misc_ctrl {
-	unsigned long _unused1;
-	volatile unsigned long cpuctrl0;     /* CPU control register 0, readwrite */
+	u32 _unused1;
+	volatile u32 cpuctrl0;     /* CPU control register 0, readwrite */
 #define SGIMC_CCTRL0_REFS         0x0000000f /* REFS mask */
 #define SGIMC_CCTRL0_EREFRESH     0x00000010 /* Memory refresh enable */
 #define SGIMC_CCTRL0_EPERRGIO     0x00000020 /* GIO parity error enable */
@@ -35,8 +37,8 @@ struct sgimc_misc_ctrl {
 #define SGIMC_CCTRL0_R4KNOCHKPARR 0x04000000 /* Don't chk parity on mem data reads */
 #define SGIMC_CCTRL0_GIOBTOB      0x08000000 /* Allow GIO back to back writes */
 
-	unsigned long _unused2;
-	volatile unsigned long cpuctrl1;     /* CPU control register 1, readwrite */
+	u32 _unused2;
+	volatile u32 cpuctrl1;     /* CPU control register 1, readwrite */
 #define SGIMC_CCTRL1_EGIOTIMEO    0x00000010 /* GIO bus timeout enable */
 #define SGIMC_CCTRL1_FIXEDEHPC    0x00001000 /* Fixed HPC endianness */
 #define SGIMC_CCTRL1_LITTLEHPC    0x00002000 /* Little endian HPC */
@@ -45,18 +47,18 @@ struct sgimc_misc_ctrl {
 #define SGIMC_CCTRL1_FIXEDEEXP1   0x00010000 /* Fixed EXP1 endianness */
 #define SGIMC_CCTRL1_LITTLEEXP1   0x00020000 /* Little endian EXP1 */
 
-	unsigned long _unused3;
-	volatile unsigned long watchdogt;    /* Watchdog reg rdonly, write clears */
+	u32 _unused3;
+	volatile u32 watchdogt;    /* Watchdog reg rdonly, write clears */
 
-	unsigned long _unused4;
-	volatile unsigned long systemid;     /* MC system ID register, readonly */
+	u32 _unused4;
+	volatile u32 systemid;     /* MC system ID register, readonly */
 #define SGIMC_SYSID_MASKREV       0x0000000f /* Revision of MC controller */
 #define SGIMC_SYSID_EPRESENT      0x00000010 /* Indicates presence of EISA bus */
 
-	unsigned long _unused5[3];
-	volatile unsigned long divider;      /* Divider reg for RPSS */
+	u32 _unused5[3];
+	volatile u32 divider;      /* Divider reg for RPSS */
 
-	unsigned long _unused6;
+	u32 _unused6;
 	volatile unsigned char eeprom;       /* EEPROM byte reg for r4k */
 #define SGIMC_EEPROM_PRE          0x00000001 /* eeprom chip PRE pin assertion */
 #define SGIMC_EEPROM_CSEL         0x00000002 /* Active high, eeprom chip select */
@@ -65,16 +67,16 @@ struct sgimc_misc_ctrl {
 #define SGIMC_EEPROM_SDATAI       0x00000010 /* Serial EEPROM data-in */
 
 	unsigned char _unused7[3];
-	unsigned long _unused8[3];
+	u32 _unused8[3];
 	volatile unsigned short rcntpre;     /* Preload refresh counter */
 
 	unsigned short _unused9;
-	unsigned long _unused9a;
+	u32 _unused9a;
 	volatile unsigned short rcounter;    /* Readonly refresh counter */
 
 	unsigned short _unused10;
-	unsigned long _unused11[13];
-	volatile unsigned long gioparm;      /* Parameter word for GIO64 */
+	u32 _unused11[13];
+	volatile u32 gioparm;      /* Parameter word for GIO64 */
 #define SGIMC_GIOPARM_HPC64       0x00000001 /* HPC talks to GIO using 64-bits */
 #define SGIMC_GIOPARM_GFX64       0x00000002 /* GFX talks to GIO using 64-bits */
 #define SGIMC_GIOPARM_EXP064      0x00000004 /* EXP(slot0) talks using 64-bits */
@@ -92,18 +94,18 @@ struct sgimc_misc_ctrl {
 #define SGIMC_GIOPARM_PLINEEXP0   0x00004000 /* EXP(slot0) has pipeline attr */
 #define SGIMC_GIOPARM_PLINEEXP1   0x00008000 /* EXP(slot1) has pipeline attr */
 
-	unsigned long _unused13;
+	u32 _unused13;
 	volatile unsigned short cputp;       /* CPU bus arb time period */
 
 	unsigned short _unused14;
-	unsigned long _unused15[3];
+	u32 _unused15[3];
 	volatile unsigned short lbursttp;    /* Time period for long bursts */
 
 	unsigned short _unused16;
-	unsigned long _unused17[9];
-	volatile unsigned long mconfig0;     /* Memory config register zero */
-	unsigned long _unused18;
-	volatile unsigned long mconfig1;     /* Memory config register one */
+	u32 _unused17[9];
+	volatile u32 mconfig0;     /* Memory config register zero */
+	u32 _unused18;
+	volatile u32 mconfig1;     /* Memory config register one */
 
         /* These defines apply to both mconfig registers above. */
 #define SGIMC_MCONFIG_FOURMB     0x00000000  /* Physical ram = 4megs */
@@ -114,99 +116,99 @@ struct sgimc_misc_ctrl {
 #define SGIMC_MCONFIG_OTEIGHTMB  0x00001f00  /* Physical ram = 128megs */
 #define SGIMC_MCONFIG_RMASK      0x00001f00  /* Ram config bitmask */
 
-	unsigned long _unused19;
-	volatile unsigned long cmacc;        /* Mem access config for CPU */
-	unsigned long _unused20;
-	volatile unsigned long gmacc;        /* Mem access config for GIO */
+	u32 _unused19;
+	volatile u32 cmacc;        /* Mem access config for CPU */
+	u32 _unused20;
+	volatile u32 gmacc;        /* Mem access config for GIO */
 
 	/* This define applies to both cmacc and gmacc registers above. */
 #define SGIMC_MACC_ALIASBIG       0x20000000 /* 512MB home for alias */
 
 	/* Error address/status regs from GIO and CPU perspectives. */
-	unsigned long _unused21;
-	volatile unsigned long cerr;         /* Error address reg for CPU */
-	unsigned long _unused22;
-	volatile unsigned long cstat;        /* Status reg for CPU */
-	unsigned long _unused23;
-	volatile unsigned long gerr;         /* Error address reg for GIO */
-	unsigned long _unused24;
-	volatile unsigned long gstat;        /* Status reg for GIO */
+	u32 _unused21;
+	volatile u32 cerr;         /* Error address reg for CPU */
+	u32 _unused22;
+	volatile u32 cstat;        /* Status reg for CPU */
+	u32 _unused23;
+	volatile u32 gerr;         /* Error address reg for GIO */
+	u32 _unused24;
+	volatile u32 gstat;        /* Status reg for GIO */
 
 	/* Special hard bus locking registers. */
-	unsigned long _unused25;
+	u32 _unused25;
 	volatile unsigned char syssembit;    /* Uni-bit system semaphore */
 	unsigned char _unused26[3];
-	unsigned long _unused27;
+	u32 _unused27;
 	volatile unsigned char mlock;        /* Global GIO memory access lock */
 	unsigned char _unused28[3];
-	unsigned long _unused29;
+	u32 _unused29;
 	volatile unsigned char elock;        /* Locks EISA from GIO accesses */
 
 	/* GIO dma control registers. */
 	unsigned char _unused30[3];
-	unsigned long _unused31[14];
-	volatile unsigned long gio_dma_trans;/* DMA mask to translation GIO addrs */
-	unsigned long _unused32;
-	volatile unsigned long gio_dma_sbits;/* DMA GIO addr substitution bits */
-	unsigned long _unused33;
-	volatile unsigned long dma_intr_cause; /* DMA IRQ cause indicator bits */
-	unsigned long _unused34;
-	volatile unsigned long dma_ctrl;     /* Main DMA control reg */
+	u32 _unused31[14];
+	volatile u32 gio_dma_trans;/* DMA mask to translation GIO addrs */
+	u32 _unused32;
+	volatile u32 gio_dma_sbits;/* DMA GIO addr substitution bits */
+	u32 _unused33;
+	volatile u32 dma_intr_cause; /* DMA IRQ cause indicator bits */
+	u32 _unused34;
+	volatile u32 dma_ctrl;     /* Main DMA control reg */
 
 	/* DMA TLB entry 0 */
-	unsigned long _unused35;
-	volatile unsigned long dtlb_hi0;
-	unsigned long _unused36;
-	volatile unsigned long dtlb_lo0;
+	u32 _unused35;
+	volatile u32 dtlb_hi0;
+	u32 _unused36;
+	volatile u32 dtlb_lo0;
 
 	/* DMA TLB entry 1 */
-	unsigned long _unused37;
-	volatile unsigned long dtlb_hi1;
-	unsigned long _unused38;
-	volatile unsigned long dtlb_lo1;
+	u32 _unused37;
+	volatile u32 dtlb_hi1;
+	u32 _unused38;
+	volatile u32 dtlb_lo1;
 
 	/* DMA TLB entry 2 */
-	unsigned long _unused39;
-	volatile unsigned long dtlb_hi2;
-	unsigned long _unused40;
-	volatile unsigned long dtlb_lo2;
+	u32 _unused39;
+	volatile u32 dtlb_hi2;
+	u32 _unused40;
+	volatile u32 dtlb_lo2;
 
 	/* DMA TLB entry 3 */
-	unsigned long _unused41;
-	volatile unsigned long dtlb_hi3;
-	unsigned long _unused42;
-	volatile unsigned long dtlb_lo3;
+	u32 _unused41;
+	volatile u32 dtlb_hi3;
+	u32 _unused42;
+	volatile u32 dtlb_lo3;
 };
 
 /* MC misc control registers live at physical 0x1fa00000. */
 extern struct sgimc_misc_ctrl *mcmisc_regs;
-extern unsigned long *rpsscounter;          /* Chirps at 100ns */
+extern u32 *rpsscounter;          /* Chirps at 100ns */
 
 struct sgimc_dma_ctrl {
-	unsigned long _unused1;
-	volatile unsigned long maddronly;   /* Address DMA goes at */
-	unsigned long _unused2;
-	volatile unsigned long maddrpdeflts; /* Same as above, plus set defaults */
-	unsigned long _unused3;
-	volatile unsigned long dmasz;       /* DMA count */
-	unsigned long _unused4;
-	volatile unsigned long ssize;       /* DMA stride size */
-	unsigned long _unused5;
-	volatile unsigned long gmaddronly;  /* Set GIO DMA but do not start trans */
-	unsigned long _unused6;
-	volatile unsigned long dmaddnpgo;   /* Set GIO DMA addr + start transfer */
-	unsigned long _unused7;
-	volatile unsigned long dmamode;     /* DMA mode config bit settings */
-	unsigned long _unused8;
-	volatile unsigned long dmacount;    /* Zoom and byte count for DMA */
-	unsigned long _unused9;
-	volatile unsigned long dmastart;    /* Pedal to the metal. */
-	unsigned long _unused10;
-	volatile unsigned long dmarunning;  /* DMA op is in progress */
-	unsigned long _unused11;
+	u32 _unused1;
+	volatile u32 maddronly;   /* Address DMA goes at */
+	u32 _unused2;
+	volatile u32 maddrpdeflts; /* Same as above, plus set defaults */
+	u32 _unused3;
+	volatile u32 dmasz;       /* DMA count */
+	u32 _unused4;
+	volatile u32 ssize;       /* DMA stride size */
+	u32 _unused5;
+	volatile u32 gmaddronly;  /* Set GIO DMA but do not start trans */
+	u32 _unused6;
+	volatile u32 dmaddnpgo;   /* Set GIO DMA addr + start transfer */
+	u32 _unused7;
+	volatile u32 dmamode;     /* DMA mode config bit settings */
+	u32 _unused8;
+	volatile u32 dmacount;    /* Zoom and byte count for DMA */
+	u32 _unused9;
+	volatile u32 dmastart;    /* Pedal to the metal. */
+	u32 _unused10;
+	volatile u32 dmarunning;  /* DMA op is in progress */
+	u32 _unused11;
 
 	/* Set dma addr, defaults, and kick it */
-	volatile unsigned long maddr_defl_go; /* go go go! -lm */
+	volatile u32 maddr_defl_go; /* go go go! -lm */
 };
 
 /* MC controller dma regs live at physical 0x1fa02000. */
@@ -217,7 +219,7 @@ extern struct sgimc_dma_ctrl *dmactrlregs;
 #define SGIMC_SEG1_BADDR     0x20000000
 
 /* Maximum size of the above banks are per machine. */
-extern unsigned long sgimc_seg0_size, sgimc_seg1_size;
+extern u32 sgimc_seg0_size, sgimc_seg1_size;
 #define SGIMC_SEG0_SIZE_ALL         0x10000000 /* 256MB */
 #define SGIMC_SEG1_SIZE_IP20_IP22   0x08000000 /* 128MB */
 #define SGIMC_SEG1_SIZE_IP26_IP28   0x20000000 /* 512MB */
diff --git a/include/asm-mips64/sgi/sgint23.h b/include/asm-mips64/sgi/sgint23.h
index 1633345ef..83c465b62 100644
--- a/include/asm-mips64/sgi/sgint23.h
+++ b/include/asm-mips64/sgi/sgint23.h
@@ -1,4 +1,4 @@
-/* $Id$
+/* $Id: sgint23.h,v 1.3 1999/10/20 18:10:32 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -25,6 +25,32 @@
 #define SGINT_HPCDMA   41  /* INDY has 11 HPCDMA irq _sources_ */
 #define SGINT_END      52  /* End of 'spaces' */
 
+/* Individual interrupt definitions for the INDY and Indigo2
+ */
+
+#define SGI_WD93_0_IRQ	SGINT_LOCAL0 + 1	/* 1st onboard WD93 */
+#define SGI_WD93_1_IRQ	SGINT_LOCAL0 + 2	/* 2nd onboard WD93 */
+#define SGI_ENET_IRQ	SGINT_LOCAL0 + 3	/* onboard ethernet */
+
+#define SGI_PANEL_IRQ	SGINT_LOCAL1 + 1	/* front panel */
+
+#define SGI_EISA_IRQ	SGINT_LOCAL2 + 3	/* EISA interrupts */
+#define SGI_KEYBOARD_IRQ	SGINT_LOCAL2 + 4	/* keyboard */
+#define SGI_SERIAL_IRQ	SGINT_LOCAL2 + 5	/* onboard serial */
+
+/* Individual interrupt definitions for the INDY and Indigo2
+ */
+
+#define SGI_WD93_0_IRQ	SGINT_LOCAL0 + 1	/* 1st onboard WD93 */
+#define SGI_WD93_1_IRQ	SGINT_LOCAL0 + 2	/* 2nd onboard WD93 */
+#define SGI_ENET_IRQ	SGINT_LOCAL0 + 3	/* onboard ethernet */
+
+#define SGI_PANEL_IRQ	SGINT_LOCAL1 + 1	/* front panel */
+
+#define SGI_EISA_IRQ	SGINT_LOCAL2 + 3	/* EISA interrupts */
+#define SGI_KEYBOARD_IRQ	SGINT_LOCAL2 + 4	/* keyboard */
+#define SGI_SERIAL_IRQ	SGINT_LOCAL2 + 5	/* onboard serial */
+
 /* INT2 occupies HPC PBUS slot 4, INT3 uses slot 6. */
 #define SGI_INT2_BASE 0x1fbd9000 /* physical */
 #define SGI_INT3_BASE 0x1fbd9880 /* physical */
@@ -141,7 +167,7 @@ struct sgi_ioc_timers {
 struct sgi_int2_regs {
 	struct sgi_ioc_ints ints;
 
-	volatile unsigned long ledbits;   /* LED control bits */
+	volatile u32 ledbits; 		  /* LED control bits */
 #define INT2_LED_TXCLK         0x01       /* GPI to TXCLK enable */
 #define INT2_LED_SERSLCT0      0x02       /* serial port0: 0=apple 1=pc */
 #define INT2_LED_SERSLCT1      0x04       /* serial port1: 0=apple 1=pc */
@@ -160,8 +186,8 @@ struct sgi_int2_regs {
 /* I am guesing there are only two unused registers here 
  * but I could be wrong...			- andrewb
  */
-/*	unsigned long _unused[3]; */
-	unsigned long _unused[2];
+/*	u32 _unused[3]; */
+	u32 _unused[2];
 	struct sgi_ioc_timers timers;
 };
 
@@ -170,13 +196,13 @@ struct sgi_int3_regs {
 
 #ifdef __MIPSEB__
 	unsigned char _unused0[3];
-	volatile unsigned char tclear;    /* Timer clear strobe address */
+	volatile unsigned char tclear;		/* Timer clear strobe address */
 #else
-	volatile unsigned char tclear;    /* Timer clear strobe address */
+	volatile unsigned char tclear;		/* Timer clear strobe address */
 	unsigned char _unused0[3];
 #endif
-	volatile unsigned long estatus;   /* Error status reg */
-	unsigned long _unused1[2];
+	volatile u32 estatus;			/* Error status reg */
+	u32 _unused1[2];
 	struct sgi_ioc_timers timers;
 };
 
diff --git a/include/asm-mips64/sgialib.h b/include/asm-mips64/sgialib.h
index 0aa83307a..cafa0aa1c 100644
--- a/include/asm-mips64/sgialib.h
+++ b/include/asm-mips64/sgialib.h
@@ -1,4 +1,4 @@
-/* $Id$
+/* $Id: sgialib.h,v 1.2 1999/08/20 21:59:08 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -13,10 +13,16 @@
 
 #include <asm/sgiarcs.h>
 
-extern struct linux_promblock *sgi_pblock;
+extern PSYSTEM_PARAMETER_BLOCK sgi_pblock;
 extern struct linux_romvec *romvec;
 extern int prom_argc;
-extern char **prom_argv, **prom_envp;
+
+extern LONG *_prom_argv, *_prom_envp;
+
+/* A 32-bit ARC PROM pass arguments and environment as 32-bit pointer.
+   These macros take care of sign extension.  */
+#define prom_argv(index) ((char *) (long) _prom_argv[(index)])
+#define prom_argc(index) ((char *) (long) _prom_argc[(index)])
 
 extern int prom_flags;
 #define PROM_FLAG_ARCS  1
@@ -36,9 +42,9 @@ extern void prom_printf(char *fmt, ...);
 /* Memory descriptor management. */
 #define PROM_MAX_PMEMBLOCKS    32
 struct prom_pmemblock {
-	unsigned long base; /* Within KSEG0. */
-	unsigned int size;  /* In bytes. */
-        unsigned int type;  /* free or prom memory */
+	LONG	base;		/* Within KSEG0. */
+	ULONG size;		/* In bytes. */
+        ULONG type;		/* free or prom memory */
 };
 
 /* Get next memory descriptor after CURR, returns first descriptor
@@ -60,10 +66,10 @@ extern struct prom_pmemblock *prom_getpblock_array(void);
 #define PROM_NULL_COMPONENT ((pcomponent *) 0)
 
 /* Get sibling component of THIS. */
-extern pcomponent *prom_getsibling(pcomponent *this);
+extern pcomponent *ArcGetPeer(pcomponent *this);
 
 /* Get child component of THIS. */
-extern pcomponent *prom_getchild(pcomponent *this);
+extern pcomponent *ArcGetChild(pcomponent *this);
 
 /* Get parent component of CHILD. */
 extern pcomponent *prom_getparent(pcomponent *child);
@@ -85,8 +91,8 @@ extern pcomponent *prom_componentbypath(char *path);
 extern void prom_identify_arch(void);
 
 /* Environemt variable routines. */
-extern char *prom_getenv(char *name);
-extern long prom_setenv(char *name, char *value);
+extern PCHAR ArcGetEnvironmentVariable(PCHAR name);
+extern LONG SetEnvironmentVariable(PCHAR name, PCHAR value);
 
 /* ARCS command line acquisition and parsing. */
 extern char *prom_getcmdline(void);
@@ -100,9 +106,9 @@ extern unsigned long prom_getrtime(void);
 extern long prom_getvdirent(unsigned long fd, struct linux_vdirent *ent, unsigned long num, unsigned long *cnt);
 extern long prom_open(char *name, enum linux_omode md, unsigned long *fd);
 extern long prom_close(unsigned long fd);
-extern long prom_read(unsigned long fd, void *buf, unsigned long num, unsigned long *cnt);
+extern LONG ArcRead(ULONG fd, PVOID buf, ULONG num, PULONG cnt);
 extern long prom_getrstatus(unsigned long fd);
-extern long prom_write(unsigned long fd, void *buf, unsigned long num, unsigned long *cnt);
+extern LONG ArcWrite(ULONG fd, PVOID buf, ULONG num, PULONG cnt);
 extern long prom_seek(unsigned long fd, struct linux_bigint *off, enum linux_seekmode sm);
 extern long prom_mount(char *name, enum linux_mountops op);
 extern long prom_getfinfo(unsigned long fd, struct linux_finfo *buf);
@@ -117,8 +123,8 @@ extern long prom_exec(char *name, long argc, char **argv, char **envp);
 extern void prom_halt(void) __attribute__((noreturn));
 extern void prom_powerdown(void) __attribute__((noreturn));
 extern void prom_restart(void) __attribute__((noreturn));
-extern void prom_reboot(void) __attribute__((noreturn));
-extern void prom_imode(void) __attribute__((noreturn));
+extern VOID ArcReboot(VOID) __attribute__((noreturn));
+extern VOID ArcEnterInteractiveMode(VOID) __attribute__((noreturn));
 extern long prom_cfgsave(void);
 extern struct linux_sysid *prom_getsysid(void);
 extern void prom_cacheflush(void);
diff --git a/include/asm-mips64/sgiarcs.h b/include/asm-mips64/sgiarcs.h
index 8aed20dce..632920b3b 100644
--- a/include/asm-mips64/sgiarcs.h
+++ b/include/asm-mips64/sgiarcs.h
@@ -1,4 +1,4 @@
-/* $Id: sgiarcs.h,v 1.2 1999/08/20 21:59:08 ralf Exp $
+/* $Id: sgiarcs.h,v 1.3 1999/08/21 22:19:17 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -13,6 +13,8 @@
 #ifndef _ASM_SGIARCS_H
 #define _ASM_SGIARCS_H
 
+#include <asm/arc/types.h>
+
 /* Various ARCS error codes. */
 #define PROM_ESUCCESS                   0x00
 #define PROM_E2BIG                      0x01
@@ -75,16 +77,16 @@ enum linux_identifier {
 
 /* A prom device tree component. */
 struct linux_component {
-	enum linux_devclass     class;   /* node class */
-	enum linux_devtypes     type;    /* node type */
-	enum linux_identifier   iflags;  /* node flags */
-	unsigned short          vers;    /* node version */
-	unsigned short          rev;     /* node revision */
-	unsigned long           key;     /* completely magic */
-	unsigned long           amask;   /* XXX affinity mask??? */
-	unsigned long           cdsize;  /* size of configuration data */
-	unsigned long           ilen;    /* length of string identifier */
-	char                   *iname;   /* string identifier */
+	enum linux_devclass     class;	/* node class */
+	enum linux_devtypes     type;	/* node type */
+	enum linux_identifier   iflags;	/* node flags */
+	USHORT 			vers;	/* node version */
+	USHORT 			rev;	/* node revision */
+	ULONG 			key;	/* completely magic */
+	ULONG 			amask;	/* XXX affinity mask??? */
+	ULONG			cdsize;	/* size of configuration data */
+	ULONG			ilen;	/* length of string identifier */
+	_PULONG			iname;	/* string identifier */
 };
 typedef struct linux_component pcomponent;
 
@@ -122,9 +124,9 @@ union linux_memtypes {
 };
 
 struct linux_mdesc {
-        union linux_memtypes type;
-	unsigned long base;
-	unsigned long pages;
+	union linux_memtypes type;
+	ULONG base;
+	ULONG pages;
 };
 
 /* Time of day descriptor. */
@@ -180,104 +182,91 @@ struct linux_finfo {
 	char                  name[32]; /* XXX imperical, should be define */
 };
 
+/* This describes the vector containing fuction pointers to the ARC
+   firmware functions.  */
 struct linux_romvec {
-	/* Load an executable image. */
-	long (*load)(char *file, unsigned long end,
-		     unsigned long *start_pc,
-		     unsigned long *end_addr);
-
-	/* Invoke a standalong image. */
-	long (*invoke)(unsigned long startpc, unsigned long sp,
-		       long argc, char **argv, char **envp);
-
-	/* Load and begin execution of a standalong image. */
-	long (*exec)(char *file, long argc, char **argv, char **envp);
-
-	void (*halt)(void) __attribute__((noreturn)); 	/* Halt the machine. */
-	void (*pdown)(void) __attribute__((noreturn));    /* Power down the machine. */
-	void (*restart)(void) __attribute__((noreturn));  /* XXX soft reset??? */
-	void (*reboot)(void) __attribute__((noreturn));   /* Reboot the machine. */
-	void (*imode)(void) __attribute__((noreturn));    /* Enter PROM interactive mode. */
-	int _unused1; /* padding */
+	LONG load;			/* Load an executable image. */
+	LONG invoke;			/* Invoke a standalong image. */
+	LONG exec;			/* Load and begin execution of a
+					   standalone image. */
+	LONG halt;			/* Halt the machine. */
+	LONG pdown;			/* Power down the machine. */
+	LONG restart;			/* XXX soft reset??? */
+	LONG reboot;			/* Reboot the machine. */
+	LONG imode;			/* Enter PROM interactive mode. */
+	LONG _unused1;			/* Was ReturnFromMain(). */
 
 	/* PROM device tree interface. */
-	pcomponent *(*next_component)(pcomponent *this);
-	pcomponent *(*child_component)(pcomponent *this);
-	pcomponent *(*parent_component)(pcomponent *this);
-	long (*component_data)(void *opaque_data, pcomponent *this);
-	pcomponent *(*child_add)(pcomponent *this,
-				 pcomponent *tmp,
-				 void *opaque_data);
-	long (*comp_del)(pcomponent *this);
-	pcomponent *(*component_by_path)(char *file);
+	LONG next_component;
+	LONG child_component;
+	LONG parent_component;
+	LONG component_data;
+	LONG child_add;
+	LONG comp_del;
+	LONG component_by_path;
 
 	/* Misc. stuff. */
-	long (*cfg_save)(void);
-	struct linux_sysid *(*get_sysid)(void);
+	LONG cfg_save;
+	LONG get_sysid;
 
 	/* Probing for memory. */
-	struct linux_mdesc *(*get_mdesc)(struct linux_mdesc *curr);
-	long _unused2; /* padding */
+	LONG	get_mdesc;
+	LONG	_unused2;		/* was Signal() */
 
-	struct linux_tinfo *(*get_tinfo)(void);
-	unsigned long (*get_rtime)(void);
+	LONG	get_tinfo;
+	LONG	get_rtime;
 
 	/* File type operations. */
-	long (*get_vdirent)(unsigned long fd, struct linux_vdirent *entry,
-			    unsigned long num, unsigned long *count);
-	long (*open)(char *file, enum linux_omode mode, unsigned long *fd);
-	long (*close)(unsigned long fd);
-	long (*read)(unsigned long fd, void *buffer, unsigned long num,
-		     unsigned long *count);
-	long (*get_rstatus)(unsigned long fd);
-	long (*write)(unsigned long fd, void *buffer, unsigned long num,
-		      unsigned long *count);
-	long (*seek)(unsigned long fd, struct linux_bigint *offset,
-		     enum linux_seekmode smode);
-	long (*mount)(char *file, enum linux_mountops op);
+	LONG	get_vdirent;
+	LONG	open;
+	LONG	close;
+	LONG	read;
+	LONG	get_rstatus;
+	LONG	write;
+	LONG	seek;
+	LONG	mount;
 
 	/* Dealing with firmware environment variables. */
-	char *(*get_evar)(char *name);
-	long (*set_evar)(char *name, char *value);
+	LONG	get_evar;
+	LONG	set_evar;
 
-	long (*get_finfo)(unsigned long fd, struct linux_finfo *buf);
-	long (*set_finfo)(unsigned long fd, unsigned long flags,
-			  unsigned long mask);
+	LONG	get_finfo;
+	LONG	set_finfo;
 
 	/* Miscellaneous. */
-	void (*cache_flush)(void);
+	LONG	cache_flush;
 };
 
 /* The SGI ARCS parameter block is in a fixed location for standalone
  * programs to access PROM facilities easily.
  */
-struct linux_promblock {
-	long                 magic;       /* magic cookie */
+typedef struct _SYSTEM_PARAMETER_BLOCK {
+	ULONG			magic;		/* magic cookie */
 #define PROMBLOCK_MAGIC      0x53435241
 
-	unsigned long        len;          /* length of parm block */
-	unsigned short       ver;          /* ARCS firmware version */
-	unsigned short       rev;          /* ARCS firmware revision */
-	long                *rs_block;     /* Restart block. */
-	long                *dbg_block;    /* Debug block. */
-	long                *gevect;       /* XXX General vector??? */
-	long                *utlbvect;     /* XXX UTLB vector??? */
-	unsigned long        rveclen;      /* Size of romvec struct. */
-	struct linux_romvec *romvec;       /* Function interface. */
-	unsigned long        pveclen;      /* Length of private vector. */
-	long                *pvector;      /* Private vector. */
-	long                 adap_cnt;     /* Adapter count. */
-	long                 adap_typ0;    /* First adapter type. */
-	long                 adap_vcnt0;   /* Adapter 0 vector count. */
-	long                *adap_vector;  /* Adapter 0 vector ptr. */
-	long                 adap_typ1;    /* Second adapter type. */
-	long                 adap_vcnt1;   /* Adapter 1 vector count. */
-	long                *adap_vector1; /* Adapter 1 vector ptr. */
+	ULONG			len;		/* length of parm block */
+	USHORT			ver;		/* ARCS firmware version */
+	USHORT			rev;		/* ARCS firmware revision */
+	_PLONG			rs_block;	/* Restart block. */
+	_PLONG			dbg_block;	/* Debug block. */
+	_PLONG			gevect;		/* XXX General vector??? */
+	_PLONG			utlbvect;	/* XXX UTLB vector??? */
+	ULONG			rveclen;	/* Size of romvec struct. */
+	_PVOID			romvec;		/* Function interface. */
+	ULONG			pveclen;	/* Length of private vector. */
+	_PVOID			pvector;	/* Private vector. */
+	ULONG			adap_cnt;	/* Adapter count. */
+	ULONG			adap_typ0;	/* First adapter type. */
+	ULONG			adap_vcnt0;	/* Adapter 0 vector count. */
+	_PVOID			adap_vector;	/* Adapter 0 vector ptr. */
+	ULONG			adap_typ1;	/* Second adapter type. */
+	ULONG			adap_vcnt1;	/* Adapter 1 vector count. */
+	_PVOID			adap_vector1;	/* Adapter 1 vector ptr. */
 	/* More adapter vectors go here... */
-};
+} SYSTEM_PARAMETER_BLOCK, *PSYSTEM_PARAMETER_BLOCK;
 
-#define PROMBLOCK ((struct linux_promblock *)0xA0001000UL)
-#define ROMVECTOR ((PROMBLOCK)->romvec)
+#define PROMBLOCK ((PSYSTEM_PARAMETER_BLOCK) (int)0xA0001000)
+#define ROMVECTOR ((struct linux_romvec *) (long)(PROMBLOCK)->romvec)
 
 /* Cache layout parameter block. */
 union linux_cache_key {
@@ -381,7 +370,7 @@ struct linux_smonblock {
 
 #define ARC_CALL0(dest)							\
 ({	long __res;							\
-	unsigned long __vec = (unsigned long) romvec->dest;		\
+	long __vec = (long) romvec->dest;				\
 	__asm__ __volatile__(						\
 	"dsubu\t$29, 32\n\t"						\
 	"jalr\t%1\n\t"							\
@@ -396,7 +385,7 @@ struct linux_smonblock {
 #define ARC_CALL1(dest,a1)						\
 ({	long __res;							\
 	register signed int __a1 __asm__("$4") = (int) (long) (a1);	\
-	unsigned long __vec = (unsigned long) romvec->dest;		\
+	long __vec = (long) romvec->dest;				\
 	__asm__ __volatile__(						\
 	"dsubu\t$29, 32\n\t"						\
 	"jalr\t%1\n\t"							\
@@ -412,7 +401,7 @@ struct linux_smonblock {
 ({	long __res;							\
 	register signed int __a1 __asm__("$4") = (int) (long) (a1);	\
 	register signed int __a2 __asm__("$5") = (int) (long) (a2);	\
-	unsigned long __vec = (unsigned long) romvec->dest;		\
+	long __vec = (long) romvec->dest;				\
 	__asm__ __volatile__(						\
 	"dsubu\t$29, 32\n\t"						\
 	"jalr\t%1\n\t"							\
@@ -429,7 +418,7 @@ struct linux_smonblock {
 	register signed int __a1 __asm__("$4") = (int) (long) (a1);	\
 	register signed int __a2 __asm__("$5") = (int) (long) (a2);	\
 	register signed int __a3 __asm__("$6") = (int) (long) (a3);	\
-	unsigned long __vec = (unsigned long) romvec->dest;		\
+	long __vec = (long) romvec->dest;				\
 	__asm__ __volatile__(						\
 	"dsubu\t$29, 32\n\t"						\
 	"jalr\t%1\n\t"							\
@@ -447,7 +436,7 @@ struct linux_smonblock {
 	register signed int __a2 __asm__("$5") = (int) (long) (a2);	\
 	register signed int __a3 __asm__("$6") = (int) (long) (a3);	\
 	register signed int __a4 __asm__("$7") = (int) (long) (a4);	\
-	unsigned long __vec = (unsigned long) romvec->dest;		\
+	long __vec = (long) romvec->dest;				\
 	__asm__ __volatile__(						\
 	"dsubu\t$29, 32\n\t"						\
 	"jalr\t%1\n\t"							\
@@ -467,7 +456,7 @@ struct linux_smonblock {
 	register signed int __a3 __asm__("$6") = (int) (long) (a3);	\
 	register signed int __a4 __asm__("$7") = (int) (long) (a4);	\
 	register signed int __a5 = (a5);				\
-	unsigned long __vec = (unsigned long) romvec->dest;		\
+	long __vec = (long) romvec->dest;				\
 	__asm__ __volatile__(						\
 	"dsubu\t$29, 32\n\t"						\
 	"sw\t%6, 16($29)\n\t"						\
diff --git a/include/asm-mips64/softirq.h b/include/asm-mips64/softirq.h
index 0c234fa50..f827649ed 100644
--- a/include/asm-mips64/softirq.h
+++ b/include/asm-mips64/softirq.h
@@ -9,12 +9,6 @@
 #ifndef _ASM_SOFTIRQ_H
 #define _ASM_SOFTIRQ_H
 
-/* The locking mechanism for base handlers, to prevent re-entrancy,
- * is entirely private to an implementation, it should not be
- * referenced at all outside of this file.
- */
-extern atomic_t __mips_bh_counter;
-
 extern unsigned int local_bh_count[NR_CPUS];
 
 #define cpu_bh_disable(cpu)    do { local_bh_count[(cpu)]++; barrier(); } while (0)
@@ -33,9 +27,9 @@ static inline void clear_active_bhs(unsigned long x)
 	unsigned long temp;
 
 	__asm__ __volatile__(
-		"1:\tll\t%0,%1\n\t"
+		"1:\tlld\t%0,%1\n\t"
 		"and\t%0,%2\n\t"
-		"sc\t%0,%1\n\t"
+		"scd\t%0,%1\n\t"
 		"beqz\t%0,1b"
 		:"=&r" (temp),
 		 "=m" (bh_active)
diff --git a/include/asm-mips64/stackframe.h b/include/asm-mips64/stackframe.h
index a9e62c232..5599593ce 100644
--- a/include/asm-mips64/stackframe.h
+++ b/include/asm-mips64/stackframe.h
@@ -21,15 +21,15 @@
 
 #define save_static(frame)                               \
 	__asm__ __volatile__(                            \
-		"sw\t$16,"__str(PT_R16)"(%0)\n\t"        \
-		"sw\t$17,"__str(PT_R17)"(%0)\n\t"        \
-		"sw\t$18,"__str(PT_R18)"(%0)\n\t"        \
-		"sw\t$19,"__str(PT_R19)"(%0)\n\t"        \
-		"sw\t$20,"__str(PT_R20)"(%0)\n\t"        \
-		"sw\t$21,"__str(PT_R21)"(%0)\n\t"        \
-		"sw\t$22,"__str(PT_R22)"(%0)\n\t"        \
-		"sw\t$23,"__str(PT_R23)"(%0)\n\t"        \
-		"sw\t$30,"__str(PT_R30)"(%0)\n\t"        \
+		"sd\t$16,"__str(PT_R16)"(%0)\n\t"        \
+		"sd\t$17,"__str(PT_R17)"(%0)\n\t"        \
+		"sd\t$18,"__str(PT_R18)"(%0)\n\t"        \
+		"sd\t$19,"__str(PT_R19)"(%0)\n\t"        \
+		"sd\t$20,"__str(PT_R20)"(%0)\n\t"        \
+		"sd\t$21,"__str(PT_R21)"(%0)\n\t"        \
+		"sd\t$22,"__str(PT_R22)"(%0)\n\t"        \
+		"sd\t$23,"__str(PT_R23)"(%0)\n\t"        \
+		"sd\t$30,"__str(PT_R30)"(%0)\n\t"        \
 		: /* No outputs */                       \
 		: "r" (frame))
 
@@ -38,35 +38,38 @@
 #ifdef _LANGUAGE_ASSEMBLY
 
 		.macro	SAVE_AT
-		sw	$1, PT_R1(sp)
+		.set	push
+		.set	noat
+		sd	$1, PT_R1(sp)
+		.set	pop
 		.endm
 
 		.macro	SAVE_TEMP
 		mfhi	v1
-		sw	$8, PT_R8(sp)
-		sw	$9, PT_R9(sp)
-		sw	v1, PT_HI(sp)
+		sd	$8, PT_R8(sp)
+		sd	$9, PT_R9(sp)
+		sd	v1, PT_HI(sp)
 		mflo	v1
-		sw	$10,PT_R10(sp)
-		sw	$11, PT_R11(sp)
-		sw	v1,  PT_LO(sp)
-		sw	$12, PT_R12(sp)
-		sw	$13, PT_R13(sp)
-		sw	$14, PT_R14(sp)
-		sw	$15, PT_R15(sp)
-		sw	$24, PT_R24(sp)
+		sd	$10, PT_R10(sp)
+		sd	$11, PT_R11(sp)
+		sd	v1,  PT_LO(sp)
+		sd	$12, PT_R12(sp)
+		sd	$13, PT_R13(sp)
+		sd	$14, PT_R14(sp)
+		sd	$15, PT_R15(sp)
+		sd	$24, PT_R24(sp)
 		.endm
 
 		.macro	SAVE_STATIC
-		sw	$16, PT_R16(sp)
-		sw	$17, PT_R17(sp)
-		sw	$18, PT_R18(sp)
-		sw	$19, PT_R19(sp)
-		sw	$20, PT_R20(sp)
-		sw	$21, PT_R21(sp)
-		sw	$22, PT_R22(sp)
-		sw	$23, PT_R23(sp)
-		sw	$30, PT_R30(sp)
+		sd	$16, PT_R16(sp)
+		sd	$17, PT_R17(sp)
+		sd	$18, PT_R18(sp)
+		sd	$19, PT_R19(sp)
+		sd	$20, PT_R20(sp)
+		sd	$21, PT_R21(sp)
+		sd	$22, PT_R22(sp)
+		sd	$23, PT_R23(sp)
+		sd	$30, PT_R30(sp)
 		.endm
 
 		.macro	SAVE_SOME
@@ -80,28 +83,28 @@
 		.set	reorder
 		/* Called from user mode, new stack. */
 		lui	k1, %hi(kernelsp)
-		lw	k1, %lo(kernelsp)(k1)
+		ld	k1, %lo(kernelsp)(k1)
 8:		move	k0, sp
-		subu	sp, k1, PT_SIZE
-		sw	k0, PT_R29(sp)
-		sw	$3, PT_R3(sp)
-		sw	$0, PT_R0(sp)
-		mfc0	v1, CP0_STATUS
-		sw	$2, PT_R2(sp)
-		sw	v1, PT_STATUS(sp)
-		sw	$4, PT_R4(sp)
-		mfc0	v1, CP0_CAUSE
-		sw	$5, PT_R5(sp)
-		sw	v1, PT_CAUSE(sp)
-		sw	$6, PT_R6(sp)
-		mfc0	v1, CP0_EPC
-		sw	$7, PT_R7(sp)
-		sw	v1, PT_EPC(sp)
-		sw	$25, PT_R25(sp)
-		sw	$28, PT_R28(sp)
-		sw	$31, PT_R31(sp)
-		ori	$28, sp, 0x1fff
-		xori	$28, 0x1fff
+		dsubu	sp, k1, PT_SIZE
+		sd	k0, PT_R29(sp)
+		sd	$3, PT_R3(sp)
+		sd	$0, PT_R0(sp)
+		dmfc0	v1, CP0_STATUS
+		sd	$2, PT_R2(sp)
+		sd	v1, PT_STATUS(sp)
+		sd	$4, PT_R4(sp)
+		dmfc0	v1, CP0_CAUSE
+		sd	$5, PT_R5(sp)
+		sd	v1, PT_CAUSE(sp)
+		sd	$6, PT_R6(sp)
+		dmfc0	v1, CP0_EPC
+		sd	$7, PT_R7(sp)
+		sd	v1, PT_EPC(sp)
+		sd	$25, PT_R25(sp)
+		sd	$28, PT_R28(sp)
+		sd	$31, PT_R31(sp)
+		ori	$28, sp, 0x3fff
+		xori	$28, 0x3fff
 		.set	pop
 		.endm
 
@@ -113,39 +116,39 @@
 		.endm
 
 		.macro	RESTORE_AT
-		lw	$1,  PT_R1(sp)
+		ld	$1,  PT_R1(sp)
 		.endm
 
 		.macro	RESTORE_SP
-		lw	sp,  PT_R29(sp)
+		ld	sp,  PT_R29(sp)
 		.endm
 
 		.macro	RESTORE_TEMP
-		lw	$24, PT_LO(sp)
-		lw	$8, PT_R8(sp)
-		lw	$9, PT_R9(sp)
+		ld	$24, PT_LO(sp)
+		ld	$8, PT_R8(sp)
+		ld	$9, PT_R9(sp)
 		mtlo	$24
-		lw	$24, PT_HI(sp)
-		lw	$10,PT_R10(sp)
-		lw	$11, PT_R11(sp)
+		ld	$24, PT_HI(sp)
+		ld	$10, PT_R10(sp)
+		ld	$11, PT_R11(sp)
 		mthi	$24
-		lw	$12, PT_R12(sp)
-		lw	$13, PT_R13(sp)
-		lw	$14, PT_R14(sp)
-		lw	$15, PT_R15(sp)
-		lw	$24, PT_R24(sp)
+		ld	$12, PT_R12(sp)
+		ld	$13, PT_R13(sp)
+		ld	$14, PT_R14(sp)
+		ld	$15, PT_R15(sp)
+		ld	$24, PT_R24(sp)
 		.endm
 
 		.macro	RESTORE_STATIC
-		lw	$16, PT_R16(sp)
-		lw	$17, PT_R17(sp)
-		lw	$18, PT_R18(sp)
-		lw	$19, PT_R19(sp)
-		lw	$20, PT_R20(sp)
-		lw	$21, PT_R21(sp)
-		lw	$22, PT_R22(sp)
-		lw	$23, PT_R23(sp)
-		lw	$30, PT_R30(sp)
+		ld	$16, PT_R16(sp)
+		ld	$17, PT_R17(sp)
+		ld	$18, PT_R18(sp)
+		ld	$19, PT_R19(sp)
+		ld	$20, PT_R20(sp)
+		ld	$21, PT_R21(sp)
+		ld	$22, PT_R22(sp)
+		ld	$23, PT_R23(sp)
+		ld	$30, PT_R30(sp)
 		.endm
 
 		.macro	RESTORE_SOME
@@ -158,22 +161,22 @@
 		mtc0	t0, CP0_STATUS
 		li	v1, 0xff00
 		and	t0, v1
-		lw	v0, PT_STATUS(sp)
+		ld	v0, PT_STATUS(sp)
 		nor	v1, $0, v1
 		and	v0, v1
 		or	v0, t0
-		mtc0	v0, CP0_STATUS
-		lw	v1, PT_EPC(sp)
-		mtc0	v1, CP0_EPC
-		lw	$31, PT_R31(sp)
-		lw	$28, PT_R28(sp)
-		lw	$25, PT_R25(sp)
-		lw	$7,  PT_R7(sp)
-		lw	$6,  PT_R6(sp)
-		lw	$5,  PT_R5(sp)
-		lw	$4,  PT_R4(sp)
-		lw	$3,  PT_R3(sp)
-		lw	$2,  PT_R2(sp)
+		dmtc0	v0, CP0_STATUS
+		ld	v1, PT_EPC(sp)
+		dmtc0	v1, CP0_EPC
+		ld	$31, PT_R31(sp)
+		ld	$28, PT_R28(sp)
+		ld	$25, PT_R25(sp)
+		ld	$7,  PT_R7(sp)
+		ld	$6,  PT_R6(sp)
+		ld	$5,  PT_R5(sp)
+		ld	$4,  PT_R4(sp)
+		ld	$3,  PT_R3(sp)
+		ld	$2,  PT_R2(sp)
 		.endm
 
 		.macro	RESTORE_ALL
@@ -201,11 +204,11 @@
  * Set cp0 enable bit as sign that we're running on the kernel stack
  */
 		.macro	STI
-		mfc0	t0,CP0_STATUS
-		li	t1,ST0_CU0|0x1f
-		or	t0,t1
-		xori	t0,0x1e
-		mtc0	t0,CP0_STATUS
+		mfc0	t0, CP0_STATUS
+		li	t1, ST0_CU0 | 0x1f
+		or	t0, t1
+		xori	t0, 0x1e
+		mtc0	t0, CP0_STATUS
 		.endm
 
 /*
@@ -214,7 +217,7 @@
  */
 		.macro	KMODE
 		mfc0	t0, CP0_STATUS
-		li	t1, ST0_CU0|0x1e
+		li	t1, ST0_CU0 | 0x1e
 		or	t0, t1
 		xori	t0, 0x1e
 		mtc0	t0, CP0_STATUS
diff --git a/include/asm-mips64/string.h b/include/asm-mips64/string.h
index 56205991b..5f0b4e68d 100644
--- a/include/asm-mips64/string.h
+++ b/include/asm-mips64/string.h
@@ -1,4 +1,4 @@
-/* $Id: string.h,v 1.1 1999/08/18 23:37:52 ralf Exp $
+/* $Id: string.h,v 1.2 1999/08/21 22:19:18 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -12,14 +12,14 @@
 #ifndef _ASM_STRING_H
 #define _ASM_STRING_H
 
-#define __HAVE_ARCH_MEMSET
-extern void *memset(void *__s, int __c, size_t __count);
+#undef __HAVE_ARCH_MEMSET
+//extern void *memset(void *__s, int __c, size_t __count);
 
-#define __HAVE_ARCH_MEMCPY
-extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
+#undef __HAVE_ARCH_MEMCPY
+//extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
 
-#define __HAVE_ARCH_MEMMOVE
-extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
+#undef __HAVE_ARCH_MEMMOVE
+//extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
 
 /* Don't build bcopy at all ...  */
 #define __HAVE_ARCH_BCOPY
diff --git a/include/asm-mips64/sysmips.h b/include/asm-mips64/sysmips.h
new file mode 100644
index 000000000..af69c6f6c
--- /dev/null
+++ b/include/asm-mips64/sysmips.h
@@ -0,0 +1,25 @@
+/* $Id: sysmips.h,v 1.1 1999/10/08 21:07:57 ralf Exp $
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995, 1999 by Ralf Baechle
+ * Copyright 1999 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_SYSMIPS_H
+#define _ASM_SYSMIPS_H
+
+/*
+ * Commands for the sysmips(2) call
+ *
+ * sysmips(2) is deprecated - though some existing software uses it.
+ * We only support the following commands.
+ */
+#define SETNAME                    1	/* set hostname                  */
+#define FLUSH_CACHE		   3	/* writeback and invalidate caches */
+#define MIPS_FIXADE                7	/* control address error fixing  */
+#define MIPS_RDNVRAM              10	/* read NVRAM */
+#define MIPS_ATOMIC_SET		2001	/* atomically set variable       */
+
+#endif /* _ASM_SYSMIPS_H */
diff --git a/include/asm-mips64/system.h b/include/asm-mips64/system.h
index 76924b7f4..26b797da2 100644
--- a/include/asm-mips64/system.h
+++ b/include/asm-mips64/system.h
@@ -1,4 +1,4 @@
-/* $Id: system.h,v 1.2 1999/10/09 00:01:43 ralf Exp $
+/* $Id: system.h,v 1.3 1999/11/17 22:48:12 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -150,9 +150,10 @@ do { var = value; wmb(); } while (0)
  * switch_to(n) should switch tasks to task nr n, first
  * checking that n isn't the current task, in which case it does nothing.
  */
-extern asmlinkage void *(*resume)(void *last, void *next);
+extern asmlinkage void *resume(void *last, void *next);
 #endif /* !defined (_LANGUAGE_ASSEMBLY) */
 
+#define prepare_to_switch()	do { } while(0)
 #define switch_to(prev,next,last) \
 do { \
 	(last) = resume(prev, next); \
@@ -169,7 +170,7 @@ extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
 		"1:\tmove\t$1,%2\n\t"
 		"sc\t$1,(%1)\n\t"
 		"beqzl\t$1,1b\n\t"
-		"ll\t%0,(%1)\n\t"
+		"lld\t%0,(%1)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
 		: "=r" (val), "=r" (m), "=r" (dummy)
diff --git a/include/asm-mips64/types.h b/include/asm-mips64/types.h
index 99b23a1e9..cc07bde05 100644
--- a/include/asm-mips64/types.h
+++ b/include/asm-mips64/types.h
@@ -1,4 +1,4 @@
-/* $Id$
+/* $Id: types.h,v 1.1 1999/08/18 23:37:53 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -10,7 +10,7 @@
 #ifndef _ASM_TYPES_H
 #define _ASM_TYPES_H
 
-typedef unsigned long umode_t;
+typedef unsigned int umode_t;
 
 /*
  * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
diff --git a/include/asm-mips64/uaccess.h b/include/asm-mips64/uaccess.h
index 1522748ff..a1950af06 100644
--- a/include/asm-mips64/uaccess.h
+++ b/include/asm-mips64/uaccess.h
@@ -1,4 +1,4 @@
-/* $Id: uaccess.h,v 1.1 1999/08/18 23:37:53 ralf Exp $
+/* $Id: uaccess.h,v 1.2 1999/08/19 22:56:35 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -23,15 +23,15 @@
  *
  * For historical reasons, these macros are grossly misnamed.
  */
-#define KERNEL_DS	((mm_segment_t) { 0UL })
-#define USER_DS		((mm_segment_t) { 1UL })
+#define KERNEL_DS	((mm_segment_t) { (unsigned long) 0L })
+#define USER_DS		((mm_segment_t) { (unsigned long) -1L })
 
 #define VERIFY_READ    0
 #define VERIFY_WRITE   1
 
-#define get_fs()        (current->tss.current_ds)
+#define get_fs()        (current->thread.current_ds)
 #define get_ds()	(KERNEL_DS)
-#define set_fs(x)       (current->tss.current_ds=(x))
+#define set_fs(x)       (current->thread.current_ds=(x))
 
 #define segment_eq(a,b)	((a).seg == (b).seg)
 
@@ -48,7 +48,7 @@
  */
 #define __access_ok(addr,size,mask) \
         (((__signed__ long)((mask)&(addr | size | (addr+size)))) >= 0)
-#define __access_mask (-(long)(get_fs().seg))
+#define __access_mask ((long)(get_fs().seg))
 
 #define access_ok(type,addr,size) \
 __access_ok(((unsigned long)(addr)),(size),__access_mask)
@@ -385,7 +385,6 @@ strncpy_from_user(char *__to, const char *__from, long __len)
 	return res;
 }
 
-
 /* Returns: 0 if bad, string length+1 (memory size) of string if ok */
 extern inline long __strlen_user(const char *s)
 {
@@ -417,6 +416,39 @@ extern inline long strlen_user(const char *s)
 	return res;
 }
 
+/* Returns: 0 if bad, string length+1 (memory size) of string if ok */
+extern inline long __strnlen_user(const char *s, long n)
+{
+	long res;
+
+	__asm__ __volatile__(
+		"move\t$4, %1\n\t"
+		"move\t$5, %2\n\t"
+		__MODULE_JAL(__strlen_user_nocheck_asm)
+		"move\t%0, $2"
+		: "=r" (res)
+		: "r" (s), "r" (n)
+		: "$2", "$4", "$5", "$8", "$31");
+
+	return res;
+}
+
+extern inline long strnlen_user(const char *s, long n)
+{
+	long res;
+
+	__asm__ __volatile__(
+		"move\t$4, %1\n\t"
+		"move\t$5, %2\n\t"
+		__MODULE_JAL(__strlen_user_asm)
+		"move\t%0, $2"
+		: "=r" (res)
+		: "r" (s), "r" (n)
+		: "$2", "$4", "$5", "$8", "$31");
+
+	return res;
+}
+
 struct exception_table_entry
 {
 	unsigned long insn;
diff --git a/include/asm-mips64/unistd.h b/include/asm-mips64/unistd.h
index c6e295e4c..4793d8864 100644
--- a/include/asm-mips64/unistd.h
+++ b/include/asm-mips64/unistd.h
@@ -1,4 +1,4 @@
-/* $Id: unistd.h,v 1.3 1999/09/28 22:27:20 ralf Exp $
+/* $Id: unistd.h,v 1.4 1999/10/09 00:01:43 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -982,11 +982,229 @@
 #define __NR_POSIX_SGI_reserved26	(__NR_POSIX + 319)
 
 /*
- * Linux syscalls are in the range from 4000 to 4999
- * Hopefully these syscall numbers are unused ...  If not everyone using
- * statically linked binaries is pretty upsh*t.  You've been warned.
+ * Linux o32 style syscalls are in the range from 4000 to 4999.
  */
-#define __NR_Linux			4000
+#define __NR_Linux32			4000
+#define __NR_Linux32_syscall		(__NR_Linux32 +   0)
+#define __NR_Linux32_exit		(__NR_Linux32 +   1)
+#define __NR_Linux32_fork		(__NR_Linux32 +   2)
+#define __NR_Linux32_read		(__NR_Linux32 +   3)
+#define __NR_Linux32_write		(__NR_Linux32 +   4)
+#define __NR_Linux32_open		(__NR_Linux32 +   5)
+#define __NR_Linux32_close		(__NR_Linux32 +   6)
+#define __NR_Linux32_waitpid		(__NR_Linux32 +   7)
+#define __NR_Linux32_creat		(__NR_Linux32 +   8)
+#define __NR_Linux32_link		(__NR_Linux32 +   9)
+#define __NR_Linux32_unlink		(__NR_Linux32 +  10)
+#define __NR_Linux32_execve		(__NR_Linux32 +  11)
+#define __NR_Linux32_chdir		(__NR_Linux32 +  12)
+#define __NR_Linux32_time		(__NR_Linux32 +  13)
+#define __NR_Linux32_mknod		(__NR_Linux32 +  14)
+#define __NR_Linux32_chmod		(__NR_Linux32 +  15)
+#define __NR_Linux32_lchown		(__NR_Linux32 +  16)
+#define __NR_Linux32_break		(__NR_Linux32 +  17)
+#define __NR_Linux32_oldstat		(__NR_Linux32 +  18)
+#define __NR_Linux32_lseek		(__NR_Linux32 +  19)
+#define __NR_Linux32_getpid		(__NR_Linux32 +  20)
+#define __NR_Linux32_mount		(__NR_Linux32 +  21)
+#define __NR_Linux32_umount		(__NR_Linux32 +  22)
+#define __NR_Linux32_setuid		(__NR_Linux32 +  23)
+#define __NR_Linux32_getuid		(__NR_Linux32 +  24)
+#define __NR_Linux32_stime		(__NR_Linux32 +  25)
+#define __NR_Linux32_ptrace		(__NR_Linux32 +  26)
+#define __NR_Linux32_alarm		(__NR_Linux32 +  27)
+#define __NR_Linux32_oldfstat		(__NR_Linux32 +  28)
+#define __NR_Linux32_unused29		(__NR_Linux32 +  29)
+#define __NR_Linux32_utime		(__NR_Linux32 +  30)
+#define __NR_Linux32_stty		(__NR_Linux32 +  31)
+#define __NR_Linux32_gtty		(__NR_Linux32 +  32)
+#define __NR_Linux32_access		(__NR_Linux32 +  33)
+#define __NR_Linux32_nice		(__NR_Linux32 +  34)
+#define __NR_Linux32_ftime		(__NR_Linux32 +  35)
+#define __NR_Linux32_sync		(__NR_Linux32 +  36)
+#define __NR_Linux32_kill		(__NR_Linux32 +  37)
+#define __NR_Linux32_rename		(__NR_Linux32 +  38)
+#define __NR_Linux32_mkdir		(__NR_Linux32 +  39)
+#define __NR_Linux32_rmdir		(__NR_Linux32 +  40)
+#define __NR_Linux32_dup		(__NR_Linux32 +  41)
+#define __NR_Linux32_pipe		(__NR_Linux32 +  42)
+#define __NR_Linux32_times		(__NR_Linux32 +  43)
+#define __NR_Linux32_prof		(__NR_Linux32 +  44)
+#define __NR_Linux32_brk		(__NR_Linux32 +  45)
+#define __NR_Linux32_setgid		(__NR_Linux32 +  46)
+#define __NR_Linux32_getgid		(__NR_Linux32 +  47)
+#define __NR_Linux32_signal		(__NR_Linux32 +  48)
+#define __NR_Linux32_geteuid		(__NR_Linux32 +  49)
+#define __NR_Linux32_getegid		(__NR_Linux32 +  50)
+#define __NR_Linux32_acct		(__NR_Linux32 +  51)
+#define __NR_Linux32_umount2		(__NR_Linux32 +  52)
+#define __NR_Linux32_lock		(__NR_Linux32 +  53)
+#define __NR_Linux32_ioctl		(__NR_Linux32 +  54)
+#define __NR_Linux32_fcntl		(__NR_Linux32 +  55)
+#define __NR_Linux32_mpx		(__NR_Linux32 +  56)
+#define __NR_Linux32_setpgid		(__NR_Linux32 +  57)
+#define __NR_Linux32_ulimit		(__NR_Linux32 +  58)
+#define __NR_Linux32_oldolduname	(__NR_Linux32 +  59)
+#define __NR_Linux32_umask		(__NR_Linux32 +  60)
+#define __NR_Linux32_chroot		(__NR_Linux32 +  61)
+#define __NR_Linux32_ustat		(__NR_Linux32 +  62)
+#define __NR_Linux32_dup2		(__NR_Linux32 +  63)
+#define __NR_Linux32_getppid		(__NR_Linux32 +  64)
+#define __NR_Linux32_getpgrp		(__NR_Linux32 +  65)
+#define __NR_Linux32_setsid		(__NR_Linux32 +  66)
+#define __NR_Linux32_sigaction		(__NR_Linux32 +  67)
+#define __NR_Linux32_sgetmask		(__NR_Linux32 +  68)
+#define __NR_Linux32_ssetmask		(__NR_Linux32 +  69)
+#define __NR_Linux32_setreuid		(__NR_Linux32 +  70)
+#define __NR_Linux32_setregid		(__NR_Linux32 +  71)
+#define __NR_Linux32_sigsuspend		(__NR_Linux32 +  72)
+#define __NR_Linux32_sigpending		(__NR_Linux32 +  73)
+#define __NR_Linux32_sethostname	(__NR_Linux32 +  74)
+#define __NR_Linux32_setrlimit		(__NR_Linux32 +  75)
+#define __NR_Linux32_getrlimit		(__NR_Linux32 +  76)
+#define __NR_Linux32_getrusage		(__NR_Linux32 +  77)
+#define __NR_Linux32_gettimeofday	(__NR_Linux32 +  78)
+#define __NR_Linux32_settimeofday	(__NR_Linux32 +  79)
+#define __NR_Linux32_getgroups		(__NR_Linux32 +  80)
+#define __NR_Linux32_setgroups		(__NR_Linux32 +  81)
+#define __NR_Linux32_reserved82		(__NR_Linux32 +  82)
+#define __NR_Linux32_symlink		(__NR_Linux32 +  83)
+#define __NR_Linux32_oldlstat		(__NR_Linux32 +  84)
+#define __NR_Linux32_readlink		(__NR_Linux32 +  85)
+#define __NR_Linux32_uselib		(__NR_Linux32 +  86)
+#define __NR_Linux32_swapon		(__NR_Linux32 +  87)
+#define __NR_Linux32_reboot		(__NR_Linux32 +  88)
+#define __NR_Linux32_readdir		(__NR_Linux32 +  89)
+#define __NR_Linux32_mmap		(__NR_Linux32 +  90)
+#define __NR_Linux32_munmap		(__NR_Linux32 +  91)
+#define __NR_Linux32_truncate		(__NR_Linux32 +  92)
+#define __NR_Linux32_ftruncate		(__NR_Linux32 +  93)
+#define __NR_Linux32_fchmod		(__NR_Linux32 +  94)
+#define __NR_Linux32_fchown		(__NR_Linux32 +  95)
+#define __NR_Linux32_getpriority	(__NR_Linux32 +  96)
+#define __NR_Linux32_setpriority	(__NR_Linux32 +  97)
+#define __NR_Linux32_profil		(__NR_Linux32 +  98)
+#define __NR_Linux32_statfs		(__NR_Linux32 +  99)
+#define __NR_Linux32_fstatfs		(__NR_Linux32 + 100)
+#define __NR_Linux32_ioperm		(__NR_Linux32 + 101)
+#define __NR_Linux32_socketcall		(__NR_Linux32 + 102)
+#define __NR_Linux32_syslog		(__NR_Linux32 + 103)
+#define __NR_Linux32_setitimer		(__NR_Linux32 + 104)
+#define __NR_Linux32_getitimer		(__NR_Linux32 + 105)
+#define __NR_Linux32_stat		(__NR_Linux32 + 106)
+#define __NR_Linux32_lstat		(__NR_Linux32 + 107)
+#define __NR_Linux32_fstat		(__NR_Linux32 + 108)
+#define __NR_Linux32_olduname		(__NR_Linux32 + 109)
+#define __NR_Linux32_iopl		(__NR_Linux32 + 110)
+#define __NR_Linux32_vhangup		(__NR_Linux32 + 111)
+#define __NR_Linux32_idle		(__NR_Linux32 + 112)
+#define __NR_Linux32_vm86		(__NR_Linux32 + 113)
+#define __NR_Linux32_wait4		(__NR_Linux32 + 114)
+#define __NR_Linux32_swapoff		(__NR_Linux32 + 115)
+#define __NR_Linux32_sysinfo		(__NR_Linux32 + 116)
+#define __NR_Linux32_ipc		(__NR_Linux32 + 117)
+#define __NR_Linux32_fsync		(__NR_Linux32 + 118)
+#define __NR_Linux32_sigreturn		(__NR_Linux32 + 119)
+#define __NR_Linux32_clone		(__NR_Linux32 + 120)
+#define __NR_Linux32_setdomainname	(__NR_Linux32 + 121)
+#define __NR_Linux32_uname		(__NR_Linux32 + 122)
+#define __NR_Linux32_modify_ldt		(__NR_Linux32 + 123)
+#define __NR_Linux32_adjtimex		(__NR_Linux32 + 124)
+#define __NR_Linux32_mprotect		(__NR_Linux32 + 125)
+#define __NR_Linux32_sigprocmask	(__NR_Linux32 + 126)
+#define __NR_Linux32_create_module	(__NR_Linux32 + 127)
+#define __NR_Linux32_init_module	(__NR_Linux32 + 128)
+#define __NR_Linux32_delete_module	(__NR_Linux32 + 129)
+#define __NR_Linux32_get_kernel_syms	(__NR_Linux32 + 130)
+#define __NR_Linux32_quotactl		(__NR_Linux32 + 131)
+#define __NR_Linux32_getpgid		(__NR_Linux32 + 132)
+#define __NR_Linux32_fchdir		(__NR_Linux32 + 133)
+#define __NR_Linux32_bdflush		(__NR_Linux32 + 134)
+#define __NR_Linux32_sysfs		(__NR_Linux32 + 135)
+#define __NR_Linux32_personality	(__NR_Linux32 + 136)
+#define __NR_Linux32_afs_syscall	(__NR_Linux32 + 137) /* Syscall for Andrew File System */
+#define __NR_Linux32_setfsuid		(__NR_Linux32 + 138)
+#define __NR_Linux32_setfsgid		(__NR_Linux32 + 139)
+#define __NR_Linux32__llseek		(__NR_Linux32 + 140)
+#define __NR_Linux32_getdents		(__NR_Linux32 + 141)
+#define __NR_Linux32__newselect		(__NR_Linux32 + 142)
+#define __NR_Linux32_flock		(__NR_Linux32 + 143)
+#define __NR_Linux32_msync		(__NR_Linux32 + 144)
+#define __NR_Linux32_readv		(__NR_Linux32 + 145)
+#define __NR_Linux32_writev		(__NR_Linux32 + 146)
+#define __NR_Linux32_cacheflush		(__NR_Linux32 + 147)
+#define __NR_Linux32_cachectl		(__NR_Linux32 + 148)
+#define __NR_Linux32_sysmips		(__NR_Linux32 + 149)
+#define __NR_Linux32_unused150		(__NR_Linux32 + 150)
+#define __NR_Linux32_getsid		(__NR_Linux32 + 151)
+#define __NR_Linux32_fdatasync		(__NR_Linux32 + 152)
+#define __NR_Linux32__sysctl		(__NR_Linux32 + 153)
+#define __NR_Linux32_mlock		(__NR_Linux32 + 154)
+#define __NR_Linux32_munlock		(__NR_Linux32 + 155)
+#define __NR_Linux32_mlockall		(__NR_Linux32 + 156)
+#define __NR_Linux32_munlockall		(__NR_Linux32 + 157)
+#define __NR_Linux32_sched_setparam	(__NR_Linux32 + 158)
+#define __NR_Linux32_sched_getparam	(__NR_Linux32 + 159)
+#define __NR_Linux32_sched_setscheduler	(__NR_Linux32 + 160)
+#define __NR_Linux32_sched_getscheduler	(__NR_Linux32 + 161)
+#define __NR_Linux32_sched_yield	(__NR_Linux32 + 162)
+#define __NR_Linux32_sched_get_priority_max	(__NR_Linux32 + 163)
+#define __NR_Linux32_sched_get_priority_min	(__NR_Linux32 + 164)
+#define __NR_Linux32_sched_rr_get_interval	(__NR_Linux32 + 165)
+#define __NR_Linux32_nanosleep		(__NR_Linux32 + 166)
+#define __NR_Linux32_mremap		(__NR_Linux32 + 167)
+#define __NR_Linux32_accept		(__NR_Linux32 + 168)
+#define __NR_Linux32_bind		(__NR_Linux32 + 169)
+#define __NR_Linux32_connect		(__NR_Linux32 + 170)
+#define __NR_Linux32_getpeername	(__NR_Linux32 + 171)
+#define __NR_Linux32_getsockname	(__NR_Linux32 + 172)
+#define __NR_Linux32_getsockopt		(__NR_Linux32 + 173)
+#define __NR_Linux32_listen		(__NR_Linux32 + 174)
+#define __NR_Linux32_recv		(__NR_Linux32 + 175)
+#define __NR_Linux32_recvfrom		(__NR_Linux32 + 176)
+#define __NR_Linux32_recvmsg		(__NR_Linux32 + 177)
+#define __NR_Linux32_send		(__NR_Linux32 + 178)
+#define __NR_Linux32_sendmsg		(__NR_Linux32 + 179)
+#define __NR_Linux32_sendto		(__NR_Linux32 + 180)
+#define __NR_Linux32_setsockopt		(__NR_Linux32 + 181)
+#define __NR_Linux32_shutdown		(__NR_Linux32 + 182)
+#define __NR_Linux32_socket		(__NR_Linux32 + 183)
+#define __NR_Linux32_socketpair		(__NR_Linux32 + 184)
+#define __NR_Linux32_setresuid		(__NR_Linux32 + 185)
+#define __NR_Linux32_getresuid		(__NR_Linux32 + 186)
+#define __NR_Linux32_query_module	(__NR_Linux32 + 187)
+#define __NR_Linux32_poll		(__NR_Linux32 + 188)
+#define __NR_Linux32_nfsservctl		(__NR_Linux32 + 189)
+#define __NR_Linux32_setresgid		(__NR_Linux32 + 190)
+#define __NR_Linux32_getresgid		(__NR_Linux32 + 191)
+#define __NR_Linux32_prctl		(__NR_Linux32 + 192)
+#define __NR_Linux32_rt_sigreturn	(__NR_Linux32 + 193)
+#define __NR_Linux32_rt_sigaction	(__NR_Linux32 + 194)
+#define __NR_Linux32_rt_sigprocmask	(__NR_Linux32 + 195)
+#define __NR_Linux32_rt_sigpending	(__NR_Linux32 + 196)
+#define __NR_Linux32_rt_sigtimedwait	(__NR_Linux32 + 197)
+#define __NR_Linux32_rt_sigqueueinfo	(__NR_Linux32 + 198)
+#define __NR_Linux32_rt_sigsuspend	(__NR_Linux32 + 199)
+#define __NR_Linux32_pread		(__NR_Linux32 + 200)
+#define __NR_Linux32_pwrite		(__NR_Linux32 + 201)
+#define __NR_Linux32_chown		(__NR_Linux32 + 202)
+#define __NR_Linux32_getcwd		(__NR_Linux32 + 203)
+#define __NR_Linux32_capget		(__NR_Linux32 + 204)
+#define __NR_Linux32_capset		(__NR_Linux32 + 205)
+#define __NR_Linux32_sigaltstack	(__NR_Linux32 + 206)
+#define __NR_Linux32_sendfile		(__NR_Linux32 + 207)
+#define __NR_Linux32_getpmsg		(__NR_Linux32 + 208)
+#define __NR_Linux32_putpmsg		(__NR_Linux32 + 209)
+
+/*
+ * Offset of the last Linux o32 flavoured syscall
+ */
+#define __NR_Linux_syscalls		209
+
+/*
+ * Linux 64-bit syscalls are in the range from 5000 to 5999.
+ */
+#define __NR_Linux			5000
 #define __NR_syscall			(__NR_Linux +   0)
 #define __NR_exit			(__NR_Linux +   1)
 #define __NR_fork			(__NR_Linux +   2)
@@ -1398,8 +1616,8 @@ return -1; \
 
 #else /* not N32 or 64 ABI */
 
-/* These are here for sake of fucked lusercode that fucking believes to
-   fucking have to fuck around with the syscall interface themselfes.  */
+/* These are here for sake of fucking lusercode living in the fucking believe
+   having to fuck around with the syscall interface themselfes.  */
 
 #define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
 type name (atype a,btype b,ctype c,dtype d,etype e) \