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authorLeo Dagum <dagum@engr.sgi.com>2000-05-11 19:15:49 +0000
committerLeo Dagum <dagum@engr.sgi.com>2000-05-11 19:15:49 +0000
commitcbfdca13f959e36f8d5b5703d88bbe30f3fd23c0 (patch)
tree6070683ebd3effa0714aea1c98ab5c205e0d1bce /include/asm-mips64
parentb12f9adf74925546b6e9c64de4d2b7412e9d2e83 (diff)
Some infrastructure for supporting multiple pci busses on origin200/2000.
nasid and widget id get incoded in pci_dev->irq. pcibr_setup() now does some rudimentary probing for bridge widgets hanging off its xbow. We're not seeing interrupts from remote devices at the cpu, so mscsi card's are turned off for now.
Diffstat (limited to 'include/asm-mips64')
-rw-r--r--include/asm-mips64/io.h2
-rw-r--r--include/asm-mips64/pci/bridge.h7
-rw-r--r--include/asm-mips64/sn/sn0/ip27.h7
3 files changed, 14 insertions, 2 deletions
diff --git a/include/asm-mips64/io.h b/include/asm-mips64/io.h
index f72b11bcb..a1ca4492b 100644
--- a/include/asm-mips64/io.h
+++ b/include/asm-mips64/io.h
@@ -111,7 +111,7 @@ extern inline void * phys_to_virt(unsigned long address)
return (void *)(address + PAGE_OFFSET);
}
-#define BRIDGE_DIRECT_MAPPED_BASE 0xa200000000000000ull
+#define BRIDGE_DIRECT_MAPPED_BASE 0xa180000000000000ull
/*
* IO bus memory addresses are also 1:1 with the physical address
diff --git a/include/asm-mips64/pci/bridge.h b/include/asm-mips64/pci/bridge.h
index 42a805487..1fc14c5a5 100644
--- a/include/asm-mips64/pci/bridge.h
+++ b/include/asm-mips64/pci/bridge.h
@@ -828,4 +828,11 @@ typedef union ate_u {
#define BRIDGE_INTERNAL_ATES 128
+/* ========================================================================
+ * Linux pci bus mappings to sn physical id's
+ */
+unsigned char bus_to_wid[256]; /* widget id for linux pci bus */
+unsigned char bus_to_nid[256]; /* nasid for linux pci bus */
+unsigned char num_bridges; /* number of bridges in the system */
+
#endif /* _ASM_PCI_BRIDGE_H */
diff --git a/include/asm-mips64/sn/sn0/ip27.h b/include/asm-mips64/sn/sn0/ip27.h
index 36613c5c1..206c043fa 100644
--- a/include/asm-mips64/sn/sn0/ip27.h
+++ b/include/asm-mips64/sn/sn0/ip27.h
@@ -93,6 +93,11 @@
#define CPU_CALL_A_IRQ 6
#define CPU_CALL_B_IRQ 7
#define IOC3_SERIAL_INT 8
-#define IOC3_ETH_INT 9
+/*#define IOC3_ETH_INT 9*/
+#define IOC3_ETH_INT 0x0809 /* nasid 0, wid 0x8 */
+#define SN00_BRIDGE 0x9200000008000000
+#define SN00I_BRIDGE0 0x920000000b000000
+#define SN00I_BRIDGE1 0x920000000e000000
+#define SN00I_BRIDGE2 0x920000000f000000
#endif /* _ASM_SN_SN0_IP27_H */