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authorRalf Baechle <ralf@linux-mips.org>2001-02-21 20:09:19 +0000
committerRalf Baechle <ralf@linux-mips.org>2001-02-21 20:09:19 +0000
commit30673b43c4a41ff47f0715bb09ad31067304f64f (patch)
tree5a7769b891a93819eee645d62c95248d82c6b4c9 /include/asm-mips
parent0745ae02074998ac6cbaac67454e220b5fb8c3c7 (diff)
Don't try to detect a second level cache on CPUs which might not ever
have one. Patch from Carsten.
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/cache.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/asm-mips/cache.h b/include/asm-mips/cache.h
index 2eb57fc4c..28f08756e 100644
--- a/include/asm-mips/cache.h
+++ b/include/asm-mips/cache.h
@@ -23,6 +23,11 @@ struct cache_desc {
};
#endif
+/*
+ * Flag definitions
+ */
+#define MIPS_CACHE_NOT_PRESENT 0x00000001
+
#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_R6000)
#define L1_CACHE_BYTES 16
#else