Merge with Linux 2.3.6. Sorry, this isn't tested on silicon, I don't

have a MIPS box at hand.

10 files changed, 191 insertions, 91 deletions

diff --git a/include/asm-mips/ide.h b/include/asm-mips/ide.h
index bc2732311..f81529537 100644
--- a/include/asm-mips/ide.h
+++ b/include/asm-mips/ide.h
@@ -1,4 +1,4 @@
-/* $Id: ide.h,v 1.3 1998/05/07 03:02:49 ralf Exp $
+/* $Id: ide.h,v 1.4 1998/06/30 00:23:09 ralf Exp $
  *
  *  linux/include/asm-mips/ide.h
  *
@@ -14,8 +14,6 @@
 
 #ifdef __KERNEL__
 
-typedef unsigned short ide_ioreg_t;
-
 #ifndef MAX_HWIFS
 #define MAX_HWIFS	6
 #endif
@@ -25,7 +23,8 @@ typedef unsigned short ide_ioreg_t;
 struct ide_ops {
 	int (*ide_default_irq)(ide_ioreg_t base);
 	ide_ioreg_t (*ide_default_io_base)(int index);
-	void (*ide_init_hwif_ports)(ide_ioreg_t *p, ide_ioreg_t base, int *irq);
+	void (*ide_init_hwif_ports)(hw_regs_t *hw, ide_ioreg_t data_port,
+	                            ide_ioreg_t ctrl_port, int *irq);
 	int (*ide_request_irq)(unsigned int irq, void (*handler)(int, void *,
 	                       struct pt_regs *), unsigned long flags,
 	                       const char *device, void *dev_id);
@@ -48,10 +47,31 @@ static __inline__ ide_ioreg_t ide_default_io_base(int index)
 	return ide_ops->ide_default_io_base(index);
 }
 
-static __inline__ void ide_init_hwif_ports(ide_ioreg_t *p, ide_ioreg_t base,
-                                           int *irq)
+static __inline__ void ide_init_hwif_ports(hw_regs_t *hw,
+                                           ide_ioreg_t data_port,
+                                           ide_ioreg_t ctrl_port, int *irq)
 {
-	ide_ops->ide_init_hwif_ports(p, base, irq);
+	ide_ops->ide_init_hwif_ports(hw, data_port, ctrl_port, &hw->irq);
+
+	hw->irq = ide_ops->ide_default_irq(data_port);
+}
+
+/*
+ * This registers the standard ports for this architecture with the IDE
+ * driver.
+ */
+static __inline__ void ide_init_default_hwifs(void)
+{
+#ifdef __DO_I_NEED_THIS
+	hw_regs_t hw;
+	int index;
+
+	for (index = 0; index < MAX_HWIFS; index++) {
+		ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, 0);
+		hw.irq = ide_default_irq(ide_default_io_base(index));
+		ide_register_hw(&hw, NULL);
+	}
+#endif /* __DO_I_NEED_THIS */
 }
 
 typedef union {
@@ -96,26 +116,10 @@ static __inline__ void ide_release_region(ide_ioreg_t from,
 /*
  * The following are not needed for the non-m68k ports
  */
-static __inline__ int ide_ack_intr (ide_ioreg_t status_port,
-                                    ide_ioreg_t irq_port)
-{
-	return 1;
-}
-
-static __inline__ void ide_fix_driveid(struct hd_driveid *id)
-{
-}
-
-static __inline__ void ide_release_lock (int *ide_lock)
-{
-}
-
-static __inline__ void ide_get_lock (int *ide_lock,
-                                     void (*handler)(int, void *,
-                                                    struct pt_regs *),
-                                     void *data)
-{
-}
+#define ide_ack_intr(hwif)		(1)
+#define ide_fix_driveid(id)		do {} while (0)
+#define ide_release_lock(lock)		do {} while (0)
+#define ide_get_lock(lock, hdlr, data)	do {} while (0)
 
 #endif /* __KERNEL__ */
 
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index bc9390c2a..7d97af3f6 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -6,6 +6,8 @@
  */
 #undef CONF_SLOWDOWN_IO
 
+#include <linux/config.h>
+
 #include <asm/mipsconfig.h>
 #include <asm/addrspace.h>
 
@@ -377,19 +379,24 @@ __OUTS(w,l,4)
 
 /*
  * The caches on some architectures aren't dma-coherent and have need to
- * handle this in software.  There are two types of operations that
+ * handle this in software.  There are three types of operations that
  * can be applied to dma buffers.
  *
  *  - dma_cache_wback_inv(start, size) makes caches and coherent by
  *    writing the content of the caches back to memory, if necessary.
  *    The function also invalidates the affected part of the caches as
  *    necessary before DMA transfers from outside to memory.
+ *  - dma_cache_wback(start, size) makes caches and coherent by
+ *    writing the content of the caches back to memory, if necessary.
+ *    The function also invalidates the affected part of the caches as
+ *    necessary before DMA transfers from outside to memory.
  *  - dma_cache_inv(start, size) invalidates the affected parts of the
  *    caches.  Dirty lines of the caches may be written back or simply
  *    be discarded.  This operation is necessary before dma operations
  *    to the memory.
  */
 extern void (*dma_cache_wback_inv)(unsigned long start, unsigned long size);
+extern void (*dma_cache_wback)(unsigned long start, unsigned long size);
 extern void (*dma_cache_inv)(unsigned long start, unsigned long size);
 
 #endif /* __ASM_MIPS_IO_H */
diff --git a/include/asm-mips/namei.h b/include/asm-mips/namei.h
index d61b3cd82..64acd52ff 100644
--- a/include/asm-mips/namei.h
+++ b/include/asm-mips/namei.h
@@ -3,7 +3,7 @@
  *
  * Included from linux/fs/namei.c
  *
- * $Id: namei.h,v 1.5 1997/12/01 18:00:40 ralf Exp $
+ * $Id: namei.h,v 1.6 1999/01/04 16:09:23 ralf Exp $
  */
 #ifndef __ASM_MIPS_NAMEI_H
 #define __ASM_MIPS_NAMEI_H
@@ -23,7 +23,7 @@ __mips_lookup_dentry(const char *name, int lookup_flags)
 
 	base = lookup_dentry (IRIX32_EMUL,
 			dget (current->fs->root), 
-			(LOOKUP_FOLLOW | LOOKUP_DIRECTORY | LOOKUP_SLASHOK));
+			(LOOKUP_FOLLOW | LOOKUP_DIRECTORY));
 			
 	if (IS_ERR (base)) return base;
 	
diff --git a/include/asm-mips/offset.h b/include/asm-mips/offset.h
index a6d698336..de9a40a2a 100644
--- a/include/asm-mips/offset.h
+++ b/include/asm-mips/offset.h
@@ -51,36 +51,36 @@
 #define TASK_NEED_RESCHED  20
 #define TASK_COUNTER       24
 #define TASK_PRIORITY      28
-#define TASK_MM            920
+#define TASK_MM            928
 
 /* MIPS specific thread_struct offsets. */
-#define THREAD_REG16   560
-#define THREAD_REG17   564
-#define THREAD_REG18   568
-#define THREAD_REG19   572
-#define THREAD_REG20   576
-#define THREAD_REG21   580
-#define THREAD_REG22   584
-#define THREAD_REG23   588
-#define THREAD_REG29   592
-#define THREAD_REG30   596
-#define THREAD_REG31   600
-#define THREAD_STATUS  604
-#define THREAD_FPU     608
-#define THREAD_BVADDR  872
-#define THREAD_BUADDR  876
-#define THREAD_ECODE   880
-#define THREAD_TRAPNO  884
-#define THREAD_PGDIR   888
-#define THREAD_MFLAGS  892
-#define THREAD_CURDS   896
-#define THREAD_TRAMP   900
-#define THREAD_OLDCTX  904
+#define THREAD_REG16   568
+#define THREAD_REG17   572
+#define THREAD_REG18   576
+#define THREAD_REG19   580
+#define THREAD_REG20   584
+#define THREAD_REG21   588
+#define THREAD_REG22   592
+#define THREAD_REG23   596
+#define THREAD_REG29   600
+#define THREAD_REG30   604
+#define THREAD_REG31   608
+#define THREAD_STATUS  612
+#define THREAD_FPU     616
+#define THREAD_BVADDR  880
+#define THREAD_BUADDR  884
+#define THREAD_ECODE   888
+#define THREAD_TRAPNO  892
+#define THREAD_PGDIR   896
+#define THREAD_MFLAGS  900
+#define THREAD_CURDS   904
+#define THREAD_TRAMP   908
+#define THREAD_OLDCTX  912
 
 /* Linux mm_struct offsets. */
 #define MM_COUNT      16
 #define MM_PGD        12
-#define MM_CONTEXT    36
+#define MM_CONTEXT    52
 
 /* Linux sigcontext offsets. */
 #define SC_REGMASK    0
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index 96dd34c91..8c587afa5 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -1,4 +1,4 @@
-/* $Id: processor.h,v 1.14 1999/01/04 16:09:25 ralf Exp $
+/* $Id: processor.h,v 1.15 1999/02/15 02:22:12 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -11,6 +11,12 @@
 #ifndef __ASM_MIPS_PROCESSOR_H
 #define __ASM_MIPS_PROCESSOR_H
 
+/*
+ * Default implementation of macro that returns current
+ * instruction pointer ("program counter").
+ */
+#define current_text_addr() ({ __label__ _l; _l: &&_l;})
+
 #if !defined (_LANGUAGE_ASSEMBLY)
 #include <asm/cachectl.h>
 #include <asm/mipsregs.h>
@@ -174,7 +180,7 @@ struct thread_struct {
 
 /* Free all resources held by a thread. */
 extern void release_thread(struct task_struct *);
-extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
+extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 
 /* Copy and release all segment info associated with a VM */
 #define copy_segments(nr, p, mm) do { } while(0)
@@ -195,6 +201,7 @@ extern inline unsigned long thread_saved_pc(struct thread_struct *t)
 	return ((unsigned long*)t->reg29)[17];
 }
 
+struct pt_regs;
 extern int (*user_mode)(struct pt_regs *);
 
 /*
diff --git a/include/asm-mips/semaphore-helper.h b/include/asm-mips/semaphore-helper.h
index 63103c514..59337b898 100644
--- a/include/asm-mips/semaphore-helper.h
+++ b/include/asm-mips/semaphore-helper.h
@@ -1,4 +1,4 @@
-/* $Id: semaphore-helper.h,v 1.2 1999/06/10 08:02:41 ralf Exp $
+/* $Id: semaphore-helper.h,v 1.3 1999/06/11 14:30:15 ralf Exp $
  *
  * SMP- and interrupt-safe semaphores helper functions.
  *
@@ -57,7 +57,7 @@ waking_non_zero_interruptible(struct semaphore *sem, struct task_struct *tsk)
 {
 	long ret, tmp;
 
-#ifdef __MIPSEL__
+#ifdef __MIPSEB__
         __asm__ __volatile__("
 	.set	mips3
 	.set	push
diff --git a/include/asm-mips/semaphore.h b/include/asm-mips/semaphore.h
index 88c726546..302f4ff7d 100644
--- a/include/asm-mips/semaphore.h
+++ b/include/asm-mips/semaphore.h
@@ -1,11 +1,13 @@
-/*
+/* $Id: semaphore.h,v 1.7 1999/06/11 14:30:15 ralf Exp $
+ *
  * SMP- and interrupt-safe semaphores..
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * (C) Copyright 1996  Linus Torvalds, Ralf Baechle
+ * (C) Copyright 1996  Linus Torvalds
+ * (C) Copyright 1998, 1999  Ralf Baechle
  */
 #ifndef __ASM_MIPS_SEMAPHORE_H
 #define __ASM_MIPS_SEMAPHORE_H
@@ -13,27 +15,67 @@
 #include <asm/system.h>
 #include <asm/atomic.h>
 #include <asm/spinlock.h>
+#include <linux/wait.h>
 
 struct semaphore {
 	atomic_t count;
 	atomic_t waking;
-	struct wait_queue * wait;
+	wait_queue_head_t wait;
+#if WAITQUEUE_DEBUG
+	long __magic;
+#endif
 };
 
-#define MUTEX ((struct semaphore) { ATOMIC_INIT(1), ATOMIC_INIT(0), NULL })
-#define MUTEX_LOCKED ((struct semaphore) { ATOMIC_INIT(0), ATOMIC_INIT(0), NULL })
+#if WAITQUEUE_DEBUG
+# define __SEM_DEBUG_INIT(name) \
+		, (long)&(name).__magic
+#else
+# define __SEM_DEBUG_INIT(name)
+#endif
+
+#define __SEMAPHORE_INITIALIZER(name,count) \
+{ ATOMIC_INIT(count), ATOMIC_INIT(0), __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
+	__SEM_DEBUG_INIT(name) }
+
+#define __MUTEX_INITIALIZER(name) \
+	__SEMAPHORE_INITIALIZER(name,1)
+
+#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
+	struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
+
+#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
+#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
+
+extern inline void sema_init (struct semaphore *sem, int val)
+{
+	atomic_set(&sem->count, val);
+	atomic_set(&sem->waking, 0);
+	init_waitqueue_head(&sem->wait);
+#if WAITQUEUE_DEBUG
+	sem->__magic = (long)&sem->__magic;
+#endif
+}
+
+static inline void init_MUTEX (struct semaphore *sem)
+{
+	sema_init(sem, 1);
+}
+
+static inline void init_MUTEX_LOCKED (struct semaphore *sem)
+{
+	sema_init(sem, 0);
+}
 
 asmlinkage void __down(struct semaphore * sem);
 asmlinkage int  __down_interruptible(struct semaphore * sem);
 asmlinkage int __down_trylock(struct semaphore * sem);
 asmlinkage void __up(struct semaphore * sem);
 
-extern spinlock_t semaphore_wake_lock;
-
-#define sema_init(sem, val)	atomic_set(&((sem)->count), val)
-
 extern inline void down(struct semaphore * sem)
 {
+#if WAITQUEUE_DEBUG
+	CHECK_MAGIC(sem->__magic);
+#endif
 	if (atomic_dec_return(&sem->count) < 0)
 		__down(sem);
 }
@@ -41,6 +83,10 @@ extern inline void down(struct semaphore * sem)
 extern inline int down_interruptible(struct semaphore * sem)
 {
 	int ret = 0;
+
+#if WAITQUEUE_DEBUG
+	CHECK_MAGIC(sem->__magic);
+#endif
 	if (atomic_dec_return(&sem->count) < 0)
 		ret = __down_interruptible(sem);
 	return ret;
@@ -56,6 +102,9 @@ extern inline int down_trylock(struct semaphore * sem)
 {
 	long ret, tmp, tmp2, sub;
 
+#if WAITQUEUE_DEBUG
+	CHECK_MAGIC(sem->__magic);
+#endif
 #ifdef __MIPSEB__
 	__asm__ __volatile__("
 			.set	mips3
@@ -96,6 +145,9 @@ extern inline int down_trylock(struct semaphore * sem)
  */
 extern inline void up(struct semaphore * sem)
 {
+#if WAITQUEUE_DEBUG
+	CHECK_MAGIC(sem->__magic);
+#endif
 	if (atomic_inc_return(&sem->count) <= 0)
 		__up(sem);
 }
diff --git a/include/asm-mips/softirq.h b/include/asm-mips/softirq.h
index 3c38ecf7b..7a6e4ff5c 100644
--- a/include/asm-mips/softirq.h
+++ b/include/asm-mips/softirq.h
@@ -1,4 +1,4 @@
-/* $Id: softirq.h,v 1.4 1998/09/19 19:19:39 ralf Exp $
+/* $Id: softirq.h,v 1.5 1999/02/15 02:22:12 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -17,6 +17,15 @@ extern atomic_t __mips_bh_counter;
 
 extern unsigned int local_bh_count[NR_CPUS];
 
+#define cpu_bh_disable(cpu)    do { local_bh_count[(cpu)]++; barrier(); } while (0)
+#define cpu_bh_enable(cpu)     do { barrier(); local_bh_count[(cpu)]--; } while (0)
+
+#define cpu_bh_trylock(cpu)    (local_bh_count[(cpu)] ? 0 : (local_bh_count[(cpu)] = 1))
+#define cpu_bh_endlock(cpu)    (local_bh_count[(cpu)] = 0)
+
+#define local_bh_disable()     cpu_bh_disable(smp_processor_id())
+#define local_bh_enable()      cpu_bh_enable(smp_processor_id())
+
 #define get_active_bhs()	(bh_mask & bh_active)
 
 static inline void clear_active_bhs(unsigned long x)
@@ -71,19 +80,19 @@ extern inline void enable_bh(int nr)
 
 extern inline void start_bh_atomic(void)
 {
-	local_bh_count[smp_processor_id()]++;
+	local_bh_disable();
 	barrier();
 }
 
 extern inline void end_bh_atomic(void)
 {
 	barrier();
-	local_bh_count[smp_processor_id()]--;
+	local_bh_enable();
 }
 
 /* These are for the irq's testing the lock */
-#define softirq_trylock(cpu)	(local_bh_count[cpu] ? 0 : (local_bh_count[cpu] = 1))
-#define softirq_endlock(cpu)	(local_bh_count[cpu] = 0)
+#define softirq_trylock(cpu)   (cpu_bh_trylock(cpu))
+#define softirq_endlock(cpu)   (cpu_bh_endlock(cpu))
 #define synchronize_bh()	barrier()
 
 #endif /* __ASM_MIPS_SOFTIRQ_H */
diff --git a/include/asm-mips/spinlock.h b/include/asm-mips/spinlock.h
index 581641827..6a7b067b2 100644
--- a/include/asm-mips/spinlock.h
+++ b/include/asm-mips/spinlock.h
@@ -1,8 +1,37 @@
-/* $Id: spinlock.h,v 1.3 1998/08/25 16:20:59 tsbogend Exp $
+/* $Id: spinlock.h,v 1.4 1998/08/25 16:45:46 tsbogend Exp $
  */
 #ifndef __ASM_MIPS_SPINLOCK_H
 #define __ASM_MIPS_SPINLOCK_H
 
+/*
+ * These are the generic versions of the spinlocks
+ * and read-write locks.. We should actually do a
+ * <linux/spinlock.h> with all of this. Oh, well.
+ */
+#define spin_lock_irqsave(lock, flags)		do { local_irq_save(flags);       spin_lock(lock); } while (0)
+#define spin_lock_irq(lock)			do { local_irq_disable();         spin_lock(lock); } while (0)
+#define spin_lock_bh(lock)			do { local_bh_disable();          spin_lock(lock); } while (0)
+
+#define read_lock_irqsave(lock, flags)		do { local_irq_save(flags);       read_lock(lock); } while (0)
+#define read_lock_irq(lock)			do { local_irq_disable();         read_lock(lock); } while (0)
+#define read_lock_bh(lock)			do { local_bh_disable();          read_lock(lock); } while (0)
+
+#define write_lock_irqsave(lock, flags)		do { local_irq_save(flags);      write_lock(lock); } while (0)
+#define write_lock_irq(lock)			do { local_irq_disable();        write_lock(lock); } while (0)
+#define write_lock_bh(lock)			do { local_bh_disable();         write_lock(lock); } while (0)
+
+#define spin_unlock_irqrestore(lock, flags)	do { spin_unlock(lock);  local_irq_restore(flags); } while (0)
+#define spin_unlock_irq(lock)			do { spin_unlock(lock);  local_irq_enable();       } while (0)
+#define spin_unlock_bh(lock)			do { spin_unlock(lock);  local_bh_enable();        } while (0)
+
+#define read_unlock_irqrestore(lock, flags)	do { read_unlock(lock);  local_irq_restore(flags); } while (0)
+#define read_unlock_irq(lock)			do { read_unlock(lock);  local_irq_enable();       } while (0)
+#define read_unlock_bh(lock)			do { read_unlock(lock);  local_bh_enable();        } while (0)
+
+#define write_unlock_irqrestore(lock, flags)	do { write_unlock(lock); local_irq_restore(flags); } while (0)
+#define write_unlock_irq(lock)			do { write_unlock(lock); local_irq_enable();       } while (0)
+#define write_unlock_bh(lock)			do { write_unlock(lock); local_bh_enable();        } while (0)
+
 #ifndef __SMP__
 
 /*
@@ -10,10 +39,10 @@
  */
 #if (__GNUC__ > 2) || (__GNUC__ == 2 && __GNUC_MINOR__ >= 8)
   typedef struct { } spinlock_t;
-  #define SPIN_LOCK_UNLOCKED { }
+  #define SPIN_LOCK_UNLOCKED (spinlock_t) { }
 #else
   typedef struct { int gcc_is_buggy; } spinlock_t;
-  #define SPIN_LOCK_UNLOCKED { 0 }
+  #define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 }
 #endif
 
 #define spin_lock_init(lock)	do { } while(0)
@@ -21,11 +50,6 @@
 #define spin_trylock(lock)	(1)
 #define spin_unlock_wait(lock)	do { } while(0)
 #define spin_unlock(lock)	do { } while(0)
-#define spin_lock_irq(lock)	cli()
-#define spin_unlock_irq(lock)	sti()
-
-#define spin_lock_irqsave(lock, flags)		save_and_cli(flags)
-#define spin_unlock_irqrestore(lock, flags)	restore_flags(flags)
 
 /*
  * Read-write spinlocks, allowing multiple readers
@@ -38,21 +62,12 @@
  * read-locks.
  */
 typedef struct { } rwlock_t;
-#define RW_LOCK_UNLOCKED { }
+#define RW_LOCK_UNLOCKED (rwlock_t) { }
 
 #define read_lock(lock)		do { } while(0)
 #define read_unlock(lock)	do { } while(0)
 #define write_lock(lock)	do { } while(0)
 #define write_unlock(lock)	do { } while(0)
-#define read_lock_irq(lock)	cli()
-#define read_unlock_irq(lock)	sti()
-#define write_lock_irq(lock)	cli()
-#define write_unlock_irq(lock)	sti()
-
-#define read_lock_irqsave(lock, flags)		save_and_cli(flags)
-#define read_unlock_irqrestore(lock, flags)	restore_flags(flags)
-#define write_lock_irqsave(lock, flags)		save_and_cli(flags)
-#define write_unlock_irqrestore(lock, flags)	restore_flags(flags)
 
 #else
 
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index d47580a11..852254828 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -1,4 +1,4 @@
-/* $Id: system.h,v 1.9 1999/05/01 10:08:19 harald Exp $
+/* $Id: system.h,v 1.10 1999/06/13 16:35:55 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -113,6 +113,12 @@ __restore_flags(int flags)
 #define save_and_cli(x) __save_and_cli(x)
 #define restore_flags(x) __restore_flags(x)
 
+/* For spinlocks etc */
+#define local_irq_save(x)	__save_flags(x);
+#define local_irq_restore(x)	__restore_flags(x);
+#define local_irq_disable()	__cli();
+#define local_irq_enable()	__sti();
+
 /*
  * These are probably defined overly paranoid ...
  */