diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 1997-06-17 13:20:30 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 1997-06-17 13:20:30 +0000 |
| commit | 7acb77a6e7bddd4c4c5aa975bbf976927c013798 (patch) | |
| tree | 4139829ec6edb85f73774bb95cdec376758bfc73 /include/asm-sparc64/fpumacro.h | |
| parent | 64d58d4c8cd6a89ee218301ec0dc0ebfec91a4db (diff) | |
Merge with 2.1.43.
Diffstat (limited to 'include/asm-sparc64/fpumacro.h')
| -rw-r--r-- | include/asm-sparc64/fpumacro.h | 43 |
1 files changed, 39 insertions, 4 deletions
diff --git a/include/asm-sparc64/fpumacro.h b/include/asm-sparc64/fpumacro.h index 9928a38c2..f6323254d 100644 --- a/include/asm-sparc64/fpumacro.h +++ b/include/asm-sparc64/fpumacro.h @@ -1,12 +1,27 @@ /* fpumacro.h: FPU related macros. * * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) + * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) */ #ifndef _SPARC64_FPUMACRO_H #define _SPARC64_FPUMACRO_H -extern __inline__ void fpsave32(unsigned long *fpregs, unsigned long *fsr) +extern __inline__ unsigned long fprs_read(void) +{ + unsigned long retval; + + __asm__ __volatile__("rd %%fprs, %0" : "=r" (retval)); + + return retval; +} + +extern __inline__ void fprs_write(unsigned long val) +{ + __asm__ __volatile__("wr %0, 0x0, %%fprs" : : "r" (val)); +} + +extern __inline__ void fpsave32(unsigned int *fpregs, unsigned long *fsr) { __asm__ __volatile__ (" wr %%g0, %2, %%asi @@ -16,7 +31,7 @@ extern __inline__ void fpsave32(unsigned long *fpregs, unsigned long *fsr) " : : "r" (fpregs), "r" (fsr), "i" (ASI_BLK_P)); } -extern __inline__ void fpload32(unsigned long *fpregs, unsigned long *fsr) +extern __inline__ void fpload32(unsigned int *fpregs, unsigned long *fsr) { __asm__ __volatile__ (" wr %%g0, %2, %%asi @@ -26,7 +41,27 @@ extern __inline__ void fpload32(unsigned long *fpregs, unsigned long *fsr) " : : "r" (fpregs), "r" (fsr), "i" (ASI_BLK_P)); } -extern __inline__ void fpsave(unsigned long *fpregs, unsigned long *fsr) +extern __inline__ void fpsave64hi(unsigned int *fpregs, unsigned long *fsr) +{ + __asm__ __volatile__ (" + wr %%g0, %2, %%asi + stx %%fsr, [%1] + stda %%f32, [%0 + 128] %%asi + stda %%f48, [%0 + 192] %%asi + " : : "r" (fpregs), "r" (fsr), "i" (ASI_BLK_P)); +} + +extern __inline__ void fpload64hi(unsigned int *fpregs, unsigned long *fsr) +{ + __asm__ __volatile__ (" + wr %%g0, %2, %%asi + ldda [%0 + 128] %%asi, %%f32 + ldda [%0 + 192] %%asi, %%f48 + ldx [%1], %%fsr + " : : "r" (fpregs), "r" (fsr), "i" (ASI_BLK_P)); +} + +extern __inline__ void fpsave(unsigned int *fpregs, unsigned long *fsr) { __asm__ __volatile__ (" wr %%g0, %2, %%asi @@ -38,7 +73,7 @@ extern __inline__ void fpsave(unsigned long *fpregs, unsigned long *fsr) " : : "r" (fpregs), "r" (fsr), "i" (ASI_BLK_P)); } -extern __inline__ void fpload(unsigned long *fpregs, unsigned long *fsr) +extern __inline__ void fpload(unsigned int *fpregs, unsigned long *fsr) { __asm__ __volatile__ (" wr %%g0, %2, %%asi |