Merge with Linux 2.4.0-test10.

157 files changed, 2108 insertions, 1719 deletions

diff --git a/include/asm-alpha/byteorder.h b/include/asm-alpha/byteorder.h
index e574bb6e7..edc376a04 100644
--- a/include/asm-alpha/byteorder.h
+++ b/include/asm-alpha/byteorder.h
@@ -3,52 +3,6 @@
 
 #include <asm/types.h>
 
-/* EGCS 1.1 can, without scheduling, do just as good as we do here
-   with the standard macros.  And since it can schedule, it does even
-   better in the end.  */
-
-#if defined(__GNUC__) && __GNUC_MINOR__ < 91
-
-static __inline__ __const__ __u32 ___arch__swab32(__u32 x)
-{
-	__u64 t1, t2, t3;
-
-	/* Break the final or's out of the block so that gcc can
-	   schedule them at will.  Further, use add not or so that
-	   we elide the sign extend gcc will put in because the
-	   return type is not a long.  */
-
-	__asm__(
-	"insbl	%3,3,%1		# %1 = dd000000\n\t"
-	"zapnot	%3,2,%2		# %2 = 0000cc00\n\t"
-	"sll	%2,8,%2		# %2 = 00cc0000\n\t"
-	"or	%2,%1,%1	# %1 = ddcc0000\n\t"
-	"zapnot	%3,4,%2		# %2 = 00bb0000\n\t"
-	"extbl	%3,3,%0		# %0 = 000000aa\n\t"
-	"srl	%2,8,%2		# %2 = 0000bb00"
-	: "=r"(t3), "=&r"(t1), "=&r"(t2)
-	: "r"(x));
-
-	return t3 + t2 + t1;
-}
-
-static __inline__ __const__ __u16 ___arch__swab16(__u16 x)
-{
-	__u64 t1, t2;
-
-	__asm__(
-	"insbl	%2,1,%1		# %1 = bb00\n\t"
-	"extbl	%2,1,%0		# %0 = 00aa"
-	: "=r"(t1), "=&r"(t2) : "r"(x));
-
-	return t1 | t2;
-}
-
-#define __arch__swab32(x) ___arch__swab32(x)
-#define __arch__swab16(x) ___arch__swab16(x)
-
-#endif /* __GNUC__ */
-
 #define __BYTEORDER_HAS_U64__
 
 #include <linux/byteorder/little_endian.h>
diff --git a/include/asm-alpha/compiler.h b/include/asm-alpha/compiler.h
index d3b2808e8..70d6ce775 100644
--- a/include/asm-alpha/compiler.h
+++ b/include/asm-alpha/compiler.h
@@ -9,11 +9,7 @@
  * these tests and macros.
  */
 
-/*
- * EGCS (of varying versions) does a good job of using insxl and extxl.
- */
-
-#if 0 && (__GNUC__ > 2 || __GNUC_MINOR__ >= 91)
+#if 0
 #define __kernel_insbl(val, shift) \
   (((unsigned long)(val) & 0xfful) << ((shift) * 8))
 #define __kernel_inswl(val, shift) \
diff --git a/include/asm-alpha/fcntl.h b/include/asm-alpha/fcntl.h
index 86a73667f..292765efa 100644
--- a/include/asm-alpha/fcntl.h
+++ b/include/asm-alpha/fcntl.h
@@ -48,7 +48,7 @@
 #define F_EXLCK		16	/* or 3 */
 #define F_SHLCK		32	/* or 4 */
 
-#define F_INPROGRESS   16
+#define F_INPROGRESS	64
 
 /* operations for bsd flock(), also used by the kernel implementation */
 #define LOCK_SH		1	/* shared lock */
diff --git a/include/asm-alpha/pgalloc.h b/include/asm-alpha/pgalloc.h
index dc23ef74d..dd09a2eec 100644
--- a/include/asm-alpha/pgalloc.h
+++ b/include/asm-alpha/pgalloc.h
@@ -80,7 +80,7 @@ ev5_flush_tlb_current(struct mm_struct *mm)
 	__load_new_mm_context(mm);
 }
 
-extern inline void
+static inline void
 flush_tlb_other(struct mm_struct *mm)
 {
 	mm->context = 0;
@@ -234,27 +234,13 @@ extern struct pgtable_cache_struct {
 #define pte_quicklist (quicklists.pte_cache)
 #define pgtable_cache_size (quicklists.pgtable_cache_sz)
 
-extern __inline__ pgd_t *get_pgd_slow(void)
-{
-	pgd_t *ret = (pgd_t *)__get_free_page(GFP_KERNEL), *init;
-	
-	if (ret) {
-		init = pgd_offset(&init_mm, 0UL);
-		memset (ret, 0, USER_PTRS_PER_PGD * sizeof(pgd_t));
-		memcpy (ret + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD,
-			(PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
-
-		pgd_val(ret[PTRS_PER_PGD])
-		  = pte_val(mk_pte(virt_to_page(ret), PAGE_KERNEL));
-	}
-	return ret;
-}
+extern pgd_t *get_pgd_slow(void);
 
-extern __inline__ pgd_t *get_pgd_fast(void)
+static inline pgd_t *get_pgd_fast(void)
 {
 	unsigned long *ret;
 
-	if((ret = pgd_quicklist) != NULL) {
+	if ((ret = pgd_quicklist) != NULL) {
 		pgd_quicklist = (unsigned long *)(*ret);
 		ret[0] = ret[1];
 		pgtable_cache_size--;
@@ -263,25 +249,25 @@ extern __inline__ pgd_t *get_pgd_fast(void)
 	return (pgd_t *)ret;
 }
 
-extern __inline__ void free_pgd_fast(pgd_t *pgd)
+static inline void free_pgd_fast(pgd_t *pgd)
 {
 	*(unsigned long *)pgd = (unsigned long) pgd_quicklist;
 	pgd_quicklist = (unsigned long *) pgd;
 	pgtable_cache_size++;
 }
 
-extern __inline__ void free_pgd_slow(pgd_t *pgd)
+static inline void free_pgd_slow(pgd_t *pgd)
 {
 	free_page((unsigned long)pgd);
 }
 
 extern pmd_t *get_pmd_slow(pgd_t *pgd, unsigned long address_premasked);
 
-extern __inline__ pmd_t *get_pmd_fast(void)
+static inline pmd_t *get_pmd_fast(void)
 {
 	unsigned long *ret;
 
-	if((ret = (unsigned long *)pte_quicklist) != NULL) {
+	if ((ret = (unsigned long *)pte_quicklist) != NULL) {
 		pte_quicklist = (unsigned long *)(*ret);
 		ret[0] = ret[1];
 		pgtable_cache_size--;
@@ -289,25 +275,25 @@ extern __inline__ pmd_t *get_pmd_fast(void)
 	return (pmd_t *)ret;
 }
 
-extern __inline__ void free_pmd_fast(pmd_t *pmd)
+static inline void free_pmd_fast(pmd_t *pmd)
 {
 	*(unsigned long *)pmd = (unsigned long) pte_quicklist;
 	pte_quicklist = (unsigned long *) pmd;
 	pgtable_cache_size++;
 }
 
-extern __inline__ void free_pmd_slow(pmd_t *pmd)
+static inline void free_pmd_slow(pmd_t *pmd)
 {
 	free_page((unsigned long)pmd);
 }
 
 extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long address_preadjusted);
 
-extern __inline__ pte_t *get_pte_fast(void)
+static inline pte_t *get_pte_fast(void)
 {
 	unsigned long *ret;
 
-	if((ret = (unsigned long *)pte_quicklist) != NULL) {
+	if ((ret = (unsigned long *)pte_quicklist) != NULL) {
 		pte_quicklist = (unsigned long *)(*ret);
 		ret[0] = ret[1];
 		pgtable_cache_size--;
@@ -315,14 +301,14 @@ extern __inline__ pte_t *get_pte_fast(void)
 	return (pte_t *)ret;
 }
 
-extern __inline__ void free_pte_fast(pte_t *pte)
+static inline void free_pte_fast(pte_t *pte)
 {
 	*(unsigned long *)pte = (unsigned long) pte_quicklist;
 	pte_quicklist = (unsigned long *) pte;
 	pgtable_cache_size++;
 }
 
-extern __inline__ void free_pte_slow(pte_t *pte)
+static inline void free_pte_slow(pte_t *pte)
 {
 	free_page((unsigned long)pte);
 }
@@ -337,7 +323,7 @@ extern void __bad_pmd(pgd_t *pgd);
 #define pgd_free(pgd)		free_pgd_fast(pgd)
 #define pgd_alloc()		get_pgd_fast()
 
-extern inline pte_t * pte_alloc(pmd_t *pmd, unsigned long address)
+static inline pte_t * pte_alloc(pmd_t *pmd, unsigned long address)
 {
 	address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
 	if (pmd_none(*pmd)) {
@@ -355,7 +341,7 @@ extern inline pte_t * pte_alloc(pmd_t *pmd, unsigned long address)
 	return (pte_t *) pmd_page(*pmd) + address;
 }
 
-extern inline pmd_t * pmd_alloc(pgd_t *pgd, unsigned long address)
+static inline pmd_t * pmd_alloc(pgd_t *pgd, unsigned long address)
 {
 	address = (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
 	if (pgd_none(*pgd)) {
@@ -378,20 +364,4 @@ extern inline pmd_t * pmd_alloc(pgd_t *pgd, unsigned long address)
 
 extern int do_check_pgt_cache(int, int);
 
-extern inline void set_pgdir(unsigned long address, pgd_t entry)
-{
-	struct task_struct * p;
-	pgd_t *pgd;
-        
-	read_lock(&tasklist_lock);
-	for_each_task(p) {
-		if (!p->mm)
-			continue;
-		*pgd_offset(p->mm,address) = entry;
-	}
-	read_unlock(&tasklist_lock);
-	for (pgd = (pgd_t *)pgd_quicklist; pgd; pgd = (pgd_t *)*(unsigned long *)pgd)
-		pgd[(address >> PGDIR_SHIFT) & (PTRS_PER_PAGE - 1)] = entry;
-}
-
 #endif /* _ALPHA_PGALLOC_H */
diff --git a/include/asm-alpha/pgtable.h b/include/asm-alpha/pgtable.h
index d68e18332..5c4373d3b 100644
--- a/include/asm-alpha/pgtable.h
+++ b/include/asm-alpha/pgtable.h
@@ -33,22 +33,23 @@
 /*
  * Entries per page directory level:  the Alpha is three-level, with
  * all levels having a one-page page table.
- *
- * The PGD is special:  the last entry is reserved for self-mapping.
  */
 #define PTRS_PER_PTE	(1UL << (PAGE_SHIFT-3))
 #define PTRS_PER_PMD	(1UL << (PAGE_SHIFT-3))
-#define PTRS_PER_PGD	((1UL << (PAGE_SHIFT-3))-1)
+#define PTRS_PER_PGD	(1UL << (PAGE_SHIFT-3))
 #define USER_PTRS_PER_PGD	(TASK_SIZE / PGDIR_SIZE)
 #define FIRST_USER_PGD_NR	0
 
 /* Number of pointers that fit on a page:  this will go away. */
 #define PTRS_PER_PAGE	(1UL << (PAGE_SHIFT-3))
 
-#define CONSOLE_REMAP_START    0xFFFFFE0000000000
-#define VMALLOC_START          (CONSOLE_REMAP_START + PMD_SIZE)
+#ifdef CONFIG_ALPHA_LARGE_VMALLOC
+#define VMALLOC_START		0xfffffe0000000000
+#else
+#define VMALLOC_START		(-2*PGDIR_SIZE)
+#endif
 #define VMALLOC_VMADDR(x)	((unsigned long)(x))
-#define VMALLOC_END		(~0UL)
+#define VMALLOC_END		(-PGDIR_SIZE)
 
 /*
  * OSF/1 PAL-code-imposed page table bits
@@ -260,7 +261,7 @@ extern inline pte_t pte_mkyoung(pte_t pte)	{ pte_val(pte) |= __ACCESS_BITS; retu
 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
 
 /* to find an entry in a page-table-directory. */
-#define pgd_index(address)	((address >> PGDIR_SHIFT) & PTRS_PER_PGD)
+#define pgd_index(address)	((address >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
 #define __pgd_offset(address)	pgd_index(address)
 #define pgd_offset(mm, address)	((mm)->pgd+pgd_index(address))
 
@@ -319,4 +320,6 @@ extern inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
 
 extern void paging_init(void);
 
+#include <asm-generic/pgtable.h>
+
 #endif /* _ALPHA_PGTABLE_H */
diff --git a/include/asm-alpha/string.h b/include/asm-alpha/string.h
index 2b9cf9438..9e44fea66 100644
--- a/include/asm-alpha/string.h
+++ b/include/asm-alpha/string.h
@@ -18,28 +18,19 @@ extern void * memmove(void *, const void *, size_t);
 /* For backward compatibility with modules.  Unused otherwise.  */
 extern void * __memcpy(void *, const void *, size_t);
 
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
 #define memcpy __builtin_memcpy
-#endif
 
 #define __HAVE_ARCH_MEMSET
 extern void * __constant_c_memset(void *, unsigned long, size_t);
 extern void * __memset(void *, int, size_t);
 extern void * memset(void *, int, size_t);
 
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
 #define memset(s, c, n)							    \
 (__builtin_constant_p(c)						    \
  ? (__builtin_constant_p(n) && (c) == 0					    \
     ? __builtin_memset((s),0,(n)) 					    \
     : __constant_c_memset((s),0x0101010101010101UL*(unsigned char)(c),(n))) \
  : __memset((s),(c),(n)))
-#else
-#define memset(s, c, n)							\
-(__builtin_constant_p(c)						\
- ? __constant_c_memset((s),0x0101010101010101UL*(unsigned char)(c),(n)) \
- : __memset((s),(c),(n)))
-#endif
 
 #define __HAVE_ARCH_STRCPY
 extern char * strcpy(char *,const char *);
diff --git a/include/asm-alpha/system.h b/include/asm-alpha/system.h
index b97d0c5b6..6d34c5472 100644
--- a/include/asm-alpha/system.h
+++ b/include/asm-alpha/system.h
@@ -36,6 +36,7 @@
 #define START_ADDR	(PAGE_OFFSET+KERNEL_START_PHYS+0x10000)
 
 #ifndef __ASSEMBLY__
+#include <linux/kernel.h>
 
 /*
  * This is the logout header that should be common to all platforms
diff --git a/include/asm-alpha/unaligned.h b/include/asm-alpha/unaligned.h
index 8017f6bfa..1ec3e969e 100644
--- a/include/asm-alpha/unaligned.h
+++ b/include/asm-alpha/unaligned.h
@@ -31,59 +31,20 @@ struct __una_u16 { __u16 x __attribute__((packed)); };
 
 extern inline unsigned long __uldq(const unsigned long * r11)
 {
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
 	const struct __una_u64 *ptr = (const struct __una_u64 *) r11;
 	return ptr->x;
-#else
-	unsigned long r1,r2;
-	__asm__("ldq_u %0,%3\n\t"
-		"ldq_u %1,%4\n\t"
-		"extql %0,%2,%0\n\t"
-		"extqh %1,%2,%1"
-		:"=&r" (r1), "=&r" (r2)
-		:"r" (r11),
-		 "m" (*r11),
-		 "m" (*(const unsigned long *)(7+(char *) r11)));
-	return r1 | r2;
-#endif
 }
 
 extern inline unsigned long __uldl(const unsigned int * r11)
 {
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
 	const struct __una_u32 *ptr = (const struct __una_u32 *) r11;
 	return ptr->x;
-#else
-	unsigned long r1,r2;
-	__asm__("ldq_u %0,%3\n\t"
-		"ldq_u %1,%4\n\t"
-		"extll %0,%2,%0\n\t"
-		"extlh %1,%2,%1"
-		:"=&r" (r1), "=&r" (r2)
-		:"r" (r11),
-		 "m" (*r11),
-		 "m" (*(const unsigned long *)(3+(char *) r11)));
-	return r1 | r2;
-#endif
 }
 
 extern inline unsigned long __uldw(const unsigned short * r11)
 {
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
 	const struct __una_u16 *ptr = (const struct __una_u16 *) r11;
 	return ptr->x;
-#else
-	unsigned long r1,r2;
-	__asm__("ldq_u %0,%3\n\t"
-		"ldq_u %1,%4\n\t"
-		"extwl %0,%2,%0\n\t"
-		"extwh %1,%2,%1"
-		:"=&r" (r1), "=&r" (r2)
-		:"r" (r11),
-		 "m" (*r11),
-		 "m" (*(const unsigned long *)(1+(char *) r11)));
-	return r1 | r2;
-#endif
 }
 
 /*
@@ -92,77 +53,20 @@ extern inline unsigned long __uldw(const unsigned short * r11)
 
 extern inline void __ustq(unsigned long r5, unsigned long * r11)
 {
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
 	struct __una_u64 *ptr = (struct __una_u64 *) r11;
 	ptr->x = r5;
-#else
-	unsigned long r1,r2,r3,r4;
-
-	__asm__("ldq_u %3,%1\n\t"
-		"ldq_u %2,%0\n\t"
-		"insqh %6,%7,%5\n\t"
-		"insql %6,%7,%4\n\t"
-		"mskqh %3,%7,%3\n\t"
-		"mskql %2,%7,%2\n\t"
-		"bis %3,%5,%3\n\t"
-		"bis %2,%4,%2\n\t"
-		"stq_u %3,%1\n\t"
-		"stq_u %2,%0"
-		:"=m" (*r11),
-		 "=m" (*(unsigned long *)(7+(char *) r11)),
-		 "=&r" (r1), "=&r" (r2), "=&r" (r3), "=&r" (r4)
-		:"r" (r5), "r" (r11));
-#endif
 }
 
 extern inline void __ustl(unsigned long r5, unsigned int * r11)
 {
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
 	struct __una_u32 *ptr = (struct __una_u32 *) r11;
 	ptr->x = r5;
-#else
-	unsigned long r1,r2,r3,r4;
-
-	__asm__("ldq_u %3,%1\n\t"
-		"ldq_u %2,%0\n\t"
-		"inslh %6,%7,%5\n\t"
-		"insll %6,%7,%4\n\t"
-		"msklh %3,%7,%3\n\t"
-		"mskll %2,%7,%2\n\t"
-		"bis %3,%5,%3\n\t"
-		"bis %2,%4,%2\n\t"
-		"stq_u %3,%1\n\t"
-		"stq_u %2,%0"
-		:"=m" (*r11),
-		 "=m" (*(unsigned long *)(3+(char *) r11)),
-		 "=&r" (r1), "=&r" (r2), "=&r" (r3), "=&r" (r4)
-		:"r" (r5), "r" (r11));
-#endif
 }
 
 extern inline void __ustw(unsigned long r5, unsigned short * r11)
 {
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
 	struct __una_u16 *ptr = (struct __una_u16 *) r11;
 	ptr->x = r5;
-#else
-	unsigned long r1,r2,r3,r4;
-
-	__asm__("ldq_u %3,%1\n\t"
-		"ldq_u %2,%0\n\t"
-		"inswh %6,%7,%5\n\t"
-		"inswl %6,%7,%4\n\t"
-		"mskwh %3,%7,%3\n\t"
-		"mskwl %2,%7,%2\n\t"
-		"bis %3,%5,%3\n\t"
-		"bis %2,%4,%2\n\t"
-		"stq_u %3,%1\n\t"
-		"stq_u %2,%0"
-		:"=m" (*r11),
-		 "=m" (*(unsigned long *)(1+(char *) r11)),
-		 "=&r" (r1), "=&r" (r2), "=&r" (r3), "=&r" (r4)
-		:"r" (r5), "r" (r11));
-#endif
 }
 
 extern inline unsigned long __get_unaligned(const void *ptr, size_t size)
diff --git a/include/asm-arm/byteorder.h b/include/asm-arm/byteorder.h
index 60a191cc3..f1e1d78ae 100644
--- a/include/asm-arm/byteorder.h
+++ b/include/asm-arm/byteorder.h
@@ -3,43 +3,6 @@
 
 #include <asm/types.h>
 
-#if defined(__GNUC__) && __GNUC__ == 2 && __GNUC_MINOR__ < 8
-
-/* Recent versions of GCC can open code the swaps at least as well
-   as we can write them by hand, so the "optimisations" here only 
-   make sense for older compilers.  Worse, some versions of GCC
-   actually go wrong in the presence of the assembler versions.
-   We play it safe and only turn them on for compilers older than
-   GCC 2.8.0.  */
-
-static __inline__ __const__ __u32 ___arch__swab32(__u32 x)
-{
-	unsigned long xx;
-	__asm__("eor\t%1, %0, %0, ror #16\n\t"
-		"bic\t%1, %1, #0xff0000\n\t"
-		"mov\t%0, %0, ror #8\n\t"
-		"eor\t%0, %0, %1, lsr #8\n\t"
-		: "=r" (x), "=&r" (xx)
-		: "0" (x));
-	return x;
-}
-
-static __inline__ __const__ __u16 ___arch__swab16(__u16 x)
-{
-	__asm__("eor\t%0, %0, %0, lsr #8\n\t"
-		"eor\t%0, %0, %0, lsl #8\n\t"
-		"bic\t%0, %0, #0xff0000\n\t"
-		"eor\t%0, %0, %0, lsr #8\n\t"
-		: "=r" (x) 
-		: "0" (x));
-	return x;
-}
-
-#define __arch__swab32(x) ___arch__swab32(x)
-#define __arch__swab16(x) ___arch__swab16(x)
-
-#endif /* __GNUC__ */
-
 #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
 #  define __BYTEORDER_HAS_U64__
 #  define __SWAB_64_THRU_32__
diff --git a/include/asm-arm/current.h b/include/asm-arm/current.h
index 3a06c2a8a..597a8773c 100644
--- a/include/asm-arm/current.h
+++ b/include/asm-arm/current.h
@@ -1,11 +1,7 @@
 #ifndef _ASMARM_CURRENT_H
 #define _ASMARM_CURRENT_H
 
-/* Old compilers seem to generate bad code if we allow `current' to be
-   non volatile.  */
-#if (__GNUC__ > 2) || (__GNUC__ == 2 && __GNUC_MINOR__ > 90)
 static inline struct task_struct *get_current(void) __attribute__ (( __const__ ));
-#endif
 
 static inline struct task_struct *get_current(void)
 {
diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h
index a18b26035..09c7421cc 100644
--- a/include/asm-arm/pgtable.h
+++ b/include/asm-arm/pgtable.h
@@ -185,6 +185,8 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 
 #define io_remap_page_range	remap_page_range
 
+#include <asm-generic/pgtable.h>
+
 #endif /* !__ASSEMBLY__ */
 
 #endif /* _ASMARM_PGTABLE_H */
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
new file mode 100644
index 000000000..a65546820
--- /dev/null
+++ b/include/asm-generic/pgtable.h
@@ -0,0 +1,43 @@
+#ifndef _ASM_GENERIC_PGTABLE_H
+#define _ASM_GENERIC_PGTABLE_H
+
+static inline int ptep_test_and_clear_young(pte_t *ptep)
+{
+	pte_t pte = *ptep;
+	if (!pte_young(pte))
+		return 0;
+	set_pte(ptep, pte_mkold(pte));
+	return 1;
+}
+
+static inline int ptep_test_and_clear_dirty(pte_t *ptep)
+{
+	pte_t pte = *ptep;
+	if (!pte_dirty(pte))
+		return 0;
+	set_pte(ptep, pte_mkclean(pte));
+	return 1;
+}
+
+static inline pte_t ptep_get_and_clear(pte_t *ptep)
+{
+	pte_t pte = *ptep;
+	pte_clear(ptep);
+	return pte;
+}
+
+static inline void ptep_clear_wrprotect(pte_t *ptep)
+{
+	pte_t old_pte = *ptep;
+	set_pte(ptep, pte_wrprotect(old_pte));
+}
+
+static inline void ptep_mkdirty(pte_t *ptep)
+{
+	pte_t old_pte = *ptep;
+	set_pte(ptep, pte_mkdirty(old_pte));
+}
+
+#define pte_same(A,B)	(pte_val(A) == pte_val(B))
+
+#endif /* _ASM_GENERIC_PGTABLE_H */
diff --git a/include/asm-i386/bugs.h b/include/asm-i386/bugs.h
index 008a3d47d..4b95d09cd 100644
--- a/include/asm-i386/bugs.h
+++ b/include/asm-i386/bugs.h
@@ -94,7 +94,6 @@ static void __init check_fpu(void)
 		printk(KERN_INFO "Enabling unmasked SIMD FPU exception support... ");
 		set_in_cr4(X86_CR4_OSXMMEXCPT);
 		printk("done.\n");
-		load_mxcsr(0x1f80);
 	}
 #endif
 
@@ -166,6 +165,7 @@ __asm__(".align 4\nvide: ret");
 static void __init check_amd_k6(void)
 {
 	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
+	    boot_cpu_data.x86 == 5 &&
 	    boot_cpu_data.x86_model == 6 &&
 	    boot_cpu_data.x86_mask == 1)
 	{
@@ -426,5 +426,5 @@ static void __init check_bugs(void)
 	check_pentium_f00f();
 #endif
 	check_cyrix_coma();
-	system_utsname.machine[1] = '0' + boot_cpu_data.x86;
+	system_utsname.machine[1] = '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86);
 }
diff --git a/include/asm-i386/cache.h b/include/asm-i386/cache.h
index de4a7a87c..615911e5b 100644
--- a/include/asm-i386/cache.h
+++ b/include/asm-i386/cache.h
@@ -6,7 +6,8 @@
 
 #include <linux/config.h>
 
-/* bytes per L1 cache line */
-#define        L1_CACHE_BYTES  CONFIG_X86_L1_CACHE_BYTES
+/* L1 cache line size */
+#define L1_CACHE_SHIFT	(CONFIG_X86_L1_CACHE_SHIFT)
+#define L1_CACHE_BYTES	(1 << L1_CACHE_SHIFT)
 
 #endif
diff --git a/include/asm-i386/elf.h b/include/asm-i386/elf.h
index de59b793a..55ffacff1 100644
--- a/include/asm-i386/elf.h
+++ b/include/asm-i386/elf.h
@@ -93,7 +93,7 @@ typedef struct user_fxsr_struct elf_fpxregset_t;
    For the moment, we have only optimizations for the Intel generations,
    but that could change... */
 
-#define ELF_PLATFORM  ("i386\0i486\0i586\0i686"+((boot_cpu_data.x86-3)*5))
+#define ELF_PLATFORM  ("i386\0i486\0i586\0i686"+(((boot_cpu_data.x86>6?6:boot_cpu_data.x86)-3)*5))
 
 #ifdef __KERNEL__
 #define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
diff --git a/include/asm-i386/floppy.h b/include/asm-i386/floppy.h
index 04a41eb58..641fa495a 100644
--- a/include/asm-i386/floppy.h
+++ b/include/asm-i386/floppy.h
@@ -45,11 +45,11 @@
 
 #define FLOPPY_CAN_FALLBACK_ON_NODMA
 
-static int virtual_dma_count=0;
-static int virtual_dma_residue=0;
-static char *virtual_dma_addr=0;
-static int virtual_dma_mode=0;
-static int doing_pdma=0;
+static int virtual_dma_count;
+static int virtual_dma_residue;
+static char *virtual_dma_addr;
+static int virtual_dma_mode;
+static int doing_pdma;
 
 static void floppy_hardint(int irq, void *dev_id, struct pt_regs * regs)
 {
diff --git a/include/asm-i386/i387.h b/include/asm-i386/i387.h
index ec7650841..f8ebabe1b 100644
--- a/include/asm-i386/i387.h
+++ b/include/asm-i386/i387.h
@@ -16,16 +16,16 @@
 #include <asm/sigcontext.h>
 #include <asm/user.h>
 
+extern void init_fpu(void);
 /*
  * FPU lazy state save handling...
  */
-extern void save_fpu( struct task_struct *tsk );
 extern void save_init_fpu( struct task_struct *tsk );
 extern void restore_fpu( struct task_struct *tsk );
 
 #define unlazy_fpu( tsk ) do { \
 	if ( tsk->flags & PF_USEDFPU ) \
-		save_fpu( tsk ); \
+		save_init_fpu( tsk ); \
 } while (0)
 
 #define clear_fpu( tsk ) do { \
diff --git a/include/asm-i386/page.h b/include/asm-i386/page.h
index 03b2ba400..8272b8f29 100644
--- a/include/asm-i386/page.h
+++ b/include/asm-i386/page.h
@@ -37,20 +37,20 @@
  * These are used to make use of C type-checking..
  */
 #if CONFIG_X86_PAE
-typedef struct { unsigned long long pte; } pte_t;
+typedef struct { unsigned long pte_low, pte_high; } pte_t;
 typedef struct { unsigned long long pmd; } pmd_t;
 typedef struct { unsigned long long pgd; } pgd_t;
-#define PTE_MASK	(~(unsigned long long) (PAGE_SIZE-1))
+#define pte_val(x)	((x).pte_low | ((unsigned long long)(x).pte_high << 32))
 #else
-typedef struct { unsigned long pte; } pte_t;
+typedef struct { unsigned long pte_low; } pte_t;
 typedef struct { unsigned long pmd; } pmd_t;
 typedef struct { unsigned long pgd; } pgd_t;
-#define PTE_MASK	PAGE_MASK
+#define pte_val(x)	((x).pte_low)
 #endif
+#define PTE_MASK	PAGE_MASK
 
 typedef struct { unsigned long pgprot; } pgprot_t;
 
-#define pte_val(x)	((x).pte)
 #define pmd_val(x)	((x).pmd)
 #define pgd_val(x)	((x).pgd)
 #define pgprot_val(x)	((x).pgprot)
diff --git a/include/asm-i386/param.h b/include/asm-i386/param.h
index ae818a9ab..ae1edc8d4 100644
--- a/include/asm-i386/param.h
+++ b/include/asm-i386/param.h
@@ -20,4 +20,8 @@
 
 #define MAXHOSTNAMELEN	64	/* max length of hostname */
 
+#ifdef __KERNEL__
+# define CLOCKS_PER_SEC	100	/* frequency at which times() counts */
+#endif
+
 #endif
diff --git a/include/asm-i386/pgalloc.h b/include/asm-i386/pgalloc.h
index 74c9b3798..64a9a7f68 100644
--- a/include/asm-i386/pgalloc.h
+++ b/include/asm-i386/pgalloc.h
@@ -152,33 +152,6 @@ fix:
 
 extern int do_check_pgt_cache(int, int);
 
-extern inline void set_pgdir(unsigned long address, pgd_t entry)
-{
-	struct task_struct * p;
-	pgd_t *pgd;
-#ifdef CONFIG_SMP
-	int i;
-#endif	
-
-	read_lock(&tasklist_lock);
-	for_each_task(p) {
-		if (!p->mm)
-			continue;
-		*pgd_offset(p->mm,address) = entry;
-	}
-	read_unlock(&tasklist_lock);
-#ifndef CONFIG_SMP
-	for (pgd = (pgd_t *)pgd_quicklist; pgd; pgd = (pgd_t *)*(unsigned long *)pgd)
-		pgd[address >> PGDIR_SHIFT] = entry;
-#else
-	/* To pgd_alloc/pgd_free, one holds master kernel lock and so does our callee, so we can
-	   modify pgd caches of other CPUs as well. -jj */
-	for (i = 0; i < NR_CPUS; i++)
-		for (pgd = (pgd_t *)cpu_data[i].pgd_quick; pgd; pgd = (pgd_t *)*(unsigned long *)pgd)
-			pgd[address >> PGDIR_SHIFT] = entry;
-#endif
-}
-
 /*
  * TLB flushing:
  *
diff --git a/include/asm-i386/pgtable-2level.h b/include/asm-i386/pgtable-2level.h
index dbb12f801..bb5c2077e 100644
--- a/include/asm-i386/pgtable-2level.h
+++ b/include/asm-i386/pgtable-2level.h
@@ -18,7 +18,7 @@
 #define PTRS_PER_PTE	1024
 
 #define pte_ERROR(e) \
-	printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
+	printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte_low)
 #define pmd_ERROR(e) \
 	printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
 #define pgd_ERROR(e) \
@@ -54,5 +54,10 @@ extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
 {
 	return (pmd_t *) dir;
 }
+#define ptep_get_and_clear(xp)	__pte(xchg(&(xp)->pte_low, 0))
+#define pte_same(a, b)		((a).pte_low == (b).pte_low)
+#define pte_page(x)		(mem_map+((unsigned long)(((x).pte_low >> PAGE_SHIFT))))
+#define pte_none(x)		(!(x).pte_low)
+#define __mk_pte(page_nr,pgprot) __pte(((page_nr) << PAGE_SHIFT) | pgprot_val(pgprot))
 
 #endif /* _I386_PGTABLE_2LEVEL_H */
diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h
index 5ee848ef3..aac1e3121 100644
--- a/include/asm-i386/pgtable-3level.h
+++ b/include/asm-i386/pgtable-3level.h
@@ -27,7 +27,7 @@
 #define PTRS_PER_PTE	512
 
 #define pte_ERROR(e) \
-	printk("%s:%d: bad pte %p(%016Lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
+	printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, &(e), (e).pte_high, (e).pte_low)
 #define pmd_ERROR(e) \
 	printk("%s:%d: bad pmd %p(%016Lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
 #define pgd_ERROR(e) \
@@ -45,8 +45,18 @@
 extern inline int pgd_bad(pgd_t pgd)		{ return 0; }
 extern inline int pgd_present(pgd_t pgd)	{ return !pgd_none(pgd); }
 
-#define set_pte(pteptr,pteval) \
-		set_64bit((unsigned long long *)(pteptr),pte_val(pteval))
+/* Rules for using set_pte: the pte being assigned *must* be
+ * either not present or in a state where the hardware will
+ * not attempt to update the pte.  In places where this is
+ * not possible, use pte_get_and_clear to obtain the old pte
+ * value and then use set_pte to update it.  -ben
+ */
+static inline void set_pte(pte_t *ptep, pte_t pte)
+{
+	ptep->pte_high = pte.pte_high;
+	smp_wmb();
+	ptep->pte_low = pte.pte_low;
+}
 #define set_pmd(pmdptr,pmdval) \
 		set_64bit((unsigned long long *)(pmdptr),pmd_val(pmdval))
 #define set_pgd(pgdptr,pgdval) \
@@ -76,4 +86,33 @@ extern inline void pgd_clear (pgd_t * pgd)
 #define pmd_offset(dir, address) ((pmd_t *) pgd_page(*(dir)) + \
 			__pmd_offset(address))
 
+static inline pte_t ptep_get_and_clear(pte_t *ptep)
+{
+	pte_t res;
+
+	/* xchg acts as a barrier before the setting of the high bits */
+	res.pte_low = xchg(&ptep->pte_low, 0);
+	res.pte_high = ptep->pte_high;
+	ptep->pte_high = 0;
+
+	return res;
+}
+
+static inline int pte_same(pte_t a, pte_t b)
+{
+	return a.pte_low == b.pte_low && a.pte_high == b.pte_high;
+}
+
+#define pte_page(x)	(mem_map+(((x).pte_low >> PAGE_SHIFT) | ((x).pte_high << (32 - PAGE_SHIFT))))
+#define pte_none(x)	(!(x).pte_low && !(x).pte_high)
+
+static inline pte_t __mk_pte(unsigned long page_nr, pgprot_t pgprot)
+{
+	pte_t pte;
+
+	pte.pte_high = page_nr >> (32 - PAGE_SHIFT);
+	pte.pte_low = (page_nr << PAGE_SHIFT) | pgprot_val(pgprot);
+	return pte;
+}
+
 #endif /* _I386_PGTABLE_3LEVEL_H */
diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h
index 4de265da0..5460e6ccc 100644
--- a/include/asm-i386/pgtable.h
+++ b/include/asm-i386/pgtable.h
@@ -17,6 +17,10 @@
 #include <asm/fixmap.h>
 #include <linux/threads.h>
 
+#ifndef _I386_BITOPS_H
+#include <asm/bitops.h>
+#endif
+
 extern pgd_t swapper_pg_dir[1024];
 extern void paging_init(void);
 
@@ -145,6 +149,16 @@ extern unsigned long empty_zero_page[1024];
  * the page directory entry points directly to a 4MB-aligned block of
  * memory. 
  */
+#define _PAGE_BIT_PRESENT	0
+#define _PAGE_BIT_RW		1
+#define _PAGE_BIT_USER		2
+#define _PAGE_BIT_PWT		3
+#define _PAGE_BIT_PCD		4
+#define _PAGE_BIT_ACCESSED	5
+#define _PAGE_BIT_DIRTY		6
+#define _PAGE_BIT_PSE		7	/* 4 MB (or 2MB) page, Pentium+, if present.. */
+#define _PAGE_BIT_GLOBAL	8	/* Global TLB entry PPro+ */
+
 #define _PAGE_PRESENT	0x001
 #define _PAGE_RW	0x002
 #define _PAGE_USER	0x004
@@ -231,8 +245,7 @@ extern unsigned long pg0[1024];
 extern void __handle_bad_pmd(pmd_t * pmd);
 extern void __handle_bad_pmd_kernel(pmd_t * pmd);
 
-#define pte_none(x)	(!pte_val(x))
-#define pte_present(x)	(pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
+#define pte_present(x)	((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
 #define pte_clear(xp)	do { set_pte(xp, __pte(0)); } while (0)
 
 #define pmd_none(x)	(!pmd_val(x))
@@ -246,49 +259,49 @@ extern void __handle_bad_pmd_kernel(pmd_t * pmd);
  */
 #define page_address(page) ((page)->virtual)
 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
-#define pte_page(x) (mem_map+((unsigned long)((pte_val(x) >> PAGE_SHIFT))))
 
 /*
  * The following only work if pte_present() is true.
  * Undefined behaviour if not..
  */
-extern inline int pte_read(pte_t pte)		{ return pte_val(pte) & _PAGE_USER; }
-extern inline int pte_exec(pte_t pte)		{ return pte_val(pte) & _PAGE_USER; }
-extern inline int pte_dirty(pte_t pte)		{ return pte_val(pte) & _PAGE_DIRTY; }
-extern inline int pte_young(pte_t pte)		{ return pte_val(pte) & _PAGE_ACCESSED; }
-extern inline int pte_write(pte_t pte)		{ return pte_val(pte) & _PAGE_RW; }
-
-extern inline pte_t pte_rdprotect(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
-extern inline pte_t pte_exprotect(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
-extern inline pte_t pte_mkclean(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
-extern inline pte_t pte_mkold(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
-extern inline pte_t pte_wrprotect(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; }
-extern inline pte_t pte_mkread(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; }
-extern inline pte_t pte_mkexec(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; }
-extern inline pte_t pte_mkdirty(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
-extern inline pte_t pte_mkyoung(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
-extern inline pte_t pte_mkwrite(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
+static inline int pte_read(pte_t pte)		{ return (pte).pte_low & _PAGE_USER; }
+static inline int pte_exec(pte_t pte)		{ return (pte).pte_low & _PAGE_USER; }
+static inline int pte_dirty(pte_t pte)		{ return (pte).pte_low & _PAGE_DIRTY; }
+static inline int pte_young(pte_t pte)		{ return (pte).pte_low & _PAGE_ACCESSED; }
+static inline int pte_write(pte_t pte)		{ return (pte).pte_low & _PAGE_RW; }
+
+static inline pte_t pte_rdprotect(pte_t pte)	{ (pte).pte_low &= ~_PAGE_USER; return pte; }
+static inline pte_t pte_exprotect(pte_t pte)	{ (pte).pte_low &= ~_PAGE_USER; return pte; }
+static inline pte_t pte_mkclean(pte_t pte)	{ (pte).pte_low &= ~_PAGE_DIRTY; return pte; }
+static inline pte_t pte_mkold(pte_t pte)	{ (pte).pte_low &= ~_PAGE_ACCESSED; return pte; }
+static inline pte_t pte_wrprotect(pte_t pte)	{ (pte).pte_low &= ~_PAGE_RW; return pte; }
+static inline pte_t pte_mkread(pte_t pte)	{ (pte).pte_low |= _PAGE_USER; return pte; }
+static inline pte_t pte_mkexec(pte_t pte)	{ (pte).pte_low |= _PAGE_USER; return pte; }
+static inline pte_t pte_mkdirty(pte_t pte)	{ (pte).pte_low |= _PAGE_DIRTY; return pte; }
+static inline pte_t pte_mkyoung(pte_t pte)	{ (pte).pte_low |= _PAGE_ACCESSED; return pte; }
+static inline pte_t pte_mkwrite(pte_t pte)	{ (pte).pte_low |= _PAGE_RW; return pte; }
+
+static inline  int ptep_test_and_clear_dirty(pte_t *ptep)	{ return test_and_clear_bit(_PAGE_BIT_DIRTY, ptep); }
+static inline  int ptep_test_and_clear_young(pte_t *ptep)	{ return test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep); }
+static inline void ptep_clear_wrprotect(pte_t *ptep)		{ clear_bit(_PAGE_BIT_RW, ptep); }
+static inline void ptep_mkdirty(pte_t *ptep)			{ set_bit(_PAGE_BIT_RW, ptep); }
 
 /*
  * Conversion functions: convert a page and protection to a page entry,
  * and a page entry and page directory to the page they refer to.
  */
 
-#define mk_pte(page,pgprot) \
-({									\
-	pte_t __pte;							\
-									\
-	set_pte(&__pte, __pte(((page)-mem_map) * 			\
-		(unsigned long long)PAGE_SIZE + pgprot_val(pgprot)));	\
-	__pte;								\
-})
+#define mk_pte(page, pgprot)	__mk_pte((page) - mem_map, (pgprot))
 
 /* This takes a physical page address that is used by the remapping functions */
-#define mk_pte_phys(physpage, pgprot) \
-({ pte_t __pte; set_pte(&__pte, __pte(physpage + pgprot_val(pgprot))); __pte; })
+#define mk_pte_phys(physpage, pgprot)	__mk_pte((physpage) >> PAGE_SHIFT, pgprot)
 
-extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
-{ set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; }
+static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
+{
+	pte.pte_low &= _PAGE_CHG_MASK;
+	pte.pte_low |= pgprot_val(newprot);
+	return pte;
+}
 
 #define page_pte(page) page_pte_prot(page, __pgprot(0))
 
@@ -324,7 +337,7 @@ extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 #define SWP_TYPE(x)			(((x).val >> 1) & 0x3f)
 #define SWP_OFFSET(x)			((x).val >> 8)
 #define SWP_ENTRY(type, offset)		((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
-#define pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })
+#define pte_to_swp_entry(pte)		((swp_entry_t) { (pte).pte_low })
 #define swp_entry_to_pte(x)		((pte_t) { (x).val })
 
 #define module_map      vmalloc
diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h
index 769269192..76ac26cae 100644
--- a/include/asm-i386/processor.h
+++ b/include/asm-i386/processor.h
@@ -85,7 +85,7 @@ struct cpuinfo_x86 {
 #define X86_FEATURE_CMOV	0x00008000	/* CMOV instruction (FCMOVCC and FCOMI too if FPU present) */
 #define X86_FEATURE_PAT		0x00010000	/* Page Attribute Table */
 #define X86_FEATURE_PSE36	0x00020000	/* 36-bit PSEs */
-#define X86_FEATURE_18		0x00040000
+#define X86_FEATURE_PN		0x00040000
 #define X86_FEATURE_19		0x00080000
 #define X86_FEATURE_20		0x00100000
 #define X86_FEATURE_21		0x00200000
diff --git a/include/asm-i386/ptrace.h b/include/asm-i386/ptrace.h
index 6a52f4e76..207d5a104 100644
--- a/include/asm-i386/ptrace.h
+++ b/include/asm-i386/ptrace.h
@@ -49,6 +49,11 @@ struct pt_regs {
 #define PTRACE_GETFPXREGS         18
 #define PTRACE_SETFPXREGS         19
 
+#define PTRACE_SETOPTIONS         21
+
+/* options set using PTRACE_SETOPTIONS */
+#define PTRACE_O_TRACESYSGOOD     0x00000001
+
 #ifdef __KERNEL__
 #define user_mode(regs) ((VM_MASK & (regs)->eflags) || (3 & (regs)->xcs))
 #define instruction_pointer(regs) ((regs)->eip)
diff --git a/include/asm-i386/user.h b/include/asm-i386/user.h
index dcd555159..ddc06ea01 100644
--- a/include/asm-i386/user.h
+++ b/include/asm-i386/user.h
@@ -48,8 +48,8 @@ struct user_i387_struct {
 	long	twd;
 	long	fip;
 	long	fcs;
-	long	fdp;
-	long	fds;
+	long	foo;
+	long	fos;
 	long	st_space[20];	/* 8*10 bytes for each FP-reg = 80 bytes */
 };
 
diff --git a/include/asm-ia64/acpi-ext.h b/include/asm-ia64/acpi-ext.h
index 24f9822e6..e5acd26a5 100644
--- a/include/asm-ia64/acpi-ext.h
+++ b/include/asm-ia64/acpi-ext.h
@@ -60,7 +60,7 @@ typedef struct {
 #define LSAPIC_PERFORMANCE_RESTRICTED (1<<1)
 #define LSAPIC_PRESENT                (1<<2)
 
-typedef struct {
+typedef struct acpi_entry_lsapic {
 	u8 type;
 	u8 length;
 	u16 acpi_processor_id;
diff --git a/include/asm-ia64/acpikcfg.h b/include/asm-ia64/acpikcfg.h
new file mode 100644
index 000000000..1bf49cf01
--- /dev/null
+++ b/include/asm-ia64/acpikcfg.h
@@ -0,0 +1,29 @@
+/*
+ *  acpikcfg.h - ACPI based Kernel Configuration Manager External Interfaces
+ *
+ *  Copyright (C) 2000 Intel Corp.
+ *  Copyright (C) 2000 J.I. Lee  <jung-ik.lee@intel.com>
+ */
+
+#include <linux/config.h>
+
+#ifdef	CONFIG_ACPI_KERNEL_CONFIG
+
+u32	__init acpi_cf_init (void * rsdp);
+u32	__init acpi_cf_terminate (void );
+
+u32	__init
+acpi_cf_get_pci_vectors (
+	struct pci_vector_struct	**vectors,
+	int				*num_pci_vectors
+	);
+
+
+#ifdef	CONFIG_ACPI_KERNEL_CONFIG_DEBUG
+void	__init
+acpi_cf_print_pci_vectors (
+	struct pci_vector_struct	*vectors,
+	int				num_pci_vectors
+	);
+#endif
+#endif	/* CONFIG_ACPI_KERNEL_CONFIG */
diff --git a/include/asm-ia64/atomic.h b/include/asm-ia64/atomic.h
index 43a44f4ad..08fc25c57 100644
--- a/include/asm-ia64/atomic.h
+++ b/include/asm-ia64/atomic.h
@@ -17,13 +17,6 @@
 #include <asm/system.h>
 
 /*
- * Make sure gcc doesn't try to be clever and move things around
- * on us. We need to use _exactly_ the address the user gave us,
- * not some alias that contains the same information.
- */
-#define __atomic_fool_gcc(x) (*(volatile struct { int a[100]; } *)x)
-
-/*
  * On IA-64, counter must always be volatile to ensure that that the
  * memory accesses are ordered.
  */
diff --git a/include/asm-ia64/bitops.h b/include/asm-ia64/bitops.h
index 054704c47..33da4a962 100644
--- a/include/asm-ia64/bitops.h
+++ b/include/asm-ia64/bitops.h
@@ -20,7 +20,7 @@
  * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
  */
 
-extern __inline__ void
+static __inline__ void
 set_bit (int nr, volatile void *addr)
 {
 	__u32 bit, old, new;
@@ -36,7 +36,12 @@ set_bit (int nr, volatile void *addr)
 	} while (cmpxchg_acq(m, old, new) != old);
 }
 
-extern __inline__ void
+/*
+ * clear_bit() doesn't provide any barrier for the compiler.
+ */
+#define smp_mb__before_clear_bit()	smp_mb()
+#define smp_mb__after_clear_bit()	smp_mb()
+static __inline__ void
 clear_bit (int nr, volatile void *addr)
 {
 	__u32 mask, old, new;
@@ -52,7 +57,7 @@ clear_bit (int nr, volatile void *addr)
 	} while (cmpxchg_acq(m, old, new) != old);
 }
 
-extern __inline__ void
+static __inline__ void
 change_bit (int nr, volatile void *addr)
 {
 	__u32 bit, old, new;
@@ -68,7 +73,7 @@ change_bit (int nr, volatile void *addr)
 	} while (cmpxchg_acq(m, old, new) != old);
 }
 
-extern __inline__ int
+static __inline__ int
 test_and_set_bit (int nr, volatile void *addr)
 {
 	__u32 bit, old, new;
@@ -85,7 +90,7 @@ test_and_set_bit (int nr, volatile void *addr)
 	return (old & bit) != 0;
 }
 
-extern __inline__ int
+static __inline__ int
 test_and_clear_bit (int nr, volatile void *addr)
 {
 	__u32 mask, old, new;
@@ -102,7 +107,7 @@ test_and_clear_bit (int nr, volatile void *addr)
 	return (old & ~mask) != 0;
 }
 
-extern __inline__ int
+static __inline__ int
 test_and_change_bit (int nr, volatile void *addr)
 {
 	__u32 bit, old, new;
@@ -119,7 +124,7 @@ test_and_change_bit (int nr, volatile void *addr)
 	return (old & bit) != 0;
 }
 
-extern __inline__ int
+static __inline__ int
 test_bit (int nr, volatile void *addr)
 {
 	return 1 & (((const volatile __u32 *) addr)[nr >> 5] >> (nr & 31));
@@ -129,7 +134,7 @@ test_bit (int nr, volatile void *addr)
  * ffz = Find First Zero in word. Undefined if no zero exists,
  * so code should check against ~0UL first..
  */
-extern inline unsigned long
+static inline unsigned long
 ffz (unsigned long x)
 {
 	unsigned long result;
@@ -164,7 +169,7 @@ ia64_fls (unsigned long x)
  * hweightN: returns the hamming weight (i.e. the number
  * of bits set) of a N-bit word
  */
-extern __inline__ unsigned long
+static __inline__ unsigned long
 hweight64 (unsigned long x)
 {
 	unsigned long result;
@@ -181,7 +186,7 @@ hweight64 (unsigned long x)
 /*
  * Find next zero bit in a bitmap reasonably efficiently..
  */
-extern inline int
+static inline int
 find_next_zero_bit (void *addr, unsigned long size, unsigned long offset)
 {
 	unsigned long *p = ((unsigned long *) addr) + (offset >> 6);
diff --git a/include/asm-ia64/delay.h b/include/asm-ia64/delay.h
index cca4ecdf6..dda714e20 100644
--- a/include/asm-ia64/delay.h
+++ b/include/asm-ia64/delay.h
@@ -18,13 +18,13 @@
 
 #include <asm/processor.h>
 
-extern __inline__ void
+static __inline__ void
 ia64_set_itm (unsigned long val)
 {
 	__asm__ __volatile__("mov cr.itm=%0;; srlz.d;;" :: "r"(val) : "memory");
 }
 
-extern __inline__ unsigned long
+static __inline__ unsigned long
 ia64_get_itm (void)
 {
 	unsigned long result;
@@ -33,7 +33,7 @@ ia64_get_itm (void)
 	return result;
 }
 
-extern __inline__ void
+static __inline__ void
 ia64_set_itv (unsigned char vector, unsigned char masked)
 {
 	if (masked > 1)
@@ -43,13 +43,13 @@ ia64_set_itv (unsigned char vector, unsigned char masked)
 			     :: "r"((masked << 16) | vector) : "memory");
 }
 
-extern __inline__ void
+static __inline__ void
 ia64_set_itc (unsigned long val)
 {
 	__asm__ __volatile__("mov ar.itc=%0;; srlz.d;;" :: "r"(val) : "memory");
 }
 
-extern __inline__ unsigned long
+static __inline__ unsigned long
 ia64_get_itc (void)
 {
 	unsigned long result;
@@ -58,7 +58,7 @@ ia64_get_itc (void)
 	return result;
 }
 
-extern __inline__ void
+static __inline__ void
 __delay (unsigned long loops)
 {
         unsigned long saved_ar_lc;
@@ -72,7 +72,7 @@ __delay (unsigned long loops)
 	__asm__ __volatile__("mov ar.lc=%0" :: "r"(saved_ar_lc));
 }
 
-extern __inline__ void
+static __inline__ void
 udelay (unsigned long usecs)
 {
 #ifdef CONFIG_IA64_SOFTSDV_HACKS
diff --git a/include/asm-ia64/efi.h b/include/asm-ia64/efi.h
index 5d311d32e..cfdfd4efd 100644
--- a/include/asm-ia64/efi.h
+++ b/include/asm-ia64/efi.h
@@ -219,7 +219,7 @@ extern struct efi {
 	efi_reset_system_t *reset_system;
 } efi;
 
-extern inline int
+static inline int
 efi_guidcmp (efi_guid_t left, efi_guid_t right)
 {
 	return memcmp(&left, &right, sizeof (efi_guid_t));
diff --git a/include/asm-ia64/fcntl.h b/include/asm-ia64/fcntl.h
index c20ab10ec..eeb42f793 100644
--- a/include/asm-ia64/fcntl.h
+++ b/include/asm-ia64/fcntl.h
@@ -3,8 +3,8 @@
 /*
  * This is mostly compatible with Linux/x86.
  *
- * Copyright (C) 1998, 1999 Hewlett-Packard Co
- * Copyright (C) 1998, 1999 David Mosberger-Tang <davidm@hpl.hp.com>
+ * Copyright (C) 1998-2000 Hewlett-Packard Co
+ * Copyright (C) 1998-2000 David Mosberger-Tang <davidm@hpl.hp.com>
  */
 
 /*
@@ -78,5 +78,9 @@ struct flock {
 	pid_t l_pid;
 };
 
+#ifdef __KERNEL__
+# define flock64	flock
+#endif
+
 #define F_LINUX_SPECIFIC_BASE	1024
 #endif /* _ASM_IA64_FCNTL_H */
diff --git a/include/asm-ia64/hardirq.h b/include/asm-ia64/hardirq.h
index 38a12be6e..7c1a4d109 100644
--- a/include/asm-ia64/hardirq.h
+++ b/include/asm-ia64/hardirq.h
@@ -39,8 +39,8 @@ typedef struct {
 # define hardirq_trylock(cpu)		(local_irq_count(cpu) == 0)
 # define hardirq_endlock(cpu)		do { } while (0)
 
-# define irq_enter(cpu, irq)		(++local_irq_count(cpu))
-# define irq_exit(cpu, irq)		(--local_irq_count(cpu))
+# define irq_enter(cpu, irq)		(local_irq_count(cpu)++)
+# define irq_exit(cpu, irq)		(local_irq_count(cpu)--)
 
 # define synchronize_irq()		barrier()
 #else
@@ -72,7 +72,7 @@ static inline void release_irqlock(int cpu)
 
 static inline void irq_enter(int cpu, int irq)
 {
-	++local_irq_count(cpu);
+	local_irq_count(cpu)++;
 
 	while (test_bit(0,&global_irq_lock)) {
 		/* nothing */;
@@ -81,7 +81,7 @@ static inline void irq_enter(int cpu, int irq)
 
 static inline void irq_exit(int cpu, int irq)
 {
-	--local_irq_count(cpu);
+	local_irq_count(cpu)--;
 }
 
 static inline int hardirq_trylock(int cpu)
diff --git a/include/asm-ia64/hw_irq.h b/include/asm-ia64/hw_irq.h
index e4dd5c1ee..06528f8d2 100644
--- a/include/asm-ia64/hw_irq.h
+++ b/include/asm-ia64/hw_irq.h
@@ -6,8 +6,6 @@
  * Copyright (C) 2000 David Mosberger-Tang <davidm@hpl.hp.com>
  */
 
-#include <linux/config.h>
-
 #include <linux/types.h>
 
 #include <asm/ptrace.h>
@@ -67,17 +65,7 @@ extern void ipi_send (int cpu, int vector, int delivery_mode, int redirect);
 static inline void
 hw_resend_irq (struct hw_interrupt_type *h, unsigned int vector)
 {
-	int my_cpu_id;
-
-#ifdef CONFIG_SMP
-	my_cpu_id = smp_processor_id();
-#else
-	__u64 lid;
-
-	__asm__ ("mov %0=cr.lid" : "=r"(lid));
-	my_cpu_id = (lid >> 24) & 0xff;		/* extract id (ignore eid) */
-#endif
-	ipi_send(my_cpu_id, vector, IA64_IPI_DM_INT, 0);
+	ipi_send(smp_processor_id(), vector, IA64_IPI_DM_INT, 0);
 }
 
 #endif /* _ASM_IA64_HW_IRQ_H */
diff --git a/include/asm-ia64/ia32.h b/include/asm-ia64/ia32.h
index c6732837c..48a6d0bd4 100644
--- a/include/asm-ia64/ia32.h
+++ b/include/asm-ia64/ia32.h
@@ -351,6 +351,8 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
 		(granularity << IA32_SEG_G)		       |       \
 		(((base >> 24) & 0xFF) << IA32_SEG_HIGH_BASE)) 
 
+#define IA32_IOBASE    0x2000000000000000 /* Virtual addres for I/O space */
+
 #define IA32_CR0       0x80000001      /* Enable PG and PE bits */
 #define IA32_CR4       0	       /* No architectural extensions */
 
diff --git a/include/asm-ia64/io.h b/include/asm-ia64/io.h
index 0740af45f..3dcc496fa 100644
--- a/include/asm-ia64/io.h
+++ b/include/asm-ia64/io.h
@@ -63,16 +63,15 @@ phys_to_virt(unsigned long address)
  */
 #define __ia64_mf_a()	__asm__ __volatile__ ("mf.a" ::: "memory")
 
-extern inline const unsigned long
+static inline const unsigned long
 __ia64_get_io_port_base (void)
 {
-	unsigned long addr;
+	extern unsigned long ia64_iobase;
 
-	__asm__ ("mov %0=ar.k0;;" : "=r"(addr));
-	return __IA64_UNCACHED_OFFSET | addr;
+	return ia64_iobase;
 }
 
-extern inline void*
+static inline void*
 __ia64_mk_io_addr (unsigned long port)
 {
 	const unsigned long io_base = __ia64_get_io_port_base();
@@ -100,7 +99,7 @@ __ia64_mk_io_addr (unsigned long port)
  * order. --davidm 99/12/07 
  */
 
-extern inline unsigned int
+static inline unsigned int
 __inb (unsigned long port)
 {
 	volatile unsigned char *addr = __ia64_mk_io_addr(port);
@@ -111,7 +110,7 @@ __inb (unsigned long port)
 	return ret;
 }
 
-extern inline unsigned int
+static inline unsigned int
 __inw (unsigned long port)
 {
 	volatile unsigned short *addr = __ia64_mk_io_addr(port);
@@ -122,7 +121,7 @@ __inw (unsigned long port)
 	return ret;
 }
 
-extern inline unsigned int
+static inline unsigned int
 __inl (unsigned long port)
 {
 	volatile unsigned int *addr = __ia64_mk_io_addr(port);
@@ -133,7 +132,7 @@ __inl (unsigned long port)
 	return ret;
 }
 
-extern inline void
+static inline void
 __insb (unsigned long port, void *dst, unsigned long count)
 {
 	volatile unsigned char *addr = __ia64_mk_io_addr(port);
@@ -147,7 +146,7 @@ __insb (unsigned long port, void *dst, unsigned long count)
 	return;
 }
 
-extern inline void
+static inline void
 __insw (unsigned long port, void *dst, unsigned long count)
 {
 	volatile unsigned short *addr = __ia64_mk_io_addr(port);
@@ -161,7 +160,7 @@ __insw (unsigned long port, void *dst, unsigned long count)
 	return;
 }
 
-extern inline void
+static inline void
 __insl (unsigned long port, void *dst, unsigned long count)
 {
 	volatile unsigned int *addr = __ia64_mk_io_addr(port);
@@ -175,7 +174,7 @@ __insl (unsigned long port, void *dst, unsigned long count)
 	return;
 }
 
-extern inline void
+static inline void
 __outb (unsigned char val, unsigned long port)
 {
 	volatile unsigned char *addr = __ia64_mk_io_addr(port);
@@ -184,7 +183,7 @@ __outb (unsigned char val, unsigned long port)
 	__ia64_mf_a();
 }
 
-extern inline void
+static inline void
 __outw (unsigned short val, unsigned long port)
 {
 	volatile unsigned short *addr = __ia64_mk_io_addr(port);
@@ -193,7 +192,7 @@ __outw (unsigned short val, unsigned long port)
 	__ia64_mf_a();
 }
 
-extern inline void
+static inline void
 __outl (unsigned int val, unsigned long port)
 {
 	volatile unsigned int *addr = __ia64_mk_io_addr(port);
@@ -202,7 +201,7 @@ __outl (unsigned int val, unsigned long port)
 	__ia64_mf_a();
 }
 
-extern inline void
+static inline void
 __outsb (unsigned long port, const void *src, unsigned long count)
 {
 	volatile unsigned char *addr = __ia64_mk_io_addr(port);
@@ -215,7 +214,7 @@ __outsb (unsigned long port, const void *src, unsigned long count)
 	return;
 }
 
-extern inline void
+static inline void
 __outsw (unsigned long port, const void *src, unsigned long count)
 {
 	volatile unsigned short *addr = __ia64_mk_io_addr(port);
@@ -228,7 +227,7 @@ __outsw (unsigned long port, const void *src, unsigned long count)
 	return;
 }
 
-extern inline void
+static inline void
 __outsl (unsigned long port, void *src, unsigned long count)
 {
 	volatile unsigned int *addr = __ia64_mk_io_addr(port);
@@ -257,49 +256,49 @@ __outsl (unsigned long port, void *src, unsigned long count)
 /*
  * The address passed to these functions are ioremap()ped already.
  */
-extern inline unsigned char
+static inline unsigned char
 __readb (void *addr)
 {
 	return *(volatile unsigned char *)addr;
 }
 
-extern inline unsigned short
+static inline unsigned short
 __readw (void *addr)
 {
 	return *(volatile unsigned short *)addr;
 }
 
-extern inline unsigned int
+static inline unsigned int
 __readl (void *addr)
 {
 	return *(volatile unsigned int *) addr;
 }
 
-extern inline unsigned long
+static inline unsigned long
 __readq (void *addr)
 {
 	return *(volatile unsigned long *) addr;
 }
 
-extern inline void
+static inline void
 __writeb (unsigned char val, void *addr)
 {
 	*(volatile unsigned char *) addr = val;
 }
 
-extern inline void
+static inline void
 __writew (unsigned short val, void *addr)
 {
 	*(volatile unsigned short *) addr = val;
 }
 
-extern inline void
+static inline void
 __writel (unsigned int val, void *addr)
 {
 	*(volatile unsigned int *) addr = val;
 }
 
-extern inline void
+static inline void
 __writeq (unsigned long val, void *addr)
 {
 	*(volatile unsigned long *) addr = val;
diff --git a/include/asm-ia64/mmu_context.h b/include/asm-ia64/mmu_context.h
index c50eacaf0..f385b15cb 100644
--- a/include/asm-ia64/mmu_context.h
+++ b/include/asm-ia64/mmu_context.h
@@ -57,7 +57,7 @@ enter_lazy_tlb (struct mm_struct *mm, struct task_struct *tsk, unsigned cpu)
 {
 }
 
-extern inline unsigned long
+static inline unsigned long
 ia64_rid (unsigned long context, unsigned long region_addr)
 {
 # ifdef CONFIG_IA64_TLB_CHECKS_REGION_NUMBER
@@ -67,7 +67,7 @@ ia64_rid (unsigned long context, unsigned long region_addr)
 # endif
 }
 
-extern inline void
+static inline void
 get_new_mmu_context (struct mm_struct *mm)
 {
 	spin_lock(&ia64_ctx.lock);
@@ -80,7 +80,7 @@ get_new_mmu_context (struct mm_struct *mm)
 
 }
 
-extern inline void
+static inline void
 get_mmu_context (struct mm_struct *mm)
 {
 	/* check if our ASN is of an older generation and thus invalid: */
@@ -88,20 +88,20 @@ get_mmu_context (struct mm_struct *mm)
 		get_new_mmu_context(mm);
 }
 
-extern inline int
+static inline int
 init_new_context (struct task_struct *p, struct mm_struct *mm)
 {
 	mm->context = 0;
 	return 0;
 }
 
-extern inline void
+static inline void
 destroy_context (struct mm_struct *mm)
 {
 	/* Nothing to do.  */
 }
 
-extern inline void
+static inline void
 reload_context (struct mm_struct *mm)
 {
 	unsigned long rid;
diff --git a/include/asm-ia64/module.h b/include/asm-ia64/module.h
new file mode 100644
index 000000000..d8d19cb2f
--- /dev/null
+++ b/include/asm-ia64/module.h
@@ -0,0 +1,108 @@
+#ifndef _ASM_IA64_MODULE_H
+#define _ASM_IA64_MODULE_H
+/*
+ * This file contains the ia64 architecture specific module code.
+ *
+ * Copyright (C) 2000 Intel Corporation.
+ * Copyright (C) 2000 Mike Stephens <mike.stephens@intel.com>
+ */
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+#include <asm/unwind.h>
+
+#define module_map(x)		vmalloc(x)
+#define module_unmap(x)		ia64_module_unmap(x)
+#define module_arch_init(x)	ia64_module_init(x)
+
+/*
+ * This must match in size and layout the data created by
+ * modutils/obj/obj-ia64.c
+ */
+struct archdata {
+	const char *unw_table;
+	const char *segment_base;
+	const char *unw_start;
+	const char *unw_end;
+	const char *gp;
+};
+
+/*
+ * functions to add/remove a modules unwind info when
+ * it is loaded or unloaded.
+ */
+static inline int
+ia64_module_init(struct module *mod)
+{
+#ifdef CONFIG_IA64_NEW_UNWIND
+	struct archdata *archdata;
+
+	if (!mod_member_present(mod, archdata_start) || !mod->archdata_start)
+		return 0;
+	archdata = (struct archdata *)(mod->archdata_start);
+
+	/*
+	 * Make sure the unwind pointers are sane.
+	 */
+
+	if (archdata->unw_table)
+	{
+		printk(KERN_ERR "arch_init_module: archdata->unw_table must be zero.\n");
+		return 1;
+	}
+	if (!mod_bound(archdata->gp, 0, mod))
+	{
+		printk(KERN_ERR "arch_init_module: archdata->gp out of bounds.\n");
+		return 1;
+	}
+	if (!mod_bound(archdata->unw_start, 0, mod))
+	{
+		printk(KERN_ERR "arch_init_module: archdata->unw_start out of bounds.\n");
+		return 1;
+	}
+	if (!mod_bound(archdata->unw_end, 0, mod))
+	{
+		printk(KERN_ERR "arch_init_module: archdata->unw_end out of bounds.\n");
+		return 1;
+	}
+	if (!mod_bound(archdata->segment_base, 0, mod))
+	{
+		printk(KERN_ERR "arch_init_module: archdata->unw_table out of bounds.\n");
+		return 1;
+	}
+
+	/*
+	 * Pointers are reasonable, add the module unwind table
+	 */
+	archdata->unw_table = unw_add_unwind_table(mod->name, archdata->segment_base,
+						   (unsigned long) archdata->gp,
+						   (unsigned long) archdata->unw_start,
+						   (unsigned long) archdata->unw_end);
+#endif /* CONFIG_IA64_NEW_UNWIND */
+	return 0;
+}
+
+static inline void
+ia64_module_unmap(void * addr)
+{
+#ifdef CONFIG_IA64_NEW_UNWIND
+	struct module *mod = (struct module *) addr;
+	struct archdata *archdata;
+
+	/*
+	 * Before freeing the module memory remove the unwind table entry
+	 */
+	if (mod_member_present(mod, archdata_start) && mod->archdata_start)
+	{
+		archdata = (struct archdata *)(mod->archdata_start);
+
+		if (archdata->unw_table != NULL)
+			unw_remove_unwind_table(archdata->unw_table);
+	}
+#endif /* CONFIG_IA64_NEW_UNWIND */
+
+	vfree(addr);
+}
+
+#endif /* _ASM_IA64_MODULE_H */
diff --git a/include/asm-ia64/offsets.h b/include/asm-ia64/offsets.h
index 88cad88d5..64e9f2fef 100644
--- a/include/asm-ia64/offsets.h
+++ b/include/asm-ia64/offsets.h
@@ -11,7 +11,7 @@
 #define PT_PTRACED_BIT			0
 #define PT_TRACESYS_BIT			1
 
-#define IA64_TASK_SIZE			2864	/* 0xb30 */
+#define IA64_TASK_SIZE			3328	/* 0xd00 */
 #define IA64_PT_REGS_SIZE		400	/* 0x190 */
 #define IA64_SWITCH_STACK_SIZE		560	/* 0x230 */
 #define IA64_SIGINFO_SIZE		128	/* 0x80 */
@@ -21,9 +21,9 @@
 #define IA64_TASK_SIGPENDING_OFFSET	16	/* 0x10 */
 #define IA64_TASK_NEED_RESCHED_OFFSET	40	/* 0x28 */
 #define IA64_TASK_PROCESSOR_OFFSET	100	/* 0x64 */
-#define IA64_TASK_THREAD_OFFSET		896	/* 0x380 */
-#define IA64_TASK_THREAD_KSP_OFFSET	896	/* 0x380 */
-#define IA64_TASK_THREAD_SIGMASK_OFFSET	2744	/* 0xab8 */
+#define IA64_TASK_THREAD_OFFSET		1424	/* 0x590 */
+#define IA64_TASK_THREAD_KSP_OFFSET	1424	/* 0x590 */
+#define IA64_TASK_THREAD_SIGMASK_OFFSET	3184	/* 0xc70 */
 #define IA64_TASK_PID_OFFSET		188	/* 0xbc */
 #define IA64_TASK_MM_OFFSET		88	/* 0x58 */
 #define IA64_PT_REGS_CR_IPSR_OFFSET	0	/* 0x0 */
diff --git a/include/asm-ia64/page.h b/include/asm-ia64/page.h
index 62881b538..c81337e07 100644
--- a/include/asm-ia64/page.h
+++ b/include/asm-ia64/page.h
@@ -102,15 +102,13 @@ typedef unsigned long pgprot_t;
 #ifdef CONFIG_IA64_GENERIC
 # include <asm/machvec.h>
 # define virt_to_page(kaddr)   (mem_map + platform_map_nr(kaddr))
-#elif defined (CONFIG_IA64_SN_SN1_SIM)
+#elif defined (CONFIG_IA64_SN_SN1)
 # define virt_to_page(kaddr)   (mem_map + MAP_NR_SN1(kaddr))
 #else
 # define virt_to_page(kaddr)   (mem_map + MAP_NR_DENSE(kaddr))
 #endif
 #define VALID_PAGE(page)       ((page - mem_map) < max_mapnr)
 
-# endif /* __KERNEL__ */
-
 typedef union ia64_va {
 	struct {
 		unsigned long off : 61;		/* intra-region offset */
@@ -138,7 +136,7 @@ typedef union ia64_va {
 #define BUG() do { printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); *(int *)0=0; } while (0)
 #define PAGE_BUG(page) do { BUG(); } while (0)
 
-extern __inline__ int
+static __inline__ int
 get_order (unsigned long size)
 {
 	double d = size - 1;
@@ -151,6 +149,7 @@ get_order (unsigned long size)
 	return order;
 }
 
+# endif /* __KERNEL__ */
 #endif /* !ASSEMBLY */
 
 #define PAGE_OFFSET		0xe000000000000000
diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h
index d55b16253..ad3efe1ec 100644
--- a/include/asm-ia64/pal.h
+++ b/include/asm-ia64/pal.h
@@ -66,6 +66,7 @@
 #define PAL_CACHE_PROT_INFO	38	/* get i/d cache protection info */
 #define PAL_REGISTER_INFO	39	/* return AR and CR register information*/
 #define PAL_SHUTDOWN		40	/* enter processor shutdown state */
+#define PAL_PREFETCH_VISIBILITY	41
 
 #define PAL_COPY_PAL		256	/* relocate PAL procedures and PAL PMI */
 #define PAL_HALT_INFO		257	/* return the low power capabilities of processor */
@@ -644,15 +645,16 @@ struct ia64_pal_retval {
  * (generally 0) MUST be passed.  Reserved parameters are not optional
  * parameters.
  */
-extern struct ia64_pal_retval ia64_pal_call_static (u64, u64, u64, u64); 
-extern struct ia64_pal_retval ia64_pal_call_stacked (u64, u64, u64, u64); 
-extern struct ia64_pal_retval ia64_pal_call_phys_static (u64, u64, u64, u64); 
-extern struct ia64_pal_retval ia64_pal_call_phys_stacked (u64, u64, u64, u64); 
+extern struct ia64_pal_retval ia64_pal_call_static (u64, u64, u64, u64, u64);
+extern struct ia64_pal_retval ia64_pal_call_stacked (u64, u64, u64, u64);
+extern struct ia64_pal_retval ia64_pal_call_phys_static (u64, u64, u64, u64);
+extern struct ia64_pal_retval ia64_pal_call_phys_stacked (u64, u64, u64, u64);
 
-#define PAL_CALL(iprv,a0,a1,a2,a3)	iprv = ia64_pal_call_static(a0, a1, a2, a3)
-#define PAL_CALL_STK(iprv,a0,a1,a2,a3)	iprv = ia64_pal_call_stacked(a0, a1, a2, a3)
-#define PAL_CALL_PHYS(iprv,a0,a1,a2,a3) iprv = ia64_pal_call_phys_static(a0, a1, a2, a3)
-#define PAL_CALL_PHYS_STK(iprv,a0,a1,a2,a3) iprv = ia64_pal_call_phys_stacked(a0, a1, a2, a3)
+#define PAL_CALL(iprv,a0,a1,a2,a3)		iprv = ia64_pal_call_static(a0, a1, a2, a3, 0)
+#define PAL_CALL_IC_OFF(iprv,a0,a1,a2,a3)	iprv = ia64_pal_call_static(a0, a1, a2, a3, 1)
+#define PAL_CALL_STK(iprv,a0,a1,a2,a3)		iprv = ia64_pal_call_stacked(a0, a1, a2, a3)
+#define PAL_CALL_PHYS(iprv,a0,a1,a2,a3)		iprv = ia64_pal_call_phys_static(a0, a1, a2, a3)
+#define PAL_CALL_PHYS_STK(iprv,a0,a1,a2,a3)	iprv = ia64_pal_call_phys_stacked(a0, a1, a2, a3)
 
 typedef int (*ia64_pal_handler) (u64, ...);
 extern ia64_pal_handler ia64_pal;
@@ -706,7 +708,7 @@ typedef union pal_bus_features_u {
 extern void pal_bus_features_print (u64);
 
 /* Provide information about configurable processor bus features */
-extern inline s64 
+static inline s64 
 ia64_pal_bus_get_features (pal_bus_features_u_t *features_avail,
 			   pal_bus_features_u_t *features_status,
 			   pal_bus_features_u_t *features_control)
@@ -723,7 +725,7 @@ ia64_pal_bus_get_features (pal_bus_features_u_t *features_avail,
 }
 
 /* Enables/disables specific processor bus features */
-extern inline s64 
+static inline s64 
 ia64_pal_bus_set_features (pal_bus_features_u_t feature_select) 
 {	
 	struct ia64_pal_retval iprv;
@@ -732,7 +734,7 @@ ia64_pal_bus_set_features (pal_bus_features_u_t feature_select)
 }
 
 /* Get detailed cache information */
-extern inline s64
+static inline s64
 ia64_pal_cache_config_info (u64 cache_level, u64 cache_type, pal_cache_config_info_t *conf)
 {
 	struct ia64_pal_retval iprv;
@@ -750,7 +752,7 @@ ia64_pal_cache_config_info (u64 cache_level, u64 cache_type, pal_cache_config_in
 }
 
 /* Get detailed cche protection information */
-extern inline s64
+static inline s64
 ia64_pal_cache_prot_info (u64 cache_level, u64 cache_type, pal_cache_protection_info_t *prot)
 {
 	struct ia64_pal_retval iprv;
@@ -773,18 +775,18 @@ ia64_pal_cache_prot_info (u64 cache_level, u64 cache_type, pal_cache_protection_
  * Flush the processor instruction or data caches.  *PROGRESS must be
  * initialized to zero before calling this for the first time..
  */
-extern inline s64 
+static inline s64 
 ia64_pal_cache_flush (u64 cache_type, u64 invalidate, u64 *progress) 
 {	
 	struct ia64_pal_retval iprv;
-	PAL_CALL(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress); 
+	PAL_CALL_IC_OFF(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress); 
 	*progress = iprv.v1;
 	return iprv.status; 
 }
 
 
 /* Initialize the processor controlled caches */
-extern inline s64 
+static inline s64 
 ia64_pal_cache_init (u64 level, u64 cache_type, u64 restrict) 
 {	
 	struct ia64_pal_retval iprv;
@@ -796,7 +798,7 @@ ia64_pal_cache_init (u64 level, u64 cache_type, u64 restrict)
  * processor controlled cache to known values without the availability 
  * of backing memory.
  */
-extern inline s64 
+static inline s64 
 ia64_pal_cache_line_init (u64 physical_addr, u64 data_value) 
 {	
 	struct ia64_pal_retval iprv;
@@ -806,7 +808,7 @@ ia64_pal_cache_line_init (u64 physical_addr, u64 data_value)
 
 
 /* Read the data and tag of a processor controlled cache line for diags */
-extern inline s64 
+static inline s64 
 ia64_pal_cache_read (pal_cache_line_id_u_t line_id, u64 physical_addr) 
 {	
 	struct ia64_pal_retval iprv;
@@ -815,7 +817,7 @@ ia64_pal_cache_read (pal_cache_line_id_u_t line_id, u64 physical_addr)
 }
 
 /* Return summary information about the heirarchy of caches controlled by the processor */
-extern inline s64 
+static inline s64 
 ia64_pal_cache_summary (u64 *cache_levels, u64 *unique_caches) 
 {	
 	struct ia64_pal_retval iprv;
@@ -828,7 +830,7 @@ ia64_pal_cache_summary (u64 *cache_levels, u64 *unique_caches)
 }
 
 /* Write the data and tag of a processor-controlled cache line for diags */
-extern inline s64 
+static inline s64 
 ia64_pal_cache_write (pal_cache_line_id_u_t line_id, u64 physical_addr, u64 data) 
 {	
 	struct ia64_pal_retval iprv;	
@@ -838,7 +840,7 @@ ia64_pal_cache_write (pal_cache_line_id_u_t line_id, u64 physical_addr, u64 data
 
 
 /* Return the parameters needed to copy relocatable PAL procedures from ROM to memory */
-extern inline s64 
+static inline s64 
 ia64_pal_copy_info (u64 copy_type, u64 num_procs, u64 num_iopics,
 		    u64 *buffer_size, u64 *buffer_align) 
 {	
@@ -852,7 +854,7 @@ ia64_pal_copy_info (u64 copy_type, u64 num_procs, u64 num_iopics,
 }
 
 /* Copy relocatable PAL procedures from ROM to memory */
-extern inline s64 
+static inline s64 
 ia64_pal_copy_pal (u64 target_addr, u64 alloc_size, u64 processor, u64 *pal_proc_offset) 
 {	
 	struct ia64_pal_retval iprv;
@@ -863,7 +865,7 @@ ia64_pal_copy_pal (u64 target_addr, u64 alloc_size, u64 processor, u64 *pal_proc
 }
 
 /* Return the number of instruction and data debug register pairs */
-extern inline s64 
+static inline s64 
 ia64_pal_debug_info (u64 *inst_regs,  u64 *data_regs) 
 {	
 	struct ia64_pal_retval iprv;
@@ -878,7 +880,7 @@ ia64_pal_debug_info (u64 *inst_regs,  u64 *data_regs)
 
 #ifdef TBD
 /* Switch from IA64-system environment to IA-32 system environment */
-extern inline s64 
+static inline s64 
 ia64_pal_enter_ia32_env (ia32_env1, ia32_env2, ia32_env3) 
 {	
 	struct ia64_pal_retval iprv;
@@ -888,7 +890,7 @@ ia64_pal_enter_ia32_env (ia32_env1, ia32_env2, ia32_env3)
 #endif
 
 /* Get unique geographical address of this processor on its bus */
-extern inline s64 
+static inline s64 
 ia64_pal_fixed_addr (u64 *global_unique_addr) 
 {	
 	struct ia64_pal_retval iprv;
@@ -899,7 +901,7 @@ ia64_pal_fixed_addr (u64 *global_unique_addr)
 }
 
 /* Get base frequency of the platform if generated by the processor */
-extern inline s64 
+static inline s64 
 ia64_pal_freq_base (u64 *platform_base_freq) 
 {	
 	struct ia64_pal_retval iprv;
@@ -913,7 +915,7 @@ ia64_pal_freq_base (u64 *platform_base_freq)
  * Get the ratios for processor frequency, bus frequency and interval timer to
  * to base frequency of the platform 
  */
-extern inline s64 
+static inline s64 
 ia64_pal_freq_ratios (struct pal_freq_ratio *proc_ratio, struct pal_freq_ratio *bus_ratio,
 		      struct pal_freq_ratio *itc_ratio) 
 {	
@@ -932,7 +934,7 @@ ia64_pal_freq_ratios (struct pal_freq_ratio *proc_ratio, struct pal_freq_ratio *
  * power states where prefetching and execution are suspended and cache and
  * TLB coherency is not maintained.
  */
-extern inline s64 
+static inline s64 
 ia64_pal_halt (u64 halt_state) 
 {	
 	struct ia64_pal_retval iprv;
@@ -952,7 +954,7 @@ typedef union pal_power_mgmt_info_u {
 } pal_power_mgmt_info_u_t;
 
 /* Return information about processor's optional power management capabilities. */
-extern inline s64 
+static inline s64 
 ia64_pal_halt_info (pal_power_mgmt_info_u_t *power_buf) 
 {	
 	struct ia64_pal_retval iprv;
@@ -963,7 +965,7 @@ ia64_pal_halt_info (pal_power_mgmt_info_u_t *power_buf)
 /* Cause the processor to enter LIGHT HALT state, where prefetching and execution are
  * suspended, but cache and TLB coherency is maintained.
  */
-extern inline s64 
+static inline s64 
 ia64_pal_halt_light (void) 
 {	
 	struct ia64_pal_retval iprv;
@@ -975,7 +977,7 @@ ia64_pal_halt_light (void)
  * the error logging registers to be written. This procedure also checks the pending
  * machine check bit and pending INIT bit and reports their states.
  */
-extern inline s64 
+static inline s64 
 ia64_pal_mc_clear_log (u64 *pending_vector) 
 {	
 	struct ia64_pal_retval iprv;
@@ -988,7 +990,7 @@ ia64_pal_mc_clear_log (u64 *pending_vector)
 /* Ensure that all outstanding transactions in a processor are completed or that any 
  * MCA due to thes outstanding transaction is taken.
  */
-extern inline s64 
+static inline s64 
 ia64_pal_mc_drain (void) 
 {	
 	struct ia64_pal_retval iprv;
@@ -997,7 +999,7 @@ ia64_pal_mc_drain (void)
 }
 
 /* Return the machine check dynamic processor state */
-extern inline s64 
+static inline s64 
 ia64_pal_mc_dynamic_state (u64 offset, u64 *size, u64 *pds) 
 {	
 	struct ia64_pal_retval iprv;
@@ -1010,7 +1012,7 @@ ia64_pal_mc_dynamic_state (u64 offset, u64 *size, u64 *pds)
 }
 
 /* Return processor machine check information */
-extern inline s64 
+static inline s64 
 ia64_pal_mc_error_info (u64 info_index, u64 type_index, u64 *size, u64 *error_info) 
 {	
 	struct ia64_pal_retval iprv;
@@ -1025,7 +1027,7 @@ ia64_pal_mc_error_info (u64 info_index, u64 type_index, u64 *size, u64 *error_in
 /* Inform PALE_CHECK whether a machine check is expected so that PALE_CHECK willnot
  * attempt to correct any expected machine checks.
  */
-extern inline s64 
+static inline s64 
 ia64_pal_mc_expected (u64 expected, u64 *previous) 
 {	
 	struct ia64_pal_retval iprv;
@@ -1039,7 +1041,7 @@ ia64_pal_mc_expected (u64 expected, u64 *previous)
  * minimal processor state in the event of a machine check or initialization
  * event.
  */
-extern inline s64
+static inline s64
 ia64_pal_mc_register_mem (u64 physical_addr) 
 {	
 	struct ia64_pal_retval iprv;
@@ -1050,7 +1052,7 @@ ia64_pal_mc_register_mem (u64 physical_addr)
 /* Restore minimal architectural processor state, set CMC interrupt if necessary
  * and resume execution
  */
-extern inline s64 
+static inline s64 
 ia64_pal_mc_resume (u64 set_cmci, u64 save_ptr) 
 {	
 	struct ia64_pal_retval iprv;
@@ -1059,7 +1061,7 @@ ia64_pal_mc_resume (u64 set_cmci, u64 save_ptr)
 }
 
 /* Return the memory attributes implemented by the processor */
-extern inline s64 
+static inline s64 
 ia64_pal_mem_attrib (u64 *mem_attrib) 
 {	
 	struct ia64_pal_retval iprv;
@@ -1072,7 +1074,7 @@ ia64_pal_mem_attrib (u64 *mem_attrib)
 /* Return the amount of memory needed for second phase of processor
  * self-test and the required alignment of memory.
  */
-extern inline s64 
+static inline s64 
 ia64_pal_mem_for_test (u64 *bytes_needed, u64 *alignment)
 {
 	struct ia64_pal_retval iprv;
@@ -1098,7 +1100,7 @@ typedef union pal_perf_mon_info_u {
 /* Return the performance monitor information about what can be counted
  * and how to configure the monitors to count the desired events.
  */
-extern inline s64 
+static inline s64 
 ia64_pal_perf_mon_info (u64 *pm_buffer, pal_perf_mon_info_u_t *pm_info) 
 {	
 	struct ia64_pal_retval iprv;
@@ -1111,7 +1113,7 @@ ia64_pal_perf_mon_info (u64 *pm_buffer, pal_perf_mon_info_u_t *pm_info)
 /* Specifies the physical address of the processor interrupt block
  * and I/O port space.
  */
-extern inline s64 
+static inline s64 
 ia64_pal_platform_addr (u64 type, u64 physical_addr) 
 {	
 	struct ia64_pal_retval iprv;
@@ -1120,7 +1122,7 @@ ia64_pal_platform_addr (u64 type, u64 physical_addr)
 }
 
 /* Set the SAL PMI entrypoint in memory */
-extern inline s64 
+static inline s64 
 ia64_pal_pmi_entrypoint (u64 sal_pmi_entry_addr) 
 {	
 	struct ia64_pal_retval iprv;
@@ -1130,7 +1132,7 @@ ia64_pal_pmi_entrypoint (u64 sal_pmi_entry_addr)
 
 struct pal_features_s;
 /* Provide information about configurable processor features */
-extern inline s64 
+static inline s64 
 ia64_pal_proc_get_features (u64 *features_avail, 
 			    u64 *features_status, 
 			    u64 *features_control)
@@ -1146,7 +1148,7 @@ ia64_pal_proc_get_features (u64 *features_avail,
 }
 
 /* Enable/disable processor dependent features */
-extern inline s64 
+static inline s64 
 ia64_pal_proc_set_features (u64 feature_select) 
 {	
 	struct ia64_pal_retval iprv;
@@ -1167,7 +1169,7 @@ typedef struct ia64_ptce_info_s {
 /* Return the information required for the architected loop used to purge
  * (initialize) the entire TC
  */
-extern inline s64
+static inline s64
 ia64_get_ptce (ia64_ptce_info_t *ptce)
 {
 	struct ia64_pal_retval iprv;
@@ -1187,7 +1189,7 @@ ia64_get_ptce (ia64_ptce_info_t *ptce)
 }
 
 /* Return info about implemented application and control registers. */
-extern inline s64 
+static inline s64 
 ia64_pal_register_info (u64 info_request, u64 *reg_info_1, u64 *reg_info_2) 
 {	
 	struct ia64_pal_retval iprv;
@@ -1211,7 +1213,7 @@ typedef union pal_hints_u {
 /* Return information about the register stack and RSE for this processor 
  * implementation.
  */
-extern inline s64 
+static inline s64 
 ia64_pal_rse_info (u64 *num_phys_stacked, pal_hints_u_t *hints)
 {	
 	struct ia64_pal_retval iprv;
@@ -1227,7 +1229,7 @@ ia64_pal_rse_info (u64 *num_phys_stacked, pal_hints_u_t *hints)
  * suspended, but cause cache and TLB coherency to be maintained.
  * This is usually called in IA-32 mode.
  */
-extern inline s64 
+static inline s64 
 ia64_pal_shutdown (void) 
 {	
 	struct ia64_pal_retval iprv;
@@ -1236,7 +1238,7 @@ ia64_pal_shutdown (void)
 }
 
 /* Perform the second phase of processor self-test. */
-extern inline s64 
+static inline s64 
 ia64_pal_test_proc (u64 test_addr, u64 test_size, u64 attributes, u64 *self_test_state)
 {
 	struct ia64_pal_retval iprv;
@@ -1261,7 +1263,7 @@ typedef union  pal_version_u {
 
 
 /* Return PAL version information */
-extern inline s64 
+static inline s64 
 ia64_pal_version (pal_version_u_t *pal_min_version, pal_version_u_t *pal_cur_version) 
 {	
 	struct ia64_pal_retval iprv;
@@ -1299,7 +1301,7 @@ typedef union pal_tc_info_u {
 /* Return information about the virtual memory characteristics of the processor 
  * implementation.
  */
-extern inline s64 
+static inline s64 
 ia64_pal_vm_info (u64 tc_level, u64 tc_type,  pal_tc_info_u_t *tc_info, u64 *tc_pages)
 {
 	struct ia64_pal_retval iprv;
@@ -1314,7 +1316,7 @@ ia64_pal_vm_info (u64 tc_level, u64 tc_type,  pal_tc_info_u_t *tc_info, u64 *tc_
 /* Get page size information about the virtual memory characteristics of the processor 
  * implementation.
  */
-extern inline s64 
+static inline s64 
 ia64_pal_vm_page_size (u64 *tr_pages, u64 *vw_pages)
 {
 	struct ia64_pal_retval iprv;
@@ -1353,7 +1355,7 @@ typedef union pal_vm_info_2_u {
 /* Get summary information about the virtual memory characteristics of the processor 
  * implementation.
  */
-extern inline s64 
+static inline s64 
 ia64_pal_vm_summary (pal_vm_info_1_u_t *vm_info_1, pal_vm_info_2_u_t *vm_info_2) 
 {	
 	struct ia64_pal_retval iprv;
@@ -1377,7 +1379,7 @@ typedef union pal_itr_valid_u {
 } pal_tr_valid_u_t;
 
 /* Read a translation register */
-extern inline s64 
+static inline s64 
 ia64_pal_tr_read (u64 reg_num, u64 tr_type, u64 *tr_buffer, pal_tr_valid_u_t *tr_valid)
 {
 	struct ia64_pal_retval iprv;
@@ -1387,6 +1389,14 @@ ia64_pal_tr_read (u64 reg_num, u64 tr_type, u64 *tr_buffer, pal_tr_valid_u_t *tr
 	return iprv.status; 
 }
 
+static inline s64
+ia64_pal_prefetch_visibility (void)
+{
+	struct ia64_pal_retval iprv;
+	PAL_CALL(iprv, PAL_PREFETCH_VISIBILITY, 0, 0, 0);
+	return iprv.status;
+}
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* _ASM_IA64_PAL_H */
diff --git a/include/asm-ia64/param.h b/include/asm-ia64/param.h
index a410b8892..e8920ea76 100644
--- a/include/asm-ia64/param.h
+++ b/include/asm-ia64/param.h
@@ -15,7 +15,7 @@
  * Yeah, simulating stuff is slow, so let us catch some breath between
  * timer interrupts...
  */
-# define HZ 20
+# define HZ	  32
 #else
 # define HZ	1024
 #endif
@@ -36,4 +36,8 @@
 
 #define MAXHOSTNAMELEN	64	/* max length of hostname */
 
+#ifdef __KERNEL__
+# define CLOCKS_PER_SEC	HZ	/* frequency at which times() counts */
+#endif
+
 #endif /* _ASM_IA64_PARAM_H */
diff --git a/include/asm-ia64/parport.h b/include/asm-ia64/parport.h
new file mode 100644
index 000000000..67e16adfc
--- /dev/null
+++ b/include/asm-ia64/parport.h
@@ -0,0 +1,20 @@
+/*
+ * parport.h: platform-specific PC-style parport initialisation
+ *
+ * Copyright (C) 1999, 2000  Tim Waugh <tim@cyberelk.demon.co.uk>
+ *
+ * This file should only be included by drivers/parport/parport_pc.c.
+ */
+
+#ifndef _ASM_IA64_PARPORT_H
+#define _ASM_IA64_PARPORT_H 1
+
+static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma);
+
+static int __devinit
+parport_pc_find_nonpci_ports (int autoirq, int autodma)
+{
+	return parport_pc_find_isa_ports(autoirq, autodma);
+}
+
+#endif /* _ASM_IA64_PARPORT_H */
diff --git a/include/asm-ia64/pci.h b/include/asm-ia64/pci.h
index 01c038774..652aaffca 100644
--- a/include/asm-ia64/pci.h
+++ b/include/asm-ia64/pci.h
@@ -21,12 +21,12 @@
 
 struct pci_dev;
 
-extern inline void pcibios_set_master(struct pci_dev *dev)
+static inline void pcibios_set_master(struct pci_dev *dev)
 {
 	/* No special bus mastering setup handling */
 }
 
-extern inline void pcibios_penalize_isa_irq(int irq)
+static inline void pcibios_penalize_isa_irq(int irq)
 {
 	/* We don't do dynamic PCI IRQ allocation */
 }
@@ -127,7 +127,7 @@ extern void pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg, int n
  * only drive the low 24-bits during PCI bus mastering, then
  * you would pass 0x00ffffff as the mask to this function.
  */
-extern inline int
+static inline int
 pci_dma_supported(struct pci_dev *hwdev, dma_addr_t mask)
 {
 	return 1;
diff --git a/include/asm-ia64/pgalloc.h b/include/asm-ia64/pgalloc.h
index 7c35de4bc..5256a4fff 100644
--- a/include/asm-ia64/pgalloc.h
+++ b/include/asm-ia64/pgalloc.h
@@ -32,7 +32,7 @@
 #define pte_quicklist		(my_cpu_data.pte_quick)
 #define pgtable_cache_size	(my_cpu_data.pgtable_cache_sz)
 
-extern __inline__ pgd_t*
+static __inline__ pgd_t*
 get_pgd_slow (void)
 {
 	pgd_t *ret = (pgd_t *)__get_free_page(GFP_KERNEL);
@@ -41,7 +41,7 @@ get_pgd_slow (void)
 	return ret;
 }
 
-extern __inline__ pgd_t*
+static __inline__ pgd_t*
 get_pgd_fast (void)
 {
 	unsigned long *ret = pgd_quicklist;
@@ -54,7 +54,7 @@ get_pgd_fast (void)
 	return (pgd_t *)ret;
 }
 
-extern __inline__ pgd_t*
+static __inline__ pgd_t*
 pgd_alloc (void)
 {
 	pgd_t *pgd;
@@ -65,7 +65,7 @@ pgd_alloc (void)
 	return pgd;
 }
 
-extern __inline__ void
+static __inline__ void
 free_pgd_fast (pgd_t *pgd)
 {
 	*(unsigned long *)pgd = (unsigned long) pgd_quicklist;
@@ -73,7 +73,7 @@ free_pgd_fast (pgd_t *pgd)
 	++pgtable_cache_size;
 }
 
-extern __inline__ pmd_t *
+static __inline__ pmd_t *
 get_pmd_slow (void)
 {
 	pmd_t *pmd = (pmd_t *) __get_free_page(GFP_KERNEL);
@@ -83,7 +83,7 @@ get_pmd_slow (void)
 	return pmd;
 }
 
-extern __inline__ pmd_t *
+static __inline__ pmd_t *
 get_pmd_fast (void)
 {
 	unsigned long *ret = (unsigned long *)pmd_quicklist;
@@ -96,7 +96,7 @@ get_pmd_fast (void)
 	return (pmd_t *)ret;
 }
 
-extern __inline__ void
+static __inline__ void
 free_pmd_fast (pmd_t *pmd)
 {
 	*(unsigned long *)pmd = (unsigned long) pmd_quicklist;
@@ -104,7 +104,7 @@ free_pmd_fast (pmd_t *pmd)
 	++pgtable_cache_size;
 }
 
-extern __inline__ void
+static __inline__ void
 free_pmd_slow (pmd_t *pmd)
 {
 	free_page((unsigned long)pmd);
@@ -112,7 +112,7 @@ free_pmd_slow (pmd_t *pmd)
 
 extern pte_t *get_pte_slow (pmd_t *pmd, unsigned long address_preadjusted);
 
-extern __inline__ pte_t *
+static __inline__ pte_t *
 get_pte_fast (void)
 {
 	unsigned long *ret = (unsigned long *)pte_quicklist;
@@ -125,7 +125,7 @@ get_pte_fast (void)
 	return (pte_t *)ret;
 }
 
-extern __inline__ void
+static __inline__ void
 free_pte_fast (pte_t *pte)
 {
 	*(unsigned long *)pte = (unsigned long) pte_quicklist;
@@ -142,7 +142,7 @@ free_pte_fast (pte_t *pte)
 extern void __handle_bad_pgd (pgd_t *pgd);
 extern void __handle_bad_pmd (pmd_t *pmd);
 
-extern __inline__ pte_t*
+static __inline__ pte_t*
 pte_alloc (pmd_t *pmd, unsigned long vmaddr)
 {
 	unsigned long offset;
@@ -163,7 +163,7 @@ pte_alloc (pmd_t *pmd, unsigned long vmaddr)
 	return (pte_t *) pmd_page(*pmd) + offset;
 }
 
-extern __inline__ pmd_t*
+static __inline__ pmd_t*
 pmd_alloc (pgd_t *pgd, unsigned long vmaddr)
 {
 	unsigned long offset;
@@ -228,7 +228,7 @@ extern spinlock_t ptcg_lock;
 /*
  * Flush a specified user mapping
  */
-extern __inline__ void
+static __inline__ void
 flush_tlb_mm (struct mm_struct *mm)
 {
 	if (mm) {
diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h
index fcf340ee0..6fbed9cc1 100644
--- a/include/asm-ia64/pgtable.h
+++ b/include/asm-ia64/pgtable.h
@@ -3,9 +3,9 @@
 
 /*
  * This file contains the functions and defines necessary to modify and use
- * the ia-64 page table tree.
+ * the IA-64 page table tree.
  *
- * This hopefully works with any (fixed) ia-64 page-size, as defined
+ * This hopefully works with any (fixed) IA-64 page-size, as defined
  * in <asm/page.h> (currently 8192).
  *
  * Copyright (C) 1998-2000 Hewlett-Packard Co
@@ -19,12 +19,6 @@
 
 #define IA64_MAX_PHYS_BITS	50	/* max. number of physical address bits (architected) */
 
-/* Is ADDR a valid kernel address? */
-#define kern_addr_valid(addr)	((addr) >= TASK_SIZE)
-
-/* Is ADDR a valid physical address? */
-#define phys_addr_valid(addr)	(((addr) & my_cpu_data.unimpl_pa_mask) == 0)
-
 /*
  * First, define the various bits in a PTE.  Note that the PTE format
  * matches the VHPT short format, the firt doubleword of the VHPD long
@@ -166,7 +160,7 @@
  * Given a pointer to an mem_map[] entry, return the kernel virtual
  * address corresponding to that page.
  */
-#define page_address(page)	((void *) (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT)))
+#define page_address(page)	((page)->virtual)
 
 /*
  * Now for some cache flushing routines.  This is the kind of stuff
@@ -190,6 +184,28 @@ do {								\
 		ia64_flush_icache_page((unsigned long) page_address(pg));	\
 } while (0)
 
+/* Quick test to see if ADDR is a (potentially) valid physical address. */
+static __inline__ long
+ia64_phys_addr_valid (unsigned long addr)
+{
+	return (addr & (my_cpu_data.unimpl_pa_mask)) == 0;
+}
+
+/*
+ * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
+ * memory.  For the return value to be meaningful, ADDR must be >=
+ * PAGE_OFFSET.  This operation can be relatively expensive (e.g.,
+ * require a hash-, or multi-level tree-lookup or something of that
+ * sort) but it guarantees to return TRUE only if accessing the page
+ * at that address does not cause an error.  Note that there may be
+ * addresses for which kern_addr_valid() returns FALSE even though an
+ * access would not cause an error (e.g., this is typically true for
+ * memory mapped I/O regions.
+ *
+ * XXX Need to implement this for IA-64.
+ */
+#define kern_addr_valid(addr)	(1)
+
 /*
  * Now come the defines and routines to manage and access the three-level
  * page table.
@@ -248,14 +264,14 @@ extern pmd_t *ia64_bad_pagetable (void);
 
 #define pmd_set(pmdp, ptep) 		(pmd_val(*(pmdp)) = __pa(ptep))
 #define pmd_none(pmd)			(!pmd_val(pmd))
-#define pmd_bad(pmd)			(!phys_addr_valid(pmd_val(pmd)))
+#define pmd_bad(pmd)			(!ia64_phys_addr_valid(pmd_val(pmd)))
 #define pmd_present(pmd)		(pmd_val(pmd) != 0UL)
 #define pmd_clear(pmdp)			(pmd_val(*(pmdp)) = 0UL)
 #define pmd_page(pmd)			((unsigned long) __va(pmd_val(pmd) & _PFN_MASK))
 
 #define pgd_set(pgdp, pmdp)		(pgd_val(*(pgdp)) = __pa(pmdp))
 #define pgd_none(pgd)			(!pgd_val(pgd))
-#define pgd_bad(pgd)			(!phys_addr_valid(pgd_val(pgd)))
+#define pgd_bad(pgd)			(!ia64_phys_addr_valid(pgd_val(pgd)))
 #define pgd_present(pgd)		(pgd_val(pgd) != 0UL)
 #define pgd_clear(pgdp)			(pgd_val(*(pgdp)) = 0UL)
 #define pgd_page(pgd)			((unsigned long) __va(pgd_val(pgd) & _PFN_MASK))
@@ -301,7 +317,7 @@ extern pmd_t *ia64_bad_pagetable (void);
 /*
  * Return the region index for virtual address ADDRESS.
  */
-extern __inline__ unsigned long
+static __inline__ unsigned long
 rgn_index (unsigned long address)
 {
 	ia64_va a;
@@ -313,7 +329,7 @@ rgn_index (unsigned long address)
 /*
  * Return the region offset for virtual address ADDRESS.
  */
-extern __inline__ unsigned long
+static __inline__ unsigned long
 rgn_offset (unsigned long address)
 {
 	ia64_va a;
@@ -325,7 +341,7 @@ rgn_offset (unsigned long address)
 #define RGN_SIZE	(1UL << 61)
 #define RGN_KERNEL	7
 
-extern __inline__ unsigned long
+static __inline__ unsigned long
 pgd_index (unsigned long address)
 {
 	unsigned long region = address >> 61;
@@ -336,7 +352,7 @@ pgd_index (unsigned long address)
 
 /* The offset in the 1-level directory is given by the 3 region bits
    (61..63) and the seven level-1 bits (33-39).  */
-extern __inline__ pgd_t*
+static __inline__ pgd_t*
 pgd_offset (struct mm_struct *mm, unsigned long address)
 {
 	return mm->pgd + pgd_index(address);
@@ -409,9 +425,6 @@ do {												\
 #define pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })
 #define swp_entry_to_pte(x)		((pte_t) { (x).val })
 
-#define module_map	vmalloc
-#define module_unmap	vfree
-
 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
 #define PageSkip(page)		(0)
 
@@ -421,9 +434,11 @@ do {												\
  * ZERO_PAGE is a global shared page that is always zero: used
  * for zero-mapped memory areas etc..
  */
-extern unsigned long empty_zero_page[1024];
+extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
 
+#include <asm-generic/pgtable.h>
+
 # endif /* !__ASSEMBLY__ */
 
 #endif /* _ASM_IA64_PGTABLE_H */
diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h
index c37fc76b1..37a8c2ba4 100644
--- a/include/asm-ia64/processor.h
+++ b/include/asm-ia64/processor.h
@@ -253,9 +253,9 @@ struct cpuinfo_ia64 {
 #define my_cpu_data		cpu_data[smp_processor_id()]
 
 #ifdef CONFIG_SMP
-# define loops_per_sec()	my_cpu_data.loops_per_sec
+# define ia64_loops_per_sec()	my_cpu_data.loops_per_sec
 #else
-# define loops_per_sec()	loops_per_sec
+# define ia64_loops_per_sec()	loops_per_sec
 #endif
 
 extern struct cpuinfo_ia64 cpu_data[NR_CPUS];
@@ -305,10 +305,11 @@ struct thread_struct {
 	__u64 csd;			/* IA32 code selector descriptor */
 	__u64 ssd;			/* IA32 stack selector descriptor */
 	__u64 tssd;			/* IA32 TSS descriptor */
+	__u64 old_iob;			/* old IOBase value */
 	union {
 		__u64 sigmask;		/* aligned mask for sigsuspend scall */
 	} un;
-# define INIT_THREAD_IA32	, 0, 0, 0x17800000037fULL, 0, 0, 0, 0, 0, {0}
+# define INIT_THREAD_IA32	, 0, 0, 0x17800000037fULL, 0, 0, 0, 0, 0, 0, {0}
 #else
 # define INIT_THREAD_IA32
 #endif /* CONFIG_IA32_SUPPORT */
@@ -334,6 +335,8 @@ struct thread_struct {
 
 #define start_thread(regs,new_ip,new_sp) do {					\
 	set_fs(USER_DS);							\
+	ia64_psr(regs)->dfh = 1;	/* disable fph */			\
+	ia64_psr(regs)->mfh = 0;	/* clear mfh */				\
 	ia64_psr(regs)->cpl = 3;	/* set user mode */			\
 	ia64_psr(regs)->ri = 0;		/* clear return slot number */		\
 	ia64_psr(regs)->is = 0;		/* IA-64 instruction set */		\
@@ -390,6 +393,8 @@ extern unsigned long get_wchan (struct task_struct *p);
 /* Return stack pointer of blocked task TSK.  */
 #define KSTK_ESP(tsk)  ((tsk)->thread.ksp)
 
+#ifndef CONFIG_SMP
+
 static inline struct task_struct *
 ia64_get_fpu_owner (void)
 {
@@ -404,6 +409,8 @@ ia64_set_fpu_owner (struct task_struct *t)
 	__asm__ __volatile__ ("mov ar.k5=%0" :: "r"(t));
 }
 
+#endif /* !CONFIG_SMP */
+
 extern void __ia64_init_fpu (void);
 extern void __ia64_save_fpu (struct ia64_fpreg *fph);
 extern void __ia64_load_fpu (struct ia64_fpreg *fph);
@@ -447,31 +454,31 @@ ia64_load_fpu (struct ia64_fpreg *fph) {
 	ia64_fph_disable();
 }
 
-extern inline void
+static inline void
 ia64_fc (void *addr)
 {
 	__asm__ __volatile__ ("fc %0" :: "r"(addr) : "memory");
 }
 
-extern inline void
+static inline void
 ia64_sync_i (void)
 {
 	__asm__ __volatile__ (";; sync.i" ::: "memory");
 }
 
-extern inline void
+static inline void
 ia64_srlz_i (void)
 {
 	__asm__ __volatile__ (";; srlz.i ;;" ::: "memory");
 }
 
-extern inline void
+static inline void
 ia64_srlz_d (void)
 {
 	__asm__ __volatile__ (";; srlz.d" ::: "memory");
 }
 
-extern inline __u64
+static inline __u64
 ia64_get_rr (__u64 reg_bits)
 {
 	__u64 r;
@@ -479,13 +486,13 @@ ia64_get_rr (__u64 reg_bits)
 	return r;
 }
 
-extern inline void
+static inline void
 ia64_set_rr (__u64 reg_bits, __u64 rr_val)
 {
 	__asm__ __volatile__ ("mov rr[%0]=%1" :: "r"(reg_bits), "r"(rr_val) : "memory");
 }
 
-extern inline __u64
+static inline __u64
 ia64_get_dcr (void)
 {
 	__u64 r;
@@ -493,14 +500,14 @@ ia64_get_dcr (void)
 	return r;
 }
 
-extern inline void
+static inline void
 ia64_set_dcr (__u64 val)
 {
 	__asm__ __volatile__ ("mov cr.dcr=%0;;" :: "r"(val) : "memory");
 	ia64_srlz_d();
 }
 
-extern inline __u64
+static inline __u64
 ia64_get_lid (void)
 {
 	__u64 r;
@@ -508,7 +515,7 @@ ia64_get_lid (void)
 	return r;
 }
 
-extern inline void
+static inline void
 ia64_invala (void)
 {
 	__asm__ __volatile__ ("invala" ::: "memory");
@@ -526,7 +533,7 @@ ia64_invala (void)
  * Insert a translation into an instruction and/or data translation
  * register.
  */
-extern inline void
+static inline void
 ia64_itr (__u64 target_mask, __u64 tr_num,
 	  __u64 vmaddr, __u64 pte,
 	  __u64 log_page_size)
@@ -545,7 +552,7 @@ ia64_itr (__u64 target_mask, __u64 tr_num,
  * Insert a translation into the instruction and/or data translation
  * cache.
  */
-extern inline void
+static inline void
 ia64_itc (__u64 target_mask, __u64 vmaddr, __u64 pte,
 	  __u64 log_page_size)
 {
@@ -562,7 +569,7 @@ ia64_itc (__u64 target_mask, __u64 vmaddr, __u64 pte,
  * Purge a range of addresses from instruction and/or data translation
  * register(s).
  */
-extern inline void
+static inline void
 ia64_ptr (__u64 target_mask, __u64 vmaddr, __u64 log_size)
 {
 	if (target_mask & 0x1)
@@ -572,21 +579,21 @@ ia64_ptr (__u64 target_mask, __u64 vmaddr, __u64 log_size)
 }
 
 /* Set the interrupt vector address.  The address must be suitably aligned (32KB).  */
-extern inline void
+static inline void
 ia64_set_iva (void *ivt_addr)
 {
 	__asm__ __volatile__ ("mov cr.iva=%0;; srlz.i;;" :: "r"(ivt_addr) : "memory");
 }
 
 /* Set the page table address and control bits.  */
-extern inline void
+static inline void
 ia64_set_pta (__u64 pta)
 {
 	/* Note: srlz.i implies srlz.d */
 	__asm__ __volatile__ ("mov cr.pta=%0;; srlz.i;;" :: "r"(pta) : "memory");
 }
 
-extern inline __u64
+static inline __u64
 ia64_get_cpuid (__u64 regnum)
 {
 	__u64 r;
@@ -595,13 +602,13 @@ ia64_get_cpuid (__u64 regnum)
 	return r;
 }
 
-extern inline void
+static inline void
 ia64_eoi (void)
 {
 	__asm__ ("mov cr.eoi=r0;; srlz.d;;" ::: "memory");
 }
 
-extern __inline__ void
+static inline void
 ia64_set_lrr0 (__u8 vector, __u8 masked)
 {
 	if (masked > 1)
@@ -612,7 +619,7 @@ ia64_set_lrr0 (__u8 vector, __u8 masked)
 }
 
 
-extern __inline__ void
+static inline void
 ia64_set_lrr1 (__u8 vector, __u8 masked)
 {
 	if (masked > 1)
@@ -622,13 +629,13 @@ ia64_set_lrr1 (__u8 vector, __u8 masked)
 			      :: "r"((masked << 16) | vector) : "memory");
 }
 
-extern __inline__ void
+static inline void
 ia64_set_pmv (__u64 val)
 {
 	__asm__ __volatile__ ("mov cr.pmv=%0" :: "r"(val) : "memory");
 }
 
-extern __inline__ __u64
+static inline __u64
 ia64_get_pmc (__u64 regnum)
 {
 	__u64 retval;
@@ -637,13 +644,13 @@ ia64_get_pmc (__u64 regnum)
 	return retval;
 }
 
-extern __inline__ void
+static inline void
 ia64_set_pmc (__u64 regnum, __u64 value)
 {
 	__asm__ __volatile__ ("mov pmc[%0]=%1" :: "r"(regnum), "r"(value));
 }
 
-extern __inline__ __u64
+static inline __u64
 ia64_get_pmd (__u64 regnum)
 {
 	__u64 retval;
@@ -652,7 +659,7 @@ ia64_get_pmd (__u64 regnum)
 	return retval;
 }
 
-extern __inline__ void
+static inline void
 ia64_set_pmd (__u64 regnum, __u64 value)
 {
 	__asm__ __volatile__ ("mov pmd[%0]=%1" :: "r"(regnum), "r"(value));
@@ -662,7 +669,7 @@ ia64_set_pmd (__u64 regnum, __u64 value)
  * Given the address to which a spill occurred, return the unat bit
  * number that corresponds to this address.
  */
-extern inline __u64
+static inline __u64
 ia64_unat_pos (void *spill_addr)
 {
 	return ((__u64) spill_addr >> 3) & 0x3f;
@@ -672,7 +679,7 @@ ia64_unat_pos (void *spill_addr)
  * Set the NaT bit of an integer register which was spilled at address
  * SPILL_ADDR.  UNAT is the mask to be updated.
  */
-extern inline void
+static inline void
 ia64_set_unat (__u64 *unat, void *spill_addr, unsigned long nat)
 {
 	__u64 bit = ia64_unat_pos(spill_addr);
@@ -685,7 +692,7 @@ ia64_set_unat (__u64 *unat, void *spill_addr, unsigned long nat)
  * Return saved PC of a blocked thread.
  * Note that the only way T can block is through a call to schedule() -> switch_to().
  */
-extern inline unsigned long
+static inline unsigned long
 thread_saved_pc (struct thread_struct *t)
 {
 	struct unw_frame_info info;
@@ -720,7 +727,7 @@ thread_saved_pc (struct thread_struct *t)
 /*
  * Set the correctable machine check vector register
  */
-extern __inline__ void
+static inline void
 ia64_set_cmcv (__u64 val)
 {
 	__asm__ __volatile__ ("mov cr.cmcv=%0" :: "r"(val) : "memory");
@@ -729,7 +736,7 @@ ia64_set_cmcv (__u64 val)
 /*
  * Read the correctable machine check vector register
  */
-extern __inline__ __u64
+static inline __u64
 ia64_get_cmcv (void)
 {
 	__u64 val;
@@ -738,7 +745,7 @@ ia64_get_cmcv (void)
 	return val;
 }
 
-extern inline __u64
+static inline __u64
 ia64_get_ivr (void)
 {
 	__u64 r;
@@ -746,13 +753,13 @@ ia64_get_ivr (void)
 	return r;
 }
 
-extern inline void
+static inline void
 ia64_set_tpr (__u64 val)
 {
 	__asm__ __volatile__ ("mov cr.tpr=%0" :: "r"(val));
 }
 
-extern inline __u64
+static inline __u64
 ia64_get_tpr (void)
 {
 	__u64 r;
@@ -760,71 +767,75 @@ ia64_get_tpr (void)
 	return r;
 }
 
-extern __inline__ void
+static inline void
 ia64_set_irr0 (__u64 val)
 {
 	__asm__ __volatile__("mov cr.irr0=%0;;" :: "r"(val) : "memory");
 	ia64_srlz_d();
 }
 
-extern __inline__ __u64
+static inline __u64
 ia64_get_irr0 (void)
 {
 	__u64 val;
 
-	__asm__ ("mov %0=cr.irr0" : "=r"(val));
+	/* this is volatile because irr may change unbeknownst to gcc... */
+	__asm__ __volatile__("mov %0=cr.irr0" : "=r"(val));
 	return val;
 }
 
-extern __inline__ void
+static inline void
 ia64_set_irr1 (__u64 val)
 {
 	__asm__ __volatile__("mov cr.irr1=%0;;" :: "r"(val) : "memory");
 	ia64_srlz_d();
 }
 
-extern __inline__ __u64
+static inline __u64
 ia64_get_irr1 (void)
 {
 	__u64 val;
 
-	__asm__ ("mov %0=cr.irr1" : "=r"(val));
+	/* this is volatile because irr may change unbeknownst to gcc... */
+	__asm__ __volatile__("mov %0=cr.irr1" : "=r"(val));
 	return val;
 }
 
-extern __inline__ void
+static inline void
 ia64_set_irr2 (__u64 val)
 {
 	__asm__ __volatile__("mov cr.irr2=%0;;" :: "r"(val) : "memory");
 	ia64_srlz_d();
 }
 
-extern __inline__ __u64
+static inline __u64
 ia64_get_irr2 (void)
 {
 	__u64 val;
 
-	__asm__ ("mov %0=cr.irr2" : "=r"(val));
+	/* this is volatile because irr may change unbeknownst to gcc... */
+	__asm__ __volatile__("mov %0=cr.irr2" : "=r"(val));
 	return val;
 }
 
-extern __inline__ void
+static inline void
 ia64_set_irr3 (__u64 val)
 {
 	__asm__ __volatile__("mov cr.irr3=%0;;" :: "r"(val) : "memory");
 	ia64_srlz_d();
 }
 
-extern __inline__ __u64
+static inline __u64
 ia64_get_irr3 (void)
 {
 	__u64 val;
 
-	__asm__ ("mov %0=cr.irr3" : "=r"(val));
+	/* this is volatile because irr may change unbeknownst to gcc... */
+	__asm__ __volatile__("mov %0=cr.irr3" : "=r"(val));
 	return val;
 }
 
-extern __inline__ __u64
+static inline __u64
 ia64_get_gp(void)
 {
 	__u64 val;
@@ -852,7 +863,7 @@ ia64_get_gp(void)
 
 #define ia64_rotl(w,n)	ia64_rotr((w),(64)-(n))
 
-extern __inline__ __u64
+static inline __u64
 ia64_thash (__u64 addr)
 {
 	__u64 result;
diff --git a/include/asm-ia64/ptrace.h b/include/asm-ia64/ptrace.h
index b71acee5f..68ebe286e 100644
--- a/include/asm-ia64/ptrace.h
+++ b/include/asm-ia64/ptrace.h
@@ -219,6 +219,7 @@ struct switch_stack {
   extern void show_regs (struct pt_regs *);
   extern long ia64_peek (struct pt_regs *, struct task_struct *, unsigned long addr, long *val);
   extern long ia64_poke (struct pt_regs *, struct task_struct *, unsigned long addr, long val);
+  extern void ia64_flush_fph (struct task_struct *t);
   extern void ia64_sync_fph (struct task_struct *t);
 
 #ifdef CONFIG_IA64_NEW_UNWIND
diff --git a/include/asm-ia64/ptrace_offsets.h b/include/asm-ia64/ptrace_offsets.h
index b32b6c89d..6fa6fb446 100644
--- a/include/asm-ia64/ptrace_offsets.h
+++ b/include/asm-ia64/ptrace_offsets.h
@@ -17,6 +17,8 @@
  *		unsigned long dbr[8];
  *		unsigned long rsvd2[504];
  *		unsigned long ibr[8];
+ *		unsigned long rsvd3[504];
+ *		unsigned long pmd[4];
  *	}
  */
 
@@ -157,6 +159,7 @@
 #define PT_B4			0x07f0
 #define PT_B5			0x07f8
 
+#define PT_AR_EC		0x0800
 #define PT_AR_LC		0x0808
 
 /* pt_regs */
@@ -209,5 +212,6 @@
 
 #define PT_DBR			0x2000	/* data breakpoint registers */
 #define PT_IBR			0x3000	/* instruction breakpoint registers */
+#define PT_PMD			0x4000	/* performance monitoring counters */
 
 #endif /* _ASM_IA64_PTRACE_OFFSETS_H */
diff --git a/include/asm-ia64/sal.h b/include/asm-ia64/sal.h
index 06096644b..9f02ac571 100644
--- a/include/asm-ia64/sal.h
+++ b/include/asm-ia64/sal.h
@@ -17,6 +17,7 @@
  */
 
 #include <linux/config.h>
+#include <linux/spinlock.h>
 
 #include <asm/pal.h>
 #include <asm/system.h>
@@ -158,12 +159,22 @@ struct ia64_sal_desc_tr {
 	char reserved2[8];
 };
 
-struct ia64_sal_desc_ptc {
+typedef struct ia64_sal_desc_ptc {
 	char type;
 	char reserved1[3];
 	unsigned int num_domains;	/* # of coherence domains */
-	long domain_info;	/* physical address of domain info table */
-};
+	s64  domain_info;		/* physical address of domain info table */
+} ia64_sal_desc_ptc_t;
+
+typedef struct ia64_sal_ptc_domain_info {
+	unsigned long proc_count;	/* number of processors in domain */
+	long proc_list;			/* physical address of LID array */
+} ia64_sal_ptc_domain_info_t;
+
+typedef struct ia64_sal_ptc_domain_proc_entry {
+	unsigned char id;		/* id of processor */
+	unsigned char eid;		/* eid of processor */
+} ia64_sal_ptc_domain_proc_entry_t;
 
 #define IA64_SAL_AP_EXTERNAL_INT 0
 
@@ -175,6 +186,7 @@ struct ia64_sal_desc_ap_wakeup {
 };
 
 extern ia64_sal_handler ia64_sal;
+extern struct ia64_sal_desc_ptc *ia64_ptc_domain_info;
 
 extern const char *ia64_sal_strerror (long status);
 extern void ia64_sal_init (struct ia64_sal_systab *sal_systab);
@@ -387,7 +399,7 @@ typedef struct psilog
  * Now define a couple of inline functions for improved type checking
  * and convenience.
  */
-extern inline long
+static inline long
 ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
 		    unsigned long *drift_info)
 {
@@ -400,7 +412,7 @@ ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
 }
 
 /* Flush all the processor and platform level instruction and/or data caches */
-extern inline s64
+static inline s64
 ia64_sal_cache_flush (u64 cache_type)
 {
 	struct ia64_sal_retval isrv;
@@ -411,7 +423,7 @@ ia64_sal_cache_flush (u64 cache_type)
 
 	
 /* Initialize all the processor and platform level instruction and data caches */
-extern inline s64
+static inline s64
 ia64_sal_cache_init (void)
 {
 	struct ia64_sal_retval isrv;
@@ -422,7 +434,7 @@ ia64_sal_cache_init (void)
 /* Clear the processor and platform information logged by SAL with respect to the 
  * machine state at the time of MCA's, INITs or CMCs 
  */
-extern inline s64
+static inline s64
 ia64_sal_clear_state_info (u64 sal_info_type, u64 sal_info_sub_type)
 {
 	struct ia64_sal_retval isrv;
@@ -434,7 +446,7 @@ ia64_sal_clear_state_info (u64 sal_info_type, u64 sal_info_sub_type)
 /* Get the processor and platform information logged by SAL with respect to the machine
  * state at the time of the MCAs, INITs or CMCs.
  */
-extern inline u64
+static inline u64
 ia64_sal_get_state_info (u64 sal_info_type, u64 sal_info_sub_type, u64 *sal_info)
 {
 	struct ia64_sal_retval isrv;
@@ -446,7 +458,7 @@ ia64_sal_get_state_info (u64 sal_info_type, u64 sal_info_sub_type, u64 *sal_info
 /* Get the maximum size of the information logged by SAL with respect to the machine 
  * state at the time of MCAs, INITs or CMCs
  */
-extern inline u64
+static inline u64
 ia64_sal_get_state_info_size (u64 sal_info_type, u64 sal_info_sub_type)
 {
 	struct ia64_sal_retval isrv;
@@ -459,7 +471,7 @@ ia64_sal_get_state_info_size (u64 sal_info_type, u64 sal_info_sub_type)
 /* Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup
  * from the monarch processor.
  */
-extern inline s64
+static inline s64
 ia64_sal_mc_rendez (void)
 {
 	struct ia64_sal_retval isrv;
@@ -471,7 +483,7 @@ ia64_sal_mc_rendez (void)
  * the machine check rendezvous sequence as well as the mechanism to wake up the 
  * non-monarch processor at the end of machine check processing.
  */
-extern inline s64
+static inline s64
 ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout)
 {
 	struct ia64_sal_retval isrv;
@@ -480,7 +492,7 @@ ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout)
 }
 
 /* Read from PCI configuration space */
-extern inline s64
+static inline s64
 ia64_sal_pci_config_read (u64 pci_config_addr, u64 size, u64 *value)
 {
 	struct ia64_sal_retval isrv;
@@ -503,7 +515,7 @@ ia64_sal_pci_config_read (u64 pci_config_addr, u64 size, u64 *value)
 }
 
 /* Write to PCI configuration space */
-extern inline s64
+static inline s64
 ia64_sal_pci_config_write (u64 pci_config_addr, u64 size, u64 value)
 {
 	struct ia64_sal_retval isrv;
@@ -527,7 +539,7 @@ ia64_sal_pci_config_write (u64 pci_config_addr, u64 size, u64 value)
  * Register physical addresses of locations needed by SAL when SAL
  * procedures are invoked in virtual mode.
  */
-extern inline s64
+static inline s64
 ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr)
 {
 	struct ia64_sal_retval isrv;
@@ -539,7 +551,7 @@ ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr)
  * or entry points where SAL will pass control for the specified event. These event
  * handlers are for the bott rendezvous, MCAs and INIT scenarios.
  */
-extern inline s64
+static inline s64
 ia64_sal_set_vectors (u64 vector_type,
 		      u64 handler_addr1, u64 gp1, u64 handler_len1,
 		      u64 handler_addr2, u64 gp2, u64 handler_len2)
@@ -552,7 +564,7 @@ ia64_sal_set_vectors (u64 vector_type,
 	return isrv.status;
 }		
 /* Update the contents of PAL block in the non-volatile storage device */
-extern inline s64
+static inline s64
 ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
 		     u64 *error_code, u64 *scratch_buf_size_needed)
 {
diff --git a/include/asm-ia64/semaphore.h b/include/asm-ia64/semaphore.h
index c42aff9ad..f829713bf 100644
--- a/include/asm-ia64/semaphore.h
+++ b/include/asm-ia64/semaphore.h
@@ -39,7 +39,7 @@ struct semaphore {
 #define DECLARE_MUTEX(name)		__DECLARE_SEMAPHORE_GENERIC(name, 1)
 #define DECLARE_MUTEX_LOCKED(name)	__DECLARE_SEMAPHORE_GENERIC(name, 0)
 
-extern inline void
+static inline void
 sema_init (struct semaphore *sem, int val)
 {
 	*sem = (struct semaphore) __SEMAPHORE_INITIALIZER(*sem, val);
@@ -68,7 +68,7 @@ extern spinlock_t semaphore_wake_lock;
  * Atomically decrement the semaphore's count.  If it goes negative,
  * block the calling thread in the TASK_UNINTERRUPTIBLE state.
  */
-extern inline void
+static inline void
 down (struct semaphore *sem)
 {
 #if WAITQUEUE_DEBUG
@@ -82,7 +82,7 @@ down (struct semaphore *sem)
  * Atomically decrement the semaphore's count.  If it goes negative,
  * block the calling thread in the TASK_INTERRUPTIBLE state.
  */
-extern inline int
+static inline int
 down_interruptible (struct semaphore * sem)
 {
 	int ret = 0;
@@ -95,7 +95,7 @@ down_interruptible (struct semaphore * sem)
 	return ret;
 }
 
-extern inline int
+static inline int
 down_trylock (struct semaphore *sem)
 {
 	int ret = 0;
@@ -108,7 +108,7 @@ down_trylock (struct semaphore *sem)
 	return ret;
 }
 
-extern inline void
+static inline void
 up (struct semaphore * sem)
 {
 #if WAITQUEUE_DEBUG
@@ -181,7 +181,7 @@ extern void __down_read_failed (struct rw_semaphore *sem, long count);
 extern void __down_write_failed (struct rw_semaphore *sem, long count);
 extern void __rwsem_wake (struct rw_semaphore *sem, long count);
 
-extern inline void
+static inline void
 init_rwsem (struct rw_semaphore *sem)
 {
 	sem->count = RW_LOCK_BIAS;
@@ -196,7 +196,7 @@ init_rwsem (struct rw_semaphore *sem)
 #endif
 }
 
-extern inline void
+static inline void
 down_read (struct rw_semaphore *sem)
 {
 	long count;
@@ -218,7 +218,7 @@ down_read (struct rw_semaphore *sem)
 #endif
 }
 
-extern inline void
+static inline void
 down_write (struct rw_semaphore *sem)
 {
 	long old_count, new_count;
@@ -252,7 +252,7 @@ down_write (struct rw_semaphore *sem)
  * case is when there was a writer waiting, and we've
  * bumped the count to 0: we must wake the writer up.
  */
-extern inline void
+static inline void
 __up_read (struct rw_semaphore *sem)
 {
 	long count;
@@ -271,7 +271,7 @@ __up_read (struct rw_semaphore *sem)
  * Releasing the writer is easy -- just release it and
  * wake up any sleepers.
  */
-extern inline void
+static inline void
 __up_write (struct rw_semaphore *sem)
 {
 	long old_count, new_count;
@@ -290,7 +290,7 @@ __up_write (struct rw_semaphore *sem)
 		__rwsem_wake(sem, new_count);
 }
 
-extern inline void
+static inline void
 up_read (struct rw_semaphore *sem)
 {
 #if WAITQUEUE_DEBUG
@@ -303,7 +303,7 @@ up_read (struct rw_semaphore *sem)
 	__up_read(sem);
 }
 
-extern inline void
+static inline void
 up_write (struct rw_semaphore *sem)
 {
 #if WAITQUEUE_DEBUG
diff --git a/include/asm-ia64/siginfo.h b/include/asm-ia64/siginfo.h
index a54312e12..dfafe187d 100644
--- a/include/asm-ia64/siginfo.h
+++ b/include/asm-ia64/siginfo.h
@@ -235,7 +235,8 @@ typedef struct sigevent {
 #ifdef __KERNEL__
 #include <linux/string.h>
 
-extern inline void copy_siginfo(siginfo_t *to, siginfo_t *from)
+static inline void
+copy_siginfo (siginfo_t *to, siginfo_t *from)
 {
 	if (from->si_code < 0)
 		memcpy(to, from, sizeof(siginfo_t));
diff --git a/include/asm-ia64/smp.h b/include/asm-ia64/smp.h
index 0788865fc..156a1fbf2 100644
--- a/include/asm-ia64/smp.h
+++ b/include/asm-ia64/smp.h
@@ -25,54 +25,71 @@
 
 #define smp_processor_id()	(current->processor)
 
-struct smp_boot_data {
+extern struct smp_boot_data {
 	int cpu_count;
-	int cpu_map[NR_CPUS];
-};
+	int cpu_phys_id[NR_CPUS];
+} smp_boot_data __initdata;
 
 extern unsigned long cpu_present_map;
 extern unsigned long cpu_online_map;
 extern unsigned long ipi_base_addr;
 extern int bootstrap_processor;
-extern volatile int __cpu_number_map[NR_CPUS];
-extern volatile int __cpu_logical_map[NR_CPUS];
+extern volatile int __cpu_physical_id[NR_CPUS];
 extern unsigned char smp_int_redirect;
 extern char no_int_routing;
-
-#define cpu_number_map(i)	__cpu_number_map[i]
-#define cpu_logical_map(i)	__cpu_logical_map[i]
+extern int smp_num_cpus;
+  
+#define cpu_physical_id(i)	__cpu_physical_id[i]
+#define cpu_number_map(i)	(i)
+#define cpu_logical_map(i)	(i)
 
 extern unsigned long ap_wakeup_vector;
 
 /*
+ * Function to map hard smp processor id to logical id.  Slow, so
+ * don't use this in performance-critical code.
+ */
+static inline int
+cpu_logical_id (int cpuid)
+{
+	int i;
+
+	for (i=0; i<smp_num_cpus; i++) {
+		if (cpu_physical_id(i) == cpuid)
+			break;
+	}
+	return i;
+}
+
+/*
  * XTP control functions:
  *    min_xtp   :  route all interrupts to this CPU
  *    normal_xtp:  nominal XTP value
  *    max_xtp   :  never deliver interrupts to this CPU.
  */
 
-extern __inline void 
+static inline void 
 min_xtp(void)
 {
 	if (smp_int_redirect & SMP_IRQ_REDIRECTION)
 		writeb(0x00, ipi_base_addr | XTP_OFFSET); /* XTP to min */
 }
 
-extern __inline void
+static inline void
 normal_xtp(void)
 {
 	if (smp_int_redirect & SMP_IRQ_REDIRECTION)
 		writeb(0x08, ipi_base_addr | XTP_OFFSET); /* XTP normal */
 }
 
-extern __inline void
+static inline void
 max_xtp(void) 
 {
 	if (smp_int_redirect & SMP_IRQ_REDIRECTION)
 		writeb(0x0f, ipi_base_addr | XTP_OFFSET); /* Set XTP to max */
 }
 
-extern __inline__ unsigned int 
+static inline unsigned int 
 hard_smp_processor_id(void)
 {
 	struct {
@@ -84,13 +101,7 @@ hard_smp_processor_id(void)
 
 	__asm__ ("mov %0=cr.lid" : "=r" (lid));
 
-#ifdef LARGE_CPU_ID_OK
-	return lid.eid << 8 | lid.id;
-#else
-	if (((lid.id << 8) | lid.eid) > NR_CPUS)
-		printk("WARNING: SMP ID %d > NR_CPUS\n", (lid.id << 8) | lid.eid);
-	return lid.id;
-#endif
+	return lid.id << 8 | lid.eid;
 }
 
 #define NO_PROC_ID		(-1)
diff --git a/include/asm-ia64/spinlock.h b/include/asm-ia64/spinlock.h
index 24b85b4d6..eb421385c 100644
--- a/include/asm-ia64/spinlock.h
+++ b/include/asm-ia64/spinlock.h
@@ -29,48 +29,42 @@ typedef struct {
  * Streamlined test_and_set_bit(0, (x)).  We use test-and-test-and-set
  * rather than a simple xchg to avoid writing the cache-line when
  * there is contention.
- *
- * XXX Fix me: instead of preserving ar.pfs, we should just mark it
- * XXX as "clobbered".  Unfortunately, the Mar 2000 release of the compiler
- * XXX doesn't let us do that.  The August release fixes that.
  */
-#define spin_lock(x)								\
-{										\
+#define spin_lock(x)									\
+{											\
+	register char *addr __asm__ ("r31") = (char *) &(x)->lock;			\
+											\
+	__asm__ __volatile__ (								\
+		"mov r30=1\n"								\
+		"mov ar.ccv=r0\n"							\
+		";;\n"									\
+		IA64_SEMFIX"cmpxchg1.acq r30=[%0],r30,ar.ccv\n"				\
+		";;\n"									\
+		"cmp.ne p15,p0=r30,r0\n"						\
+		"(p15) br.call.spnt.few b7=ia64_spinlock_contention\n"			\
+		";;\n"									\
+		"1:\n"				/* force a new bundle */		\
+		:: "r"(addr)								\
+		: "ar.ccv", "ar.pfs", "b7", "p15", "r28", "r29", "r30", "memory");	\
+}
+
+#define spin_trylock(x)								\
+({										\
 	register char *addr __asm__ ("r31") = (char *) &(x)->lock;		\
-	long saved_pfs;								\
+	register long result;							\
 										\
 	__asm__ __volatile__ (							\
 		"mov r30=1\n"							\
 		"mov ar.ccv=r0\n"						\
 		";;\n"								\
-		IA64_SEMFIX"cmpxchg1.acq r30=[%1],r30,ar.ccv\n"			\
-		";;\n"								\
-		"cmp.ne p15,p0=r30,r0\n"					\
-		"mov %0=ar.pfs\n"						\
-		"(p15) br.call.spnt.few b7=ia64_spinlock_contention\n"		\
-		";;\n"								\
-		"1: (p15) mov ar.pfs=%0;;\n"	/* force a new bundle */	\
-		: "=&r"(saved_pfs) : "r"(addr)					\
-		: "p15", "r28", "r29", "r30", "memory");			\
-}
-
-#define spin_trylock(x)							\
-({									\
-	register char *addr __asm__ ("r31") = (char *) &(x)->lock;	\
-	register long result;						\
-									\
-	__asm__ __volatile__ (						\
-		"mov r30=1\n"						\
-		"mov ar.ccv=r0\n"					\
-		";;\n"							\
-		IA64_SEMFIX"cmpxchg1.acq %0=[%1],r30,ar.ccv\n"		\
-		: "=r"(result) : "r"(addr) : "r30", "memory");		\
-	(result == 0);							\
+		IA64_SEMFIX"cmpxchg1.acq %0=[%1],r30,ar.ccv\n"			\
+		: "=r"(result) : "r"(addr) : "ar.ccv", "r30", "memory");	\
+	(result == 0);								\
 })
 
 #define spin_is_locked(x)	((x)->lock != 0)
-#define spin_unlock(x)		({((spinlock_t *) x)->lock = 0;})
-#define spin_unlock_wait(x)	({ while ((x)->lock); })
+#define spin_unlock(x)		do {((spinlock_t *) x)->lock = 0;} while (0)
+#define spin_unlock_wait(x)	do {} while ((x)->lock)
 
 #else /* !NEW_LOCK */
 
@@ -91,21 +85,21 @@ typedef struct {
 	"mov r29 = 1\n"						\
 	";;\n"							\
 	"1:\n"							\
-	"ld4 r2 = %0\n"						\
+	"ld4 r2 = [%0]\n"					\
 	";;\n"							\
 	"cmp4.eq p0,p7 = r0,r2\n"				\
 	"(p7) br.cond.spnt.few 1b \n"				\
-	IA64_SEMFIX"cmpxchg4.acq r2 = %0, r29, ar.ccv\n"	\
+	IA64_SEMFIX"cmpxchg4.acq r2 = [%0], r29, ar.ccv\n"	\
 	";;\n"							\
 	"cmp4.eq p0,p7 = r0, r2\n"				\
 	"(p7) br.cond.spnt.few 1b\n"				\
 	";;\n"							\
-	:: "m" __atomic_fool_gcc((x)) : "r2", "r29", "memory")
+	:: "r"(&(x)->lock) : "r2", "r29", "memory")
 
 #define spin_is_locked(x)	((x)->lock != 0)
-#define spin_unlock(x)		({((spinlock_t *) x)->lock = 0; barrier();})
+#define spin_unlock(x)		do {((spinlock_t *) x)->lock = 0; barrier(); } while (0)
 #define spin_trylock(x)		(cmpxchg_acq(&(x)->lock, 0, 1) == 0)
-#define spin_unlock_wait(x)	({ do { barrier(); } while ((x)->lock); })
+#define spin_unlock_wait(x)	do { barrier(); } while ((x)->lock)
 
 #endif /* !NEW_LOCK */
 
@@ -115,44 +109,54 @@ typedef struct {
 } rwlock_t;
 #define RW_LOCK_UNLOCKED (rwlock_t) { 0, 0 }
 
-#define read_lock(rw)							 \
-do {									 \
-	int tmp = 0;							 \
-	__asm__ __volatile__ ("1:\t"IA64_SEMFIX"fetchadd4.acq %0 = %1, 1\n"		 \
-			      ";;\n"					 \
-			      "tbit.nz p6,p0 = %0, 31\n"		 \
-			      "(p6) br.cond.sptk.few 2f\n"		 \
-			      ".section .text.lock,\"ax\"\n"		 \
-			      "2:\t"IA64_SEMFIX"fetchadd4.rel %0 = %1, -1\n"		 \
-			      ";;\n"					 \
-			      "3:\tld4.acq %0 = %1\n"			 \
-			      ";;\n"					 \
-			      "tbit.nz p6,p0 = %0, 31\n"		 \
-			      "(p6) br.cond.sptk.few 3b\n"		 \
-			      "br.cond.sptk.few 1b\n"			 \
-			      ";;\n"					 \
-			      ".previous\n"				 \
-			      : "=r" (tmp), "=m" (__atomic_fool_gcc(rw)) \
-			      :: "memory");				 \
+#define read_lock(rw)								\
+do {										\
+	int tmp = 0;								\
+	__asm__ __volatile__ ("1:\t"IA64_SEMFIX"fetchadd4.acq %0 = [%1], 1\n"	\
+			      ";;\n"						\
+			      "tbit.nz p6,p0 = %0, 31\n"			\
+			      "(p6) br.cond.sptk.few 2f\n"			\
+			      ".section .text.lock,\"ax\"\n"			\
+			      "2:\t"IA64_SEMFIX"fetchadd4.rel %0 = [%1], -1\n"	\
+			      ";;\n"						\
+			      "3:\tld4.acq %0 = [%1]\n"				\
+			      ";;\n"						\
+			      "tbit.nz p6,p0 = %0, 31\n"			\
+			      "(p6) br.cond.sptk.few 3b\n"			\
+			      "br.cond.sptk.few 1b\n"				\
+			      ";;\n"						\
+			      ".previous\n"					\
+			      : "=&r" (tmp)					\
+			      : "r" (rw): "memory");				\
 } while(0)
 
-#define read_unlock(rw)						\
-do {								\
-	int tmp = 0;						\
-	__asm__ __volatile__ (IA64_SEMFIX"fetchadd4.rel %0 = %1, -1\n"	\
-			      : "=r" (tmp)			\
-			      : "m" (__atomic_fool_gcc(rw))	\
-			      : "memory");			\
+#define read_unlock(rw)								\
+do {										\
+	int tmp = 0;								\
+	__asm__ __volatile__ (IA64_SEMFIX"fetchadd4.rel %0 = [%1], -1\n"	\
+			      : "=r" (tmp)					\
+			      : "r" (rw)					\
+			      : "memory");					\
 } while(0)
 
-#define write_lock(rw)				\
-do {						\
-	do {					\
-		while ((rw)->write_lock);	\
-	} while (test_and_set_bit(31, (rw)));	\
-	while ((rw)->read_counter);		\
-	barrier();				\
-} while (0)
+#define write_lock(rw)								\
+do {										\
+ 	__asm__ __volatile__ (							\
+		"mov ar.ccv = r0\n"						\
+		"movl r29 = 0x80000000\n"					\
+		";;\n"								\
+		"1:\n"								\
+		"ld4 r2 = [%0]\n"						\
+		";;\n"								\
+		"cmp4.eq p0,p7 = r0,r2\n"					\
+		"(p7) br.cond.spnt.few 1b \n"					\
+		IA64_SEMFIX"cmpxchg4.acq r2 = [%0], r29, ar.ccv\n"		\
+		";;\n"								\
+		"cmp4.eq p0,p7 = r0, r2\n"					\
+		"(p7) br.cond.spnt.few 1b\n"					\
+		";;\n"								\
+		:: "r"(rw) : "r2", "r29", "memory");				\
+} while(0)
 
 /*
  * clear_bit() has "acq" semantics; we're really need "rel" semantics,
diff --git a/include/asm-ia64/string.h b/include/asm-ia64/string.h
index 56bd64327..c17fc8de4 100644
--- a/include/asm-ia64/string.h
+++ b/include/asm-ia64/string.h
@@ -9,6 +9,9 @@
  * Copyright (C) 1998-2000 David Mosberger-Tang <davidm@hpl.hp.com>
  */
 
+#include <linux/config.h>	/* remove this once we remove the A-step workaround... */
+#ifndef CONFIG_ITANIUM_ASTEP_SPECIFIC
+
 #define __HAVE_ARCH_STRLEN	1 /* see arch/ia64/lib/strlen.S */
 #define __HAVE_ARCH_MEMSET	1 /* see arch/ia64/lib/memset.S */
 #define __HAVE_ARCH_MEMCPY	1 /* see arch/ia64/lib/memcpy.S */
@@ -18,4 +21,6 @@ extern __kernel_size_t strlen (const char *);
 extern void *memset (void *, int, __kernel_size_t);
 extern void *memcpy (void *, const void *, __kernel_size_t);
 
+#endif /* CONFIG_ITANIUM_ASTEP_SPECIFIC */
+
 #endif /* _ASM_IA64_STRING_H */
diff --git a/include/asm-ia64/system.h b/include/asm-ia64/system.h
index 25438c18e..4bff3ff94 100644
--- a/include/asm-ia64/system.h
+++ b/include/asm-ia64/system.h
@@ -38,6 +38,7 @@
 
 #ifndef __ASSEMBLY__
 
+#include <linux/kernel.h>
 #include <linux/types.h>
 
 struct pci_vector_struct {
@@ -67,7 +68,7 @@ extern struct ia64_boot_param {
 	__u64 initrd_size;
 } ia64_boot_param;
 
-extern inline void
+static inline void
 ia64_insn_group_barrier (void)
 {
 	__asm__ __volatile__ (";;" ::: "memory");
@@ -99,6 +100,16 @@ ia64_insn_group_barrier (void)
 #define rmb()	mb()
 #define wmb()	mb()
 
+#ifdef CONFIG_SMP
+# define smp_mb()	mb()
+# define smp_rmb()	rmb()
+# define smp_wmb()	wmb()
+#else
+# define smp_mb()	barrier()
+# define smp_rmb()	barrier()
+# define smp_wmb()	barrier()
+#endif
+
 /*
  * XXX check on these---I suspect what Linus really wants here is
  * acquire vs release semantics but we can't discuss this stuff with
@@ -240,15 +251,13 @@ extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
 ({										\
 	switch (sz) {								\
 	      case 4:								\
-		__asm__ __volatile__ (IA64_SEMFIX"fetchadd4.rel %0=%1,%3"	\
-				      : "=r"(tmp), "=m"(__atomic_fool_gcc(v))	\
-				      : "m" (__atomic_fool_gcc(v)), "i"(n));	\
+		__asm__ __volatile__ (IA64_SEMFIX"fetchadd4.rel %0=[%1],%2"	\
+				      : "=r"(tmp) : "r"(v), "i"(n) : "memory");	\
 		break;								\
 										\
 	      case 8:								\
-		__asm__ __volatile__ (IA64_SEMFIX"fetchadd8.rel %0=%1,%3"	\
-				      : "=r"(tmp), "=m"(__atomic_fool_gcc(v))	\
-				      : "m" (__atomic_fool_gcc(v)), "i"(n));	\
+		__asm__ __volatile__ (IA64_SEMFIX"fetchadd8.rel %0=[%1],%2"	\
+				      : "=r"(tmp) : "r"(v), "i"(n) : "memory");	\
 		break;								\
 										\
 	      default:								\
@@ -289,23 +298,23 @@ __xchg (unsigned long x, volatile void *ptr, int size)
 
 	switch (size) {
 	      case 1:
-		__asm__ __volatile (IA64_SEMFIX"xchg1 %0=%1,%2" : "=r" (result)
-				    : "m" (*(char *) ptr), "r" (x) : "memory");
+		__asm__ __volatile (IA64_SEMFIX"xchg1 %0=[%1],%2" : "=r" (result)
+				    : "r" (ptr), "r" (x) : "memory");
 		return result;
 
 	      case 2:
-		__asm__ __volatile (IA64_SEMFIX"xchg2 %0=%1,%2" : "=r" (result)
-				    : "m" (*(short *) ptr), "r" (x) : "memory");
+		__asm__ __volatile (IA64_SEMFIX"xchg2 %0=[%1],%2" : "=r" (result)
+				    : "r" (ptr), "r" (x) : "memory");
 		return result;
 
 	      case 4:
-		__asm__ __volatile (IA64_SEMFIX"xchg4 %0=%1,%2" : "=r" (result)
-				    : "m" (*(int *) ptr), "r" (x) : "memory");
+		__asm__ __volatile (IA64_SEMFIX"xchg4 %0=[%1],%2" : "=r" (result)
+				    : "r" (ptr), "r" (x) : "memory");
 		return result;
 
 	      case 8:
-		__asm__ __volatile (IA64_SEMFIX"xchg8 %0=%1,%2" : "=r" (result)
-				    : "m" (*(long *) ptr), "r" (x) : "memory");
+		__asm__ __volatile (IA64_SEMFIX"xchg8 %0=[%1],%2" : "=r" (result)
+				    : "r" (ptr), "r" (x) : "memory");
 		return result;
 	}
 	__xchg_called_with_bad_pointer();
@@ -329,9 +338,6 @@ __xchg (unsigned long x, volatile void *ptr, int size)
  */
 extern long __cmpxchg_called_with_bad_pointer(void);
 
-struct __xchg_dummy { unsigned long a[100]; };
-#define __xg(x) (*(struct __xchg_dummy *)(x))
-
 #define ia64_cmpxchg(sem,ptr,old,new,size)						\
 ({											\
 	__typeof__(ptr) _p_ = (ptr);							\
@@ -348,27 +354,23 @@ struct __xchg_dummy { unsigned long a[100]; };
 	 __asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(_o_));				\
 	switch (size) {									\
 	      case 1:									\
-		__asm__ __volatile__ (IA64_SEMFIX"cmpxchg1."sem" %0=%2,%3,ar.ccv"	\
-				      : "=r"(_r_), "=m"(__xg(_p_))			\
-				      : "m"(__xg(_p_)), "r"(_n_));			\
+		__asm__ __volatile__ (IA64_SEMFIX"cmpxchg1."sem" %0=[%1],%2,ar.ccv"	\
+				      : "=r"(_r_) : "r"(_p_), "r"(_n_) : "memory");	\
 		break;									\
 											\
 	      case 2:									\
-		__asm__ __volatile__ (IA64_SEMFIX"cmpxchg2."sem" %0=%2,%3,ar.ccv"	\
-				      : "=r"(_r_), "=m"(__xg(_p_))			\
-				      : "m"(__xg(_p_)), "r"(_n_));			\
+		__asm__ __volatile__ (IA64_SEMFIX"cmpxchg2."sem" %0=[%1],%2,ar.ccv"	\
+				      : "=r"(_r_) : "r"(_p_), "r"(_n_) : "memory");	\
 		break;									\
 											\
 	      case 4:									\
-		__asm__ __volatile__ (IA64_SEMFIX"cmpxchg4."sem" %0=%2,%3,ar.ccv"	\
-				      : "=r"(_r_), "=m"(__xg(_p_))			\
-				      : "m"(__xg(_p_)), "r"(_n_));			\
+		__asm__ __volatile__ (IA64_SEMFIX"cmpxchg4."sem" %0=[%1],%2,ar.ccv"	\
+				      : "=r"(_r_) : "r"(_p_), "r"(_n_) : "memory");	\
 		break;									\
 											\
 	      case 8:									\
-		__asm__ __volatile__ (IA64_SEMFIX"cmpxchg8."sem" %0=%2,%3,ar.ccv"	\
-				      : "=r"(_r_), "=m"(__xg(_p_))			\
-				      : "m"(__xg(_p_)), "r"(_n_));			\
+		__asm__ __volatile__ (IA64_SEMFIX"cmpxchg8."sem" %0=[%1],%2,ar.ccv"	\
+				      : "=r"(_r_) : "r"(_p_), "r"(_n_) : "memory");	\
 		break;									\
 											\
 	      default:									\
@@ -433,33 +435,31 @@ extern void ia64_load_extra (struct task_struct *task);
 	if (((next)->thread.flags & (IA64_THREAD_DBG_VALID|IA64_THREAD_PM_VALID))	\
 	    || IS_IA32_PROCESS(ia64_task_regs(next)))					\
 		ia64_load_extra(next);							\
-	ia64_psr(ia64_task_regs(next))->dfh = (ia64_get_fpu_owner() != (next));		\
 	(last) = ia64_switch_to((next));						\
 } while (0)
 
 #ifdef CONFIG_SMP 
   /*
    * In the SMP case, we save the fph state when context-switching
-   * away from a thread that owned and modified fph.  This way, when
-   * the thread gets scheduled on another CPU, the CPU can pick up the
-   * state frm task->thread.fph, avoiding the complication of having
-   * to fetch the latest fph state from another CPU.  If the thread
-   * happens to be rescheduled on the same CPU later on and nobody
-   * else has touched the FPU in the meantime, the thread will fault
-   * upon the first access to fph but since the state in fph is still
-   * valid, no other overheads are incurred.  In other words, CPU
-   * affinity is a Good Thing.
+   * away from a thread that modified fph.  This way, when the thread
+   * gets scheduled on another CPU, the CPU can pick up the state from
+   * task->thread.fph, avoiding the complication of having to fetch
+   * the latest fph state from another CPU.
    */
-# define switch_to(prev,next,last) do {							\
-	if (ia64_get_fpu_owner() == (prev) && ia64_psr(ia64_task_regs(prev))->mfh) {	\
-		ia64_psr(ia64_task_regs(prev))->mfh = 0;				\
-		(prev)->thread.flags |= IA64_THREAD_FPH_VALID;				\
-		__ia64_save_fpu((prev)->thread.fph);					\
-	}										\
-	__switch_to(prev,next,last);							\
+# define switch_to(prev,next,last) do {						\
+	if (ia64_psr(ia64_task_regs(prev))->mfh) {				\
+		ia64_psr(ia64_task_regs(prev))->mfh = 0;			\
+		(prev)->thread.flags |= IA64_THREAD_FPH_VALID;			\
+		__ia64_save_fpu((prev)->thread.fph);				\
+	}									\
+	ia64_psr(ia64_task_regs(prev))->dfh = 1;				\
+	__switch_to(prev,next,last);						\
   } while (0)
 #else
-# define switch_to(prev,next,last) 	__switch_to(prev,next,last)
+# define switch_to(prev,next,last) do {						\
+	ia64_psr(ia64_task_regs(next))->dfh = (ia64_get_fpu_owner() != (next));	\
+	__switch_to(prev,next,last);						\
+} while (0)
 #endif
 
 #endif /* __KERNEL__ */
diff --git a/include/asm-ia64/uaccess.h b/include/asm-ia64/uaccess.h
index 319784a5b..6e8aef3df 100644
--- a/include/asm-ia64/uaccess.h
+++ b/include/asm-ia64/uaccess.h
@@ -61,7 +61,7 @@
 #define __access_ok(addr,size,segment)	(((unsigned long) (addr)) <= (segment).seg)
 #define access_ok(type,addr,size)	__access_ok((addr),(size),get_fs())
 
-extern inline int
+static inline int
 verify_area (int type, const void *addr, unsigned long size)
 {
 	return access_ok(type,addr,size) ? 0 : -EFAULT;
@@ -126,7 +126,7 @@ struct __large_struct { unsigned long buf[100]; };
 #define __m(x) (*(struct __large_struct *)(x))
 
 #define __get_user_64(addr)								\
-	__asm__ ("\n1:\tld8 %0=%2\t// %0 and %1 get overwritten by exception handler\n"	\
+	__asm__ ("\n1:\tld8 %0=%2%P2\t// %0 and %1 get overwritten by exception handler\n"	\
 		 "2:\n"									\
 		 "\t.section __ex_table,\"a\"\n"					\
 		 "\t\tdata4 @gprel(1b)\n"						\
@@ -136,7 +136,7 @@ struct __large_struct { unsigned long buf[100]; };
 		: "m"(__m(addr)), "1"(__gu_err));
 
 #define __get_user_32(addr)								\
-	__asm__ ("\n1:\tld4 %0=%2\t// %0 and %1 get overwritten by exception handler\n"	\
+	__asm__ ("\n1:\tld4 %0=%2%P2\t// %0 and %1 get overwritten by exception handler\n"	\
 		 "2:\n"									\
 		 "\t.section __ex_table,\"a\"\n"					\
 		 "\t\tdata4 @gprel(1b)\n"						\
@@ -146,7 +146,7 @@ struct __large_struct { unsigned long buf[100]; };
 		: "m"(__m(addr)), "1"(__gu_err));
 
 #define __get_user_16(addr)								\
-	__asm__ ("\n1:\tld2 %0=%2\t// %0 and %1 get overwritten by exception handler\n"	\
+	__asm__ ("\n1:\tld2 %0=%2%P2\t// %0 and %1 get overwritten by exception handler\n"	\
 		 "2:\n"									\
 		 "\t.section __ex_table,\"a\"\n"					\
 		 "\t\tdata4 @gprel(1b)\n"						\
@@ -156,7 +156,7 @@ struct __large_struct { unsigned long buf[100]; };
 		: "m"(__m(addr)), "1"(__gu_err));
 
 #define __get_user_8(addr)								\
-	__asm__ ("\n1:\tld1 %0=%2\t// %0 and %1 get overwritten by exception handler\n"	\
+	__asm__ ("\n1:\tld1 %0=%2%P2\t// %0 and %1 get overwritten by exception handler\n"	\
 		 "2:\n"									\
 		 "\t.section __ex_table,\"a\"\n"					\
 		 "\t\tdata4 @gprel(1b)\n"						\
@@ -205,7 +205,7 @@ extern void __put_user_unknown (void);
  */
 #define __put_user_64(x,addr)								\
 	__asm__ __volatile__ (								\
-		 "\n1:\tst8 %1=%r2\t// %0 gets overwritten by exception handler\n"	\
+		 "\n1:\tst8 %1=%r2%P1\t// %0 gets overwritten by exception handler\n"	\
 		 "2:\n"									\
 		 "\t.section __ex_table,\"a\"\n"					\
 		 "\t\tdata4 @gprel(1b)\n"						\
@@ -216,7 +216,7 @@ extern void __put_user_unknown (void);
 
 #define __put_user_32(x,addr)								\
 	__asm__ __volatile__ (								\
-		 "\n1:\tst4 %1=%r2\t// %0 gets overwritten by exception handler\n"	\
+		 "\n1:\tst4 %1=%r2%P1\t// %0 gets overwritten by exception handler\n"	\
 		 "2:\n"									\
 		 "\t.section __ex_table,\"a\"\n"					\
 		 "\t\tdata4 @gprel(1b)\n"						\
@@ -227,7 +227,7 @@ extern void __put_user_unknown (void);
 
 #define __put_user_16(x,addr)								\
 	__asm__ __volatile__ (								\
-		 "\n1:\tst2 %1=%r2\t// %0 gets overwritten by exception handler\n"	\
+		 "\n1:\tst2 %1=%r2%P1\t// %0 gets overwritten by exception handler\n"	\
 		 "2:\n"									\
 		 "\t.section __ex_table,\"a\"\n"					\
 		 "\t\tdata4 @gprel(1b)\n"						\
@@ -238,7 +238,7 @@ extern void __put_user_unknown (void);
 
 #define __put_user_8(x,addr)								\
 	__asm__ __volatile__ (								\
-		 "\n1:\tst1 %1=%r2\t// %0 gets overwritten by exception handler\n"	\
+		 "\n1:\tst1 %1=%r2%P1\t// %0 gets overwritten by exception handler\n"	\
 		 "2:\n"									\
 		 "\t.section __ex_table,\"a\"\n"					\
 		 "\t\tdata4 @gprel(1b)\n"						\
diff --git a/include/asm-ia64/unaligned.h b/include/asm-ia64/unaligned.h
index 6dc82c87e..c9d6dca0e 100644
--- a/include/asm-ia64/unaligned.h
+++ b/include/asm-ia64/unaligned.h
@@ -22,42 +22,42 @@ struct __una_u64 { __u64 x __attribute__((packed)); };
 struct __una_u32 { __u32 x __attribute__((packed)); };
 struct __una_u16 { __u16 x __attribute__((packed)); };
 
-extern inline unsigned long
+static inline unsigned long
 __uldq (const unsigned long * r11)
 {
 	const struct __una_u64 *ptr = (const struct __una_u64 *) r11;
 	return ptr->x;
 }
 
-extern inline unsigned long
+static inline unsigned long
 __uldl (const unsigned int * r11)
 {
 	const struct __una_u32 *ptr = (const struct __una_u32 *) r11;
 	return ptr->x;
 }
 
-extern inline unsigned long
+static inline unsigned long
 __uldw (const unsigned short * r11)
 {
 	const struct __una_u16 *ptr = (const struct __una_u16 *) r11;
 	return ptr->x;
 }
 
-extern inline void
+static inline void
 __ustq (unsigned long r5, unsigned long * r11)
 {
 	struct __una_u64 *ptr = (struct __una_u64 *) r11;
 	ptr->x = r5;
 }
 
-extern inline void
+static inline void
 __ustl (unsigned long r5, unsigned int * r11)
 {
 	struct __una_u32 *ptr = (struct __una_u32 *) r11;
 	ptr->x = r5;
 }
 
-extern inline void
+static inline void
 __ustw (unsigned long r5, unsigned short * r11)
 {
 	struct __una_u16 *ptr = (struct __una_u16 *) r11;
diff --git a/include/asm-ia64/unistd.h b/include/asm-ia64/unistd.h
index 456376e1b..8b13b8f95 100644
--- a/include/asm-ia64/unistd.h
+++ b/include/asm-ia64/unistd.h
@@ -93,7 +93,7 @@
 #define __NR_setpriority		1102
 #define __NR_statfs			1103
 #define __NR_fstatfs			1104
-#define __NR_ioperm			1105
+/* unused; used to be __NR_ioperm */
 #define __NR_semget			1106
 #define __NR_semop			1107
 #define __NR_semctl			1108
diff --git a/include/asm-ia64/unwind.h b/include/asm-ia64/unwind.h
index 60bb46cf9..95285ad99 100644
--- a/include/asm-ia64/unwind.h
+++ b/include/asm-ia64/unwind.h
@@ -52,36 +52,38 @@ struct unw_frame_info {
 	unsigned int flags;
 	short hint;
 	short prev_script;
-	unsigned long bsp;
-	unsigned long sp;		/* stack pointer */
-	unsigned long psp;		/* previous sp */
-	unsigned long ip;		/* instruction pointer */
-	unsigned long pr_val;		/* current predicates */
-	unsigned long *cfm;
+
+	/* current frame info: */
+	unsigned long bsp;		/* backing store pointer value */
+	unsigned long sp;		/* stack pointer value */
+	unsigned long psp;		/* previous sp value */
+	unsigned long ip;		/* instruction pointer value */
+	unsigned long pr;		/* current predicate values */
+	unsigned long *cfm_loc;		/* cfm save location (or NULL) */
 
 	struct task_struct *task;
 	struct switch_stack *sw;
 
 	/* preserved state: */
-	unsigned long *pbsp;		/* previous bsp */
-	unsigned long *bspstore;
-	unsigned long *pfs;
-	unsigned long *rnat;
-	unsigned long *rp;
-	unsigned long *pri_unat;
-	unsigned long *unat;
-	unsigned long *pr;
-	unsigned long *lc;
-	unsigned long *fpsr;
+	unsigned long *bsp_loc;		/* previous bsp save location */
+	unsigned long *bspstore_loc;
+	unsigned long *pfs_loc;
+	unsigned long *rnat_loc;
+	unsigned long *rp_loc;
+	unsigned long *pri_unat_loc;
+	unsigned long *unat_loc;
+	unsigned long *pr_loc;
+	unsigned long *lc_loc;
+	unsigned long *fpsr_loc;
 	struct unw_ireg {
 		unsigned long *loc;
 		struct unw_ireg_nat {
-			int type : 3;		/* enum unw_nat_type */
-			signed int off;		/* NaT word is at loc+nat.off */
+			long type : 3;			/* enum unw_nat_type */
+			signed long off : 61;		/* NaT word is at loc+nat.off */
 		} nat;
 	} r4, r5, r6, r7;
-	unsigned long *b1, *b2, *b3, *b4, *b5;
-	struct ia64_fpreg *f2, *f3, *f4, *f5, *fr[16];
+	unsigned long *b1_loc, *b2_loc, *b3_loc, *b4_loc, *b5_loc;
+	struct ia64_fpreg *f2_loc, *f3_loc, *f4_loc, *f5_loc, *fr_loc[16];
 };
 
 /*
@@ -140,19 +142,56 @@ extern int unw_unwind (struct unw_frame_info *info);
  */
 extern int unw_unwind_to_user (struct unw_frame_info *info);
 
-#define unw_get_ip(info,vp)	({*(vp) = (info)->ip; 0;})
-#define unw_get_sp(info,vp)	({*(vp) = (unsigned long) (info)->sp; 0;})
-#define unw_get_psp(info,vp)	({*(vp) = (unsigned long) (info)->psp; 0;})
-#define unw_get_bsp(info,vp)	({*(vp) = (unsigned long) (info)->bsp; 0;})
-#define unw_get_cfm(info,vp)	({*(vp) = *(info)->cfm; 0;})
-#define unw_set_cfm(info,val)	({*(info)->cfm = (val); 0;})
+#define unw_is_intr_frame(info)	(((info)->flags & UNW_FLAG_INTERRUPT_FRAME) != 0)
+
+static inline unsigned long
+unw_get_ip (struct unw_frame_info *info, unsigned long *valp)
+{
+	*valp = (info)->ip;
+	return 0;
+}
+
+static inline unsigned long
+unw_get_sp (struct unw_frame_info *info, unsigned long *valp)
+{
+	*valp = (info)->sp;
+	return 0;
+}
+
+static inline unsigned long
+unw_get_psp (struct unw_frame_info *info, unsigned long *valp)
+{
+	*valp = (info)->psp;
+	return 0;
+}
+
+static inline unsigned long
+unw_get_bsp (struct unw_frame_info *info, unsigned long *valp)
+{
+	*valp = (info)->bsp;
+	return 0;
+}
+
+static inline unsigned long
+unw_get_cfm (struct unw_frame_info *info, unsigned long *valp)
+{
+	*valp = *(info)->cfm_loc;
+	return 0;
+}
+
+static inline unsigned long
+unw_set_cfm (struct unw_frame_info *info, unsigned long val)
+{
+	*(info)->cfm_loc = val;
+	return 0;
+}
 
 static inline int
 unw_get_rp (struct unw_frame_info *info, unsigned long *val)
 {
-	if (!info->rp)
+	if (!info->rp_loc)
 		return -1;
-	*val = *info->rp;
+	*val = *info->rp_loc;
 	return 0;
 }
 
diff --git a/include/asm-m68k/pgtable.h b/include/asm-m68k/pgtable.h
index bedaecc4e..2e128ff48 100644
--- a/include/asm-m68k/pgtable.h
+++ b/include/asm-m68k/pgtable.h
@@ -399,4 +399,6 @@ extern inline void update_mmu_cache(struct vm_area_struct * vma,
 
 #define io_remap_page_range remap_page_range
 
+#include <asm-generic/pgtable.h>
+
 #endif /* _M68K_PGTABLE_H */
diff --git a/include/asm-mips/hardirq.h b/include/asm-mips/hardirq.h
index eead2fb87..3896706c7 100644
--- a/include/asm-mips/hardirq.h
+++ b/include/asm-mips/hardirq.h
@@ -1,5 +1,4 @@
-/* $Id: hardirq.h,v 1.8 2000/03/02 02:37:13 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -38,8 +37,8 @@ typedef struct {
 #define hardirq_trylock(cpu)	(local_irq_count(cpu) == 0)
 #define hardirq_endlock(cpu)	do { } while (0)
 
-#define irq_enter(cpu)		(local_irq_count(cpu)++)
-#define irq_exit(cpu)		(local_irq_count(cpu)--)
+#define irq_enter(cpu, irq)	(local_irq_count(cpu)++)
+#define irq_exit(cpu, irq)	(local_irq_count(cpu)--)
 
 #define synchronize_irq()	barrier();
 
diff --git a/include/asm-mips/param.h b/include/asm-mips/param.h
index 5487778ca..d4e4c7d73 100644
--- a/include/asm-mips/param.h
+++ b/include/asm-mips/param.h
@@ -64,4 +64,8 @@
 
 #define MAXHOSTNAMELEN	64	/* max length of hostname */
 
+#ifdef __KERNEL__
+# define CLOCKS_PER_SEC	100	/* frequency at which times() counts */
+#endif
+
 #endif /* _ASM_PARAM_H */
diff --git a/include/asm-mips/pgalloc.h b/include/asm-mips/pgalloc.h
index c9600661e..4f8c74dcf 100644
--- a/include/asm-mips/pgalloc.h
+++ b/include/asm-mips/pgalloc.h
@@ -1,5 +1,4 @@
-/* $Id: pgalloc.h,v 1.3 2000/02/23 00:41:38 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -186,31 +185,4 @@ extern inline pmd_t * pmd_alloc(pgd_t * pgd, unsigned long address)
 
 extern int do_check_pgt_cache(int, int);
 
-extern inline void set_pgdir(unsigned long address, pgd_t entry)
-{
-	struct task_struct * p;
-	pgd_t *pgd;
-#ifdef CONFIG_SMP
-	int i;
-#endif	
-
-	read_lock(&tasklist_lock);
-	for_each_task(p) {
-		if (!p->mm)
-			continue;
-		*pgd_offset(p->mm,address) = entry;
-	}
-	read_unlock(&tasklist_lock);
-#ifndef CONFIG_SMP
-	for (pgd = (pgd_t *)pgd_quicklist; pgd; pgd = (pgd_t *)*(unsigned long *)pgd)
-		pgd[address >> PGDIR_SHIFT] = entry;
-#else
-	/* To pgd_alloc/pgd_free, one holds master kernel lock and so does our
-	   callee, so we can modify pgd caches of other CPUs as well. -jj */
-	for (i = 0; i < NR_CPUS; i++)
-		for (pgd = (pgd_t *)cpu_data[i].pgd_quick; pgd; pgd = (pgd_t *)*(unsigned long *)pgd)
-			pgd[address >> PGDIR_SHIFT] = entry;
-#endif
-}
-
 #endif /* _ASM_PGALLOC_H */
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index 5556de9d9..b1d1f1212 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -731,6 +731,8 @@ extern inline void set_context(unsigned long val)
 		: : "r" (val));
 }
 
+#include <asm-generic/pgtable.h>
+
 #endif /* !defined (_LANGUAGE_ASSEMBLY) */
 
 #define io_remap_page_range remap_page_range
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index 022bb1215..7e160259c 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -249,21 +249,11 @@ unsigned long get_wchan(struct task_struct *p);
  * Note that __builtin_return_address(x>=1) is forbidden because GCC
  * aborts compilation on some CPUs.  It's simply not possible to unwind
  * some CPU's stackframes.
- */
-#if (__GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 8))
-/*
+ *
  * __builtin_return_address works only for non-leaf functions.  We avoid the
  * overhead of a function call by forcing the compiler to save the return
  * address register on the stack.
  */
 #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
-#else
-/*
- * __builtin_return_address is not implemented at all.  Calling it
- * will return senseless values.  Return NULL which at least is an obviously
- * senseless value.
- */
-#define return_address() NULL
-#endif
 
 #endif /* _ASM_PROCESSOR_H */
diff --git a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h
index b395fe1be..b361eb1f5 100644
--- a/include/asm-mips/ptrace.h
+++ b/include/asm-mips/ptrace.h
@@ -1,20 +1,22 @@
-/* $Id: ptrace.h,v 1.7 1999/09/28 22:27:17 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1994, 1995, 1996, 1997, 1998 by Ralf Baechle
+ * Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000 by Ralf Baechle
  *
  * Machine dependent structs and defines to help the user use
  * the ptrace system call.
  */
-#ifndef __ASM_MIPS_PTRACE_H
-#define __ASM_MIPS_PTRACE_H
+#ifndef _ASM_PTRACE_H
+#define _ASM_PTRACE_H
 
 #include <asm/isadep.h>
 #include <linux/types.h>
 
+/* MIPS specific ptrace option.  */
+#define PTRACE_SETOPTIONS
+
 /* 0 - 31 are integer registers, 32 - 63 are fp registers.  */
 #define FPR_BASE	32
 #define PC		64
@@ -52,6 +54,19 @@ struct pt_regs {
 
 #endif /* !(_LANGUAGE_ASSEMBLY) */
 
+/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
+/* #define PTRACE_GETREGS		12 */
+/* #define PTRACE_SETREGS		13 */
+/* #define PTRACE_GETFPREGS		14 */
+/* #define PTRACE_SETFPREGS		15 */
+/* #define PTRACE_GETFPXREGS		18 */
+/* #define PTRACE_SETFPXREGS		19 */
+
+#define PTRACE_SETOPTIONS	21
+
+/* options set using PTRACE_SETOPTIONS */
+#define PTRACE_O_TRACESYSGOOD	0x00000001
+
 #ifdef _LANGUAGE_ASSEMBLY
 #include <asm/offset.h>
 #endif
@@ -71,4 +86,4 @@ extern void show_regs(struct pt_regs *);
 
 #endif
 
-#endif /* __ASM_MIPS_PTRACE_H */
+#endif /* _ASM_PTRACE_H */
diff --git a/include/asm-mips/resource.h b/include/asm-mips/resource.h
index 127729ca2..718e983e6 100644
--- a/include/asm-mips/resource.h
+++ b/include/asm-mips/resource.h
@@ -26,14 +26,14 @@
 
 #define RLIM_NLIMITS 11			/* Number of limit flavors.  */
 
-#ifdef __KERNEL__
-
 /*
  * SuS says limits have to be unsigned.
  * Which makes a ton more sense anyway.
  */
 #define RLIM_INFINITY	0x7fffffffUL
 
+#ifdef __KERNEL__
+
 #define INIT_RLIMITS					\
 {							\
 	{ RLIM_INFINITY, RLIM_INFINITY },		\
diff --git a/include/asm-mips64/init.h b/include/asm-mips64/init.h
index fdc132807..34c50b586 100644
--- a/include/asm-mips64/init.h
+++ b/include/asm-mips64/init.h
@@ -15,8 +15,6 @@
 	__arginit __init; \
 	__arginit
 
-#define __initlocaldata  __initdata
-
 /* For assembly routines */
 #define __INIT		.section	.text.init,"ax"
 #define __FINIT		.previous
diff --git a/include/asm-mips64/param.h b/include/asm-mips64/param.h
index 5354eeb7d..81481bfed 100644
--- a/include/asm-mips64/param.h
+++ b/include/asm-mips64/param.h
@@ -29,4 +29,8 @@
 
 #define MAXHOSTNAMELEN	64	/* max length of hostname */
 
+#ifdef __KERNEL__
+# define CLOCKS_PER_SEC	100	/* frequency at which times() counts */
+#endif
+
 #endif /* _ASM_PARAM_H */
diff --git a/include/asm-mips64/pgalloc.h b/include/asm-mips64/pgalloc.h
index d9a766097..198b0bb3b 100644
--- a/include/asm-mips64/pgalloc.h
+++ b/include/asm-mips64/pgalloc.h
@@ -1,5 +1,4 @@
-/* $Id: pgalloc.h,v 1.3 2000/02/24 00:13:20 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -203,10 +202,4 @@ extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address)
 
 extern int do_check_pgt_cache(int, int);
 
-extern inline void set_pgdir(unsigned long address, pgd_t entry)
-{
-	printk("set_pgdir!\n");
-	while(1);
-}
-
 #endif /* _ASM_PGALLOC_H */
diff --git a/include/asm-mips64/pgtable.h b/include/asm-mips64/pgtable.h
index 5c872f673..4874a59e5 100644
--- a/include/asm-mips64/pgtable.h
+++ b/include/asm-mips64/pgtable.h
@@ -780,6 +780,8 @@ extern inline void set_context(unsigned long val)
 		: : "r" (val));
 }
 
+#include <asm-generic/pgtable.h>
+
 #endif /* !defined (_LANGUAGE_ASSEMBLY) */
 
 #endif /* _ASM_PGTABLE_H */
diff --git a/include/asm-mips64/ptrace.h b/include/asm-mips64/ptrace.h
index fcf067d17..773f8a0c0 100644
--- a/include/asm-mips64/ptrace.h
+++ b/include/asm-mips64/ptrace.h
@@ -1,11 +1,10 @@
-/* $Id: ptrace.h,v 1.3 1999/12/04 03:59:12 ralf Exp $
- *
+/*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999 by Ralf Baechle
- * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  */
 #ifndef _ASM_PTRACE_H
 #define _ASM_PTRACE_H
@@ -57,6 +56,19 @@ struct pt_regs {
 
 #endif /* !(_LANGUAGE_ASSEMBLY__) */
 
+/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
+/* #define PTRACE_GETREGS		12 */
+/* #define PTRACE_SETREGS		13 */
+/* #define PTRACE_GETFPREGS		14 */
+/* #define PTRACE_SETFPREGS		15 */
+/* #define PTRACE_GETFPXREGS		18 */
+/* #define PTRACE_SETFPXREGS		19 */
+
+#define PTRACE_SETOPTIONS	21
+
+/* options set using PTRACE_SETOPTIONS */
+#define PTRACE_O_TRACESYSGOOD	0x00000001
+
 #ifdef _LANGUAGE_ASSEMBLY
 #include <asm/offset.h>
 #endif /* (_LANGUAGE_ASSEMBLY__) */
diff --git a/include/asm-ppc/byteorder.h b/include/asm-ppc/byteorder.h
index 0fdd67844..02454f6cf 100644
--- a/include/asm-ppc/byteorder.h
+++ b/include/asm-ppc/byteorder.h
@@ -38,11 +38,7 @@ extern __inline__ void st_le32(volatile unsigned *addr, const unsigned val)
 /* alas, egcs sounds like it has a bug in this code that doesn't use the
    inline asm correctly, and can cause file corruption. Until I hear that
    it's fixed, I can live without the extra speed. I hope. */
-#if !(__GNUC__ >= 2 && __GNUC_MINOR__ >= 90)
 #if 0
-#  define __arch_swab16(x) ld_le16(&x)
-#  define __arch_swab32(x) ld_le32(&x)
-#else
 static __inline__ __const__ __u16 ___arch__swab16(__u16 value)
 {
 	__u16 result;
@@ -68,8 +64,6 @@ static __inline__ __const__ __u32 ___arch__swab32(__u32 value)
 #define __arch__swab16(x) ___arch__swab16(x)
 #endif /* 0 */
 
-#endif
-
 /* The same, but returns converted value from the location pointer by addr. */
 #define __arch__swab16p(addr) ld_le16(addr)
 #define __arch__swab32p(addr) ld_le32(addr)
diff --git a/include/asm-ppc/init.h b/include/asm-ppc/init.h
index a25f6015e..00a1c79cc 100644
--- a/include/asm-ppc/init.h
+++ b/include/asm-ppc/init.h
@@ -3,7 +3,6 @@
 
 #include <linux/init.h>
 
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 90 /* egcs */
 #define __pmac __attribute__ ((__section__ (".text.pmac")))
 #define __pmacdata __attribute__ ((__section__ (".data.pmac")))
 #define __pmacfunc(__argpmac) \
@@ -35,24 +34,4 @@
 	__argopenfirmware __openfirmware; \
 	__argopenfirmware
 	
-#else /* not egcs */
-
-#define __pmac
-#define __pmacdata
-#define __pmacfunc(x) x
-	
-#define __prep
-#define __prepdata
-#define __prepfunc(x) x
-
-#define __apus
-#define __apusdata
-#define __apusfunc(x) x
-
-#define __openfirmware
-#define __openfirmwaredata
-#define __openfirmwarefunc(x) x
-
-#endif /* egcs */
-
 #endif /* _PPC_INIT_H */
diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
index c5a90fba0..27c89e13e 100644
--- a/include/asm-ppc/pgtable.h
+++ b/include/asm-ppc/pgtable.h
@@ -488,6 +488,7 @@ extern void kernel_set_cachemode (unsigned long address, unsigned long size,
 
 #define io_remap_page_range remap_page_range 
 
+#include <asm-generic/pgtable.h>
 
 #endif __ASSEMBLY__
 #endif /* _PPC_PGTABLE_H */
diff --git a/include/asm-s390/pgtable.h b/include/asm-s390/pgtable.h
index d6509ea2f..ae4f3b505 100644
--- a/include/asm-s390/pgtable.h
+++ b/include/asm-s390/pgtable.h
@@ -408,6 +408,8 @@ extern inline void update_mmu_cache(struct vm_area_struct * vma,
 #define module_map      vmalloc
 #define module_unmap    vfree
 
+#include <asm-generic/pgtable.h>
+
 #endif /* !__ASSEMBLY__ */
 
 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
diff --git a/include/asm-sh/pgalloc-2level.h b/include/asm-sh/pgalloc-2level.h
index a106b23a3..a9c9fddc4 100644
--- a/include/asm-sh/pgalloc-2level.h
+++ b/include/asm-sh/pgalloc-2level.h
@@ -5,15 +5,15 @@
  * traditional two-level paging, page table allocation routines:
  */
 
-extern __inline__ pmd_t *get_pmd_fast(void)
+static __inline__ pmd_t *get_pmd_fast(void)
 {
 	return (pmd_t *)0;
 }
 
-extern __inline__ void free_pmd_fast(pmd_t *pmd) { }
-extern __inline__ void free_pmd_slow(pmd_t *pmd) { }
+static __inline__ void free_pmd_fast(pmd_t *pmd) { }
+static __inline__ void free_pmd_slow(pmd_t *pmd) { }
 
-extern inline pmd_t * pmd_alloc(pgd_t *pgd, unsigned long address)
+static __inline__ pmd_t * pmd_alloc(pgd_t *pgd, unsigned long address)
 {
 	if (!pgd)
 		BUG();
diff --git a/include/asm-sh/pgalloc.h b/include/asm-sh/pgalloc.h
index 0b728aee3..5984937fa 100644
--- a/include/asm-sh/pgalloc.h
+++ b/include/asm-sh/pgalloc.h
@@ -3,6 +3,7 @@
 
 #include <asm/processor.h>
 #include <linux/threads.h>
+#include <linux/slab.h>
 
 #define pgd_quicklist (current_cpu_data.pgd_quick)
 #define pmd_quicklist ((unsigned long *)0)
@@ -17,18 +18,18 @@
  * if any.
  */
 
-extern __inline__ pgd_t *get_pgd_slow(void)
+static __inline__ pgd_t *get_pgd_slow(void)
 {
-	pgd_t *ret = (pgd_t *)__get_free_page(GFP_KERNEL);
+	unsigned int pgd_size = (USER_PTRS_PER_PGD * sizeof(pgd_t));
+	pgd_t *ret = (pgd_t *)kmalloc(pgd_size, GFP_KERNEL);
+
+	if (ret)
+		memset(ret, 0, pgd_size);
 
-	if (ret) {
-		memset(ret, 0, USER_PTRS_PER_PGD * sizeof(pgd_t));
-		memcpy(ret + USER_PTRS_PER_PGD, swapper_pg_dir + USER_PTRS_PER_PGD, (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
-	}
 	return ret;
 }
 
-extern __inline__ pgd_t *get_pgd_fast(void)
+static __inline__ pgd_t *get_pgd_fast(void)
 {
 	unsigned long *ret;
 
@@ -41,22 +42,22 @@ extern __inline__ pgd_t *get_pgd_fast(void)
 	return (pgd_t *)ret;
 }
 
-extern __inline__ void free_pgd_fast(pgd_t *pgd)
+static __inline__ void free_pgd_fast(pgd_t *pgd)
 {
 	*(unsigned long *)pgd = (unsigned long) pgd_quicklist;
 	pgd_quicklist = (unsigned long *) pgd;
 	pgtable_cache_size++;
 }
 
-extern __inline__ void free_pgd_slow(pgd_t *pgd)
+static __inline__ void free_pgd_slow(pgd_t *pgd)
 {
-	free_page((unsigned long)pgd);
+	kfree(pgd);
 }
 
 extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long address_preadjusted);
 extern pte_t *get_pte_kernel_slow(pmd_t *pmd, unsigned long address_preadjusted);
 
-extern __inline__ pte_t *get_pte_fast(void)
+static __inline__ pte_t *get_pte_fast(void)
 {
 	unsigned long *ret;
 
@@ -68,14 +69,14 @@ extern __inline__ pte_t *get_pte_fast(void)
 	return (pte_t *)ret;
 }
 
-extern __inline__ void free_pte_fast(pte_t *pte)
+static __inline__ void free_pte_fast(pte_t *pte)
 {
 	*(unsigned long *)pte = (unsigned long) pte_quicklist;
 	pte_quicklist = (unsigned long *) pte;
 	pgtable_cache_size++;
 }
 
-extern __inline__ void free_pte_slow(pte_t *pte)
+static __inline__ void free_pte_slow(pte_t *pte)
 {
 	free_page((unsigned long)pte);
 }
@@ -85,7 +86,7 @@ extern __inline__ void free_pte_slow(pte_t *pte)
 #define pgd_free(pgd)	   free_pgd_slow(pgd)
 #define pgd_alloc()	     get_pgd_fast()
 
-extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address)
+static __inline__ pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address)
 {
 	if (!pmd)
 		BUG();
@@ -105,7 +106,7 @@ extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address)
 	return (pte_t *) pmd_page(*pmd) + address;
 }
 
-extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long address)
+static __inline__ pte_t * pte_alloc(pmd_t * pmd, unsigned long address)
 {
 	address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
 
@@ -132,7 +133,7 @@ fix:
  * allocating and freeing a pmd is trivial: the 1-entry pmd is
  * inside the pgd, so has no extra memory associated with it.
  */
-extern inline void pmd_free(pmd_t * pmd)
+static __inline__ void pmd_free(pmd_t * pmd)
 {
 }
 
@@ -141,22 +142,6 @@ extern inline void pmd_free(pmd_t * pmd)
 
 extern int do_check_pgt_cache(int, int);
 
-extern inline void set_pgdir(unsigned long address, pgd_t entry)
-{
-	struct task_struct * p;
-	pgd_t *pgd;
-
-	read_lock(&tasklist_lock);
-	for_each_task(p) {
-		if (!p->mm)
-			continue;
-		*pgd_offset(p->mm,address) = entry;
-	}
-	read_unlock(&tasklist_lock);
-	for (pgd = (pgd_t *)pgd_quicklist; pgd; pgd = (pgd_t *)*(unsigned long *)pgd)
-		pgd[address >> PGDIR_SHIFT] = entry;
-}
-
 /*
  * TLB flushing:
  *
@@ -174,8 +159,9 @@ extern void flush_tlb_mm(struct mm_struct *mm);
 extern void flush_tlb_range(struct mm_struct *mm, unsigned long start,
 			    unsigned long end);
 extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long page);
-extern inline void flush_tlb_pgtables(struct mm_struct *mm,
-				      unsigned long start, unsigned long end)
+
+static __inline__ void flush_tlb_pgtables(struct mm_struct *mm,
+					  unsigned long start, unsigned long end)
 {
 }
 
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index f84b7904a..323b7eb7c 100644
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -257,6 +257,8 @@ extern void update_mmu_cache(struct vm_area_struct * vma,
 #define module_map      vmalloc
 #define module_unmap    vfree
 
+#include <asm-generic/pgtable.h>
+
 #endif /* !__ASSEMBLY__ */
 
 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
diff --git a/include/asm-sparc/audioio.h b/include/asm-sparc/audioio.h
index ed50485d2..d0c2ae9b3 100644
--- a/include/asm-sparc/audioio.h
+++ b/include/asm-sparc/audioio.h
@@ -428,7 +428,6 @@ extern int register_sparcaudio_driver(struct sparcaudio_driver *, int);
 extern int unregister_sparcaudio_driver(struct sparcaudio_driver *, int);
 extern void sparcaudio_output_done(struct sparcaudio_driver *, int);
 extern void sparcaudio_input_done(struct sparcaudio_driver *, int);
-extern int sparcaudio_init(void);
 extern int amd7930_init(void);
 extern int cs4231_init(void);
 extern int dbri_init(void);
diff --git a/include/asm-sparc/fcntl.h b/include/asm-sparc/fcntl.h
index d481e7b27..00e5e5b4c 100644
--- a/include/asm-sparc/fcntl.h
+++ b/include/asm-sparc/fcntl.h
@@ -1,4 +1,4 @@
-/* $Id: fcntl.h,v 1.14 2000/08/12 20:49:49 jj Exp $ */
+/* $Id: fcntl.h,v 1.15 2000/09/23 02:09:21 davem Exp $ */
 #ifndef _SPARC_FCNTL_H
 #define _SPARC_FCNTL_H
 
diff --git a/include/asm-sparc/page.h b/include/asm-sparc/page.h
index e6373384f..603a51999 100644
--- a/include/asm-sparc/page.h
+++ b/include/asm-sparc/page.h
@@ -1,4 +1,4 @@
-/* $Id: page.h,v 1.54 2000/08/10 01:04:53 davem Exp $
+/* $Id: page.h,v 1.55 2000/10/30 21:01:41 davem Exp $
  * page.h:  Various defines and such for MMU operations on the Sparc for
  *          the Linux kernel.
  *
@@ -38,7 +38,6 @@
  * this so lets disable it. - Anton
  */
 #if 0
-/* #if (__GNUC__ > 2) || (__GNUC__ == 2 && __GNUC_MINOR__ >= 8) */
 /* We need the mb()'s so we don't trigger a compiler bug - Anton */
 #define BUG() do { \
 	mb(); \
diff --git a/include/asm-sparc/param.h b/include/asm-sparc/param.h
index 3fef0c05e..fdb5d160d 100644
--- a/include/asm-sparc/param.h
+++ b/include/asm-sparc/param.h
@@ -1,4 +1,4 @@
-/* $Id: param.h,v 1.3 1995/11/25 02:32:18 davem Exp $ */
+/* $Id: param.h,v 1.4 2000/10/30 21:01:41 davem Exp $ */
 #ifndef _ASMSPARC_PARAM_H
 #define _ASMSPARC_PARAM_H
 
@@ -21,4 +21,8 @@
 
 #define MAXHOSTNAMELEN	64	/* max length of hostname */
 
+#ifdef __KERNEL__
+# define CLOCKS_PER_SEC	HZ	/* frequency at which times() counts */
+#endif
+
 #endif
diff --git a/include/asm-sparc/pgalloc.h b/include/asm-sparc/pgalloc.h
index 180709c85..167387e5b 100644
--- a/include/asm-sparc/pgalloc.h
+++ b/include/asm-sparc/pgalloc.h
@@ -1,4 +1,4 @@
-/* $Id: pgalloc.h,v 1.9 2000/08/01 04:53:58 anton Exp $ */
+/* $Id: pgalloc.h,v 1.11 2000/10/16 14:32:49 anton Exp $ */
 #ifndef _SPARC_PGALLOC_H
 #define _SPARC_PGALLOC_H
 
@@ -139,8 +139,4 @@ BTFIXUPDEF_CALL(pgd_t *, pgd_alloc, void)
 #define pgd_free(pgd) BTFIXUP_CALL(pgd_free)(pgd)
 #define pgd_alloc() BTFIXUP_CALL(pgd_alloc)()
 
-BTFIXUPDEF_CALL(void, set_pgdir, unsigned long, pgd_t)
-
-#define set_pgdir(address,entry) BTFIXUP_CALL(set_pgdir)(address,entry)
-
 #endif /* _SPARC64_PGALLOC_H */
diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h
index 8562fc287..251ff01da 100644
--- a/include/asm-sparc/pgtable.h
+++ b/include/asm-sparc/pgtable.h
@@ -1,4 +1,4 @@
-/* $Id: pgtable.h,v 1.102 2000/08/14 00:46:13 anton Exp $ */
+/* $Id: pgtable.h,v 1.105 2000/10/30 21:01:41 davem Exp $ */
 #ifndef _SPARC_PGTABLE_H
 #define _SPARC_PGTABLE_H
 
@@ -88,18 +88,9 @@ BTFIXUPDEF_SIMM13(user_ptrs_per_pgd)
 
 #define VMALLOC_VMADDR(x) ((unsigned long)(x))
 
-#if (__GNUC__ > 2) || (__GNUC__ == 2 && __GNUC_MINOR__ >= 8)
 #define pte_ERROR(e)   __builtin_trap()
 #define pmd_ERROR(e)   __builtin_trap()
 #define pgd_ERROR(e)   __builtin_trap()
-#else
-#define pte_ERROR(e) \
-	printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
-#define pmd_ERROR(e) \
-	printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
-#define pgd_ERROR(e) \
-	printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
-#endif
 
 BTFIXUPDEF_INT(page_none)
 BTFIXUPDEF_INT(page_shared)
@@ -321,8 +312,10 @@ BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_io, unsigned long, pgprot_t, int)
 #define mk_pte_io(page,pgprot,space) BTFIXUP_CALL(mk_pte_io)(page,pgprot,space)
 
 BTFIXUPDEF_CALL(void, pgd_set, pgd_t *, pmd_t *)
+BTFIXUPDEF_CALL(void, pmd_set, pmd_t *, pte_t *)
 
 #define pgd_set(pgdp,pmdp) BTFIXUP_CALL(pgd_set)(pgdp,pmdp)
+#define pmd_set(pmdp,ptep) BTFIXUP_CALL(pmd_set)(pmdp,ptep)
 
 BTFIXUPDEF_INT(pte_modify_mask)
 
@@ -455,6 +448,8 @@ extern unsigned long *sparc_valid_addr_bitmap;
 extern int io_remap_page_range(unsigned long from, unsigned long to,
 			       unsigned long size, pgprot_t prot, int space);
 
+#include <asm-generic/pgtable.h>
+
 #endif /* !(__ASSEMBLY__) */
 
 /* We provide our own get_unmapped_area to cope with VA holes for userland */
diff --git a/include/asm-sparc/resource.h b/include/asm-sparc/resource.h
index 24cca3ba1..8237763e5 100644
--- a/include/asm-sparc/resource.h
+++ b/include/asm-sparc/resource.h
@@ -1,4 +1,4 @@
-/* $Id: resource.h,v 1.11 1999/12/15 17:51:59 jj Exp $
+/* $Id: resource.h,v 1.12 2000/09/23 02:09:21 davem Exp $
  * resource.h: Resource definitions.
  *
  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/smp.h b/include/asm-sparc/smp.h
index 5f7040345..f6504165d 100644
--- a/include/asm-sparc/smp.h
+++ b/include/asm-sparc/smp.h
@@ -93,6 +93,12 @@ extern __inline__ void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg
 			   unsigned long arg3, unsigned long arg4, unsigned long arg5)
 { smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); }
 
+extern __inline__ int smp_call_function(void (*func)(void *info), void *info, int nonatomic, int wait)
+{
+	xc1((smpfunc_t)func, (unsigned long)info);
+	return 0;
+}
+
 extern __volatile__ int __cpu_number_map[NR_CPUS];
 extern __volatile__ int __cpu_logical_map[NR_CPUS];
 extern unsigned long smp_proc_in_lock[NR_CPUS];
diff --git a/include/asm-sparc64/atomic.h b/include/asm-sparc64/atomic.h
index 2461ec29d..1a6cc2bfc 100644
--- a/include/asm-sparc64/atomic.h
+++ b/include/asm-sparc64/atomic.h
@@ -1,4 +1,4 @@
-/* $Id: atomic.h,v 1.20 2000/03/16 16:44:44 davem Exp $
+/* $Id: atomic.h,v 1.21 2000/10/03 07:28:56 anton Exp $
  * atomic.h: Thankfully the V9 is at least reasonable for this
  *           stuff.
  *
diff --git a/include/asm-sparc64/audioio.h b/include/asm-sparc64/audioio.h
index fc5458949..984b7c796 100644
--- a/include/asm-sparc64/audioio.h
+++ b/include/asm-sparc64/audioio.h
@@ -428,7 +428,6 @@ extern int register_sparcaudio_driver(struct sparcaudio_driver *, int);
 extern int unregister_sparcaudio_driver(struct sparcaudio_driver *, int);
 extern void sparcaudio_output_done(struct sparcaudio_driver *, int);
 extern void sparcaudio_input_done(struct sparcaudio_driver *, int);
-extern int sparcaudio_init(void);
 extern int amd7930_init(void);
 extern int cs4231_init(void);
 
diff --git a/include/asm-sparc64/envctrl.h b/include/asm-sparc64/envctrl.h
index 1b5e4da9c..e16de8fb2 100644
--- a/include/asm-sparc64/envctrl.h
+++ b/include/asm-sparc64/envctrl.h
@@ -1,17 +1,101 @@
-/* $Id: envctrl.h,v 1.1 1998/05/16 17:26:07 ecd Exp $
+/* $Id: envctrl.h,v 1.2 2000/10/17 16:20:36 davem Exp $
  *
  * envctrl.h: Definitions for access to the i2c environment
  *            monitoring on Ultrasparc systems.
  *
  * Copyright (C) 1998  Eddie C. Dost  (ecd@skynet.be)
+ * Copyright (C) 2000  Vinh Truong  (vinh.truong@eng.sun.com)
+ * VT - Add all ioctl commands and environment status definitions 
+ * VT - Add application note 
  */
-
 #ifndef _SPARC64_ENVCTRL_H
 #define _SPARC64_ENVCTRL_H 1
 
 #include <linux/ioctl.h>
 
-#define I2CIOCSADR _IOW('p', 0x40, int)
-#define I2CIOCGADR _IOR('p', 0x41, int)
+/* Application note:
+ *
+ * The driver supports 4 operations: open(), close(), ioctl(), read()
+ * The device name is /dev/envctrl.
+ * Below is sample usage:
+ *
+ *	fd = open("/dev/envtrl", O_RDONLY);
+ *	if (ioctl(fd, ENVCTRL_READ_SHUTDOWN_TEMPERATURE, 0) < 0)
+ *		printf("error\n");
+ *	ret = read(fd, buf, 10);
+ *	close(fd);
+ *
+ * Notice in the case of cpu voltage and temperature, the default is
+ * cpu0.  If we need to know the info of cpu1, cpu2, cpu3, we need to
+ * pass in cpu number in ioctl() last parameter.  For example, to
+ * get the voltage of cpu2:
+ *
+ *	ioctlbuf[0] = 2;
+ *	if (ioctl(fd, ENVCTRL_READ_CPU_VOLTAGE, ioctlbuf) < 0)
+ *		printf("error\n");
+ *	ret = read(fd, buf, 10);
+ *
+ * All the return values are in ascii.  So check read return value
+ * and do appropriate conversions in your application.
+ */
+
+/* IOCTL commands */
+
+/* Note: these commands reflect possible monitor features.
+ * Some boards choose to support some of the features only.
+ */
+#define ENVCTRL_RD_CPU_TEMPERATURE	_IOR('p', 0x40, int)
+#define ENVCTRL_RD_CPU_VOLTAGE		_IOR('p', 0x41, int)
+#define ENVCTRL_RD_FAN_STATUS		_IOR('p', 0x42, int)
+#define ENVCTRL_RD_WARNING_TEMPERATURE	_IOR('p', 0x43, int)
+#define ENVCTRL_RD_SHUTDOWN_TEMPERATURE	_IOR('p', 0x44, int)
+#define ENVCTRL_RD_VOLTAGE_STATUS	_IOR('p', 0x45, int)
+#define ENVCTRL_RD_SCSI_TEMPERATURE	_IOR('p', 0x46, int)
+#define ENVCTRL_RD_ETHERNET_TEMPERATURE	_IOR('p', 0x47, int)
+#define ENVCTRL_RD_MTHRBD_TEMPERATURE	_IOR('p', 0x48, int)
+
+/* Read return values for a voltage status request. */
+#define ENVCTRL_VOLTAGE_POWERSUPPLY_GOOD	0x01
+#define ENVCTRL_VOLTAGE_BAD			0x02
+#define ENVCTRL_POWERSUPPLY_BAD			0x03
+#define ENVCTRL_VOLTAGE_POWERSUPPLY_BAD		0x04
+
+/* Read return values for a fan status request.
+ * A failure match means either the fan fails or
+ * the fan is not connected.  Some boards have optional
+ * connectors to connect extra fans.
+ *
+ * There are maximum 8 monitor fans.  Some are cpu fans
+ * some are system fans.  The mask below only indicates
+ * fan by order number.
+ * Below is a sample application:
+ *
+ *	if (ioctl(fd, ENVCTRL_READ_FAN_STATUS, 0) < 0) {
+ *		printf("ioctl fan failed\n");
+ *	}
+ *	if (read(fd, rslt, 1) <= 0) {
+ *		printf("error or fan not monitored\n");
+ *	} else {
+ *		if (rslt[0] == ENVCTRL_ALL_FANS_GOOD) {
+ *			printf("all fans good\n");
+ *	} else if (rslt[0] == ENVCTRL_ALL_FANS_BAD) {
+ *		printf("all fans bad\n");
+ *	} else {
+ *		if (rslt[0] & ENVCTRL_FAN0_FAILURE_MASK) {
+ *			printf("fan 0 failed or not connected\n");
+ *	}
+ *	......
+ */  
+
+#define ENVCTRL_ALL_FANS_GOOD			0x00
+#define ENVCTRL_FAN0_FAILURE_MASK		0x01
+#define ENVCTRL_FAN1_FAILURE_MASK		0x02
+#define ENVCTRL_FAN2_FAILURE_MASK		0x04
+#define ENVCTRL_FAN3_FAILURE_MASK		0x08
+#define ENVCTRL_FAN4_FAILURE_MASK		0x10
+#define ENVCTRL_FAN5_FAILURE_MASK		0x20
+#define ENVCTRL_FAN6_FAILURE_MASK		0x40
+#define ENVCTRL_FAN7_FAILURE_MASK		0x80
+#define ENVCTRL_ALL_FANS_BAD 			0xFF
 
 #endif /* !(_SPARC64_ENVCTRL_H) */
diff --git a/include/asm-sparc64/fcntl.h b/include/asm-sparc64/fcntl.h
index e485ed45f..5b119bc78 100644
--- a/include/asm-sparc64/fcntl.h
+++ b/include/asm-sparc64/fcntl.h
@@ -1,4 +1,4 @@
-/* $Id: fcntl.h,v 1.10 2000/08/12 20:49:49 jj Exp $ */
+/* $Id: fcntl.h,v 1.11 2000/09/23 02:09:21 davem Exp $ */
 #ifndef _SPARC64_FCNTL_H
 #define _SPARC64_FCNTL_H
 
diff --git a/include/asm-sparc64/param.h b/include/asm-sparc64/param.h
index 51affe3e5..89ed7ea78 100644
--- a/include/asm-sparc64/param.h
+++ b/include/asm-sparc64/param.h
@@ -1,4 +1,4 @@
-/* $Id: param.h,v 1.1 1996/12/02 00:08:24 davem Exp $ */
+/* $Id: param.h,v 1.2 2000/10/30 21:01:41 davem Exp $ */
 #ifndef _ASMSPARC64_PARAM_H
 #define _ASMSPARC64_PARAM_H
 
@@ -21,4 +21,8 @@
 
 #define MAXHOSTNAMELEN	64	/* max length of hostname */
 
+#ifdef __KERNEL__
+# define CLOCKS_PER_SEC	HZ	/* frequency at which times() counts */
+#endif
+
 #endif /* _ASMSPARC64_PARAM_H */
diff --git a/include/asm-sparc64/pgalloc.h b/include/asm-sparc64/pgalloc.h
index b81b9cee4..be3dde29c 100644
--- a/include/asm-sparc64/pgalloc.h
+++ b/include/asm-sparc64/pgalloc.h
@@ -304,7 +304,4 @@ extern inline pmd_t * pmd_alloc(pgd_t *pgd, unsigned long address)
 
 extern int do_check_pgt_cache(int, int);
 
-/* Nothing to do on sparc64 :) */
-#define set_pgdir(address, entry)	do { } while(0)
-
 #endif /* _SPARC64_PGALLOC_H */
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h
index 070fb31db..62c4c4ef4 100644
--- a/include/asm-sparc64/pgtable.h
+++ b/include/asm-sparc64/pgtable.h
@@ -1,4 +1,4 @@
-/* $Id: pgtable.h,v 1.131 2000/08/11 03:00:14 davem Exp $
+/* $Id: pgtable.h,v 1.132 2000/10/19 00:50:16 davem Exp $
  * pgtable.h: SpitFire page table operations.
  *
  * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu)
@@ -295,6 +295,8 @@ extern unsigned long *sparc64_valid_addr_bitmap;
 extern int io_remap_page_range(unsigned long from, unsigned long offset,
 			       unsigned long size, pgprot_t prot, int space);
 
+#include <asm-generic/pgtable.h>
+
 #endif /* !(__ASSEMBLY__) */
 
 /* We provide our own get_unmapped_area to cope with VA holes for userland */
diff --git a/include/asm-sparc64/posix_types.h b/include/asm-sparc64/posix_types.h
index e486344ad..9ee6edf87 100644
--- a/include/asm-sparc64/posix_types.h
+++ b/include/asm-sparc64/posix_types.h
@@ -7,14 +7,8 @@
  * assume GCC is being used.
  */
 
-#if (__GNUC__ > 2) || (__GNUC_MINOR__ >= 8)
-typedef unsigned long int      __kernel_size_t;
-typedef long int               __kernel_ssize_t;
-#else
-typedef unsigned long long     __kernel_size_t;
-typedef long long              __kernel_ssize_t;
-#endif
-
+typedef unsigned long          __kernel_size_t;
+typedef long                   __kernel_ssize_t;
 typedef long                   __kernel_ptrdiff_t;
 typedef long                   __kernel_time_t;
 typedef long                   __kernel_clock_t;
diff --git a/include/asm-sparc64/resource.h b/include/asm-sparc64/resource.h
index 658637fbc..06150c09f 100644
--- a/include/asm-sparc64/resource.h
+++ b/include/asm-sparc64/resource.h
@@ -1,4 +1,4 @@
-/* $Id: resource.h,v 1.7 1999/12/15 17:52:08 jj Exp $
+/* $Id: resource.h,v 1.8 2000/09/23 02:09:21 davem Exp $
  * resource.h: Resource definitions.
  *
  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h
index 04667b185..f24ff8415 100644
--- a/include/asm-sparc64/spitfire.h
+++ b/include/asm-sparc64/spitfire.h
@@ -1,4 +1,4 @@
-/* $Id: spitfire.h,v 1.9 1998/04/28 08:23:33 davem Exp $
+/* $Id: spitfire.h,v 1.10 2000/10/06 13:10:29 anton Exp $
  * spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations.
  *
  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
@@ -117,6 +117,7 @@ extern __inline__ void spitfire_put_dcache_tag(unsigned long addr, unsigned long
 	__asm__ __volatile__("stxa	%0, [%1] %2"
 			     : /* No outputs */
 			     : "r" (tag), "r" (addr), "i" (ASI_DCACHE_TAG));
+	membar("#Sync");
 }
 
 /* The instruction cache lines are flushed with this, but note that
diff --git a/include/asm-sparc64/string.h b/include/asm-sparc64/string.h
index 337b61784..330b9c482 100644
--- a/include/asm-sparc64/string.h
+++ b/include/asm-sparc64/string.h
@@ -1,4 +1,4 @@
-/* $Id: string.h,v 1.17 2000/06/19 06:24:58 davem Exp $
+/* $Id: string.h,v 1.18 2000/10/30 21:01:41 davem Exp $
  * string.h: External definitions for optimized assembly string
  *           routines for the Linux Kernel.
  *
@@ -110,18 +110,7 @@ static inline void *__constant_memset(void *s, int c, __kernel_size_t count)
 #define __HAVE_ARCH_STRLEN
 
 extern __kernel_size_t __strlen(const char *);
-
-#if (__GNUC__ > 2) || (__GNUC__ == 2 && __GNUC_MINOR__ >= 91)
 extern __kernel_size_t strlen(const char *);
-#else /* !EGCS */
-/* Ugly but it works around a bug in our original sparc64-linux-gcc.  */
-#undef strlen
-#define strlen(__arg0)					\
-({	int __strlen_res = __strlen(__arg0) + 1;	\
-	__strlen_res -= 1;				\
-	__strlen_res;					\
-})
-#endif /* !EGCS */
 
 #define __HAVE_ARCH_STRNCMP
 
diff --git a/include/linux/auto_fs4.h b/include/linux/auto_fs4.h
index 52ff6d8a3..99aa24761 100644
--- a/include/linux/auto_fs4.h
+++ b/include/linux/auto_fs4.h
@@ -1,4 +1,4 @@
-/* -*- c-mode -*-
+/* -*- c -*-
  * linux/include/linux/auto_fs4.h
  *
  * Copyright 1999-2000 Jeremy Fitzhardinge <jeremy@goop.org>
diff --git a/include/linux/bootmem.h b/include/linux/bootmem.h
index 359905839..6560f2901 100644
--- a/include/linux/bootmem.h
+++ b/include/linux/bootmem.h
@@ -8,6 +8,7 @@
 #include <asm/dma.h>
 #include <linux/cache.h>
 #include <linux/init.h>
+#include <linux/mmzone.h>
 
 /*
  *  simple boot-time physical memory area allocator.
@@ -43,16 +44,16 @@ extern void * __init __alloc_bootmem (unsigned long size, unsigned long align, u
 	__alloc_bootmem((x), PAGE_SIZE, 0)
 extern unsigned long __init free_all_bootmem (void);
 
-extern unsigned long __init init_bootmem_node (int nid, unsigned long freepfn, unsigned long startpfn, unsigned long endpfn);
-extern void __init reserve_bootmem_node (int nid, unsigned long physaddr, unsigned long size);
-extern void __init free_bootmem_node (int nid, unsigned long addr, unsigned long size);
-extern unsigned long __init free_all_bootmem_node (int nid);
-extern void * __init __alloc_bootmem_node (int nid, unsigned long size, unsigned long align, unsigned long goal);
-#define alloc_bootmem_node(nid, x) \
-	__alloc_bootmem_node((nid), (x), SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS))
-#define alloc_bootmem_pages_node(nid, x) \
-	__alloc_bootmem_node((nid), (x), PAGE_SIZE, __pa(MAX_DMA_ADDRESS))
-#define alloc_bootmem_low_pages_node(nid, x) \
-	__alloc_bootmem_node((nid), (x), PAGE_SIZE, 0)
+extern unsigned long __init init_bootmem_node (pg_data_t *pgdat, unsigned long freepfn, unsigned long startpfn, unsigned long endpfn);
+extern void __init reserve_bootmem_node (pg_data_t *pgdat, unsigned long physaddr, unsigned long size);
+extern void __init free_bootmem_node (pg_data_t *pgdat, unsigned long addr, unsigned long size);
+extern unsigned long __init free_all_bootmem_node (pg_data_t *pgdat);
+extern void * __init __alloc_bootmem_node (pg_data_t *pgdat, unsigned long size, unsigned long align, unsigned long goal);
+#define alloc_bootmem_node(pgdat, x) \
+	__alloc_bootmem_node((pgdat), (x), SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS))
+#define alloc_bootmem_pages_node(pgdat, x) \
+	__alloc_bootmem_node((pgdat), (x), PAGE_SIZE, __pa(MAX_DMA_ADDRESS))
+#define alloc_bootmem_low_pages_node(pgdat, x) \
+	__alloc_bootmem_node((pgdat), (x), PAGE_SIZE, 0)
 
 #endif /* _LINUX_BOOTMEM_H */
diff --git a/include/linux/byteorder/big_endian.h b/include/linux/byteorder/big_endian.h
index ebd81c013..b84efd74c 100644
--- a/include/linux/byteorder/big_endian.h
+++ b/include/linux/byteorder/big_endian.h
@@ -14,12 +14,12 @@
 #define __constant_ntohl(x) ((__u32)(x))
 #define __constant_htons(x) ((__u16)(x))
 #define __constant_ntohs(x) ((__u16)(x))
-#define __constant_cpu_to_le64(x) ___swab64((x))
-#define __constant_le64_to_cpu(x) ___swab64((x))
-#define __constant_cpu_to_le32(x) ___swab32((x))
-#define __constant_le32_to_cpu(x) ___swab32((x))
-#define __constant_cpu_to_le16(x) ___swab16((x))
-#define __constant_le16_to_cpu(x) ___swab16((x))
+#define __constant_cpu_to_le64(x) ___constant_swab64((x))
+#define __constant_le64_to_cpu(x) ___constant_swab64((x))
+#define __constant_cpu_to_le32(x) ___constant_swab32((x))
+#define __constant_le32_to_cpu(x) ___constant_swab32((x))
+#define __constant_cpu_to_le16(x) ___constant_swab16((x))
+#define __constant_le16_to_cpu(x) ___constant_swab16((x))
 #define __constant_cpu_to_be64(x) ((__u64)(x))
 #define __constant_be64_to_cpu(x) ((__u64)(x))
 #define __constant_cpu_to_be32(x) ((__u32)(x))
diff --git a/include/linux/byteorder/little_endian.h b/include/linux/byteorder/little_endian.h
index 5a5412403..143166362 100644
--- a/include/linux/byteorder/little_endian.h
+++ b/include/linux/byteorder/little_endian.h
@@ -10,22 +10,22 @@
 
 #include <linux/byteorder/swab.h>
 
-#define __constant_htonl(x) ___swab32((x))
-#define __constant_ntohl(x) ___swab32((x))
-#define __constant_htons(x) ___swab16((x))
-#define __constant_ntohs(x) ___swab16((x))
+#define __constant_htonl(x) ___constant_swab32((x))
+#define __constant_ntohl(x) ___constant_swab32((x))
+#define __constant_htons(x) ___constant_swab16((x))
+#define __constant_ntohs(x) ___constant_swab16((x))
 #define __constant_cpu_to_le64(x) ((__u64)(x))
 #define __constant_le64_to_cpu(x) ((__u64)(x))
 #define __constant_cpu_to_le32(x) ((__u32)(x))
 #define __constant_le32_to_cpu(x) ((__u32)(x))
 #define __constant_cpu_to_le16(x) ((__u16)(x))
 #define __constant_le16_to_cpu(x) ((__u16)(x))
-#define __constant_cpu_to_be64(x) ___swab64((x))
-#define __constant_be64_to_cpu(x) ___swab64((x))
-#define __constant_cpu_to_be32(x) ___swab32((x))
-#define __constant_be32_to_cpu(x) ___swab32((x))
-#define __constant_cpu_to_be16(x) ___swab16((x))
-#define __constant_be16_to_cpu(x) ___swab16((x))
+#define __constant_cpu_to_be64(x) ___constant_swab64((x))
+#define __constant_be64_to_cpu(x) ___constant_swab64((x))
+#define __constant_cpu_to_be32(x) ___constant_swab32((x))
+#define __constant_be32_to_cpu(x) ___constant_swab32((x))
+#define __constant_cpu_to_be16(x) ___constant_swab16((x))
+#define __constant_be16_to_cpu(x) ___constant_swab16((x))
 #define __cpu_to_le64(x) ((__u64)(x))
 #define __le64_to_cpu(x) ((__u64)(x))
 #define __cpu_to_le32(x) ((__u32)(x))
diff --git a/include/linux/byteorder/pdp_endian.h b/include/linux/byteorder/pdp_endian.h
index 90f8c7433..618631cbc 100644
--- a/include/linux/byteorder/pdp_endian.h
+++ b/include/linux/byteorder/pdp_endian.h
@@ -30,22 +30,22 @@
 #include <linux/byteorder/swab.h>
 #include <linux/byteorder/swabb.h>
 
-#define __constant_htonl(x) ___swahb32((x))
-#define __constant_ntohl(x) ___swahb32((x))
-#define __constant_htons(x) ___swab16((x))
-#define __constant_ntohs(x) ___swab16((x))
+#define __constant_htonl(x) ___constant_swahb32((x))
+#define __constant_ntohl(x) ___constant_swahb32((x))
+#define __constant_htons(x) ___constant_swab16((x))
+#define __constant_ntohs(x) ___constant_swab16((x))
 #define __constant_cpu_to_le64(x) I DON'T KNOW
 #define __constant_le64_to_cpu(x) I DON'T KNOW
-#define __constant_cpu_to_le32(x) ___swahw32((x))
-#define __constant_le32_to_cpu(x) ___swahw32((x))
+#define __constant_cpu_to_le32(x) ___constant_swahw32((x))
+#define __constant_le32_to_cpu(x) ___constant_swahw32((x))
 #define __constant_cpu_to_le16(x) ((__u16)(x)
 #define __constant_le16_to_cpu(x) ((__u16)(x)
 #define __constant_cpu_to_be64(x) I DON'T KNOW
 #define __constant_be64_to_cpu(x) I DON'T KNOW
-#define __constant_cpu_to_be32(x) ___swahb32((x))
-#define __constant_be32_to_cpu(x) ___swahb32((x))
-#define __constant_cpu_to_be16(x) ___swab16((x))
-#define __constant_be16_to_cpu(x) ___swab16((x))
+#define __constant_cpu_to_be32(x) ___constant_swahb32((x))
+#define __constant_be32_to_cpu(x) ___constant_swahb32((x))
+#define __constant_cpu_to_be16(x) ___constant_swab16((x))
+#define __constant_be16_to_cpu(x) ___constant_swab16((x))
 #define __cpu_to_le64(x) I DON'T KNOW
 #define __le64_to_cpu(x) I DON'T KNOW
 #define __cpu_to_le32(x) ___swahw32((x))
diff --git a/include/linux/byteorder/swab.h b/include/linux/byteorder/swab.h
index 23f1be7d7..f75dccef4 100644
--- a/include/linux/byteorder/swab.h
+++ b/include/linux/byteorder/swab.h
@@ -19,16 +19,48 @@
  * how U/UL/ULL map to __u16, __u32, __u64. At least not in a portable way.
  */
 #define ___swab16(x) \
+({ \
+	__u16 __x = (x); \
+	((__u16)( \
+		(((__u16)(__x) & (__u16)0x00ffU) << 8) | \
+		(((__u16)(__x) & (__u16)0xff00U) >> 8) )); \
+})
+
+#define ___swab32(x) \
+({ \
+	__u32 __x = (x); \
+	((__u32)( \
+		(((__u32)(__x) & (__u32)0x000000ffUL) << 24) | \
+		(((__u32)(__x) & (__u32)0x0000ff00UL) <<  8) | \
+		(((__u32)(__x) & (__u32)0x00ff0000UL) >>  8) | \
+		(((__u32)(__x) & (__u32)0xff000000UL) >> 24) )); \
+})
+
+#define ___swab64(x) \
+({ \
+	__u64 __x = (x); \
+	((__u64)( \
+		(__u64)(((__u64)(__x) & (__u64)0x00000000000000ffULL) << 56) | \
+		(__u64)(((__u64)(__x) & (__u64)0x000000000000ff00ULL) << 40) | \
+		(__u64)(((__u64)(__x) & (__u64)0x0000000000ff0000ULL) << 24) | \
+		(__u64)(((__u64)(__x) & (__u64)0x00000000ff000000ULL) <<  8) | \
+	        (__u64)(((__u64)(__x) & (__u64)0x000000ff00000000ULL) >>  8) | \
+		(__u64)(((__u64)(__x) & (__u64)0x0000ff0000000000ULL) >> 24) | \
+		(__u64)(((__u64)(__x) & (__u64)0x00ff000000000000ULL) >> 40) | \
+		(__u64)(((__u64)(__x) & (__u64)0xff00000000000000ULL) >> 56) )); \
+})
+
+#define ___constant_swab16(x) \
 	((__u16)( \
 		(((__u16)(x) & (__u16)0x00ffU) << 8) | \
 		(((__u16)(x) & (__u16)0xff00U) >> 8) ))
-#define ___swab32(x) \
+#define ___constant_swab32(x) \
 	((__u32)( \
 		(((__u32)(x) & (__u32)0x000000ffUL) << 24) | \
 		(((__u32)(x) & (__u32)0x0000ff00UL) <<  8) | \
 		(((__u32)(x) & (__u32)0x00ff0000UL) >>  8) | \
 		(((__u32)(x) & (__u32)0xff000000UL) >> 24) ))
-#define ___swab64(x) \
+#define ___constant_swab64(x) \
 	((__u64)( \
 		(__u64)(((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) | \
 		(__u64)(((__u64)(x) & (__u64)0x000000000000ff00ULL) << 40) | \
diff --git a/include/linux/byteorder/swabb.h b/include/linux/byteorder/swabb.h
index 782db2e8e..a10ef3086 100644
--- a/include/linux/byteorder/swabb.h
+++ b/include/linux/byteorder/swabb.h
@@ -25,12 +25,26 @@
  *
  */
 
-
 #define ___swahw32(x) \
+({ \
+	__u32 __x = (x); \
+	((__u32)( \
+		(((__u32)(__x) & (__u32)0x0000ffffUL) << 16) | \
+		(((__u32)(__x) & (__u32)0xffff0000UL) >> 16) )); \
+})
+#define ___swahb32(x) \
+({ \
+	__u32 __x = (x); \
+	((__u32)( \
+		(((__u32)(__x) & (__u32)0x00ff00ffUL) << 8) | \
+		(((__u32)(__x) & (__u32)0xff00ff00UL) >> 8) )) \
+})
+
+#define ___constant_swahw32(x) \
 	((__u32)( \
 		(((__u32)(x) & (__u32)0x0000ffffUL) << 16) | \
 		(((__u32)(x) & (__u32)0xffff0000UL) >> 16) ))
-#define ___swahb32(x) \
+#define ___constant_swahb32(x) \
 	((__u32)( \
 		(((__u32)(x) & (__u32)0x00ff00ffUL) << 8) | \
 		(((__u32)(x) & (__u32)0xff00ff00UL) >> 8) ))
diff --git a/include/linux/coda_linux.h b/include/linux/coda_linux.h
index 3374036ce..f5e795919 100644
--- a/include/linux/coda_linux.h
+++ b/include/linux/coda_linux.h
@@ -40,8 +40,6 @@ int coda_release(struct inode *i, struct file *f);
 int coda_permission(struct inode *inode, int mask);
 int coda_revalidate_inode(struct dentry *);
 int coda_notify_change(struct dentry *, struct iattr *);
-int coda_pioctl(struct inode * inode, struct file * filp, 
-                unsigned int cmd, unsigned long arg);
 
 /* global variables */
 extern int coda_debug;
diff --git a/include/linux/console.h b/include/linux/console.h
index f8da31cbd..288f83b96 100644
--- a/include/linux/console.h
+++ b/include/linux/console.h
@@ -50,16 +50,16 @@ struct consw {
 	unsigned long (*con_getxy)(struct vc_data *, unsigned long, int *, int *);
 };
 
-extern struct consw *conswitchp;
+extern const struct consw *conswitchp;
 
-extern struct consw dummy_con;	/* dummy console buffer */
-extern struct consw fb_con;	/* frame buffer based console */
-extern struct consw vga_con;	/* VGA text console */
-extern struct consw newport_con;	/* SGI Newport console  */
-extern struct consw prom_con;	/* SPARC PROM console */
+extern const struct consw dummy_con;	/* dummy console buffer */
+extern const struct consw fb_con;	/* frame buffer based console */
+extern const struct consw vga_con;	/* VGA text console */
+extern const struct consw newport_con;	/* SGI Newport console  */
+extern const struct consw prom_con;	/* SPARC PROM console */
 
-void take_over_console(struct consw *sw, int first, int last, int deflt);
-void give_up_console(struct consw *sw);
+void take_over_console(const struct consw *sw, int first, int last, int deflt);
+void give_up_console(const struct consw *sw);
 
 /* scroll */
 #define SM_UP       (1)
diff --git a/include/linux/console_struct.h b/include/linux/console_struct.h
index 0f664086a..4dc4750ac 100644
--- a/include/linux/console_struct.h
+++ b/include/linux/console_struct.h
@@ -16,7 +16,7 @@ struct vc_data {
 	unsigned int	vc_cols;		/* [#] Console size */
 	unsigned int	vc_rows;
 	unsigned int	vc_size_row;		/* Bytes per row */
-	struct consw	*vc_sw;
+	const struct consw *vc_sw;
 	unsigned short	*vc_screenbuf;		/* In-memory character/attribute buffer */
 	unsigned int	vc_screenbuf_size;
 	unsigned char	vc_attr;		/* Current attributes */
diff --git a/include/linux/divert.h b/include/linux/divert.h
new file mode 100644
index 000000000..624bc55ed
--- /dev/null
+++ b/include/linux/divert.h
@@ -0,0 +1,117 @@
+/*
+ * Frame Diversion, Benoit Locher <Benoit.Locher@skf.com>
+ *
+ * Changes:
+ * 		06/09/2000	BL:	initial version
+ * 
+ */
+ 
+#ifndef _LINUX_DIVERT_H
+#define _LINUX_DIVERT_H
+
+#include <asm/types.h>
+
+#define	MAX_DIVERT_PORTS	8	/* Max number of ports to divert (tcp, udp) */
+
+/* Divertable protocols */
+#define	DIVERT_PROTO_NONE	0x0000
+#define	DIVERT_PROTO_IP		0x0001
+#define	DIVERT_PROTO_ICMP	0x0002
+#define	DIVERT_PROTO_TCP	0x0004
+#define	DIVERT_PROTO_UDP	0x0008
+
+/*
+ *	This is an Ethernet Frame Diverter option block
+ */
+struct divert_blk
+{
+	int		divert;  /* are we active */
+	unsigned int protos;	/* protocols */
+	u16		tcp_dst[MAX_DIVERT_PORTS]; /* specific tcp dst ports to divert */
+	u16		tcp_src[MAX_DIVERT_PORTS]; /* specific tcp src ports to divert */
+	u16		udp_dst[MAX_DIVERT_PORTS]; /* specific udp dst ports to divert */
+	u16		udp_src[MAX_DIVERT_PORTS]; /* specific udp src ports to divert */
+};
+
+/*
+ * Diversion control block, for configuration with the userspace tool
+ * divert
+ */
+
+typedef union _divert_cf_arg
+{
+	s16		int16;
+	u16		uint16;
+	s32		int32;
+	u32		uint32;
+	s64		int64;
+	u64		uint64;
+	void	*ptr;
+} divert_cf_arg;
+
+
+struct divert_cf
+{
+	int	cmd;				/* Command */
+	divert_cf_arg 	arg1,
+					arg2,
+					arg3;
+	int	dev_index;	/* device index (eth0=0, etc...) */
+};
+
+
+/* Diversion commands */
+#define	DIVCMD_DIVERT			1 /* ENABLE/DISABLE diversion */
+#define	DIVCMD_IP				2 /* ENABLE/DISABLE whold IP diversion */
+#define	DIVCMD_TCP				3 /* ENABLE/DISABLE whold TCP diversion */
+#define	DIVCMD_TCPDST			4 /* ADD/REMOVE TCP DST port for diversion */
+#define	DIVCMD_TCPSRC			5 /* ADD/REMOVE TCP SRC port for diversion */
+#define	DIVCMD_UDP				6 /* ENABLE/DISABLE whole UDP diversion */
+#define	DIVCMD_UDPDST			7 /* ADD/REMOVE UDP DST port for diversion */
+#define	DIVCMD_UDPSRC			8 /* ADD/REMOVE UDP SRC port for diversion */
+#define	DIVCMD_ICMP				9 /* ENABLE/DISABLE whole ICMP diversion */
+#define	DIVCMD_GETSTATUS		10 /* GET the status of the diverter */
+#define	DIVCMD_RESET			11 /* Reset the diverter on the specified dev */
+#define DIVCMD_GETVERSION		12 /* Retrieve the diverter code version (char[32]) */
+
+/* General syntax of the commands:
+ * 
+ * DIVCMD_xxxxxx(arg1, arg2, arg3, dev_index)
+ * 
+ * SIOCSIFDIVERT:
+ *   DIVCMD_DIVERT(DIVARG1_ENABLE|DIVARG1_DISABLE, , ,ifindex)
+ *   DIVCMD_IP(DIVARG1_ENABLE|DIVARG1_DISABLE, , , ifindex)
+ *   DIVCMD_TCP(DIVARG1_ENABLE|DIVARG1_DISABLE, , , ifindex)
+ *   DIVCMD_TCPDST(DIVARG1_ADD|DIVARG1_REMOVE, port, , ifindex)
+ *   DIVCMD_TCPSRC(DIVARG1_ADD|DIVARG1_REMOVE, port, , ifindex)
+ *   DIVCMD_UDP(DIVARG1_ENABLE|DIVARG1_DISABLE, , , ifindex)
+ *   DIVCMD_UDPDST(DIVARG1_ADD|DIVARG1_REMOVE, port, , ifindex)
+ *   DIVCMD_UDPSRC(DIVARG1_ADD|DIVARG1_REMOVE, port, , ifindex)
+ *   DIVCMD_ICMP(DIVARG1_ENABLE|DIVARG1_DISABLE, , , ifindex)
+ *   DIVCMD_RESET(, , , ifindex)
+ *   
+ * SIOGIFDIVERT:
+ *   DIVCMD_GETSTATUS(divert_blk, , , ifindex)
+ *   DIVCMD_GETVERSION(string[3])
+ */
+
+
+/* Possible values for arg1 */
+#define	DIVARG1_ENABLE			0 /* ENABLE something */
+#define	DIVARG1_DISABLE			1 /* DISABLE something */
+#define DIVARG1_ADD				2 /* ADD something */
+#define DIVARG1_REMOVE			3 /* REMOVE something */
+
+
+#ifdef __KERNEL__
+
+/* diverter functions */
+#include <linux/skbuff.h>
+int alloc_divert_blk(struct net_device *);
+void free_divert_blk(struct net_device *);
+int divert_ioctl(unsigned int cmd, struct divert_cf *arg);
+void divert_frame(struct sk_buff *skb);
+
+#endif __KERNEL__
+
+#endif	/* _LINUX_DIVERT_H */
diff --git a/include/linux/elf.h b/include/linux/elf.h
index 45e9f1007..3fe04c45e 100644
--- a/include/linux/elf.h
+++ b/include/linux/elf.h
@@ -165,6 +165,7 @@ typedef __u64	Elf64_Word;
 #define AT_EGID   14	/* effective gid */
 #define AT_PLATFORM 15  /* string identifying CPU for optimizations */
 #define AT_HWCAP  16    /* arch dependent hints at CPU capabilities */
+#define AT_CLKTCK 17	/* frequency at which times() increments */
 
 typedef struct dynamic{
   Elf32_Sword d_tag;
diff --git a/include/linux/fs.h b/include/linux/fs.h
index eb2241226..72effef4a 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -517,8 +517,7 @@ typedef struct files_struct *fl_owner_t;
 struct file_lock {
 	struct file_lock *fl_next;	/* singly linked list for this inode  */
 	struct list_head fl_link;	/* doubly linked list of all locks */
-	struct list_head fl_block; /* circular list of blocked processes */
-	struct list_head fl_list;	/* block list member */
+	struct list_head fl_block;	/* circular list of blocked processes */
 	fl_owner_t fl_owner;
 	unsigned int fl_pid;
 	wait_queue_head_t fl_wait;
diff --git a/include/linux/ide.h b/include/linux/ide.h
index e00d44760..23866ce79 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -212,6 +212,9 @@ typedef unsigned char	byte;	/* used everywhere */
 		(drive)->quirk_list = hwif->quirkproc(drive);	\
 }
 
+#define IDE_DEBUG(lineno) \
+	printk("%s,%s,line=%d\n", __FILE__, __FUNCTION__, (lineno))
+
 /*
  * Check for an interrupt and acknowledge the interrupt status
  */
diff --git a/include/linux/if_ether.h b/include/linux/if_ether.h
index 61e5f5c6b..9c746e873 100644
--- a/include/linux/if_ether.h
+++ b/include/linux/if_ether.h
@@ -58,6 +58,10 @@
 #define ETH_P_IPV6	0x86DD		/* IPv6 over bluebook		*/
 #define ETH_P_PPP_DISC	0x8863		/* PPPoE discovery messages     */
 #define ETH_P_PPP_SES	0x8864		/* PPPoE session messages	*/
+#define ETH_P_ATMMPOA	0x884c		/* MultiProtocol Over ATM	*/
+#define ETH_P_ATMFATE	0x8884		/* Frame-based ATM Transport
+					 * over Ethernet
+					 */
 
 /*
  *	Non DIX types. Won't clash for 1500 types.
diff --git a/include/linux/in.h b/include/linux/in.h
index 37db22a9a..1d5f14ad6 100644
--- a/include/linux/in.h
+++ b/include/linux/in.h
@@ -66,6 +66,7 @@ struct in_addr {
 #define IP_RECVTTL	12
 #define	IP_RECVTOS	13
 #define IP_MTU		14
+#define IP_FREEBIND	15
 
 /* BSD compatibility */
 #define IP_RECVRETOPTS	IP_RETOPTS
diff --git a/include/linux/init.h b/include/linux/init.h
index 6300d86da..6ef5b4c78 100644
--- a/include/linux/init.h
+++ b/include/linux/init.h
@@ -31,8 +31,9 @@
  * static int init_variable __initdata = 0;
  * static char linux_logo[] __initdata = { 0x32, 0x36, ... };
  *
- * For initialized data not at file scope, i.e. within a function,
- * you should use __initlocaldata instead, due to a bug in GCC 2.7.
+ * Don't forget to initialize data not at file scope, i.e. within a function,
+ * as gcc otherwise puts the data into the bss section and not into the init
+ * section.
  */
 
 #ifndef MODULE
@@ -100,8 +101,6 @@ extern struct kernel_param __setup_start, __setup_end;
 #define __FINIT
 #define __INITDATA
 
-/* Not sure what version aliases were introduced in, but certainly in 2.91.66.  */
-#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 91)
 /* These macros create a dummy inline: gcc 2.9x does not count alias
  as usage, hence the `unused function' warning when __init functions
  are declared static. We use the dummy __*_module_inline functions
@@ -117,21 +116,11 @@ typedef void (*__cleanup_module_func_t)(void);
 	void cleanup_module(void) __attribute__((alias(#x))); \
 	extern inline __cleanup_module_func_t __cleanup_module_inline(void) \
 	{ return x; }
-#else
-#define module_init(x)	int init_module(void) { return x(); }
-#define module_exit(x)	void cleanup_module(void) { x(); }
-#endif
 
 #define __setup(str,func) /* nothing */
 
 #endif
 
-#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 8)
-#define __initlocaldata  __initdata
-#else
-#define __initlocaldata
-#endif
-
 #ifdef CONFIG_HOTPLUG
 #define __devinit
 #define __devinitdata
diff --git a/include/linux/isapnp.h b/include/linux/isapnp.h
index 0985c29fb..f44001df9 100644
--- a/include/linux/isapnp.h
+++ b/include/linux/isapnp.h
@@ -132,17 +132,33 @@ struct isapnp_resources {
 #define ISAPNP_CARD_DEVS	8
 
 #define ISAPNP_CARD_ID(_va, _vb, _vc, _device) \
-		vendor: ISAPNP_VENDOR(_va, _vb, _vc), device: ISAPNP_DEVICE(_device)
+		card_vendor: ISAPNP_VENDOR(_va, _vb, _vc), card_device: ISAPNP_DEVICE(_device)
 #define ISAPNP_CARD_END \
-		vendor: 0, device: 0
+		card_vendor: 0, card_device: 0
 #define ISAPNP_DEVICE_ID(_va, _vb, _vc, _function) \
 		{ vendor: ISAPNP_VENDOR(_va, _vb, _vc), function: ISAPNP_FUNCTION(_function) }
 
+/* export used IDs outside module */
+#define ISAPNP_CARD_TABLE(name) \
+		MODULE_GENERIC_TABLE(isapnp_card, name)
+
 struct isapnp_card_id {
-	unsigned short vendor, device;
+	unsigned long driver_data;	/* data private to the driver */
+	unsigned short card_vendor, card_device;
 	struct {
 		unsigned short vendor, function;
 	} devs[ISAPNP_CARD_DEVS];	/* logical devices */
+};
+
+#define ISAPNP_DEVICE_SINGLE(_cva, _cvb, _cvc, _cdevice, _dva, _dvb, _dvc, _dfunction) \
+		card_vendor: ISAPNP_VENDOR(_cva, _cvb, _cvc), card_device: ISAPNP_DEVICE(_cdevice), \
+		vendor: ISAPNP_VENDOR(_dva, _dvb, _dvc), function: ISAPNP_FUNCTION(_dfunction)
+#define ISAPNP_DEVICE_SINGLE_END \
+		card_vendor: 0, card_device: 0
+
+struct isapnp_device_id {
+	unsigned short card_vendor, card_device;
+	unsigned short vendor, function;
 	unsigned long driver_data;	/* data private to the driver */
 };
 
@@ -179,10 +195,14 @@ struct pci_dev *isapnp_find_dev(struct pci_bus *card,
 int isapnp_probe_cards(const struct isapnp_card_id *ids,
 		       int (*probe)(struct pci_bus *card,
 				    const struct isapnp_card_id *id));
+int isapnp_probe_devs(const struct isapnp_device_id *ids,
+			int (*probe)(struct pci_dev *dev,
+				     const struct isapnp_device_id *id));
 /* misc */
 void isapnp_resource_change(struct resource *resource,
 			    unsigned long start,
 			    unsigned long size);
+int isapnp_activate_dev(struct pci_dev *dev, const char *name);
 /* init/main.c */
 int isapnp_init(void);
 
@@ -221,9 +241,13 @@ extern inline struct pci_dev *isapnp_find_dev(struct pci_bus *card,
 extern inline int isapnp_probe_cards(const struct isapnp_card_id *ids,
 				     int (*probe)(struct pci_bus *card,
 						  const struct isapnp_card_id *id)) { return -ENODEV; }
+extern inline int isapnp_probe_devs(const struct isapnp_device_id *ids,
+				    int (*probe)(struct pci_dev *dev,
+						 const struct isapnp_device_id *id)) { return -ENODEV; }
 extern inline void isapnp_resource_change(struct resource *resource,
 					  unsigned long start,
 					  unsigned long size) { ; }
+extern inline int isapnp_activate_dev(struct pci_dev *dev, const char *name) { return -ENODEV; }
 
 #endif /* CONFIG_ISAPNP */
 
diff --git a/include/linux/linkage.h b/include/linux/linkage.h
index aaf6edf02..23b9ae463 100644
--- a/include/linux/linkage.h
+++ b/include/linux/linkage.h
@@ -9,7 +9,7 @@
 #define CPP_ASMLINKAGE
 #endif
 
-#if defined __i386__ && (__GNUC__ > 2 || __GNUC_MINOR__ > 7)
+#if defined __i386__
 #define asmlinkage CPP_ASMLINKAGE __attribute__((regparm(0)))
 #elif defined __ia64__
 #define asmlinkage CPP_ASMLINKAGE __attribute__((syscall_linkage))
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 69d4d2490..59355eb8a 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -95,6 +95,7 @@ struct vm_area_struct {
 
 #define VM_DONTCOPY	0x00020000      /* Do not copy this vma on fork */
 #define VM_DONTEXPAND	0x00040000	/* Cannot expand with mremap() */
+#define VM_RESERVED	0x00080000	/* Don't unmap it from swap_out */
 
 #define VM_STACK_FLAGS	0x00000177
 
@@ -380,7 +381,7 @@ extern void FASTCALL(free_pages(unsigned long addr, unsigned long order));
 #define free_page(addr) free_pages((addr),0)
 
 extern void show_free_areas(void);
-extern void show_free_areas_node(int nid);
+extern void show_free_areas_node(pg_data_t *pgdat);
 
 extern void clear_page_tables(struct mm_struct *, unsigned long, int);
 
@@ -527,11 +528,6 @@ extern struct vm_area_struct *find_extend_vma(struct mm_struct *mm, unsigned lon
 #define pgcache_under_min()	(atomic_read(&page_cache_size) * 100 < \
 				page_cache.min_percent * num_physpages)
 
-#define vmlist_access_lock(mm)		spin_lock(&mm->page_table_lock)
-#define vmlist_access_unlock(mm)	spin_unlock(&mm->page_table_lock)
-#define vmlist_modify_lock(mm)		vmlist_access_lock(mm)
-#define vmlist_modify_unlock(mm)	vmlist_access_unlock(mm)
-
 #endif /* __KERNEL__ */
 
 #endif
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index 4a8280d7d..c14decdfc 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -101,15 +101,15 @@ extern pg_data_t *pgdat_list;
  * prototypes for the discontig memory code.
  */
 struct page;
-extern void show_free_areas_core(int);
+extern void show_free_areas_core(pg_data_t *pgdat);
 extern void free_area_init_core(int nid, pg_data_t *pgdat, struct page **gmap,
   unsigned long *zones_size, unsigned long paddr, unsigned long *zholes_size,
   struct page *pmap);
 
-#ifndef CONFIG_DISCONTIGMEM
-
 extern pg_data_t contig_page_data;
 
+#ifndef CONFIG_DISCONTIGMEM
+
 #define NODE_DATA(nid)		(&contig_page_data)
 #define NODE_MEM_MAP(nid)	mem_map
 
diff --git a/include/linux/module.h b/include/linux/module.h
index 5a52811a8..26f383a63 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -206,9 +206,16 @@ __attribute__((section(".modinfo"))) =		\
  * The following is a list of known device types (arg 1),
  * and the C types which are to be passed as arg 2.
  * pci - struct pci_device_id - List of PCI ids supported by this module
+ * isapnp - struct isapnp_device_id - List of ISA PnP ids supported by this module
+ * usb - struct usb_device_id - List of USB ids supported by this module
  */
-#define MODULE_DEVICE_TABLE(type,name)	\
-const struct type##_device_id * __module_##type##_device_table = name
+#define MODULE_GENERIC_TABLE(gtype,name)	\
+static const unsigned long __module_##gtype##_size \
+  __attribute__ ((unused)) = sizeof(struct gtype##_id); \
+static const struct gtype##_id * __module_##gtype##_table \
+  __attribute__ ((unused)) = name
+#define MODULE_DEVICE_TABLE(type,name)		\
+  MODULE_GENERIC_TABLE(type##_device,name)
 /* not put to .modinfo section to avoid section type conflicts */
 
 /* The attributes of a section are set the first time the section is
@@ -239,6 +246,7 @@ static const char __module_using_checksums[] __attribute__((section(".modinfo"))
 #define MODULE_SUPPORTED_DEVICE(name)
 #define MODULE_PARM(var,type)
 #define MODULE_PARM_DESC(var,desc)
+#define MODULE_GENERIC_TABLE(gtype,name)
 #define MODULE_DEVICE_TABLE(type,name)
 
 #ifndef __GENKSYMS__
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 95c0e130b..32677edae 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -39,6 +39,8 @@
 #include <net/profile.h>
 #endif
 
+struct divert_blk;
+
 #define NET_XMIT_SUCCESS	0
 #define NET_XMIT_DROP		1	/* skb dropped			*/
 #define NET_XMIT_CN		2	/* congestion notification	*/
@@ -47,6 +49,14 @@
 					   (TC use only - dev_queue_xmit
 					   returns this as NET_XMIT_SUCCESS) */
 
+/* Backlog congestion levels */
+#define NET_RX_SUCCESS		0   /* keep 'em coming, baby */
+#define NET_RX_CN_LOW		1   /* storm alert, just in case */
+#define NET_RX_CN_MOD		2   /* Storm on its way! */
+#define NET_RX_CN_HIGH		5   /* The storm is here */
+#define NET_RX_DROP		-1  /* packet dropped */
+#define NET_RX_BAD		-2  /* packet dropped due to kernel error */
+
 #define net_xmit_errno(e)	((e) != NET_XMIT_CN ? -ENOBUFS : 0)
 
 #endif
@@ -382,6 +392,10 @@ struct net_device
 	rwlock_t		fastpath_lock;
 	struct dst_entry	*fastpath[NETDEV_FASTROUTE_HMASK+1];
 #endif
+#ifdef CONFIG_NET_DIVERT
+	/* this will get initialized at each interface type init routine */
+	struct divert_blk	*divert;
+#endif /* CONFIG_NET_DIVERT */
 };
 
 
@@ -440,6 +454,8 @@ static inline int unregister_gifconf(unsigned int family)
 struct softnet_data
 {
 	int			throttle;
+	int			cng_level;
+	int			avg_blog;
 	struct sk_buff_head	input_pkt_queue;
 	struct net_device	*output_queue;
 	struct sk_buff		*completion_queue;
@@ -526,7 +542,7 @@ static inline void dev_kfree_skb_any(struct sk_buff *skb)
 
 extern void		net_call_rx_atomic(void (*fn)(void));
 #define HAVE_NETIF_RX 1
-extern void		netif_rx(struct sk_buff *skb);
+extern int		netif_rx(struct sk_buff *skb);
 extern int		dev_ioctl(unsigned int cmd, void *);
 extern int		dev_change_flags(struct net_device *, unsigned);
 extern void		dev_queue_xmit_nit(struct sk_buff *skb, struct net_device *dev);
@@ -628,6 +644,7 @@ extern int		netdev_register_fc(struct net_device *dev, void (*stimul)(struct net
 extern void		netdev_unregister_fc(int bit);
 extern int		netdev_max_backlog;
 extern unsigned long	netdev_fc_xoff;
+extern atomic_t netdev_dropping;
 extern int		netdev_set_master(struct net_device *dev, struct net_device *master);
 #ifdef CONFIG_NET_FASTROUTE
 extern int		netdev_fastroute;
diff --git a/include/linux/netlink.h b/include/linux/netlink.h
index 59075b070..41e7d92cc 100644
--- a/include/linux/netlink.h
+++ b/include/linux/netlink.h
@@ -151,8 +151,6 @@ extern int netlink_dump_start(struct sock *ssk, struct sk_buff *skb,
 			      int (*done)(struct netlink_callback*));
 
 
-extern void netlink_proto_init(struct net_proto *pro);
-
 #endif /* __KERNEL__ */
 
 #endif	/* __LINUX_NETLINK_H */
diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h
index 89054f8fe..9d2082f44 100644
--- a/include/linux/pagemap.h
+++ b/include/linux/pagemap.h
@@ -67,10 +67,6 @@ extern inline unsigned long _page_hashfn(struct address_space * mapping, unsigne
 
 #define page_hash(mapping,index) (page_hash_table+_page_hashfn(mapping,index))
 
-extern struct page * __find_get_page (struct address_space *mapping,
-				unsigned long index, struct page **hash);
-#define find_get_page(mapping, index) \
-		__find_get_page(mapping, index, page_hash(mapping, index))
 extern struct page * __find_lock_page (struct address_space * mapping,
 				unsigned long index, struct page **hash);
 extern void lock_page(struct page *page);
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d045308eb..994e0889f 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -415,6 +415,12 @@
 #define PCI_DEVICE_ID_WINBOND2_89C940	0x0940
 #define PCI_DEVICE_ID_WINBOND2_89C940F	0x5a5a
 
+#define PCI_VENDOR_ID_EFAR		0x1055
+#define PCI_DEVICE_ID_EFAR_SLC90E66_1	0x9130
+#define PCI_DEVICE_ID_EFAR_SLC90E66_0	0x9460
+#define PCI_DEVICE_ID_EFAR_SLC90E66_2	0x9462
+#define PCI_DEVICE_ID_EFAR_SLC90E66_3	0x9463
+
 #define PCI_VENDOR_ID_MOTOROLA		0x1057
 #define PCI_VENDOR_ID_MOTOROLA_OOPS	0x1507
 #define PCI_DEVICE_ID_MOTOROLA_MPC105	0x0001
@@ -467,6 +473,14 @@
 #define PCI_DEVICE_ID_APPLE_HYDRA	0x000e
 #define PCI_DEVICE_ID_APPLE_UNINORTH	0x0020
 
+#define PCI_VENDOR_ID_YAMAHA		0x1073
+#define PCI_DEVICE_ID_YAMAHA_724	0x0004
+#define PCI_DEVICE_ID_YAMAHA_724F	0x000d
+#define PCI_DEVICE_ID_YAMAHA_740	0x000a
+#define PCI_DEVICE_ID_YAMAHA_740C	0x000c
+#define PCI_DEVICE_ID_YAMAHA_744	0x0010
+#define PCI_DEVICE_ID_YAMAHA_754	0x0012
+
 #define PCI_VENDOR_ID_NEXGEN		0x1074
 #define PCI_DEVICE_ID_NEXGEN_82C501	0x4e78
 
@@ -825,6 +839,9 @@
 #define PCI_DEVICE_ID_SERVERWORKS_CIOB30   0x0010
 #define PCI_DEVICE_ID_SERVERWORKS_CMIC_HE  0x0011
 #define PCI_DEVICE_ID_SERVERWORKS_CSB5	    0x0201
+#define PCI_DEVICE_ID_SERVERWORKS_OSB4  0x0200
+#define PCI_DEVICE_ID_SERVERWORKS_OSB4IDE 0x0211
+#define PCI_DEVICE_ID_SERVERWORKS_OSB4USB 0x0220
 
 #define PCI_VENDOR_ID_SBE		0x1176
 #define PCI_DEVICE_ID_SBE_WANXL100	0x0301
diff --git a/include/linux/sched.h b/include/linux/sched.h
index bb4537f24..9385c9ea8 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -254,7 +254,7 @@ struct user_struct {
 
 	/* Hash table maintenance information */
 	struct user_struct *next, **pprev;
-	unsigned int uid;
+	uid_t uid;
 };
 
 #define get_current_user() ({ 				\
@@ -410,6 +410,7 @@ struct task_struct {
 #define PT_PTRACED	0x00000001
 #define PT_TRACESYS	0x00000002
 #define PT_DTRACE	0x00000004	/* delayed trace (used on m68k, i386) */
+#define PT_TRACESYSGOOD	0x00000008
 
 /*
  * Limit the stack by to some sane default: root can always
diff --git a/include/linux/sockios.h b/include/linux/sockios.h
index fe38a2d40..e9fd9e275 100644
--- a/include/linux/sockios.h
+++ b/include/linux/sockios.h
@@ -72,6 +72,9 @@
 #define SIOCGIFTXQLEN	0x8942		/* Get the tx queue length	*/
 #define SIOCSIFTXQLEN	0x8943		/* Set the tx queue length 	*/
 
+#define SIOCGIFDIVERT	0x8944		/* Frame diversion support */
+#define SIOCSIFDIVERT	0x8945		/* Set frame diversion options */
+
 
 /* ARP cache control calls. */
 		    /*  0x8950 - 0x8952  * obsolete calls, don't re-use */
diff --git a/include/linux/sunrpc/auth.h b/include/linux/sunrpc/auth.h
index 242be9730..d66474b60 100644
--- a/include/linux/sunrpc/auth.h
+++ b/include/linux/sunrpc/auth.h
@@ -43,6 +43,7 @@ struct rpc_cred {
  * Client authentication handle
  */
 #define RPC_CREDCACHE_NR	8
+#define RPC_CREDCACHE_MASK	(RPC_CREDCACHE_NR - 1)
 struct rpc_auth {
 	struct rpc_cred *	au_credcache[RPC_CREDCACHE_NR];
 	unsigned long		au_expire;	/* cache expiry interval */
diff --git a/include/linux/swap.h b/include/linux/swap.h
index 05317e725..87364f298 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -126,6 +126,10 @@ extern struct page * lookup_swap_cache(swp_entry_t);
 extern struct page * read_swap_cache_async(swp_entry_t, int);
 #define read_swap_cache(entry) read_swap_cache_async(entry, 1);
 
+/* linux/mm/oom_kill.c */
+extern int out_of_memory(void);
+extern void oom_kill(void);
+
 /*
  * Make these inline later once they are working properly.
  */
diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h
index c15bd0e55..b5155a2b6 100644
--- a/include/linux/sysctl.h
+++ b/include/linux/sysctl.h
@@ -187,7 +187,11 @@ enum
 	NET_CORE_MSG_BURST=9,
 	NET_CORE_OPTMEM_MAX=10,
 	NET_CORE_HOT_LIST_LENGTH=11,
-	NET_CORE_DIVERT_VERSION=12
+	NET_CORE_DIVERT_VERSION=12,
+	NET_CORE_NO_CONG_THRESH=13,
+	NET_CORE_NO_CONG=14,
+	NET_CORE_LO_CONG=15,
+	NET_CORE_MOD_CONG=16
 };
 
 /* /proc/sys/net/ethernet */
@@ -270,6 +274,7 @@ enum
 	NET_TCP_RMEM=85,
 	NET_TCP_APP_WIN=86,
 	NET_TCP_ADV_WIN_SCALE=87,
+	NET_IPV4_NONLOCAL_BIND=88,
 };
 
 enum {
@@ -631,16 +636,6 @@ extern ctl_handler sysctl_string;
 extern ctl_handler sysctl_intvec;
 extern ctl_handler sysctl_jiffies;
 
-extern int do_string (
-	void *oldval, size_t *oldlenp, void *newval, size_t newlen,
-	int rdwr, char *data, size_t max);
-extern int do_int (
-	void *oldval, size_t *oldlenp, void *newval, size_t newlen,
-	int rdwr, int *data);
-extern int do_struct (
-	void *oldval, size_t *oldlenp, void *newval, size_t newlen,
-	int rdwr, void *data, size_t len);
-
 
 /*
  * Register a set of sysctl names by calling register_sysctl_table
diff --git a/include/linux/usb.h b/include/linux/usb.h
index bc8d32db4..428866672 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -303,6 +303,50 @@ struct usb_string_descriptor {
 
 struct usb_device;
 
+/*
+ * Device table entry for "new style" table-driven USB drivers.
+ * User mode code can read these tables to choose which modules to load.
+ * Declare the table as __devinitdata, and as a MODULE_DEVICE_TABLE.
+ *
+ * With a device table provide bind() instead of probe().  Then the
+ * third bind() parameter will point to a matching entry from this
+ * table.  (Null value reserved.)
+ * 
+ * Terminate the driver's table with an all-zeroes entry.
+ * Init the fields you care about; zeroes are not used in comparisons.
+ */
+struct usb_device_id {
+	/*
+	 * vendor/product codes are checked, if vendor is nonzero
+	 * Range is for device revision (bcdDevice), inclusive;
+	 * zero values here mean range isn't considered
+	 */
+	__u16		idVendor;
+	__u16		idProduct;
+	__u16		bcdDevice_lo, bcdDevice_hi;
+
+	/*
+	 * if device class != 0, these can be match criteria;
+	 * but only if this bDeviceClass value is nonzero
+	 */
+	__u8		bDeviceClass;
+	__u8		bDeviceSubClass;
+	__u8		bDeviceProtocol;
+
+	/*
+	 * if interface class != 0, these can be match criteria;
+	 * but only if this bInterfaceClass value is nonzero
+	 */
+	__u8		bInterfaceClass;
+	__u8		bInterfaceSubClass;
+	__u8		bInterfaceProtocol;
+
+	/*
+	 * for driver's use; not involved in driver matching.
+	 */
+	unsigned long	driver_info;
+};
+
 struct usb_driver {
 	const char *name;
 
@@ -316,27 +360,25 @@ struct usb_driver {
 
 	struct semaphore serialize;
 
+	/* ioctl -- userspace apps can talk to drivers through usbdevfs */
 	int (*ioctl)(struct usb_device *dev, unsigned int code, void *buf);
-};
-
-/*
- * Pointer to a device endpoint interrupt function -greg
- *   Parameters:
- *     int status - This needs to be defined.  Right now each HCD
- *         passes different transfer status bits back.  Don't use it
- *         until we come up with a common meaning.
- *     void *buffer - This is a pointer to the data used in this
- *         USB transfer.
- *     int length - This is the number of bytes transferred in or out
- *         of the buffer by this transfer.  (-1 = unknown/unsupported)
- *     void *dev_id - This is a user defined pointer set when the IRQ
- *         is requested that is passed back.
- *
- *   Special Cases:
- *     if (status == USB_ST_REMOVED), don't trust buffer or len.
- */
-typedef int (*usb_device_irq)(int, void *, int, void *);
 
+	/* support for "new-style" USB hotplugging
+	 * binding policy can be driven from user mode too
+	 */
+	const struct usb_device_id *id_table;
+	void *(*bind)(
+	    struct usb_device *dev,		/* the device */
+	    unsigned intf,			/* what interface */
+	    const struct usb_device_id *id	/* from id_table */
+	    );
+
+	/* suspend before the bus suspends;
+	 * disconnect or resume when the bus resumes */
+	// void (*suspend)(struct usb_device *dev);
+	// void (*resume)(struct usb_device *dev);
+};
+	
 /*----------------------------------------------------------------------------* 
  * New USB Structures                                                         *
  *----------------------------------------------------------------------------*/
@@ -459,22 +501,17 @@ int usb_internal_control_msg(struct usb_device *usb_dev, unsigned int pipe, devr
 int usb_bulk_msg(struct usb_device *usb_dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout);
 
 /*-------------------------------------------------------------------*
- *                         COMPATIBILITY STUFF                       *
+ *                         SYNCHRONOUS CALL SUPPORT                  *
  *-------------------------------------------------------------------*/
+
 typedef struct
 {
   wait_queue_head_t *wakeup;
 
-  usb_device_irq handler;
   void* stuff;
   /* more to follow */
 } api_wrapper_data;
 
-struct irq_wrapper_data {
-	void *context;
-	usb_device_irq handler;
-};
-
 /* -------------------------------------------------------------------------- */
 
 struct usb_operations {
diff --git a/include/linux/vt_kern.h b/include/linux/vt_kern.h
index 66451acdb..80feae4c7 100644
--- a/include/linux/vt_kern.h
+++ b/include/linux/vt_kern.h
@@ -35,7 +35,6 @@ void (*kd_mksound)(unsigned int hz, unsigned int ticks);
 /* console.c */
 
 struct console_font_op;
-struct consw;
 
 int vc_allocate(unsigned int console);
 int vc_cons_allocated(unsigned int console);
diff --git a/include/linux/wrapper.h b/include/linux/wrapper.h
index edf8ef153..36dd17fe4 100644
--- a/include/linux/wrapper.h
+++ b/include/linux/wrapper.h
@@ -1,36 +1,14 @@
 #ifndef _WRAPPER_H_
 #define _WRAPPER_H_
-#define wait_handle struct wait_queue
-#define file_handle struct file
-#define inode_handle struct inode
-#define select_table_handle select_table
-#define vm_area_handle struct vm_area_struct
 
-#define connect_wrapper(x) 0
-#define current_got_fatal_signal() (signal_pending(current))
-#define current_set_timeout(val) current->timeout = val
+#define vma_set_inode(v,i)	((v)->vm_inode = (i))
+#define vma_get_flags(v)	((v)->vm_flags)
+#define vma_get_pgoff(v)	((v)->vm_pgoff)
+#define vma_get_start(v)	((v)->vm_start)
+#define vma_get_end(v)		((v)->vm_end)
+#define vma_get_page_prot(v)	((v)->vm_page_prot)
 
-#define module_interruptible_sleep_on interruptible_sleep_on
-#define module_wake_up wake_up
-#define module_select_wait select_wait
-#define module_register_chrdev register_chrdev
-#define module_unregister_chrdev unregister_chrdev
-#define module_register_blkdev register_blkdev
-#define module_unregister_blkdev unregister_blkdev
+#define mem_map_reserve(p)	set_bit(PG_reserved, &((p)->flags))
+#define mem_map_unreserve(p)	clear_bit(PG_reserved, &((p)->flags))
 
-#define inode_get_rdev(i) i->i_rdev
-
-#define file_get_flags(f) f->f_flags
-
-#define vma_set_inode(v,i) v->vm_inode = i
-#define vma_get_flags(v) v->vm_flags
-#define vma_get_pgoff(v) v->vm_pgoff
-#define vma_get_start(v) v->vm_start
-#define vma_get_end(v) v->vm_end
-#define vma_get_page_prot(v) v->vm_page_prot
-
-#define mem_map_reserve(p) set_bit(PG_reserved, &p->flags)
-#define mem_map_unreserve(p) clear_bit(PG_reserved, &p->flags)
-#define mem_map_inc_count(p) atomic_inc(&(p->count))
-#define mem_map_dec_count(p) atomic_dec(&(p->count))
-#endif
+#endif /* _WRAPPER_H_ */
diff --git a/include/linux/zorro.h b/include/linux/zorro.h
index 9e7c07889..aabaea588 100644
--- a/include/linux/zorro.h
+++ b/include/linux/zorro.h
@@ -1,7 +1,7 @@
 /*
  *  linux/zorro.h -- Amiga AutoConfig (Zorro) Bus Definitions
  *
- *  Copyright (C) 1995-2000 Geert Uytterhoeven
+ *  Copyright (C) 1995--2000 Geert Uytterhoeven
  *
  *  This file is subject to the terms and conditions of the GNU General Public
  *  License.  See the file COPYING in the main directory of this archive
@@ -14,8 +14,6 @@
 #ifndef __ASSEMBLY__
 
     /*
-     *  Known Zorro Boards
-     *
      *  Each Zorro board has a 32-bit ID of the form
      *
      *      mmmmmmmmmmmmmmmmppppppppeeeeeeee
@@ -41,551 +39,8 @@ typedef __u32 zorro_id;
 
 #define ZORRO_WILDCARD		(0xffffffff)	/* not official */
 
-
-#define ZORRO_MANUF_PACIFIC_PERIPHERALS				0x00D3
-#define  ZORRO_PROD_PACIFIC_PERIPHERALS_SE_2000_A500		ZORRO_ID(PACIFIC_PERIPHERALS, 0x00, 0)
-#define  ZORRO_PROD_PACIFIC_PERIPHERALS_SCSI			ZORRO_ID(PACIFIC_PERIPHERALS, 0x0A, 0)
-
-#define ZORRO_MANUF_MACROSYSTEMS_USA_2				0x0100
-#define  ZORRO_PROD_MACROSYSTEMS_WARP_ENGINE			ZORRO_ID(MACROSYSTEMS_USA_2, 0x13, 0)
-
-#define ZORRO_MANUF_KUPKE_1					0x00DD
-#define  ZORRO_PROD_KUPKE_GOLEM_RAM_BOX_2MB			ZORRO_ID(KUPKE_1, 0x00, 0)
-
-#define ZORRO_MANUF_MEMPHIS					0x0100
-#define  ZORRO_PROD_MEMPHIS_STORMBRINGER			ZORRO_ID(MEMPHIS, 0x00, 0)
-
-#define ZORRO_MANUF_3_STATE					0x0200
-#define  ZORRO_PROD_3_STATE_MEGAMIX_2000			ZORRO_ID(3_STATE, 0x02, 0)
-
-#define ZORRO_MANUF_COMMODORE_BRAUNSCHWEIG			0x0201
-#define  ZORRO_PROD_CBM_A2088_A2286				ZORRO_ID(COMMODORE_BRAUNSCHWEIG, 0x01, 0)
-#define  ZORRO_PROD_CBM_A2286					ZORRO_ID(COMMODORE_BRAUNSCHWEIG, 0x02, 0)
-#define  ZORRO_PROD_CBM_A4091_1					ZORRO_ID(COMMODORE_BRAUNSCHWEIG, 0x54, 0)
-#define  ZORRO_PROD_CBM_A2386SX_1				ZORRO_ID(COMMODORE_BRAUNSCHWEIG, 0x67, 0)
-
-#define ZORRO_MANUF_COMMODORE_WEST_CHESTER_1			0x0202
-#define  ZORRO_PROD_CBM_A2090A					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x01, 0)
-#define  ZORRO_PROD_CBM_A590_A2091_1				ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x02, 0)
-#define  ZORRO_PROD_CBM_A590_A2091_2				ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x03, 0)
-#define  ZORRO_PROD_CBM_A2090B					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x04, 0)
-#define  ZORRO_PROD_CBM_A2060					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x09, 0)
-#define  ZORRO_PROD_CBM_A590_A2052_A2058_A2091			ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x0A, 0)
-#define  ZORRO_PROD_CBM_A560_RAM				ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x20, 0)
-#define  ZORRO_PROD_CBM_A2232_PROTOTYPE				ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x45, 0)
-#define  ZORRO_PROD_CBM_A2232					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x46, 0)
-#define  ZORRO_PROD_CBM_A2620					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x50, 0)
-#define  ZORRO_PROD_CBM_A2630					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x51, 0)
-#define  ZORRO_PROD_CBM_A4091_2					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x54, 0)
-#define  ZORRO_PROD_CBM_A2065_1					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x5A, 0)
-#define  ZORRO_PROD_CBM_ROMULATOR				ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x60, 0)
-#define  ZORRO_PROD_CBM_A3000_TEST_FIXTURE			ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x61, 0)
-#define  ZORRO_PROD_CBM_A2386SX_2				ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x67, 0)
-#define  ZORRO_PROD_CBM_A2065_2					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x70, 0)
-
-#define ZORRO_MANUF_COMMODORE_WEST_CHESTER_2			0x0203
-#define  ZORRO_PROD_CBM_A2090A_CM				ZORRO_ID(COMMODORE_WEST_CHESTER_2, 0x03, 0)
-
-#define ZORRO_MANUF_PROGRESSIVE_PERIPHERALS_AND_SYSTEMS_2	0x02F4
-#define  ZORRO_PROD_PPS_EXP8000					ZORRO_ID(PROGRESSIVE_PERIPHERALS_AND_SYSTEMS_2, 0x02, 0)
-
-#define ZORRO_MANUF_KOLFF_COMPUTER_SUPPLIES			0x02FF
-#define  ZORRO_PROD_KCS_POWER_PC_BOARD				ZORRO_ID(KOLFF_COMPUTER_SUPPLIES, 0x00, 0)
-
-#define ZORRO_MANUF_CARDCO_1					0x03EC
-#define  ZORRO_PROD_CARDCO_KRONOS_2000_1			ZORRO_ID(CARDCO_1, 0x04, 0)
-#define  ZORRO_PROD_CARDCO_A1000_1				ZORRO_ID(CARDCO_1, 0x0C, 0)
-#define  ZORRO_PROD_CARDCO_ESCORT				ZORRO_ID(CARDCO_1, 0x0E, 0)
-#define  ZORRO_PROD_CARDCO_A2410				ZORRO_ID(CARDCO_1, 0xF5, 0)
-
-#define ZORRO_MANUF_A_SQUARED					0x03ED
-#define  ZORRO_PROD_A_SQUARED_LIVE_2000				ZORRO_ID(A_SQUARED, 0x01, 0)
-
-#define ZORRO_MANUF_COMSPEC_COMMUNICATIONS			0x03EE
-#define  ZORRO_PROD_COMSPEC_COMMUNICATIONS_AX2000		ZORRO_ID(COMSPEC_COMMUNICATIONS, 0x01, 0)
-
-#define ZORRO_MANUF_ANAKIN_RESEARCH				0x03F1
-#define  ZORRO_PROD_ANAKIN_RESEARCH_EASYL			ZORRO_ID(ANAKIN_RESEARCH, 0x01, 0)
-
-#define ZORRO_MANUF_MICROBOTICS					0x03F2
-#define  ZORRO_PROD_MICROBOTICS_STARBOARD_II			ZORRO_ID(MICROBOTICS, 0x00, 0)
-#define  ZORRO_PROD_MICROBOTICS_STARDRIVE			ZORRO_ID(MICROBOTICS, 0x02, 0)
-#define  ZORRO_PROD_MICROBOTICS_8_UP_A				ZORRO_ID(MICROBOTICS, 0x03, 0)
-#define  ZORRO_PROD_MICROBOTICS_8_UP_Z				ZORRO_ID(MICROBOTICS, 0x04, 0)
-#define  ZORRO_PROD_MICROBOTICS_DELTA_RAM			ZORRO_ID(MICROBOTICS, 0x20, 0)
-#define  ZORRO_PROD_MICROBOTICS_8_STAR_RAM			ZORRO_ID(MICROBOTICS, 0x40, 0)
-#define  ZORRO_PROD_MICROBOTICS_8_STAR				ZORRO_ID(MICROBOTICS, 0x41, 0)
-#define  ZORRO_PROD_MICROBOTICS_VXL_RAM_32			ZORRO_ID(MICROBOTICS, 0x44, 0)
-#define  ZORRO_PROD_MICROBOTICS_VXL_68030			ZORRO_ID(MICROBOTICS, 0x45, 0)
-#define  ZORRO_PROD_MICROBOTICS_DELTA				ZORRO_ID(MICROBOTICS, 0x60, 0)
-#define  ZORRO_PROD_MICROBOTICS_MBX_1200_1200Z_RAM		ZORRO_ID(MICROBOTICS, 0x81, 0)
-#define  ZORRO_PROD_MICROBOTICS_HARDFRAME_2000_1		ZORRO_ID(MICROBOTICS, 0x96, 0)
-#define  ZORRO_PROD_MICROBOTICS_HARDFRAME_2000_2		ZORRO_ID(MICROBOTICS, 0x9E, 0)
-#define  ZORRO_PROD_MICROBOTICS_MBX_1200_1200Z			ZORRO_ID(MICROBOTICS, 0xC1, 0)
-
-#define ZORRO_MANUF_ACCESS_ASSOCIATES_ALEGRA			0x03F4
-
-#define ZORRO_MANUF_EXPANSION_TECHNOLOGIES			0x03F6
-
-#define ZORRO_MANUF_ASDG					0x03FF
-#define  ZORRO_PROD_ASDG_MEMORY_1				ZORRO_ID(ASDG, 0x01, 0)
-#define  ZORRO_PROD_ASDG_MEMORY_2				ZORRO_ID(ASDG, 0x02, 0)
-#define  ZORRO_PROD_ASDG_EB920_LAN_ROVER			ZORRO_ID(ASDG, 0xFE, 0)
-#define  ZORRO_PROD_ASDG_GPIB_DUALIEEE488_TWIN_X		ZORRO_ID(ASDG, 0xFF, 0)
-
-#define ZORRO_MANUF_IMTRONICS_1					0x0404
-#define  ZORRO_PROD_IMTRONICS_HURRICANE_2800_1			ZORRO_ID(IMTRONICS_1, 0x39, 0)
-#define  ZORRO_PROD_IMTRONICS_HURRICANE_2800_2			ZORRO_ID(IMTRONICS_1, 0x57, 0)
-
-#define ZORRO_MANUF_CBM_UNIVERSITY_OF_LOWELL			0x0406
-#define  ZORRO_PROD_CBM_A2410					ZORRO_ID(CBM_UNIVERSITY_OF_LOWELL, 0x00, 0)
-
-#define ZORRO_MANUF_AMERISTAR					0x041D
-#define  ZORRO_PROD_AMERISTAR_A2065				ZORRO_ID(AMERISTAR, 0x01, 0)
-#define  ZORRO_PROD_AMERISTAR_A560				ZORRO_ID(AMERISTAR, 0x09, 0)
-#define  ZORRO_PROD_AMERISTAR_A4066				ZORRO_ID(AMERISTAR, 0x0A, 0)
-
-#define ZORRO_MANUF_SUPRA					0x0420
-#define  ZORRO_PROD_SUPRA_SUPRADRIVE_4x4			ZORRO_ID(SUPRA, 0x01, 0)
-#define  ZORRO_PROD_SUPRA_1000_RAM				ZORRO_ID(SUPRA, 0x02, 0)
-#define  ZORRO_PROD_SUPRA_2000_DMA				ZORRO_ID(SUPRA, 0x03, 0)
-#define  ZORRO_PROD_SUPRA_500					ZORRO_ID(SUPRA, 0x05, 0)
-#define  ZORRO_PROD_SUPRA_500_SCSI				ZORRO_ID(SUPRA, 0x08, 0)
-#define  ZORRO_PROD_SUPRA_500XP_2000_RAM			ZORRO_ID(SUPRA, 0x09, 0)
-#define  ZORRO_PROD_SUPRA_500RX_2000_RAM			ZORRO_ID(SUPRA, 0x0A, 0)
-#define  ZORRO_PROD_SUPRA_2400ZI				ZORRO_ID(SUPRA, 0x0B, 0)
-#define  ZORRO_PROD_SUPRA_500XP_SUPRADRIVE_WORDSYNC		ZORRO_ID(SUPRA, 0x0C, 0)
-#define  ZORRO_PROD_SUPRA_SUPRADRIVE_WORDSYNC_II		ZORRO_ID(SUPRA, 0x0D, 0)
-#define  ZORRO_PROD_SUPRA_2400ZIPLUS				ZORRO_ID(SUPRA, 0x10, 0)
-
-#define ZORRO_MANUF_COMPUTER_SYSTEMS_ASSOCIATES			0x0422
-#define  ZORRO_PROD_CSA_MAGNUM					ZORRO_ID(COMPUTER_SYSTEMS_ASSOCIATES, 0x11, 0)
-#define  ZORRO_PROD_CSA_12_GAUGE				ZORRO_ID(COMPUTER_SYSTEMS_ASSOCIATES, 0x15, 0)
-
-#define ZORRO_MANUF_MARC_MICHAEL_GROTH				0x0439
-
-#define ZORRO_MANUF_M_TECH					0x0502
-#define  ZORRO_PROD_MTEC_AT500_1				ZORRO_ID(M_TECH, 0x03, 0)
-
-#define ZORRO_MANUF_GREAT_VALLEY_PRODUCTS_1			0x06E1
-#define  ZORRO_PROD_GVP_IMPACT_SERIES_I				ZORRO_ID(GREAT_VALLEY_PRODUCTS_1, 0x08, 0)
-
-#define ZORRO_MANUF_BYTEBOX					0x07DA
-#define  ZORRO_PROD_BYTEBOX_A500				ZORRO_ID(BYTEBOX, 0x00, 0)
-
-#define ZORRO_MANUF_DKB_POWER_COMPUTING				0x07DC
-#define  ZORRO_PROD_DKB_POWER_COMPUTING_SECUREKEY		ZORRO_ID(DKB_POWER_COMPUTING, 0x09, 0)
-#define  ZORRO_PROD_DKB_POWER_COMPUTING_DKM_3128		ZORRO_ID(DKB_POWER_COMPUTING, 0x0E, 0)
-#define  ZORRO_PROD_DKB_POWER_COMPUTING_RAPID_FIRE		ZORRO_ID(DKB_POWER_COMPUTING, 0x0F, 0)
-#define  ZORRO_PROD_DKB_POWER_COMPUTING_DKM_1202		ZORRO_ID(DKB_POWER_COMPUTING, 0x10, 0)
-#define  ZORRO_PROD_DKB_POWER_COMPUTING_COBRA_VIPER_II_68EC030	ZORRO_ID(DKB_POWER_COMPUTING, 0x12, 0)
-#define  ZORRO_PROD_DKB_POWER_COMPUTING_WILDFIRE_060_1		ZORRO_ID(DKB_POWER_COMPUTING, 0x17, 0)
-#define  ZORRO_PROD_DKB_POWER_COMPUTING_WILDFIRE_060_2		ZORRO_ID(DKB_POWER_COMPUTING, 0xFF, 0)
-
-#define ZORRO_MANUF_GREAT_VALLEY_PRODUCTS_2			0x07E1
-#define  ZORRO_PROD_GVP_IMPACT_SERIES_I_4K			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x01, 0)
-#define  ZORRO_PROD_GVP_IMPACT_SERIES_I_16K_2			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x02, 0)
-#define  ZORRO_PROD_GVP_IMPACT_SERIES_I_16K_3			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x03, 0)
-#define  ZORRO_PROD_GVP_IMPACT_3001_IDE_1			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x08, 0)
-#define  ZORRO_PROD_GVP_IMPACT_3001_RAM				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x09, 0)
-#define  ZORRO_PROD_GVP_IMPACT_SERIES_II_RAM_1			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0A, 0)
-#define  ZORRO_PROD_GVP_EPC_BASE				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0)
-#define  ZORRO_PROD_GVP_GFORCE_040_1				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0x20)
-#define  ZORRO_PROD_GVP_GFORCE_040_SCSI_1			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0x30)
-#define  ZORRO_PROD_GVP_A1291					ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0x40)
-#define  ZORRO_PROD_GVP_COMBO_030_R4				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0x60)
-#define  ZORRO_PROD_GVP_COMBO_030_R4_SCSI			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0x70)
-#define  ZORRO_PROD_GVP_PHONEPAK				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0x78)
-#define  ZORRO_PROD_GVP_IO_EXTENDER				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0x98)
-#define  ZORRO_PROD_GVP_GFORCE_030				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0xa0)
-#define  ZORRO_PROD_GVP_GFORCE_030_SCSI				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0xb0)
-#define  ZORRO_PROD_GVP_A530					ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0xc0)
-#define  ZORRO_PROD_GVP_A530_SCSI				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0xd0)
-#define  ZORRO_PROD_GVP_COMBO_030_R3				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0xe0)
-#define  ZORRO_PROD_GVP_COMBO_030_R3_SCSI			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0xf0)
-#define  ZORRO_PROD_GVP_SERIES_II				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0xf8)
-#define  ZORRO_PROD_GVP_IMPACT_3001_IDE_2			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0D, 0)
-/*#define  ZORRO_PROD_GVP_A2000_030				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0D, 0)*/
-/*#define  ZORRO_PROD_GVP_GFORCE_040_SCSI_2			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0D, 0)*/
-#define  ZORRO_PROD_GVP_GFORCE_040_060				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x16, 0)
-#define  ZORRO_PROD_GVP_IMPACT_VISION_24			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x20, 0)
-#define  ZORRO_PROD_GVP_GFORCE_040_2				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0xFF, 0)
-
-#define ZORRO_MANUF_CALIFORNIA_ACCESS_SYNERGY			0x07E5
-#define  ZORRO_PROD_CALIFORNIA_ACCESS_SYNERGY_MALIBU		ZORRO_ID(CALIFORNIA_ACCESS_SYNERGY, 0x01, 0)
-
-#define ZORRO_MANUF_XETEC					0x07E6
-#define  ZORRO_PROD_XETEC_FASTCARD				ZORRO_ID(XETEC, 0x01, 0)
-#define  ZORRO_PROD_XETEC_FASTCARD_RAM				ZORRO_ID(XETEC, 0x02, 0)
-#define  ZORRO_PROD_XETEC_FASTCARD_PLUS				ZORRO_ID(XETEC, 0x03, 0)
-
-#define ZORRO_MANUF_PROGRESSIVE_PERIPHERALS_AND_SYSTEMS		0x07EA
-#define  ZORRO_PROD_PPS_MERCURY					ZORRO_ID(PROGRESSIVE_PERIPHERALS_AND_SYSTEMS, 0x00, 0)
-#define  ZORRO_PROD_PPS_A3000_68040				ZORRO_ID(PROGRESSIVE_PERIPHERALS_AND_SYSTEMS, 0x01, 0)
-#define  ZORRO_PROD_PPS_A2000_68040				ZORRO_ID(PROGRESSIVE_PERIPHERALS_AND_SYSTEMS, 0x69, 0)
-#define  ZORRO_PROD_PPS_ZEUS					ZORRO_ID(PROGRESSIVE_PERIPHERALS_AND_SYSTEMS, 0x96, 0)
-#define  ZORRO_PROD_PPS_A500_68040				ZORRO_ID(PROGRESSIVE_PERIPHERALS_AND_SYSTEMS, 0xBB, 0)
-
-#define ZORRO_MANUF_XEBEC					0x07EC
-
-#define ZORRO_MANUF_SPIRIT_TECHNOLOGY				0x07F2
-#define  ZORRO_PROD_SPIRIT_TECHNOLOGY_INSIDER_IN1000		ZORRO_ID(SPIRIT_TECHNOLOGY, 0x01, 0)
-#define  ZORRO_PROD_SPIRIT_TECHNOLOGY_INSIDER_IN500		ZORRO_ID(SPIRIT_TECHNOLOGY, 0x02, 0)
-#define  ZORRO_PROD_SPIRIT_TECHNOLOGY_SIN500			ZORRO_ID(SPIRIT_TECHNOLOGY, 0x03, 0)
-#define  ZORRO_PROD_SPIRIT_TECHNOLOGY_HDA_506			ZORRO_ID(SPIRIT_TECHNOLOGY, 0x04, 0)
-#define  ZORRO_PROD_SPIRIT_TECHNOLOGY_AX_S			ZORRO_ID(SPIRIT_TECHNOLOGY, 0x05, 0)
-#define  ZORRO_PROD_SPIRIT_TECHNOLOGY_OCTABYTE			ZORRO_ID(SPIRIT_TECHNOLOGY, 0x06, 0)
-#define  ZORRO_PROD_SPIRIT_TECHNOLOGY_INMATE			ZORRO_ID(SPIRIT_TECHNOLOGY, 0x08, 0)
-
-#define ZORRO_MANUF_SPIRIT_TECHNOLOGY_2				0x07F3
-
-#define ZORRO_MANUF_BSC_ALFADATA_1				0x07FE
-#define  ZORRO_PROD_BSC_ALF_3_1					ZORRO_ID(BSC_ALFADATA_1, 0x03, 0)
-
-#define ZORRO_MANUF_BSC_ALFADATA_2				0x0801
-#define  ZORRO_PROD_BSC_ALF_2_1					ZORRO_ID(BSC_ALFADATA_2, 0x01, 0)
-#define  ZORRO_PROD_BSC_ALF_2_2					ZORRO_ID(BSC_ALFADATA_2, 0x02, 0)
-#define  ZORRO_PROD_BSC_ALF_3_2					ZORRO_ID(BSC_ALFADATA_2, 0x03, 0)
-
-#define ZORRO_MANUF_CARDCO_2					0x0802
-#define  ZORRO_PROD_CARDCO_KRONOS_2000_2			ZORRO_ID(CARDCO_2, 0x04, 0)
-#define  ZORRO_PROD_CARDCO_A1000_2				ZORRO_ID(CARDCO_2, 0x0C, 0)
-
-#define ZORRO_MANUF_JOCHHEIM					0x0804
-#define  ZORRO_PROD_JOCHHEIM_RAM				ZORRO_ID(JOCHHEIM, 0x01, 0)
-
-#define ZORRO_MANUF_CHECKPOINT_TECHNOLOGIES			0x0807
-#define  ZORRO_PROD_CHECKPOINT_TECHNOLOGIES_SERIAL_SOLUTION	ZORRO_ID(CHECKPOINT_TECHNOLOGIES, 0x00, 0)
-
-#define ZORRO_MANUF_EDOTRONIK					0x0810
-#define  ZORRO_PROD_EDOTRONIK_IEEE_488				ZORRO_ID(EDOTRONIK, 0x01, 0)
-#define  ZORRO_PROD_EDOTRONIK_8032				ZORRO_ID(EDOTRONIK, 0x02, 0)
-#define  ZORRO_PROD_EDOTRONIK_MULTISERIAL			ZORRO_ID(EDOTRONIK, 0x03, 0)
-#define  ZORRO_PROD_EDOTRONIK_VIDEODIGITIZER			ZORRO_ID(EDOTRONIK, 0x04, 0)
-#define  ZORRO_PROD_EDOTRONIK_PARALLEL_IO			ZORRO_ID(EDOTRONIK, 0x05, 0)
-#define  ZORRO_PROD_EDOTRONIK_PIC_PROTOYPING			ZORRO_ID(EDOTRONIK, 0x06, 0)
-#define  ZORRO_PROD_EDOTRONIK_ADC				ZORRO_ID(EDOTRONIK, 0x07, 0)
-#define  ZORRO_PROD_EDOTRONIK_VME				ZORRO_ID(EDOTRONIK, 0x08, 0)
-#define  ZORRO_PROD_EDOTRONIK_DSP96000				ZORRO_ID(EDOTRONIK, 0x09, 0)
-
-#define ZORRO_MANUF_NES_INC					0x0813
-#define  ZORRO_PROD_NES_INC_RAM					ZORRO_ID(NES_INC, 0x00, 0)
-
-#define ZORRO_MANUF_ICD						0x0817
-#define  ZORRO_PROD_ICD_ADVANTAGE_2000_SCSI			ZORRO_ID(ICD, 0x01, 0)
-#define  ZORRO_PROD_ICD_ADVANTAGE_IDE				ZORRO_ID(ICD, 0x03, 0)
-#define  ZORRO_PROD_ICD_ADVANTAGE_2080_RAM			ZORRO_ID(ICD, 0x04, 0)
-
-#define ZORRO_MANUF_KUPKE_2					0x0819
-#define  ZORRO_PROD_KUPKE_OMTI					ZORRO_ID(KUPKE_2, 0x01, 0)
-#define  ZORRO_PROD_KUPKE_SCSI_II				ZORRO_ID(KUPKE_2, 0x02, 0)
-#define  ZORRO_PROD_KUPKE_GOLEM_BOX				ZORRO_ID(KUPKE_2, 0x03, 0)
-#define  ZORRO_PROD_KUPKE_030_882				ZORRO_ID(KUPKE_2, 0x04, 0)
-#define  ZORRO_PROD_KUPKE_SCSI_AT				ZORRO_ID(KUPKE_2, 0x05, 0)
-
-#define ZORRO_MANUF_GREAT_VALLEY_PRODUCTS_3			0x081D
-#define  ZORRO_PROD_GVP_A2000_RAM8				ZORRO_ID(GREAT_VALLEY_PRODUCTS_3, 0x09, 0)
-#define  ZORRO_PROD_GVP_IMPACT_SERIES_II_RAM_2			ZORRO_ID(GREAT_VALLEY_PRODUCTS_3, 0x0A, 0)
-
-#define ZORRO_MANUF_INTERWORKS_NETWORK				0x081E
-
-#define ZORRO_MANUF_HARDITAL_SYNTHESIS				0x0820
-#define  ZORRO_PROD_HARDITAL_SYNTHESIS_TQM_68030_68882		ZORRO_ID(HARDITAL_SYNTHESIS, 0x14, 0)
-
-#define ZORRO_MANUF_APPLIED_ENGINEERING				0x0828
-#define  ZORRO_PROD_APPLIED_ENGINEERING_DL2000			ZORRO_ID(APPLIED_ENGINEERING, 0x10, 0)
-#define  ZORRO_PROD_APPLIED_ENGINEERING_RAM_WORKS		ZORRO_ID(APPLIED_ENGINEERING, 0xE0, 0)
-
-#define ZORRO_MANUF_BSC_ALFADATA_3				0x082C
-#define  ZORRO_PROD_BSC_OKTAGON_2008				ZORRO_ID(BSC_ALFADATA_3, 0x05, 0)
-#define  ZORRO_PROD_BSC_TANDEM_AT_2008_508			ZORRO_ID(BSC_ALFADATA_3, 0x06, 0)
-#define  ZORRO_PROD_BSC_ALFA_RAM_1200				ZORRO_ID(BSC_ALFADATA_3, 0x07, 0)
-#define  ZORRO_PROD_BSC_OKTAGON_2008_RAM			ZORRO_ID(BSC_ALFADATA_3, 0x08, 0)
-#define  ZORRO_PROD_BSC_MULTIFACE_I				ZORRO_ID(BSC_ALFADATA_3, 0x10, 0)
-#define  ZORRO_PROD_BSC_MULTIFACE_II				ZORRO_ID(BSC_ALFADATA_3, 0x11, 0)
-#define  ZORRO_PROD_BSC_MULTIFACE_III				ZORRO_ID(BSC_ALFADATA_3, 0x12, 0)
-#define  ZORRO_PROD_BSC_FRAMEMASTER_II				ZORRO_ID(BSC_ALFADATA_3, 0x20, 0)
-#define  ZORRO_PROD_BSC_GRAFFITI_RAM				ZORRO_ID(BSC_ALFADATA_3, 0x21, 0)
-#define  ZORRO_PROD_BSC_GRAFFITI_REG				ZORRO_ID(BSC_ALFADATA_3, 0x22, 0)
-#define  ZORRO_PROD_BSC_ISDN_MASTERCARD				ZORRO_ID(BSC_ALFADATA_3, 0x40, 0)
-#define  ZORRO_PROD_BSC_ISDN_MASTERCARD_II			ZORRO_ID(BSC_ALFADATA_3, 0x41, 0)
-
-#define ZORRO_MANUF_PHOENIX					0x0835
-#define  ZORRO_PROD_PHOENIX_ST506				ZORRO_ID(PHOENIX, 0x21, 0)
-#define  ZORRO_PROD_PHOENIX_SCSI				ZORRO_ID(PHOENIX, 0x22, 0)
-#define  ZORRO_PROD_PHOENIX_RAM					ZORRO_ID(PHOENIX, 0xBE, 0)
-
-#define ZORRO_MANUF_ADVANCED_STORAGE_SYSTEMS			0x0836
-#define  ZORRO_PROD_ADVANCED_STORAGE_SYSTEMS_NEXUS		ZORRO_ID(ADVANCED_STORAGE_SYSTEMS, 0x01, 0)
-#define  ZORRO_PROD_ADVANCED_STORAGE_SYSTEMS_NEXUS_RAM		ZORRO_ID(ADVANCED_STORAGE_SYSTEMS, 0x08, 0)
-
-#define ZORRO_MANUF_IMPULSE					0x0838
-#define  ZORRO_PROD_IMPULSE_FIRECRACKER_24			ZORRO_ID(IMPULSE, 0x00, 0)
-
-#define ZORRO_MANUF_IVS						0x0840
-#define  ZORRO_PROD_IVS_GRANDSLAM_PIC_2				ZORRO_ID(IVS, 0x02, 0)
-#define  ZORRO_PROD_IVS_GRANDSLAM_PIC_1				ZORRO_ID(IVS, 0x04, 0)
-#define  ZORRO_PROD_IVS_OVERDRIVE				ZORRO_ID(IVS, 0x10, 0)
-#define  ZORRO_PROD_IVS_TRUMPCARD_CLASSIC			ZORRO_ID(IVS, 0x30, 0)
-#define  ZORRO_PROD_IVS_TRUMPCARD_PRO_GRANDSLAM			ZORRO_ID(IVS, 0x34, 0)
-#define  ZORRO_PROD_IVS_META_4					ZORRO_ID(IVS, 0x40, 0)
-#define  ZORRO_PROD_IVS_WAVETOOLS				ZORRO_ID(IVS, 0xBF, 0)
-#define  ZORRO_PROD_IVS_VECTOR_1				ZORRO_ID(IVS, 0xF3, 0)
-#define  ZORRO_PROD_IVS_VECTOR_2				ZORRO_ID(IVS, 0xF4, 0)
-
-#define ZORRO_MANUF_VECTOR_1					0x0841
-#define  ZORRO_PROD_VECTOR_CONNECTION_1				ZORRO_ID(VECTOR_1, 0xE3, 0)
-
-#define ZORRO_MANUF_XPERT_PRODEV				0x0845
-#define  ZORRO_PROD_XPERT_PRODEV_VISIONA_RAM			ZORRO_ID(XPERT_PRODEV, 0x01, 0)
-#define  ZORRO_PROD_XPERT_PRODEV_VISIONA_REG			ZORRO_ID(XPERT_PRODEV, 0x02, 0)
-#define  ZORRO_PROD_XPERT_PRODEV_MERLIN_RAM			ZORRO_ID(XPERT_PRODEV, 0x03, 0)
-#define  ZORRO_PROD_XPERT_PRODEV_MERLIN_REG_1			ZORRO_ID(XPERT_PRODEV, 0x04, 0)
-#define  ZORRO_PROD_XPERT_PRODEV_MERLIN_REG_2			ZORRO_ID(XPERT_PRODEV, 0xC9, 0)
-
-#define ZORRO_MANUF_HYDRA_SYSTEMS				0x0849
-#define  ZORRO_PROD_HYDRA_SYSTEMS_AMIGANET			ZORRO_ID(HYDRA_SYSTEMS, 0x01, 0)
-
-#define ZORRO_MANUF_SUNRIZE_INDUSTRIES				0x084F
-#define  ZORRO_PROD_SUNRIZE_INDUSTRIES_AD1012			ZORRO_ID(SUNRIZE_INDUSTRIES, 0x01, 0)
-#define  ZORRO_PROD_SUNRIZE_INDUSTRIES_AD516			ZORRO_ID(SUNRIZE_INDUSTRIES, 0x02, 0)
-#define  ZORRO_PROD_SUNRIZE_INDUSTRIES_DD512			ZORRO_ID(SUNRIZE_INDUSTRIES, 0x03, 0)
-
-#define ZORRO_MANUF_TRICERATOPS					0x0850
-#define  ZORRO_PROD_TRICERATOPS_MULTI_IO			ZORRO_ID(TRICERATOPS, 0x01, 0)
-
-#define ZORRO_MANUF_APPLIED_MAGIC				0x0851
-#define  ZORRO_PROD_APPLIED_MAGIC_DMI_RESOLVER			ZORRO_ID(APPLIED_MAGIC, 0x01, 0)
-#define  ZORRO_PROD_APPLIED_MAGIC_DIGITAL_BROADCASTER		ZORRO_ID(APPLIED_MAGIC, 0x06, 0)
-
-#define ZORRO_MANUF_GFX_BASE					0x085E
-#define  ZORRO_PROD_GFX_BASE_GDA_1_VRAM				ZORRO_ID(GFX_BASE, 0x00, 0)
-#define  ZORRO_PROD_GFX_BASE_GDA_1				ZORRO_ID(GFX_BASE, 0x01, 0)
-
-#define ZORRO_MANUF_ROCTEC					0x0860
-#define  ZORRO_PROD_ROCTEC_RH_800C				ZORRO_ID(ROCTEC, 0x01, 0)
-#define  ZORRO_PROD_ROCTEC_RH_800C_RAM				ZORRO_ID(ROCTEC, 0x01, 0)
-
-#define ZORRO_MANUF_KATO					0x0861
-#define  ZORRO_PROD_KATO_MELODY					ZORRO_ID(KATO, 0x80, 0)
-/* ID clash!! */
-#define ZORRO_MANUF_HELFRICH_1					0x0861
-#define  ZORRO_PROD_HELFRICH_RAINBOW_II				ZORRO_ID(HELFRICH_1, 0x20, 0)
-#define  ZORRO_PROD_HELFRICH_RAINBOW_III			ZORRO_ID(HELFRICH_1, 0x21, 0)
-
-#define ZORRO_MANUF_ATLANTIS					0x0862
-
-#define ZORRO_MANUF_PROTAR					0x0864
-
-#define ZORRO_MANUF_ACS						0x0865
-
-#define ZORRO_MANUF_SOFTWARE_RESULTS_ENTERPRISES		0x0866
-#define  ZORRO_PROD_SOFTWARE_RESULTS_ENTERPRISES_GOLDEN_GATE_2_BUS_PLUS	ZORRO_ID(SOFTWARE_RESULTS_ENTERPRISES, 0x01, 0)
-
-#define ZORRO_MANUF_MASOBOSHI					0x086D
-#define  ZORRO_PROD_MASOBOSHI_MASTER_CARD_SC201			ZORRO_ID(MASOBOSHI, 0x03, 0)
-#define  ZORRO_PROD_MASOBOSHI_MASTER_CARD_MC702			ZORRO_ID(MASOBOSHI, 0x04, 0)
-#define  ZORRO_PROD_MASOBOSHI_MVD_819				ZORRO_ID(MASOBOSHI, 0x07, 0)
-
-#define ZORRO_MANUF_MAINHATTAN_DATA				0x086F
-#define  ZORRO_PROD_MAINHATTAN_DATA_IDE				ZORRO_ID(MAINHATTAN_DATA, 0x01, 0)
-
-#define ZORRO_MANUF_VILLAGE_TRONIC				0x0877
-#define  ZORRO_PROD_VILLAGE_TRONIC_DOMINO_RAM			ZORRO_ID(VILLAGE_TRONIC, 0x01, 0)
-#define  ZORRO_PROD_VILLAGE_TRONIC_DOMINO_REG			ZORRO_ID(VILLAGE_TRONIC, 0x02, 0)
-#define  ZORRO_PROD_VILLAGE_TRONIC_DOMINO_16M_PROTOTYPE		ZORRO_ID(VILLAGE_TRONIC, 0x03, 0)
-#define  ZORRO_PROD_VILLAGE_TRONIC_PICASSO_II_II_PLUS_RAM	ZORRO_ID(VILLAGE_TRONIC, 0x0B, 0)
-#define  ZORRO_PROD_VILLAGE_TRONIC_PICASSO_II_II_PLUS_REG	ZORRO_ID(VILLAGE_TRONIC, 0x0C, 0)
-#define  ZORRO_PROD_VILLAGE_TRONIC_PICASSO_II_II_PLUS_SEGMENTED_MODE	ZORRO_ID(VILLAGE_TRONIC, 0x0D, 0)
-#define  ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z2_MEM1		ZORRO_ID(VILLAGE_TRONIC, 0x15, 0)
-#define  ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z2_MEM2		ZORRO_ID(VILLAGE_TRONIC, 0x16, 0)
-#define  ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z2_REG		ZORRO_ID(VILLAGE_TRONIC, 0x17, 0)
-#define  ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z3		ZORRO_ID(VILLAGE_TRONIC, 0x18, 0)
-#define  ZORRO_PROD_VILLAGE_TRONIC_ARIADNE			ZORRO_ID(VILLAGE_TRONIC, 0xC9, 0)
-#define  ZORRO_PROD_VILLAGE_TRONIC_ARIADNE2			ZORRO_ID(VILLAGE_TRONIC, 0xCA, 0)
-
-#define ZORRO_MANUF_UTILITIES_UNLIMITED				0x087B
-#define  ZORRO_PROD_UTILITIES_UNLIMITED_EMPLANT_DELUXE		ZORRO_ID(UTILITIES_UNLIMITED, 0x15, 0)
-#define  ZORRO_PROD_UTILITIES_UNLIMITED_EMPLANT_DELUXE2		ZORRO_ID(UTILITIES_UNLIMITED, 0x20, 0)
-
-#define ZORRO_MANUF_AMITRIX					0x0880
-#define  ZORRO_PROD_AMITRIX_MULTI_IO				ZORRO_ID(AMITRIX, 0x01, 0)
-#define  ZORRO_PROD_AMITRIX_CD_RAM				ZORRO_ID(AMITRIX, 0x02, 0)
-
-#define ZORRO_MANUF_ARMAX					0x0885
-#define  ZORRO_PROD_ARMAX_OMNIBUS				ZORRO_ID(ARMAX, 0x00, 0)
-
-#define ZORRO_MANUF_ZEUS					0x088D
-#define  ZORRO_PROD_ZEUS_SPIDER					ZORRO_ID(ZEUS, 0x04, 0)
-
-#define ZORRO_MANUF_NEWTEK					0x088F
-#define  ZORRO_PROD_NEWTEK_VIDEOTOASTER				ZORRO_ID(NEWTEK, 0x00, 0)
-
-#define ZORRO_MANUF_M_TECH_GERMANY				0x0890
-#define  ZORRO_PROD_MTEC_AT500_2				ZORRO_ID(M_TECH_GERMANY, 0x01, 0)
-#define  ZORRO_PROD_MTEC_68030					ZORRO_ID(M_TECH_GERMANY, 0x03, 0)
-#define  ZORRO_PROD_MTEC_68020I					ZORRO_ID(M_TECH_GERMANY, 0x06, 0)
-#define  ZORRO_PROD_MTEC_A1200_T68030_RTC			ZORRO_ID(M_TECH_GERMANY, 0x20, 0)
-#define  ZORRO_PROD_MTEC_VIPER_MK_V_E_MATRIX_530		ZORRO_ID(M_TECH_GERMANY, 0x21, 0)
-#define  ZORRO_PROD_MTEC_8_MB_RAM				ZORRO_ID(M_TECH_GERMANY, 0x22, 0)
-#define  ZORRO_PROD_MTEC_VIPER_MK_V_E_MATRIX_530_SCSI_IDE	ZORRO_ID(M_TECH_GERMANY, 0x24, 0)
-
-#define ZORRO_MANUF_GREAT_VALLEY_PRODUCTS_4			0x0891
-#define  ZORRO_PROD_GVP_EGS_28_24_SPECTRUM_RAM			ZORRO_ID(GREAT_VALLEY_PRODUCTS_4, 0x01, 0)
-#define  ZORRO_PROD_GVP_EGS_28_24_SPECTRUM_REG			ZORRO_ID(GREAT_VALLEY_PRODUCTS_4, 0x02, 0)
-
-#define ZORRO_MANUF_APOLLO_1					0x0892
-#define  ZORRO_PROD_APOLLO_A1200				ZORRO_ID(APOLLO_1, 0x01, 0)
-
-#define ZORRO_MANUF_HELFRICH_2					0x0893
-#define  ZORRO_PROD_HELFRICH_PICCOLO_RAM			ZORRO_ID(HELFRICH_2, 0x05, 0)
-#define  ZORRO_PROD_HELFRICH_PICCOLO_REG			ZORRO_ID(HELFRICH_2, 0x06, 0)
-#define  ZORRO_PROD_HELFRICH_PEGGY_PLUS_MPEG			ZORRO_ID(HELFRICH_2, 0x07, 0)
-#define  ZORRO_PROD_HELFRICH_VIDEOCRUNCHER			ZORRO_ID(HELFRICH_2, 0x08, 0)
-#define  ZORRO_PROD_HELFRICH_SD64_RAM				ZORRO_ID(HELFRICH_2, 0x0A, 0)
-#define  ZORRO_PROD_HELFRICH_SD64_REG				ZORRO_ID(HELFRICH_2, 0x0B, 0)
-
-#define ZORRO_MANUF_MACROSYSTEMS_USA				0x089B
-#define  ZORRO_PROD_MACROSYSTEMS_WARP_ENGINE_40xx		ZORRO_ID(MACROSYSTEMS_USA, 0x13, 0)
-
-#define ZORRO_MANUF_ELBOX_COMPUTER				0x089E
-#define  ZORRO_PROD_ELBOX_COMPUTER_1200_4			ZORRO_ID(ELBOX_COMPUTER, 0x06, 0)
-
-#define ZORRO_MANUF_HARMS_PROFESSIONAL				0x0A00
-#define  ZORRO_PROD_HARMS_PROFESSIONAL_030_PLUS			ZORRO_ID(HARMS_PROFESSIONAL, 0x10, 0)
-#define  ZORRO_PROD_HARMS_PROFESSIONAL_3500			ZORRO_ID(HARMS_PROFESSIONAL, 0xD0, 0)
-
-#define ZORRO_MANUF_MICRONIK					0x0A50
-#define  ZORRO_PROD_MICRONIK_RCA_120				ZORRO_ID(MICRONIK, 0x0A, 0)
-
-#define ZORRO_MANUF_MICRONIK2					0x0F0F
-#define  ZORRO_PROD_MICRONIK2_Z3I				ZORRO_ID(MICRONIK2, 0x01, 0)
-
-#define ZORRO_MANUF_MEGAMICRO					0x1000
-#define  ZORRO_PROD_MEGAMICRO_SCRAM_500				ZORRO_ID(MEGAMICRO, 0x03, 0)
-#define  ZORRO_PROD_MEGAMICRO_SCRAM_500_RAM			ZORRO_ID(MEGAMICRO, 0x04, 0)
-
-#define ZORRO_MANUF_IMTRONICS_2					0x1028
-#define  ZORRO_PROD_IMTRONICS_HURRICANE_2800_3			ZORRO_ID(IMTRONICS_2, 0x39, 0)
-#define  ZORRO_PROD_IMTRONICS_HURRICANE_2800_4			ZORRO_ID(IMTRONICS_2, 0x57, 0)
-
-/* unofficial ID */
-#define ZORRO_MANUF_INDIVIDUAL_COMPUTERS			0x1212
-#define  ZORRO_PROD_INDIVIDUAL_COMPUTERS_BUDDHA			ZORRO_ID(INDIVIDUAL_COMPUTERS, 0x00, 0)
-#define  ZORRO_PROD_INDIVIDUAL_COMPUTERS_CATWEASEL		ZORRO_ID(INDIVIDUAL_COMPUTERS, 0x2A, 0)
-
-#define ZORRO_MANUF_KUPKE_3					0x1248
-#define  ZORRO_PROD_KUPKE_GOLEM_HD_3000				ZORRO_ID(KUPKE_3, 0x01, 0)
-
-#define ZORRO_MANUF_ITH						0x1388
-#define  ZORRO_PROD_ITH_ISDN_MASTER_II				ZORRO_ID(ITH, 0x01, 0)
-
-#define ZORRO_MANUF_VMC						0x1389
-#define  ZORRO_PROD_VMC_ISDN_BLASTER_Z2				ZORRO_ID(VMC, 0x01, 0)
-#define  ZORRO_PROD_VMC_HYPERCOM_4				ZORRO_ID(VMC, 0x02, 0)
-
-#define ZORRO_MANUF_INFORMATION					0x157C
-#define  ZORRO_PROD_INFORMATION_ISDN_ENGINE_I			ZORRO_ID(INFORMATION, 0x64, 0)
-
-#define ZORRO_MANUF_VORTEX					0x2017
-#define  ZORRO_PROD_VORTEX_GOLDEN_GATE_80386SX			ZORRO_ID(VORTEX, 0x07, 0)
-#define  ZORRO_PROD_VORTEX_GOLDEN_GATE_RAM			ZORRO_ID(VORTEX, 0x08, 0)
-#define  ZORRO_PROD_VORTEX_GOLDEN_GATE_80486			ZORRO_ID(VORTEX, 0x09, 0)
-
-#define ZORRO_MANUF_EXPANSION_SYSTEMS				0x2062
-#define  ZORRO_PROD_EXPANSION_SYSTEMS_DATAFLYER_4000SX		ZORRO_ID(EXPANSION_SYSTEMS, 0x01, 0)
-#define  ZORRO_PROD_EXPANSION_SYSTEMS_DATAFLYER_4000SX_RAM	ZORRO_ID(EXPANSION_SYSTEMS, 0x02, 0)
-
-#define ZORRO_MANUF_READYSOFT					0x2100
-#define  ZORRO_PROD_READYSOFT_AMAX_II_IV			ZORRO_ID(READYSOFT, 0x01, 0)
-
-#define ZORRO_MANUF_PHASE5					0x2140
-#define  ZORRO_PROD_PHASE5_BLIZZARD_RAM				ZORRO_ID(PHASE5, 0x01, 0)
-#define  ZORRO_PROD_PHASE5_BLIZZARD				ZORRO_ID(PHASE5, 0x02, 0)
-#define  ZORRO_PROD_PHASE5_BLIZZARD_1220_IV			ZORRO_ID(PHASE5, 0x06, 0)
-#define  ZORRO_PROD_PHASE5_FASTLANE_Z3_RAM			ZORRO_ID(PHASE5, 0x0A, 0)
-#define  ZORRO_PROD_PHASE5_BLIZZARD_1230_II_FASTLANE_Z3_CYBERSCSI_CYBERSTORM060	ZORRO_ID(PHASE5, 0x0B, 0)
-#define  ZORRO_PROD_PHASE5_BLIZZARD_1220_CYBERSTORM		ZORRO_ID(PHASE5, 0x0C, 0)
-#define  ZORRO_PROD_PHASE5_BLIZZARD_1230			ZORRO_ID(PHASE5, 0x0D, 0)
-#define  ZORRO_PROD_PHASE5_BLIZZARD_1230_IV_1260		ZORRO_ID(PHASE5, 0x11, 0)
-#define  ZORRO_PROD_PHASE5_BLIZZARD_2060			ZORRO_ID(PHASE5, 0x18, 0)
-#define  ZORRO_PROD_PHASE5_CYBERSTORM_MK_II			ZORRO_ID(PHASE5, 0x19, 0)
-#define  ZORRO_PROD_PHASE5_CYBERVISION64			ZORRO_ID(PHASE5, 0x22, 0)
-#define  ZORRO_PROD_PHASE5_CYBERVISION64_3D_PROTOTYPE		ZORRO_ID(PHASE5, 0x32, 0)
-#define  ZORRO_PROD_PHASE5_CYBERVISION64_3D			ZORRO_ID(PHASE5, 0x43, 0)
-#define  ZORRO_PROD_PHASE5_CYBERSTORM_MK_III			ZORRO_ID(PHASE5, 0x64, 0)
-#define  ZORRO_PROD_PHASE5_BLIZZARD_603E_PLUS			ZORRO_ID(PHASE5, 0x6e, 0)
-
-#define ZORRO_MANUF_DPS						0x2169
-#define  ZORRO_PROD_DPS_PERSONAL_ANIMATION_RECORDER		ZORRO_ID(DPS, 0x01, 0)
-
-#define ZORRO_MANUF_APOLLO_2					0x2200
-#define  ZORRO_PROD_APOLLO_A620_68020_1				ZORRO_ID(APOLLO_2, 0x00, 0)
-#define  ZORRO_PROD_APOLLO_A620_68020_2				ZORRO_ID(APOLLO_2, 0x01, 0)
-
-#define ZORRO_MANUF_APOLLO_3					0x2222
-#define  ZORRO_PROD_APOLLO_AT_APOLLO				ZORRO_ID(APOLLO_3, 0x22, 0)
-#define  ZORRO_PROD_APOLLO_1230_1240_1260_2030_4040_4060	ZORRO_ID(APOLLO_3, 0x23, 0)
-
-#define ZORRO_MANUF_PETSOFF_LP					0x38A5
-#define  ZORRO_PROD_PETSOFF_LP_DELFINA				ZORRO_ID(PETSOFF_LP, 0x00, 0)
-#define  ZORRO_PROD_PETSOFF_LP_DELFINA_LITE			ZORRO_ID(PETSOFF_LP, 0x01, 0)
-
-#define ZORRO_MANUF_UWE_GERLACH					0x3FF7
-#define  ZORRO_PROD_UWE_GERLACH_RAM_ROM				ZORRO_ID(UWE_GERLACH, 0xd4, 0)
-
-#define ZORRO_MANUF_ACT						0x4231
-#define  ZORRO_PROD_ACT_PRELUDE					ZORRO_ID(ACT, 0x01, 0)
-
-#define ZORRO_MANUF_MACROSYSTEMS_GERMANY			0x4754
-#define  ZORRO_PROD_MACROSYSTEMS_MAESTRO			ZORRO_ID(MACROSYSTEMS_GERMANY, 0x03, 0)
-#define  ZORRO_PROD_MACROSYSTEMS_VLAB				ZORRO_ID(MACROSYSTEMS_GERMANY, 0x04, 0)
-#define  ZORRO_PROD_MACROSYSTEMS_MAESTRO_PRO			ZORRO_ID(MACROSYSTEMS_GERMANY, 0x05, 0)
-#define  ZORRO_PROD_MACROSYSTEMS_RETINA				ZORRO_ID(MACROSYSTEMS_GERMANY, 0x06, 0)
-#define  ZORRO_PROD_MACROSYSTEMS_MULTI_EVOLUTION		ZORRO_ID(MACROSYSTEMS_GERMANY, 0x08, 0)
-#define  ZORRO_PROD_MACROSYSTEMS_TOCCATA			ZORRO_ID(MACROSYSTEMS_GERMANY, 0x0C, 0)
-#define  ZORRO_PROD_MACROSYSTEMS_RETINA_Z3			ZORRO_ID(MACROSYSTEMS_GERMANY, 0x10, 0)
-#define  ZORRO_PROD_MACROSYSTEMS_VLAB_MOTION			ZORRO_ID(MACROSYSTEMS_GERMANY, 0x12, 0)
-#define  ZORRO_PROD_MACROSYSTEMS_ALTAIS				ZORRO_ID(MACROSYSTEMS_GERMANY, 0x13, 0)
-#define  ZORRO_PROD_MACROSYSTEMS_FALCON_040			ZORRO_ID(MACROSYSTEMS_GERMANY, 0xFD, 0)
-
-#define ZORRO_MANUF_COMBITEC					0x6766
-
-#define ZORRO_MANUF_SKI_PERIPHERALS				0x8000
-#define  ZORRO_PROD_SKI_PERIPHERALS_MAST_FIREBALL		ZORRO_ID(SKI_PERIPHERALS, 0x08, 0)
-#define  ZORRO_PROD_SKI_PERIPHERALS_SCSI_DUAL_SERIAL		ZORRO_ID(SKI_PERIPHERALS, 0x80, 0)
-
-#define ZORRO_MANUF_REIS_WARE_2					0xA9AD
-#define  ZORRO_PROD_REIS_WARE_SCAN_KING				ZORRO_ID(REIS_WARE_2, 0x11, 0)
-
-#define ZORRO_MANUF_CAMERON					0xAA01
-#define  ZORRO_PROD_CAMERON_PERSONAL_A4				ZORRO_ID(CAMERON, 0x10, 0)
-
-#define ZORRO_MANUF_REIS_WARE					0xAA11
-#define  ZORRO_PROD_REIS_WARE_HANDYSCANNER			ZORRO_ID(REIS_WARE, 0x11, 0)
-
-#define ZORRO_MANUF_PHOENIX_2					0xB5A8
-#define  ZORRO_PROD_PHOENIX_ST506_2				ZORRO_ID(PHOENIX_2, 0x21, 0)
-#define  ZORRO_PROD_PHOENIX_SCSI_2				ZORRO_ID(PHOENIX_2, 0x22, 0)
-#define  ZORRO_PROD_PHOENIX_RAM_2				ZORRO_ID(PHOENIX_2, 0xBE, 0)
-
-#define ZORRO_MANUF_COMBITEC_2					0xC008
-#define  ZORRO_PROD_COMBITEC_HD					ZORRO_ID(COMBITEC_2, 0x2A, 0)
-#define  ZORRO_PROD_COMBITEC_SRAM				ZORRO_ID(COMBITEC_2, 0x2B, 0)
-
-
-    /*
-     *  Test and illegal Manufacturer IDs.
-     */
-
-#define ZORRO_MANUF_HACKER					0x07DB
-#define  ZORRO_PROD_GENERAL_PROTOTYPE				ZORRO_ID(HACKER, 0x00, 0)
-#define  ZORRO_PROD_HACKER_SCSI					ZORRO_ID(HACKER, 0x01, 0)
-#define  ZORRO_PROD_RESOURCE_MANAGEMENT_FORCE_QUICKNET_QN2000	ZORRO_ID(HACKER, 0x02, 0)
-#define  ZORRO_PROD_VECTOR_CONNECTION_2				ZORRO_ID(HACKER, 0xE0, 0)
-#define  ZORRO_PROD_VECTOR_CONNECTION_3				ZORRO_ID(HACKER, 0xE1, 0)
-#define  ZORRO_PROD_VECTOR_CONNECTION_4				ZORRO_ID(HACKER, 0xE2, 0)
-#define  ZORRO_PROD_VECTOR_CONNECTION_5				ZORRO_ID(HACKER, 0xE3, 0)
+/* Include the ID list */
+#include <linux/zorro_ids.h>
 
 
     /*
@@ -704,7 +159,7 @@ struct zorro_dev {
     zorro_id id;
     u16 slotaddr;
     u16 slotsize;
-    char name[48];
+    char name[64];
     struct resource resource;
 };
 
@@ -717,6 +172,7 @@ extern struct zorro_dev zorro_autocon[ZORRO_NUM_AUTO];
      */
 
 extern void zorro_init(void);
+extern void zorro_name_device(struct zorro_dev *dev);
 
 extern struct zorro_dev *zorro_find_device(zorro_id id,
 					   struct zorro_dev *from);
diff --git a/include/linux/zorro_ids.h b/include/linux/zorro_ids.h
new file mode 100644
index 000000000..0a09d97bc
--- /dev/null
+++ b/include/linux/zorro_ids.h
@@ -0,0 +1,551 @@
+/*
+ *  Zorro board IDs
+ *
+ *  Please keep sorted.
+ */
+
+
+#define ZORRO_MANUF_PACIFIC_PERIPHERALS				0x00D3
+#define  ZORRO_PROD_PACIFIC_PERIPHERALS_SE_2000_A500		ZORRO_ID(PACIFIC_PERIPHERALS, 0x00, 0)
+#define  ZORRO_PROD_PACIFIC_PERIPHERALS_SCSI			ZORRO_ID(PACIFIC_PERIPHERALS, 0x0A, 0)
+
+#define ZORRO_MANUF_MACROSYSTEMS_USA_2				0x0100
+#define  ZORRO_PROD_MACROSYSTEMS_WARP_ENGINE			ZORRO_ID(MACROSYSTEMS_USA_2, 0x13, 0)
+
+#define ZORRO_MANUF_KUPKE_1					0x00DD
+#define  ZORRO_PROD_KUPKE_GOLEM_RAM_BOX_2MB			ZORRO_ID(KUPKE_1, 0x00, 0)
+
+#define ZORRO_MANUF_MEMPHIS					0x0100
+#define  ZORRO_PROD_MEMPHIS_STORMBRINGER			ZORRO_ID(MEMPHIS, 0x00, 0)
+
+#define ZORRO_MANUF_3_STATE					0x0200
+#define  ZORRO_PROD_3_STATE_MEGAMIX_2000			ZORRO_ID(3_STATE, 0x02, 0)
+
+#define ZORRO_MANUF_COMMODORE_BRAUNSCHWEIG			0x0201
+#define  ZORRO_PROD_CBM_A2088_A2286				ZORRO_ID(COMMODORE_BRAUNSCHWEIG, 0x01, 0)
+#define  ZORRO_PROD_CBM_A2286					ZORRO_ID(COMMODORE_BRAUNSCHWEIG, 0x02, 0)
+#define  ZORRO_PROD_CBM_A4091_1					ZORRO_ID(COMMODORE_BRAUNSCHWEIG, 0x54, 0)
+#define  ZORRO_PROD_CBM_A2386SX_1				ZORRO_ID(COMMODORE_BRAUNSCHWEIG, 0x67, 0)
+
+#define ZORRO_MANUF_COMMODORE_WEST_CHESTER_1			0x0202
+#define  ZORRO_PROD_CBM_A2090A					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x01, 0)
+#define  ZORRO_PROD_CBM_A590_A2091_1				ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x02, 0)
+#define  ZORRO_PROD_CBM_A590_A2091_2				ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x03, 0)
+#define  ZORRO_PROD_CBM_A2090B					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x04, 0)
+#define  ZORRO_PROD_CBM_A2060					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x09, 0)
+#define  ZORRO_PROD_CBM_A590_A2052_A2058_A2091			ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x0A, 0)
+#define  ZORRO_PROD_CBM_A560_RAM				ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x20, 0)
+#define  ZORRO_PROD_CBM_A2232_PROTOTYPE				ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x45, 0)
+#define  ZORRO_PROD_CBM_A2232					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x46, 0)
+#define  ZORRO_PROD_CBM_A2620					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x50, 0)
+#define  ZORRO_PROD_CBM_A2630					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x51, 0)
+#define  ZORRO_PROD_CBM_A4091_2					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x54, 0)
+#define  ZORRO_PROD_CBM_A2065_1					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x5A, 0)
+#define  ZORRO_PROD_CBM_ROMULATOR				ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x60, 0)
+#define  ZORRO_PROD_CBM_A3000_TEST_FIXTURE			ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x61, 0)
+#define  ZORRO_PROD_CBM_A2386SX_2				ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x67, 0)
+#define  ZORRO_PROD_CBM_A2065_2					ZORRO_ID(COMMODORE_WEST_CHESTER_1, 0x70, 0)
+
+#define ZORRO_MANUF_COMMODORE_WEST_CHESTER_2			0x0203
+#define  ZORRO_PROD_CBM_A2090A_CM				ZORRO_ID(COMMODORE_WEST_CHESTER_2, 0x03, 0)
+
+#define ZORRO_MANUF_PROGRESSIVE_PERIPHERALS_AND_SYSTEMS_2	0x02F4
+#define  ZORRO_PROD_PPS_EXP8000					ZORRO_ID(PROGRESSIVE_PERIPHERALS_AND_SYSTEMS_2, 0x02, 0)
+
+#define ZORRO_MANUF_KOLFF_COMPUTER_SUPPLIES			0x02FF
+#define  ZORRO_PROD_KCS_POWER_PC_BOARD				ZORRO_ID(KOLFF_COMPUTER_SUPPLIES, 0x00, 0)
+
+#define ZORRO_MANUF_CARDCO_1					0x03EC
+#define  ZORRO_PROD_CARDCO_KRONOS_2000_1			ZORRO_ID(CARDCO_1, 0x04, 0)
+#define  ZORRO_PROD_CARDCO_A1000_1				ZORRO_ID(CARDCO_1, 0x0C, 0)
+#define  ZORRO_PROD_CARDCO_ESCORT				ZORRO_ID(CARDCO_1, 0x0E, 0)
+#define  ZORRO_PROD_CARDCO_A2410				ZORRO_ID(CARDCO_1, 0xF5, 0)
+
+#define ZORRO_MANUF_A_SQUARED					0x03ED
+#define  ZORRO_PROD_A_SQUARED_LIVE_2000				ZORRO_ID(A_SQUARED, 0x01, 0)
+
+#define ZORRO_MANUF_COMSPEC_COMMUNICATIONS			0x03EE
+#define  ZORRO_PROD_COMSPEC_COMMUNICATIONS_AX2000		ZORRO_ID(COMSPEC_COMMUNICATIONS, 0x01, 0)
+
+#define ZORRO_MANUF_ANAKIN_RESEARCH				0x03F1
+#define  ZORRO_PROD_ANAKIN_RESEARCH_EASYL			ZORRO_ID(ANAKIN_RESEARCH, 0x01, 0)
+
+#define ZORRO_MANUF_MICROBOTICS					0x03F2
+#define  ZORRO_PROD_MICROBOTICS_STARBOARD_II			ZORRO_ID(MICROBOTICS, 0x00, 0)
+#define  ZORRO_PROD_MICROBOTICS_STARDRIVE			ZORRO_ID(MICROBOTICS, 0x02, 0)
+#define  ZORRO_PROD_MICROBOTICS_8_UP_A				ZORRO_ID(MICROBOTICS, 0x03, 0)
+#define  ZORRO_PROD_MICROBOTICS_8_UP_Z				ZORRO_ID(MICROBOTICS, 0x04, 0)
+#define  ZORRO_PROD_MICROBOTICS_DELTA_RAM			ZORRO_ID(MICROBOTICS, 0x20, 0)
+#define  ZORRO_PROD_MICROBOTICS_8_STAR_RAM			ZORRO_ID(MICROBOTICS, 0x40, 0)
+#define  ZORRO_PROD_MICROBOTICS_8_STAR				ZORRO_ID(MICROBOTICS, 0x41, 0)
+#define  ZORRO_PROD_MICROBOTICS_VXL_RAM_32			ZORRO_ID(MICROBOTICS, 0x44, 0)
+#define  ZORRO_PROD_MICROBOTICS_VXL_68030			ZORRO_ID(MICROBOTICS, 0x45, 0)
+#define  ZORRO_PROD_MICROBOTICS_DELTA				ZORRO_ID(MICROBOTICS, 0x60, 0)
+#define  ZORRO_PROD_MICROBOTICS_MBX_1200_1200Z_RAM		ZORRO_ID(MICROBOTICS, 0x81, 0)
+#define  ZORRO_PROD_MICROBOTICS_HARDFRAME_2000_1		ZORRO_ID(MICROBOTICS, 0x96, 0)
+#define  ZORRO_PROD_MICROBOTICS_HARDFRAME_2000_2		ZORRO_ID(MICROBOTICS, 0x9E, 0)
+#define  ZORRO_PROD_MICROBOTICS_MBX_1200_1200Z			ZORRO_ID(MICROBOTICS, 0xC1, 0)
+
+#define ZORRO_MANUF_ACCESS_ASSOCIATES_ALEGRA			0x03F4
+
+#define ZORRO_MANUF_EXPANSION_TECHNOLOGIES			0x03F6
+
+#define ZORRO_MANUF_ASDG					0x03FF
+#define  ZORRO_PROD_ASDG_MEMORY_1				ZORRO_ID(ASDG, 0x01, 0)
+#define  ZORRO_PROD_ASDG_MEMORY_2				ZORRO_ID(ASDG, 0x02, 0)
+#define  ZORRO_PROD_ASDG_EB920_LAN_ROVER			ZORRO_ID(ASDG, 0xFE, 0)
+#define  ZORRO_PROD_ASDG_GPIB_DUALIEEE488_TWIN_X		ZORRO_ID(ASDG, 0xFF, 0)
+
+#define ZORRO_MANUF_IMTRONICS_1					0x0404
+#define  ZORRO_PROD_IMTRONICS_HURRICANE_2800_1			ZORRO_ID(IMTRONICS_1, 0x39, 0)
+#define  ZORRO_PROD_IMTRONICS_HURRICANE_2800_2			ZORRO_ID(IMTRONICS_1, 0x57, 0)
+
+#define ZORRO_MANUF_CBM_UNIVERSITY_OF_LOWELL			0x0406
+#define  ZORRO_PROD_CBM_A2410					ZORRO_ID(CBM_UNIVERSITY_OF_LOWELL, 0x00, 0)
+
+#define ZORRO_MANUF_AMERISTAR					0x041D
+#define  ZORRO_PROD_AMERISTAR_A2065				ZORRO_ID(AMERISTAR, 0x01, 0)
+#define  ZORRO_PROD_AMERISTAR_A560				ZORRO_ID(AMERISTAR, 0x09, 0)
+#define  ZORRO_PROD_AMERISTAR_A4066				ZORRO_ID(AMERISTAR, 0x0A, 0)
+
+#define ZORRO_MANUF_SUPRA					0x0420
+#define  ZORRO_PROD_SUPRA_SUPRADRIVE_4x4			ZORRO_ID(SUPRA, 0x01, 0)
+#define  ZORRO_PROD_SUPRA_1000_RAM				ZORRO_ID(SUPRA, 0x02, 0)
+#define  ZORRO_PROD_SUPRA_2000_DMA				ZORRO_ID(SUPRA, 0x03, 0)
+#define  ZORRO_PROD_SUPRA_500					ZORRO_ID(SUPRA, 0x05, 0)
+#define  ZORRO_PROD_SUPRA_500_SCSI				ZORRO_ID(SUPRA, 0x08, 0)
+#define  ZORRO_PROD_SUPRA_500XP_2000_RAM			ZORRO_ID(SUPRA, 0x09, 0)
+#define  ZORRO_PROD_SUPRA_500RX_2000_RAM			ZORRO_ID(SUPRA, 0x0A, 0)
+#define  ZORRO_PROD_SUPRA_2400ZI				ZORRO_ID(SUPRA, 0x0B, 0)
+#define  ZORRO_PROD_SUPRA_500XP_SUPRADRIVE_WORDSYNC		ZORRO_ID(SUPRA, 0x0C, 0)
+#define  ZORRO_PROD_SUPRA_SUPRADRIVE_WORDSYNC_II		ZORRO_ID(SUPRA, 0x0D, 0)
+#define  ZORRO_PROD_SUPRA_2400ZIPLUS				ZORRO_ID(SUPRA, 0x10, 0)
+
+#define ZORRO_MANUF_COMPUTER_SYSTEMS_ASSOCIATES			0x0422
+#define  ZORRO_PROD_CSA_MAGNUM					ZORRO_ID(COMPUTER_SYSTEMS_ASSOCIATES, 0x11, 0)
+#define  ZORRO_PROD_CSA_12_GAUGE				ZORRO_ID(COMPUTER_SYSTEMS_ASSOCIATES, 0x15, 0)
+
+#define ZORRO_MANUF_MARC_MICHAEL_GROTH				0x0439
+
+#define ZORRO_MANUF_M_TECH					0x0502
+#define  ZORRO_PROD_MTEC_AT500_1				ZORRO_ID(M_TECH, 0x03, 0)
+
+#define ZORRO_MANUF_GREAT_VALLEY_PRODUCTS_1			0x06E1
+#define  ZORRO_PROD_GVP_IMPACT_SERIES_I				ZORRO_ID(GREAT_VALLEY_PRODUCTS_1, 0x08, 0)
+
+#define ZORRO_MANUF_BYTEBOX					0x07DA
+#define  ZORRO_PROD_BYTEBOX_A500				ZORRO_ID(BYTEBOX, 0x00, 0)
+
+#define ZORRO_MANUF_DKB_POWER_COMPUTING				0x07DC
+#define  ZORRO_PROD_DKB_POWER_COMPUTING_SECUREKEY		ZORRO_ID(DKB_POWER_COMPUTING, 0x09, 0)
+#define  ZORRO_PROD_DKB_POWER_COMPUTING_DKM_3128		ZORRO_ID(DKB_POWER_COMPUTING, 0x0E, 0)
+#define  ZORRO_PROD_DKB_POWER_COMPUTING_RAPID_FIRE		ZORRO_ID(DKB_POWER_COMPUTING, 0x0F, 0)
+#define  ZORRO_PROD_DKB_POWER_COMPUTING_DKM_1202		ZORRO_ID(DKB_POWER_COMPUTING, 0x10, 0)
+#define  ZORRO_PROD_DKB_POWER_COMPUTING_COBRA_VIPER_II_68EC030	ZORRO_ID(DKB_POWER_COMPUTING, 0x12, 0)
+#define  ZORRO_PROD_DKB_POWER_COMPUTING_WILDFIRE_060_1		ZORRO_ID(DKB_POWER_COMPUTING, 0x17, 0)
+#define  ZORRO_PROD_DKB_POWER_COMPUTING_WILDFIRE_060_2		ZORRO_ID(DKB_POWER_COMPUTING, 0xFF, 0)
+
+#define ZORRO_MANUF_GREAT_VALLEY_PRODUCTS_2			0x07E1
+#define  ZORRO_PROD_GVP_IMPACT_SERIES_I_4K			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x01, 0)
+#define  ZORRO_PROD_GVP_IMPACT_SERIES_I_16K_2			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x02, 0)
+#define  ZORRO_PROD_GVP_IMPACT_SERIES_I_16K_3			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x03, 0)
+#define  ZORRO_PROD_GVP_IMPACT_3001_IDE_1			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x08, 0)
+#define  ZORRO_PROD_GVP_IMPACT_3001_RAM				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x09, 0)
+#define  ZORRO_PROD_GVP_IMPACT_SERIES_II_RAM_1			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0A, 0)
+#define  ZORRO_PROD_GVP_EPC_BASE				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0)
+#define  ZORRO_PROD_GVP_GFORCE_040_1				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0x20)
+#define  ZORRO_PROD_GVP_GFORCE_040_SCSI_1			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0x30)
+#define  ZORRO_PROD_GVP_A1291					ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0x40)
+#define  ZORRO_PROD_GVP_COMBO_030_R4				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0x60)
+#define  ZORRO_PROD_GVP_COMBO_030_R4_SCSI			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0x70)
+#define  ZORRO_PROD_GVP_PHONEPAK				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0x78)
+#define  ZORRO_PROD_GVP_IO_EXTENDER				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0x98)
+#define  ZORRO_PROD_GVP_GFORCE_030				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0xa0)
+#define  ZORRO_PROD_GVP_GFORCE_030_SCSI				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0xb0)
+#define  ZORRO_PROD_GVP_A530					ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0xc0)
+#define  ZORRO_PROD_GVP_A530_SCSI				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0xd0)
+#define  ZORRO_PROD_GVP_COMBO_030_R3				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0xe0)
+#define  ZORRO_PROD_GVP_COMBO_030_R3_SCSI			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0xf0)
+#define  ZORRO_PROD_GVP_SERIES_II				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0B, 0xf8)
+#define  ZORRO_PROD_GVP_IMPACT_3001_IDE_2			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0D, 0)
+/*#define  ZORRO_PROD_GVP_A2000_030				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0D, 0)*/
+/*#define  ZORRO_PROD_GVP_GFORCE_040_SCSI_2			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x0D, 0)*/
+#define  ZORRO_PROD_GVP_GFORCE_040_060				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x16, 0)
+#define  ZORRO_PROD_GVP_IMPACT_VISION_24			ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0x20, 0)
+#define  ZORRO_PROD_GVP_GFORCE_040_2				ZORRO_ID(GREAT_VALLEY_PRODUCTS_2, 0xFF, 0)
+
+#define ZORRO_MANUF_CALIFORNIA_ACCESS_SYNERGY			0x07E5
+#define  ZORRO_PROD_CALIFORNIA_ACCESS_SYNERGY_MALIBU		ZORRO_ID(CALIFORNIA_ACCESS_SYNERGY, 0x01, 0)
+
+#define ZORRO_MANUF_XETEC					0x07E6
+#define  ZORRO_PROD_XETEC_FASTCARD				ZORRO_ID(XETEC, 0x01, 0)
+#define  ZORRO_PROD_XETEC_FASTCARD_RAM				ZORRO_ID(XETEC, 0x02, 0)
+#define  ZORRO_PROD_XETEC_FASTCARD_PLUS				ZORRO_ID(XETEC, 0x03, 0)
+
+#define ZORRO_MANUF_PROGRESSIVE_PERIPHERALS_AND_SYSTEMS		0x07EA
+#define  ZORRO_PROD_PPS_MERCURY					ZORRO_ID(PROGRESSIVE_PERIPHERALS_AND_SYSTEMS, 0x00, 0)
+#define  ZORRO_PROD_PPS_A3000_68040				ZORRO_ID(PROGRESSIVE_PERIPHERALS_AND_SYSTEMS, 0x01, 0)
+#define  ZORRO_PROD_PPS_A2000_68040				ZORRO_ID(PROGRESSIVE_PERIPHERALS_AND_SYSTEMS, 0x69, 0)
+#define  ZORRO_PROD_PPS_ZEUS					ZORRO_ID(PROGRESSIVE_PERIPHERALS_AND_SYSTEMS, 0x96, 0)
+#define  ZORRO_PROD_PPS_A500_68040				ZORRO_ID(PROGRESSIVE_PERIPHERALS_AND_SYSTEMS, 0xBB, 0)
+
+#define ZORRO_MANUF_XEBEC					0x07EC
+
+#define ZORRO_MANUF_SPIRIT_TECHNOLOGY				0x07F2
+#define  ZORRO_PROD_SPIRIT_TECHNOLOGY_INSIDER_IN1000		ZORRO_ID(SPIRIT_TECHNOLOGY, 0x01, 0)
+#define  ZORRO_PROD_SPIRIT_TECHNOLOGY_INSIDER_IN500		ZORRO_ID(SPIRIT_TECHNOLOGY, 0x02, 0)
+#define  ZORRO_PROD_SPIRIT_TECHNOLOGY_SIN500			ZORRO_ID(SPIRIT_TECHNOLOGY, 0x03, 0)
+#define  ZORRO_PROD_SPIRIT_TECHNOLOGY_HDA_506			ZORRO_ID(SPIRIT_TECHNOLOGY, 0x04, 0)
+#define  ZORRO_PROD_SPIRIT_TECHNOLOGY_AX_S			ZORRO_ID(SPIRIT_TECHNOLOGY, 0x05, 0)
+#define  ZORRO_PROD_SPIRIT_TECHNOLOGY_OCTABYTE			ZORRO_ID(SPIRIT_TECHNOLOGY, 0x06, 0)
+#define  ZORRO_PROD_SPIRIT_TECHNOLOGY_INMATE			ZORRO_ID(SPIRIT_TECHNOLOGY, 0x08, 0)
+
+#define ZORRO_MANUF_SPIRIT_TECHNOLOGY_2				0x07F3
+
+#define ZORRO_MANUF_BSC_ALFADATA_1				0x07FE
+#define  ZORRO_PROD_BSC_ALF_3_1					ZORRO_ID(BSC_ALFADATA_1, 0x03, 0)
+
+#define ZORRO_MANUF_BSC_ALFADATA_2				0x0801
+#define  ZORRO_PROD_BSC_ALF_2_1					ZORRO_ID(BSC_ALFADATA_2, 0x01, 0)
+#define  ZORRO_PROD_BSC_ALF_2_2					ZORRO_ID(BSC_ALFADATA_2, 0x02, 0)
+#define  ZORRO_PROD_BSC_ALF_3_2					ZORRO_ID(BSC_ALFADATA_2, 0x03, 0)
+
+#define ZORRO_MANUF_CARDCO_2					0x0802
+#define  ZORRO_PROD_CARDCO_KRONOS_2000_2			ZORRO_ID(CARDCO_2, 0x04, 0)
+#define  ZORRO_PROD_CARDCO_A1000_2				ZORRO_ID(CARDCO_2, 0x0C, 0)
+
+#define ZORRO_MANUF_JOCHHEIM					0x0804
+#define  ZORRO_PROD_JOCHHEIM_RAM				ZORRO_ID(JOCHHEIM, 0x01, 0)
+
+#define ZORRO_MANUF_CHECKPOINT_TECHNOLOGIES			0x0807
+#define  ZORRO_PROD_CHECKPOINT_TECHNOLOGIES_SERIAL_SOLUTION	ZORRO_ID(CHECKPOINT_TECHNOLOGIES, 0x00, 0)
+
+#define ZORRO_MANUF_EDOTRONIK					0x0810
+#define  ZORRO_PROD_EDOTRONIK_IEEE_488				ZORRO_ID(EDOTRONIK, 0x01, 0)
+#define  ZORRO_PROD_EDOTRONIK_8032				ZORRO_ID(EDOTRONIK, 0x02, 0)
+#define  ZORRO_PROD_EDOTRONIK_MULTISERIAL			ZORRO_ID(EDOTRONIK, 0x03, 0)
+#define  ZORRO_PROD_EDOTRONIK_VIDEODIGITIZER			ZORRO_ID(EDOTRONIK, 0x04, 0)
+#define  ZORRO_PROD_EDOTRONIK_PARALLEL_IO			ZORRO_ID(EDOTRONIK, 0x05, 0)
+#define  ZORRO_PROD_EDOTRONIK_PIC_PROTOYPING			ZORRO_ID(EDOTRONIK, 0x06, 0)
+#define  ZORRO_PROD_EDOTRONIK_ADC				ZORRO_ID(EDOTRONIK, 0x07, 0)
+#define  ZORRO_PROD_EDOTRONIK_VME				ZORRO_ID(EDOTRONIK, 0x08, 0)
+#define  ZORRO_PROD_EDOTRONIK_DSP96000				ZORRO_ID(EDOTRONIK, 0x09, 0)
+
+#define ZORRO_MANUF_NES_INC					0x0813
+#define  ZORRO_PROD_NES_INC_RAM					ZORRO_ID(NES_INC, 0x00, 0)
+
+#define ZORRO_MANUF_ICD						0x0817
+#define  ZORRO_PROD_ICD_ADVANTAGE_2000_SCSI			ZORRO_ID(ICD, 0x01, 0)
+#define  ZORRO_PROD_ICD_ADVANTAGE_IDE				ZORRO_ID(ICD, 0x03, 0)
+#define  ZORRO_PROD_ICD_ADVANTAGE_2080_RAM			ZORRO_ID(ICD, 0x04, 0)
+
+#define ZORRO_MANUF_KUPKE_2					0x0819
+#define  ZORRO_PROD_KUPKE_OMTI					ZORRO_ID(KUPKE_2, 0x01, 0)
+#define  ZORRO_PROD_KUPKE_SCSI_II				ZORRO_ID(KUPKE_2, 0x02, 0)
+#define  ZORRO_PROD_KUPKE_GOLEM_BOX				ZORRO_ID(KUPKE_2, 0x03, 0)
+#define  ZORRO_PROD_KUPKE_030_882				ZORRO_ID(KUPKE_2, 0x04, 0)
+#define  ZORRO_PROD_KUPKE_SCSI_AT				ZORRO_ID(KUPKE_2, 0x05, 0)
+
+#define ZORRO_MANUF_GREAT_VALLEY_PRODUCTS_3			0x081D
+#define  ZORRO_PROD_GVP_A2000_RAM8				ZORRO_ID(GREAT_VALLEY_PRODUCTS_3, 0x09, 0)
+#define  ZORRO_PROD_GVP_IMPACT_SERIES_II_RAM_2			ZORRO_ID(GREAT_VALLEY_PRODUCTS_3, 0x0A, 0)
+
+#define ZORRO_MANUF_INTERWORKS_NETWORK				0x081E
+
+#define ZORRO_MANUF_HARDITAL_SYNTHESIS				0x0820
+#define  ZORRO_PROD_HARDITAL_SYNTHESIS_TQM_68030_68882		ZORRO_ID(HARDITAL_SYNTHESIS, 0x14, 0)
+
+#define ZORRO_MANUF_APPLIED_ENGINEERING				0x0828
+#define  ZORRO_PROD_APPLIED_ENGINEERING_DL2000			ZORRO_ID(APPLIED_ENGINEERING, 0x10, 0)
+#define  ZORRO_PROD_APPLIED_ENGINEERING_RAM_WORKS		ZORRO_ID(APPLIED_ENGINEERING, 0xE0, 0)
+
+#define ZORRO_MANUF_BSC_ALFADATA_3				0x082C
+#define  ZORRO_PROD_BSC_OKTAGON_2008				ZORRO_ID(BSC_ALFADATA_3, 0x05, 0)
+#define  ZORRO_PROD_BSC_TANDEM_AT_2008_508			ZORRO_ID(BSC_ALFADATA_3, 0x06, 0)
+#define  ZORRO_PROD_BSC_ALFA_RAM_1200				ZORRO_ID(BSC_ALFADATA_3, 0x07, 0)
+#define  ZORRO_PROD_BSC_OKTAGON_2008_RAM			ZORRO_ID(BSC_ALFADATA_3, 0x08, 0)
+#define  ZORRO_PROD_BSC_MULTIFACE_I				ZORRO_ID(BSC_ALFADATA_3, 0x10, 0)
+#define  ZORRO_PROD_BSC_MULTIFACE_II				ZORRO_ID(BSC_ALFADATA_3, 0x11, 0)
+#define  ZORRO_PROD_BSC_MULTIFACE_III				ZORRO_ID(BSC_ALFADATA_3, 0x12, 0)
+#define  ZORRO_PROD_BSC_FRAMEMASTER_II				ZORRO_ID(BSC_ALFADATA_3, 0x20, 0)
+#define  ZORRO_PROD_BSC_GRAFFITI_RAM				ZORRO_ID(BSC_ALFADATA_3, 0x21, 0)
+#define  ZORRO_PROD_BSC_GRAFFITI_REG				ZORRO_ID(BSC_ALFADATA_3, 0x22, 0)
+#define  ZORRO_PROD_BSC_ISDN_MASTERCARD				ZORRO_ID(BSC_ALFADATA_3, 0x40, 0)
+#define  ZORRO_PROD_BSC_ISDN_MASTERCARD_II			ZORRO_ID(BSC_ALFADATA_3, 0x41, 0)
+
+#define ZORRO_MANUF_PHOENIX					0x0835
+#define  ZORRO_PROD_PHOENIX_ST506				ZORRO_ID(PHOENIX, 0x21, 0)
+#define  ZORRO_PROD_PHOENIX_SCSI				ZORRO_ID(PHOENIX, 0x22, 0)
+#define  ZORRO_PROD_PHOENIX_RAM					ZORRO_ID(PHOENIX, 0xBE, 0)
+
+#define ZORRO_MANUF_ADVANCED_STORAGE_SYSTEMS			0x0836
+#define  ZORRO_PROD_ADVANCED_STORAGE_SYSTEMS_NEXUS		ZORRO_ID(ADVANCED_STORAGE_SYSTEMS, 0x01, 0)
+#define  ZORRO_PROD_ADVANCED_STORAGE_SYSTEMS_NEXUS_RAM		ZORRO_ID(ADVANCED_STORAGE_SYSTEMS, 0x08, 0)
+
+#define ZORRO_MANUF_IMPULSE					0x0838
+#define  ZORRO_PROD_IMPULSE_FIRECRACKER_24			ZORRO_ID(IMPULSE, 0x00, 0)
+
+#define ZORRO_MANUF_IVS						0x0840
+#define  ZORRO_PROD_IVS_GRANDSLAM_PIC_2				ZORRO_ID(IVS, 0x02, 0)
+#define  ZORRO_PROD_IVS_GRANDSLAM_PIC_1				ZORRO_ID(IVS, 0x04, 0)
+#define  ZORRO_PROD_IVS_OVERDRIVE				ZORRO_ID(IVS, 0x10, 0)
+#define  ZORRO_PROD_IVS_TRUMPCARD_CLASSIC			ZORRO_ID(IVS, 0x30, 0)
+#define  ZORRO_PROD_IVS_TRUMPCARD_PRO_GRANDSLAM			ZORRO_ID(IVS, 0x34, 0)
+#define  ZORRO_PROD_IVS_META_4					ZORRO_ID(IVS, 0x40, 0)
+#define  ZORRO_PROD_IVS_WAVETOOLS				ZORRO_ID(IVS, 0xBF, 0)
+#define  ZORRO_PROD_IVS_VECTOR_1				ZORRO_ID(IVS, 0xF3, 0)
+#define  ZORRO_PROD_IVS_VECTOR_2				ZORRO_ID(IVS, 0xF4, 0)
+
+#define ZORRO_MANUF_VECTOR_1					0x0841
+#define  ZORRO_PROD_VECTOR_CONNECTION_1				ZORRO_ID(VECTOR_1, 0xE3, 0)
+
+#define ZORRO_MANUF_XPERT_PRODEV				0x0845
+#define  ZORRO_PROD_XPERT_PRODEV_VISIONA_RAM			ZORRO_ID(XPERT_PRODEV, 0x01, 0)
+#define  ZORRO_PROD_XPERT_PRODEV_VISIONA_REG			ZORRO_ID(XPERT_PRODEV, 0x02, 0)
+#define  ZORRO_PROD_XPERT_PRODEV_MERLIN_RAM			ZORRO_ID(XPERT_PRODEV, 0x03, 0)
+#define  ZORRO_PROD_XPERT_PRODEV_MERLIN_REG_1			ZORRO_ID(XPERT_PRODEV, 0x04, 0)
+#define  ZORRO_PROD_XPERT_PRODEV_MERLIN_REG_2			ZORRO_ID(XPERT_PRODEV, 0xC9, 0)
+
+#define ZORRO_MANUF_HYDRA_SYSTEMS				0x0849
+#define  ZORRO_PROD_HYDRA_SYSTEMS_AMIGANET			ZORRO_ID(HYDRA_SYSTEMS, 0x01, 0)
+
+#define ZORRO_MANUF_SUNRIZE_INDUSTRIES				0x084F
+#define  ZORRO_PROD_SUNRIZE_INDUSTRIES_AD1012			ZORRO_ID(SUNRIZE_INDUSTRIES, 0x01, 0)
+#define  ZORRO_PROD_SUNRIZE_INDUSTRIES_AD516			ZORRO_ID(SUNRIZE_INDUSTRIES, 0x02, 0)
+#define  ZORRO_PROD_SUNRIZE_INDUSTRIES_DD512			ZORRO_ID(SUNRIZE_INDUSTRIES, 0x03, 0)
+
+#define ZORRO_MANUF_TRICERATOPS					0x0850
+#define  ZORRO_PROD_TRICERATOPS_MULTI_IO			ZORRO_ID(TRICERATOPS, 0x01, 0)
+
+#define ZORRO_MANUF_APPLIED_MAGIC				0x0851
+#define  ZORRO_PROD_APPLIED_MAGIC_DMI_RESOLVER			ZORRO_ID(APPLIED_MAGIC, 0x01, 0)
+#define  ZORRO_PROD_APPLIED_MAGIC_DIGITAL_BROADCASTER		ZORRO_ID(APPLIED_MAGIC, 0x06, 0)
+
+#define ZORRO_MANUF_GFX_BASE					0x085E
+#define  ZORRO_PROD_GFX_BASE_GDA_1_VRAM				ZORRO_ID(GFX_BASE, 0x00, 0)
+#define  ZORRO_PROD_GFX_BASE_GDA_1				ZORRO_ID(GFX_BASE, 0x01, 0)
+
+#define ZORRO_MANUF_ROCTEC					0x0860
+#define  ZORRO_PROD_ROCTEC_RH_800C				ZORRO_ID(ROCTEC, 0x01, 0)
+#define  ZORRO_PROD_ROCTEC_RH_800C_RAM				ZORRO_ID(ROCTEC, 0x01, 0)
+
+#define ZORRO_MANUF_KATO					0x0861
+#define  ZORRO_PROD_KATO_MELODY					ZORRO_ID(KATO, 0x80, 0)
+/* ID clash!! */
+#define ZORRO_MANUF_HELFRICH_1					0x0861
+#define  ZORRO_PROD_HELFRICH_RAINBOW_II				ZORRO_ID(HELFRICH_1, 0x20, 0)
+#define  ZORRO_PROD_HELFRICH_RAINBOW_III			ZORRO_ID(HELFRICH_1, 0x21, 0)
+
+#define ZORRO_MANUF_ATLANTIS					0x0862
+
+#define ZORRO_MANUF_PROTAR					0x0864
+
+#define ZORRO_MANUF_ACS						0x0865
+
+#define ZORRO_MANUF_SOFTWARE_RESULTS_ENTERPRISES		0x0866
+#define  ZORRO_PROD_SOFTWARE_RESULTS_ENTERPRISES_GOLDEN_GATE_2_BUS_PLUS	ZORRO_ID(SOFTWARE_RESULTS_ENTERPRISES, 0x01, 0)
+
+#define ZORRO_MANUF_MASOBOSHI					0x086D
+#define  ZORRO_PROD_MASOBOSHI_MASTER_CARD_SC201			ZORRO_ID(MASOBOSHI, 0x03, 0)
+#define  ZORRO_PROD_MASOBOSHI_MASTER_CARD_MC702			ZORRO_ID(MASOBOSHI, 0x04, 0)
+#define  ZORRO_PROD_MASOBOSHI_MVD_819				ZORRO_ID(MASOBOSHI, 0x07, 0)
+
+#define ZORRO_MANUF_MAINHATTAN_DATA				0x086F
+#define  ZORRO_PROD_MAINHATTAN_DATA_IDE				ZORRO_ID(MAINHATTAN_DATA, 0x01, 0)
+
+#define ZORRO_MANUF_VILLAGE_TRONIC				0x0877
+#define  ZORRO_PROD_VILLAGE_TRONIC_DOMINO_RAM			ZORRO_ID(VILLAGE_TRONIC, 0x01, 0)
+#define  ZORRO_PROD_VILLAGE_TRONIC_DOMINO_REG			ZORRO_ID(VILLAGE_TRONIC, 0x02, 0)
+#define  ZORRO_PROD_VILLAGE_TRONIC_DOMINO_16M_PROTOTYPE		ZORRO_ID(VILLAGE_TRONIC, 0x03, 0)
+#define  ZORRO_PROD_VILLAGE_TRONIC_PICASSO_II_II_PLUS_RAM	ZORRO_ID(VILLAGE_TRONIC, 0x0B, 0)
+#define  ZORRO_PROD_VILLAGE_TRONIC_PICASSO_II_II_PLUS_REG	ZORRO_ID(VILLAGE_TRONIC, 0x0C, 0)
+#define  ZORRO_PROD_VILLAGE_TRONIC_PICASSO_II_II_PLUS_SEGMENTED_MODE	ZORRO_ID(VILLAGE_TRONIC, 0x0D, 0)
+#define  ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z2_MEM1		ZORRO_ID(VILLAGE_TRONIC, 0x15, 0)
+#define  ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z2_MEM2		ZORRO_ID(VILLAGE_TRONIC, 0x16, 0)
+#define  ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z2_REG		ZORRO_ID(VILLAGE_TRONIC, 0x17, 0)
+#define  ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z3		ZORRO_ID(VILLAGE_TRONIC, 0x18, 0)
+#define  ZORRO_PROD_VILLAGE_TRONIC_ARIADNE			ZORRO_ID(VILLAGE_TRONIC, 0xC9, 0)
+#define  ZORRO_PROD_VILLAGE_TRONIC_ARIADNE2			ZORRO_ID(VILLAGE_TRONIC, 0xCA, 0)
+
+#define ZORRO_MANUF_UTILITIES_UNLIMITED				0x087B
+#define  ZORRO_PROD_UTILITIES_UNLIMITED_EMPLANT_DELUXE		ZORRO_ID(UTILITIES_UNLIMITED, 0x15, 0)
+#define  ZORRO_PROD_UTILITIES_UNLIMITED_EMPLANT_DELUXE2		ZORRO_ID(UTILITIES_UNLIMITED, 0x20, 0)
+
+#define ZORRO_MANUF_AMITRIX					0x0880
+#define  ZORRO_PROD_AMITRIX_MULTI_IO				ZORRO_ID(AMITRIX, 0x01, 0)
+#define  ZORRO_PROD_AMITRIX_CD_RAM				ZORRO_ID(AMITRIX, 0x02, 0)
+
+#define ZORRO_MANUF_ARMAX					0x0885
+#define  ZORRO_PROD_ARMAX_OMNIBUS				ZORRO_ID(ARMAX, 0x00, 0)
+
+#define ZORRO_MANUF_ZEUS					0x088D
+#define  ZORRO_PROD_ZEUS_SPIDER					ZORRO_ID(ZEUS, 0x04, 0)
+
+#define ZORRO_MANUF_NEWTEK					0x088F
+#define  ZORRO_PROD_NEWTEK_VIDEOTOASTER				ZORRO_ID(NEWTEK, 0x00, 0)
+
+#define ZORRO_MANUF_M_TECH_GERMANY				0x0890
+#define  ZORRO_PROD_MTEC_AT500_2				ZORRO_ID(M_TECH_GERMANY, 0x01, 0)
+#define  ZORRO_PROD_MTEC_68030					ZORRO_ID(M_TECH_GERMANY, 0x03, 0)
+#define  ZORRO_PROD_MTEC_68020I					ZORRO_ID(M_TECH_GERMANY, 0x06, 0)
+#define  ZORRO_PROD_MTEC_A1200_T68030_RTC			ZORRO_ID(M_TECH_GERMANY, 0x20, 0)
+#define  ZORRO_PROD_MTEC_VIPER_MK_V_E_MATRIX_530		ZORRO_ID(M_TECH_GERMANY, 0x21, 0)
+#define  ZORRO_PROD_MTEC_8_MB_RAM				ZORRO_ID(M_TECH_GERMANY, 0x22, 0)
+#define  ZORRO_PROD_MTEC_VIPER_MK_V_E_MATRIX_530_SCSI_IDE	ZORRO_ID(M_TECH_GERMANY, 0x24, 0)
+
+#define ZORRO_MANUF_GREAT_VALLEY_PRODUCTS_4			0x0891
+#define  ZORRO_PROD_GVP_EGS_28_24_SPECTRUM_RAM			ZORRO_ID(GREAT_VALLEY_PRODUCTS_4, 0x01, 0)
+#define  ZORRO_PROD_GVP_EGS_28_24_SPECTRUM_REG			ZORRO_ID(GREAT_VALLEY_PRODUCTS_4, 0x02, 0)
+
+#define ZORRO_MANUF_APOLLO_1					0x0892
+#define  ZORRO_PROD_APOLLO_A1200				ZORRO_ID(APOLLO_1, 0x01, 0)
+
+#define ZORRO_MANUF_HELFRICH_2					0x0893
+#define  ZORRO_PROD_HELFRICH_PICCOLO_RAM			ZORRO_ID(HELFRICH_2, 0x05, 0)
+#define  ZORRO_PROD_HELFRICH_PICCOLO_REG			ZORRO_ID(HELFRICH_2, 0x06, 0)
+#define  ZORRO_PROD_HELFRICH_PEGGY_PLUS_MPEG			ZORRO_ID(HELFRICH_2, 0x07, 0)
+#define  ZORRO_PROD_HELFRICH_VIDEOCRUNCHER			ZORRO_ID(HELFRICH_2, 0x08, 0)
+#define  ZORRO_PROD_HELFRICH_SD64_RAM				ZORRO_ID(HELFRICH_2, 0x0A, 0)
+#define  ZORRO_PROD_HELFRICH_SD64_REG				ZORRO_ID(HELFRICH_2, 0x0B, 0)
+
+#define ZORRO_MANUF_MACROSYSTEMS_USA				0x089B
+#define  ZORRO_PROD_MACROSYSTEMS_WARP_ENGINE_40xx		ZORRO_ID(MACROSYSTEMS_USA, 0x13, 0)
+
+#define ZORRO_MANUF_ELBOX_COMPUTER				0x089E
+#define  ZORRO_PROD_ELBOX_COMPUTER_1200_4			ZORRO_ID(ELBOX_COMPUTER, 0x06, 0)
+
+#define ZORRO_MANUF_HARMS_PROFESSIONAL				0x0A00
+#define  ZORRO_PROD_HARMS_PROFESSIONAL_030_PLUS			ZORRO_ID(HARMS_PROFESSIONAL, 0x10, 0)
+#define  ZORRO_PROD_HARMS_PROFESSIONAL_3500			ZORRO_ID(HARMS_PROFESSIONAL, 0xD0, 0)
+
+#define ZORRO_MANUF_MICRONIK					0x0A50
+#define  ZORRO_PROD_MICRONIK_RCA_120				ZORRO_ID(MICRONIK, 0x0A, 0)
+
+#define ZORRO_MANUF_MICRONIK2					0x0F0F
+#define  ZORRO_PROD_MICRONIK2_Z3I				ZORRO_ID(MICRONIK2, 0x01, 0)
+
+#define ZORRO_MANUF_MEGAMICRO					0x1000
+#define  ZORRO_PROD_MEGAMICRO_SCRAM_500				ZORRO_ID(MEGAMICRO, 0x03, 0)
+#define  ZORRO_PROD_MEGAMICRO_SCRAM_500_RAM			ZORRO_ID(MEGAMICRO, 0x04, 0)
+
+#define ZORRO_MANUF_IMTRONICS_2					0x1028
+#define  ZORRO_PROD_IMTRONICS_HURRICANE_2800_3			ZORRO_ID(IMTRONICS_2, 0x39, 0)
+#define  ZORRO_PROD_IMTRONICS_HURRICANE_2800_4			ZORRO_ID(IMTRONICS_2, 0x57, 0)
+
+/* unofficial ID */
+#define ZORRO_MANUF_INDIVIDUAL_COMPUTERS			0x1212
+#define  ZORRO_PROD_INDIVIDUAL_COMPUTERS_BUDDHA			ZORRO_ID(INDIVIDUAL_COMPUTERS, 0x00, 0)
+#define  ZORRO_PROD_INDIVIDUAL_COMPUTERS_CATWEASEL		ZORRO_ID(INDIVIDUAL_COMPUTERS, 0x2A, 0)
+
+#define ZORRO_MANUF_KUPKE_3					0x1248
+#define  ZORRO_PROD_KUPKE_GOLEM_HD_3000				ZORRO_ID(KUPKE_3, 0x01, 0)
+
+#define ZORRO_MANUF_ITH						0x1388
+#define  ZORRO_PROD_ITH_ISDN_MASTER_II				ZORRO_ID(ITH, 0x01, 0)
+
+#define ZORRO_MANUF_VMC						0x1389
+#define  ZORRO_PROD_VMC_ISDN_BLASTER_Z2				ZORRO_ID(VMC, 0x01, 0)
+#define  ZORRO_PROD_VMC_HYPERCOM_4				ZORRO_ID(VMC, 0x02, 0)
+
+#define ZORRO_MANUF_INFORMATION					0x157C
+#define  ZORRO_PROD_INFORMATION_ISDN_ENGINE_I			ZORRO_ID(INFORMATION, 0x64, 0)
+
+#define ZORRO_MANUF_VORTEX					0x2017
+#define  ZORRO_PROD_VORTEX_GOLDEN_GATE_80386SX			ZORRO_ID(VORTEX, 0x07, 0)
+#define  ZORRO_PROD_VORTEX_GOLDEN_GATE_RAM			ZORRO_ID(VORTEX, 0x08, 0)
+#define  ZORRO_PROD_VORTEX_GOLDEN_GATE_80486			ZORRO_ID(VORTEX, 0x09, 0)
+
+#define ZORRO_MANUF_EXPANSION_SYSTEMS				0x2062
+#define  ZORRO_PROD_EXPANSION_SYSTEMS_DATAFLYER_4000SX		ZORRO_ID(EXPANSION_SYSTEMS, 0x01, 0)
+#define  ZORRO_PROD_EXPANSION_SYSTEMS_DATAFLYER_4000SX_RAM	ZORRO_ID(EXPANSION_SYSTEMS, 0x02, 0)
+
+#define ZORRO_MANUF_READYSOFT					0x2100
+#define  ZORRO_PROD_READYSOFT_AMAX_II_IV			ZORRO_ID(READYSOFT, 0x01, 0)
+
+#define ZORRO_MANUF_PHASE5					0x2140
+#define  ZORRO_PROD_PHASE5_BLIZZARD_RAM				ZORRO_ID(PHASE5, 0x01, 0)
+#define  ZORRO_PROD_PHASE5_BLIZZARD				ZORRO_ID(PHASE5, 0x02, 0)
+#define  ZORRO_PROD_PHASE5_BLIZZARD_1220_IV			ZORRO_ID(PHASE5, 0x06, 0)
+#define  ZORRO_PROD_PHASE5_FASTLANE_Z3_RAM			ZORRO_ID(PHASE5, 0x0A, 0)
+#define  ZORRO_PROD_PHASE5_BLIZZARD_1230_II_FASTLANE_Z3_CYBERSCSI_CYBERSTORM060	ZORRO_ID(PHASE5, 0x0B, 0)
+#define  ZORRO_PROD_PHASE5_BLIZZARD_1220_CYBERSTORM		ZORRO_ID(PHASE5, 0x0C, 0)
+#define  ZORRO_PROD_PHASE5_BLIZZARD_1230			ZORRO_ID(PHASE5, 0x0D, 0)
+#define  ZORRO_PROD_PHASE5_BLIZZARD_1230_IV_1260		ZORRO_ID(PHASE5, 0x11, 0)
+#define  ZORRO_PROD_PHASE5_BLIZZARD_2060			ZORRO_ID(PHASE5, 0x18, 0)
+#define  ZORRO_PROD_PHASE5_CYBERSTORM_MK_II			ZORRO_ID(PHASE5, 0x19, 0)
+#define  ZORRO_PROD_PHASE5_CYBERVISION64			ZORRO_ID(PHASE5, 0x22, 0)
+#define  ZORRO_PROD_PHASE5_CYBERVISION64_3D_PROTOTYPE		ZORRO_ID(PHASE5, 0x32, 0)
+#define  ZORRO_PROD_PHASE5_CYBERVISION64_3D			ZORRO_ID(PHASE5, 0x43, 0)
+#define  ZORRO_PROD_PHASE5_CYBERSTORM_MK_III			ZORRO_ID(PHASE5, 0x64, 0)
+#define  ZORRO_PROD_PHASE5_BLIZZARD_603E_PLUS			ZORRO_ID(PHASE5, 0x6e, 0)
+
+#define ZORRO_MANUF_DPS						0x2169
+#define  ZORRO_PROD_DPS_PERSONAL_ANIMATION_RECORDER		ZORRO_ID(DPS, 0x01, 0)
+
+#define ZORRO_MANUF_APOLLO_2					0x2200
+#define  ZORRO_PROD_APOLLO_A620_68020_1				ZORRO_ID(APOLLO_2, 0x00, 0)
+#define  ZORRO_PROD_APOLLO_A620_68020_2				ZORRO_ID(APOLLO_2, 0x01, 0)
+
+#define ZORRO_MANUF_APOLLO_3					0x2222
+#define  ZORRO_PROD_APOLLO_AT_APOLLO				ZORRO_ID(APOLLO_3, 0x22, 0)
+#define  ZORRO_PROD_APOLLO_1230_1240_1260_2030_4040_4060	ZORRO_ID(APOLLO_3, 0x23, 0)
+
+#define ZORRO_MANUF_PETSOFF_LP					0x38A5
+#define  ZORRO_PROD_PETSOFF_LP_DELFINA				ZORRO_ID(PETSOFF_LP, 0x00, 0)
+#define  ZORRO_PROD_PETSOFF_LP_DELFINA_LITE			ZORRO_ID(PETSOFF_LP, 0x01, 0)
+
+#define ZORRO_MANUF_UWE_GERLACH					0x3FF7
+#define  ZORRO_PROD_UWE_GERLACH_RAM_ROM				ZORRO_ID(UWE_GERLACH, 0xd4, 0)
+
+#define ZORRO_MANUF_ACT						0x4231
+#define  ZORRO_PROD_ACT_PRELUDE					ZORRO_ID(ACT, 0x01, 0)
+
+#define ZORRO_MANUF_MACROSYSTEMS_GERMANY			0x4754
+#define  ZORRO_PROD_MACROSYSTEMS_MAESTRO			ZORRO_ID(MACROSYSTEMS_GERMANY, 0x03, 0)
+#define  ZORRO_PROD_MACROSYSTEMS_VLAB				ZORRO_ID(MACROSYSTEMS_GERMANY, 0x04, 0)
+#define  ZORRO_PROD_MACROSYSTEMS_MAESTRO_PRO			ZORRO_ID(MACROSYSTEMS_GERMANY, 0x05, 0)
+#define  ZORRO_PROD_MACROSYSTEMS_RETINA				ZORRO_ID(MACROSYSTEMS_GERMANY, 0x06, 0)
+#define  ZORRO_PROD_MACROSYSTEMS_MULTI_EVOLUTION		ZORRO_ID(MACROSYSTEMS_GERMANY, 0x08, 0)
+#define  ZORRO_PROD_MACROSYSTEMS_TOCCATA			ZORRO_ID(MACROSYSTEMS_GERMANY, 0x0C, 0)
+#define  ZORRO_PROD_MACROSYSTEMS_RETINA_Z3			ZORRO_ID(MACROSYSTEMS_GERMANY, 0x10, 0)
+#define  ZORRO_PROD_MACROSYSTEMS_VLAB_MOTION			ZORRO_ID(MACROSYSTEMS_GERMANY, 0x12, 0)
+#define  ZORRO_PROD_MACROSYSTEMS_ALTAIS				ZORRO_ID(MACROSYSTEMS_GERMANY, 0x13, 0)
+#define  ZORRO_PROD_MACROSYSTEMS_FALCON_040			ZORRO_ID(MACROSYSTEMS_GERMANY, 0xFD, 0)
+
+#define ZORRO_MANUF_COMBITEC					0x6766
+
+#define ZORRO_MANUF_SKI_PERIPHERALS				0x8000
+#define  ZORRO_PROD_SKI_PERIPHERALS_MAST_FIREBALL		ZORRO_ID(SKI_PERIPHERALS, 0x08, 0)
+#define  ZORRO_PROD_SKI_PERIPHERALS_SCSI_DUAL_SERIAL		ZORRO_ID(SKI_PERIPHERALS, 0x80, 0)
+
+#define ZORRO_MANUF_REIS_WARE_2					0xA9AD
+#define  ZORRO_PROD_REIS_WARE_SCAN_KING				ZORRO_ID(REIS_WARE_2, 0x11, 0)
+
+#define ZORRO_MANUF_CAMERON					0xAA01
+#define  ZORRO_PROD_CAMERON_PERSONAL_A4				ZORRO_ID(CAMERON, 0x10, 0)
+
+#define ZORRO_MANUF_REIS_WARE					0xAA11
+#define  ZORRO_PROD_REIS_WARE_HANDYSCANNER			ZORRO_ID(REIS_WARE, 0x11, 0)
+
+#define ZORRO_MANUF_PHOENIX_2					0xB5A8
+#define  ZORRO_PROD_PHOENIX_ST506_2				ZORRO_ID(PHOENIX_2, 0x21, 0)
+#define  ZORRO_PROD_PHOENIX_SCSI_2				ZORRO_ID(PHOENIX_2, 0x22, 0)
+#define  ZORRO_PROD_PHOENIX_RAM_2				ZORRO_ID(PHOENIX_2, 0xBE, 0)
+
+#define ZORRO_MANUF_COMBITEC_2					0xC008
+#define  ZORRO_PROD_COMBITEC_HD					ZORRO_ID(COMBITEC_2, 0x2A, 0)
+#define  ZORRO_PROD_COMBITEC_SRAM				ZORRO_ID(COMBITEC_2, 0x2B, 0)
+
+
+    /*
+     *  Test and illegal Manufacturer IDs.
+     */
+
+#define ZORRO_MANUF_HACKER					0x07DB
+#define  ZORRO_PROD_GENERAL_PROTOTYPE				ZORRO_ID(HACKER, 0x00, 0)
+#define  ZORRO_PROD_HACKER_SCSI					ZORRO_ID(HACKER, 0x01, 0)
+#define  ZORRO_PROD_RESOURCE_MANAGEMENT_FORCE_QUICKNET_QN2000	ZORRO_ID(HACKER, 0x02, 0)
+#define  ZORRO_PROD_VECTOR_CONNECTION_2				ZORRO_ID(HACKER, 0xE0, 0)
+#define  ZORRO_PROD_VECTOR_CONNECTION_3				ZORRO_ID(HACKER, 0xE1, 0)
+#define  ZORRO_PROD_VECTOR_CONNECTION_4				ZORRO_ID(HACKER, 0xE2, 0)
+#define  ZORRO_PROD_VECTOR_CONNECTION_5				ZORRO_ID(HACKER, 0xE3, 0)
diff --git a/include/net/atalkcall.h b/include/net/atalkcall.h
deleted file mode 100644
index 726e33cd9..000000000
--- a/include/net/atalkcall.h
+++ /dev/null
@@ -1,2 +0,0 @@
-/* Separate to keep compilation of protocols.c simpler */
-extern void atalk_proto_init(struct net_proto *pro);
diff --git a/include/net/ax25.h b/include/net/ax25.h
index f0c547d0b..50d4aa889 100644
--- a/include/net/ax25.h
+++ b/include/net/ax25.h
@@ -253,8 +253,6 @@ extern void ax25_ds_heartbeat_expiry(ax25_cb *);
 extern void ax25_ds_t3timer_expiry(ax25_cb *);
 extern void ax25_ds_idletimer_expiry(ax25_cb *);
 
-#include <net/ax25call.h>
-
 /* ax25_iface.c */
 extern int  ax25_protocol_register(unsigned int, int (*)(struct sk_buff *, ax25_cb *));
 extern void ax25_protocol_release(unsigned int);
diff --git a/include/net/ax25call.h b/include/net/ax25call.h
deleted file mode 100644
index 68b8a70c0..000000000
--- a/include/net/ax25call.h
+++ /dev/null
@@ -1,2 +0,0 @@
-/* Separate to keep compilation of protocols.c simpler */
-extern void ax25_proto_init(struct net_proto *pro);
diff --git a/include/net/decnet_call.h b/include/net/decnet_call.h
deleted file mode 100644
index 90a30561e..000000000
--- a/include/net/decnet_call.h
+++ /dev/null
@@ -1,2 +0,0 @@
-/* Separate to keep compilation of protocols.c simpler */
-extern void decnet_proto_init(struct net_proto *pro);
diff --git a/include/net/ipx.h b/include/net/ipx.h
index 667098922..84e7cdb1d 100644
--- a/include/net/ipx.h
+++ b/include/net/ipx.h
@@ -41,8 +41,6 @@ struct ipxhdr
 	ipx_address	ipx_source __attribute__ ((packed));
 };
 
-#include <net/ipxcall.h>
-
 typedef struct ipx_interface {
 	/* IPX address */
 	__u32           if_netnum;
diff --git a/include/net/ipxcall.h b/include/net/ipxcall.h
deleted file mode 100644
index eb5bd2bd2..000000000
--- a/include/net/ipxcall.h
+++ /dev/null
@@ -1,2 +0,0 @@
-/* Separate to keep compilation of protocols.c simpler */
-extern void ipx_proto_init(struct net_proto *pro);
diff --git a/include/net/lapbcall.h b/include/net/lapbcall.h
deleted file mode 100644
index 825e7f2c7..000000000
--- a/include/net/lapbcall.h
+++ /dev/null
@@ -1,2 +0,0 @@
-/* Separate to keep compilation of protocols.c simpler */
-extern void lapb_proto_init(struct net_proto *pro);
diff --git a/include/net/llccall.h b/include/net/llccall.h
deleted file mode 100644
index 07013ba31..000000000
--- a/include/net/llccall.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/* Separate to keep compilation of protocols.c simpler */
-extern void llc_init(struct net_proto *pro);
-
diff --git a/include/net/netbeuicall.h b/include/net/netbeuicall.h
deleted file mode 100644
index 5176f82bf..000000000
--- a/include/net/netbeuicall.h
+++ /dev/null
@@ -1,2 +0,0 @@
-/* Separate to keep compilation of protocols.c simpler */
-extern void netbeui_proto_init(struct net_proto *pro);
diff --git a/include/net/netrom.h b/include/net/netrom.h
index 11aefe5fa..21c9f8b86 100644
--- a/include/net/netrom.h
+++ b/include/net/netrom.h
@@ -121,8 +121,6 @@ extern void nr_destroy_socket(struct sock *);
 extern int  nr_rx_ip(struct sk_buff *, struct net_device *);
 extern int  nr_init(struct net_device *);
 
-#include <net/nrcall.h>
-
 /* nr_in.c */
 extern int  nr_process_rx_frame(struct sock *, struct sk_buff *);
 
diff --git a/include/net/nrcall.h b/include/net/nrcall.h
deleted file mode 100644
index 09ee699d8..000000000
--- a/include/net/nrcall.h
+++ /dev/null
@@ -1,2 +0,0 @@
-/* Separate to keep compilation of protocols.c simpler */
-extern void nr_proto_init(struct net_proto *pro);
diff --git a/include/net/p8022call.h b/include/net/p8022call.h
deleted file mode 100644
index 14f0c2cee..000000000
--- a/include/net/p8022call.h
+++ /dev/null
@@ -1,2 +0,0 @@
-/* Separate to keep compilation of Space.c simpler */
-extern void p8022_proto_init(struct net_proto *);
diff --git a/include/net/psnapcall.h b/include/net/psnapcall.h
deleted file mode 100644
index 9da5763c5..000000000
--- a/include/net/psnapcall.h
+++ /dev/null
@@ -1,2 +0,0 @@
-/* Separate to keep compilation of Space.c simpler */
-extern void snap_proto_init(struct net_proto *);
diff --git a/include/net/rose.h b/include/net/rose.h
index da19fb64f..f1f893e27 100644
--- a/include/net/rose.h
+++ b/include/net/rose.h
@@ -163,8 +163,6 @@ extern void rose_destroy_socket(struct sock *);
 extern int  rose_rx_ip(struct sk_buff *, struct net_device *);
 extern int  rose_init(struct net_device *);
 
-#include <net/rosecall.h>
-
 /* rose_in.c */
 extern int  rose_process_rx_frame(struct sock *, struct sk_buff *);
 
diff --git a/include/net/rosecall.h b/include/net/rosecall.h
deleted file mode 100644
index 5bbe69cce..000000000
--- a/include/net/rosecall.h
+++ /dev/null
@@ -1,2 +0,0 @@
-/* Separate to keep compilation of protocols.c simpler */
-extern void rose_proto_init(struct net_proto *pro);
diff --git a/include/net/sock.h b/include/net/sock.h
index e3527b2f3..75aae4d1b 100644
--- a/include/net/sock.h
+++ b/include/net/sock.h
@@ -202,7 +202,8 @@ struct inet_opt
 	unsigned char		hdrincl;		/* Include headers ? */
 	__u8			mc_ttl;			/* Multicasting TTL */
 	__u8			mc_loop;		/* Loopback */
-	__u8			recverr;
+	unsigned		recverr : 1,
+				freebind : 1;
 	__u8			pmtudisc;
 	int			mc_index;		/* Multicast device index */
 	__u32			mc_addr;
diff --git a/include/net/spxcall.h b/include/net/spxcall.h
deleted file mode 100644
index 0461fbbe1..000000000
--- a/include/net/spxcall.h
+++ /dev/null
@@ -1,2 +0,0 @@
-/* Separate to keep compilation of protocols.c simpler */
-extern void spx_proto_init(struct net_proto *pro);
diff --git a/include/net/tcp.h b/include/net/tcp.h
index 3fdb1e97a..dd8e74ca1 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -42,21 +42,9 @@ struct tcp_ehash_bucket {
 	struct sock	*chain;
 } __attribute__((__aligned__(8)));
 
-extern int tcp_ehash_size;
-extern struct tcp_ehash_bucket *tcp_ehash;
-
 /* This is for listening sockets, thus all sockets which possess wildcards. */
 #define TCP_LHTABLE_SIZE	32	/* Yes, really, this is all you need. */
 
-/* tcp_ipv4.c: These need to be shared by v4 and v6 because the lookup
- *             and hashing code needs to work with different AF's yet
- *             the port space is shared.
- */
-extern struct sock *tcp_listening_hash[TCP_LHTABLE_SIZE];
-extern rwlock_t tcp_lhash_lock;
-extern atomic_t tcp_lhash_users;
-extern wait_queue_head_t tcp_lhash_wait;
-
 /* There are a few simple rules, which allow for local port reuse by
  * an application.  In essence:
  *
@@ -101,9 +89,53 @@ struct tcp_bind_hashbucket {
 	struct tcp_bind_bucket	*chain;
 };
 
-extern struct tcp_bind_hashbucket *tcp_bhash;
-extern int tcp_bhash_size;
-extern spinlock_t tcp_portalloc_lock;
+extern struct tcp_hashinfo {
+	/* This is for sockets with full identity only.  Sockets here will
+	 * always be without wildcards and will have the following invariant:
+	 *
+	 *          TCP_ESTABLISHED <= sk->state < TCP_CLOSE
+	 *
+	 * First half of the table is for sockets not in TIME_WAIT, second half
+	 * is for TIME_WAIT sockets only.
+	 */
+	struct tcp_ehash_bucket *__tcp_ehash;
+
+	/* Ok, let's try this, I give up, we do need a local binding
+	 * TCP hash as well as the others for fast bind/connect.
+	 */
+	struct tcp_bind_hashbucket *__tcp_bhash;
+
+	int __tcp_bhash_size;
+	int __tcp_ehash_size;
+
+	/* All sockets in TCP_LISTEN state will be in here.  This is the only
+	 * table where wildcard'd TCP sockets can exist.  Hash function here
+	 * is just local port number.
+	 */
+	struct sock *__tcp_listening_hash[TCP_LHTABLE_SIZE];
+
+	/* All the above members are written once at bootup and
+	 * never written again _or_ are predominantly read-access.
+	 *
+	 * Now align to a new cache line as all the following members
+	 * are often dirty.
+	 */
+	rwlock_t __tcp_lhash_lock
+		__attribute__((__aligned__(SMP_CACHE_BYTES)));
+	atomic_t __tcp_lhash_users;
+	wait_queue_head_t __tcp_lhash_wait;
+	spinlock_t __tcp_portalloc_lock;
+} tcp_hashinfo;
+
+#define tcp_ehash	(tcp_hashinfo.__tcp_ehash)
+#define tcp_bhash	(tcp_hashinfo.__tcp_bhash)
+#define tcp_ehash_size	(tcp_hashinfo.__tcp_ehash_size)
+#define tcp_bhash_size	(tcp_hashinfo.__tcp_bhash_size)
+#define tcp_listening_hash (tcp_hashinfo.__tcp_listening_hash)
+#define tcp_lhash_lock	(tcp_hashinfo.__tcp_lhash_lock)
+#define tcp_lhash_users	(tcp_hashinfo.__tcp_lhash_users)
+#define tcp_lhash_wait	(tcp_hashinfo.__tcp_lhash_wait)
+#define tcp_portalloc_lock (tcp_hashinfo.__tcp_portalloc_lock)
 
 extern kmem_cache_t *tcp_bucket_cachep;
 extern struct tcp_bind_bucket *tcp_bucket_create(struct tcp_bind_hashbucket *head,
diff --git a/include/net/x25.h b/include/net/x25.h
index fb8346f81..fc3d83ee4 100644
--- a/include/net/x25.h
+++ b/include/net/x25.h
@@ -154,8 +154,6 @@ extern void x25_destroy_socket(struct sock *);
 extern int  x25_rx_call_request(struct sk_buff *, struct x25_neigh *, unsigned int);
 extern void x25_kill_by_neigh(struct x25_neigh *);
 
-#include <net/x25call.h>
-
 /* x25_dev.c */
 extern void x25_send_frame(struct sk_buff *, struct x25_neigh *);
 extern int  x25_lapb_receive_frame(struct sk_buff *, struct net_device *, struct packet_type *);
diff --git a/include/net/x25call.h b/include/net/x25call.h
deleted file mode 100644
index 7c478a1d9..000000000
--- a/include/net/x25call.h
+++ /dev/null
@@ -1,2 +0,0 @@
-/* Separate to keep compilation of protocols.c simpler */
-extern void x25_proto_init(struct net_proto *pro);
diff --git a/include/pcmcia/version.h b/include/pcmcia/version.h
index 70f3d8a48..eb88263fc 100644
--- a/include/pcmcia/version.h
+++ b/include/pcmcia/version.h
@@ -1,4 +1,4 @@
-/* version.h 1.92 2000/07/21 18:26:56 (David Hinds) */
+/* version.h 1.94 2000/10/03 17:55:48 (David Hinds) */
 
-#define CS_RELEASE "3.1.20"
-#define CS_RELEASE_CODE 0x3115
+#define CS_RELEASE "3.1.22"
+#define CS_RELEASE_CODE 0x3116